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| author | Andrew Burgess <andrew.burgess@embecosm.com> | 2018-12-13 19:06:23 +0000 |
|---|---|---|
| committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2018-12-22 10:02:20 +0000 |
| commit | ecc82c059059cfa21a8a099779253686f9637f9f (patch) | |
| tree | 7dab3fa09b096efe9452109ed7beb329f302d87c /gdb/python/py-symtab.c | |
| parent | fb44d95af64dd0609760c1400b9ce4da09296cd1 (diff) | |
| download | binutils-ecc82c059059cfa21a8a099779253686f9637f9f.zip binutils-ecc82c059059cfa21a8a099779253686f9637f9f.tar.gz binutils-ecc82c059059cfa21a8a099779253686f9637f9f.tar.bz2 | |
gdb/riscv: Add float status registers to save and restore reggroups
We should save and restore the floating point status registers. This
became an issue when testing 32-bit float on a target with 64-bit with
the gdb.base/callfuncs.exp test.
gdb/ChangeLog:
* riscv-tdep.c (riscv_register_reggroup_p): Save and restore fcsr,
fflags, and frm registers.
Diffstat (limited to 'gdb/python/py-symtab.c')
0 files changed, 0 insertions, 0 deletions