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author | Luis Machado <luis.machado@linaro.org> | 2020-12-22 17:45:21 -0300 |
---|---|---|
committer | Luis Machado <luis.machado@linaro.org> | 2021-01-04 12:18:31 -0300 |
commit | 098caef485a4ece6096e6cdbb4cd9726e4a13386 (patch) | |
tree | bc5808e3f19fbcdf402c9c5e11a52dacff679412 /gdb/arm-tdep.c | |
parent | dbb078f66ecfe2d50fd3e03463b5b206a8eed243 (diff) | |
download | binutils-098caef485a4ece6096e6cdbb4cd9726e4a13386.zip binutils-098caef485a4ece6096e6cdbb4cd9726e4a13386.tar.gz binutils-098caef485a4ece6096e6cdbb4cd9726e4a13386.tar.bz2 |
Refactor struct trad_frame_saved_regs
The following patch drops the overloading going on with the trad_frame_saved_reg
struct and defines a new struct with a KIND enum and a union of different
fields.
The new struct looks like this:
struct trad_frame_saved_reg
{
setters/getters
...
private:
trad_frame_saved_reg_kind m_kind;
union {
LONGEST value;
int realreg;
LONGEST addr;
const gdb_byte *value_bytes;
} m_reg;
};
And the enums look like this:
/* Describes the kind of encoding a stored register has. */
enum class trad_frame_saved_reg_kind
{
/* Register value is unknown. */
UNKNOWN = 0,
/* Register value is a constant. */
VALUE,
/* Register value is in another register. */
REALREG,
/* Register value is at an address. */
ADDR,
/* Register value is a sequence of bytes. */
VALUE_BYTES
};
The patch also adds setters/getters and updates all the users of the old
struct.
It is worth mentioning that due to the previous overloaded nature of the
fields, some tdep files like to store negative offsets and indexes in the ADDR
field, so I kept the ADDR as LONGEST instead of CORE_ADDR. Those cases may
be better supported by a new enum entry.
I have not addressed those cases in this patch to prevent unwanted breakage,
given I have no way to test some of the targets. But it would be nice to
clean those up eventually.
The change to frame-unwind.* is to constify the parameter being passed to the
unwinding functions, given we now accept a "const gdb_byte *" for value bytes.
Tested on aarch64-linux/Ubuntu 20.04/18.04 and by building GDB with
--enable-targets=all.
gdb/ChangeLog:
2021-01-04 Luis Machado <luis.machado@linaro.org>
Update all users of trad_frame_saved_reg to use the new member
functions.
Remote all struct keywords from declarations of trad_frame_saved_reg
types, except on forward declarations.
* aarch64-tdep.c: Update.
* alpha-mdebug-tdep.c: Update.
* alpha-tdep.c: Update.
* arc-tdep.c: Update.
* arm-tdep.c: Update.
* avr-tdep.c: Update.
* cris-tdep.c: Update.
* csky-tdep.c: Update.
* frv-tdep.c: Update.
* hppa-linux-tdep.c: Update.
* hppa-tdep.c: Update.
* hppa-tdep.h: Update.
* lm32-tdep.c: Update.
* m32r-linux-tdep.c: Update.
* m32r-tdep.c: Update.
* m68hc11-tdep.c: Update.
* mips-tdep.c: Update.
* moxie-tdep.c: Update.
* riscv-tdep.c: Update.
* rs6000-tdep.c: Update.
* s390-linux-tdep.c: Update.
* s390-tdep.c: Update.
* score-tdep.c: Update.
* sparc-netbsd-tdep.c: Update.
* sparc-sol2-tdep.c: Update.
* sparc64-fbsd-tdep.c: Update.
* sparc64-netbsd-tdep.c: Update.
* sparc64-obsd-tdep.c: Update.
* sparc64-sol2-tdep.c: Update.
* tilegx-tdep.c: Update.
* v850-tdep.c: Update.
* vax-tdep.c: Update.
* frame-unwind.c (frame_unwind_got_bytes): Make parameter const.
* frame-unwind.h (frame_unwind_got_bytes): Likewise.
* trad-frame.c: Update.
Remove TF_REG_* enum.
(trad_frame_alloc_saved_regs): Add a static assertion to check for
a trivially-constructible struct.
(trad_frame_reset_saved_regs): Adjust to use member function.
(trad_frame_value_p): Likewise.
(trad_frame_addr_p): Likewise.
(trad_frame_realreg_p): Likewise.
(trad_frame_value_bytes_p): Likewise.
(trad_frame_set_value): Likewise.
(trad_frame_set_realreg): Likewise.
(trad_frame_set_addr): Likewise.
(trad_frame_set_unknown): Likewise.
(trad_frame_set_value_bytes): Likewise.
(trad_frame_get_prev_register): Likewise.
* trad-frame.h: Update.
(trad_frame_saved_reg_kind): New enum.
(struct trad_frame_saved_reg) <addr, realreg, data>: Remove.
<m_kind, m_reg>: New member fields.
<set_value, set_realreg, set_addr, set_unknown, set_value_bytes>
<kind, value, realreg, addr, value_bytes, is_value, is_realreg>
<is_addr, is_unknown, is_value_bytes>: New member functions.
Diffstat (limited to 'gdb/arm-tdep.c')
-rw-r--r-- | gdb/arm-tdep.c | 62 |
1 files changed, 32 insertions, 30 deletions
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index bf7fdcd..9e4cf07 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -282,7 +282,7 @@ struct arm_prologue_cache int framereg; /* Saved register offsets. */ - struct trad_frame_saved_reg *saved_regs; + trad_frame_saved_reg *saved_regs; }; namespace { @@ -1153,7 +1153,7 @@ thumb_analyze_prologue (struct gdbarch *gdbarch, for (i = 0; i < 16; i++) if (stack.find_reg (gdbarch, i, &offset)) - cache->saved_regs[i].addr = offset; + cache->saved_regs[i].set_addr (offset); return unrecognized_pc; } @@ -1779,7 +1779,7 @@ arm_analyze_prologue (struct gdbarch *gdbarch, for (regno = 0; regno < ARM_FPS_REGNUM; regno++) if (stack.find_reg (gdbarch, regno, &offset)) - cache->saved_regs[regno].addr = offset; + cache->saved_regs[regno].set_addr (offset); } if (arm_debug) @@ -1907,7 +1907,8 @@ arm_make_prologue_cache (struct frame_info *this_frame) determined by arm_scan_prologue. */ for (reg = 0; reg < gdbarch_num_regs (get_frame_arch (this_frame)); reg++) if (trad_frame_addr_p (cache->saved_regs, reg)) - cache->saved_regs[reg].addr += cache->prev_sp; + cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr () + + cache->prev_sp); return cache; } @@ -2367,12 +2368,12 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) { if (trad_frame_realreg_p (cache->saved_regs, ARM_SP_REGNUM)) { - int reg = cache->saved_regs[ARM_SP_REGNUM].realreg; + int reg = cache->saved_regs[ARM_SP_REGNUM].realreg (); vsp = get_frame_register_unsigned (this_frame, reg); } else { - CORE_ADDR addr = cache->saved_regs[ARM_SP_REGNUM].addr; + CORE_ADDR addr = cache->saved_regs[ARM_SP_REGNUM].addr (); vsp = get_frame_memory_unsigned (this_frame, addr, 4); } @@ -2407,7 +2408,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) for (i = 0; i < 12; i++) if (mask & (1 << i)) { - cache->saved_regs[4 + i].addr = vsp; + cache->saved_regs[4 + i].set_addr (vsp); vsp += 4; } @@ -2436,14 +2437,14 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* Pop r4..r[4+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[4 + i].addr = vsp; + cache->saved_regs[4 + i].set_addr (vsp); vsp += 4; } /* If indicated by flag, pop LR as well. */ if (pop_lr) { - cache->saved_regs[ARM_LR_REGNUM].addr = vsp; + cache->saved_regs[ARM_LR_REGNUM].set_addr (vsp); vsp += 4; } } @@ -2471,7 +2472,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) for (i = 0; i < 4; i++) if (mask & (1 << i)) { - cache->saved_regs[i].addr = vsp; + cache->saved_regs[i].set_addr (vsp); vsp += 4; } } @@ -2502,7 +2503,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* Pop VFP double-precision registers D[start]..D[start+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[ARM_D0_REGNUM + start + i].addr = vsp; + cache->saved_regs[ARM_D0_REGNUM + start + i].set_addr (vsp); vsp += 8; } @@ -2517,7 +2518,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* Pop VFP double-precision registers D[8]..D[8+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[ARM_D0_REGNUM + 8 + i].addr = vsp; + cache->saved_regs[ARM_D0_REGNUM + 8 + i].set_addr (vsp); vsp += 8; } @@ -2537,7 +2538,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* Pop iwmmx registers WR[start]..WR[start+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[ARM_WR0_REGNUM + start + i].addr = vsp; + cache->saved_regs[ARM_WR0_REGNUM + start + i].set_addr (vsp); vsp += 8; } } @@ -2554,7 +2555,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) for (i = 0; i < 4; i++) if (mask & (1 << i)) { - cache->saved_regs[ARM_WCGR0_REGNUM + i].addr = vsp; + cache->saved_regs[ARM_WCGR0_REGNUM + i].set_addr (vsp); vsp += 4; } } @@ -2566,7 +2567,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* Pop iwmmx registers WR[10]..WR[10+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[ARM_WR0_REGNUM + 10 + i].addr = vsp; + cache->saved_regs[ARM_WR0_REGNUM + 10 + i].set_addr (vsp); vsp += 8; } } @@ -2584,7 +2585,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) D[16+start]..D[16+start+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[ARM_D0_REGNUM + 16 + start + i].addr = vsp; + cache->saved_regs[ARM_D0_REGNUM + 16 + start + i].set_addr (vsp); vsp += 8; } } @@ -2597,7 +2598,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* Pop VFP double-precision registers D[start]..D[start+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[ARM_D0_REGNUM + start + i].addr = vsp; + cache->saved_regs[ARM_D0_REGNUM + start + i].set_addr (vsp); vsp += 8; } } @@ -2609,7 +2610,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* Pop VFP double-precision registers D[8]..D[8+count]. */ for (i = 0; i <= count; i++) { - cache->saved_regs[ARM_D0_REGNUM + 8 + i].addr = vsp; + cache->saved_regs[ARM_D0_REGNUM + 8 + i].set_addr (vsp); vsp += 8; } } @@ -2623,7 +2624,7 @@ arm_exidx_fill_cache (struct frame_info *this_frame, gdb_byte *entry) /* If we restore SP from a register, assume this was the frame register. Otherwise just fall back to SP as frame register. */ if (trad_frame_realreg_p (cache->saved_regs, ARM_SP_REGNUM)) - cache->framereg = cache->saved_regs[ARM_SP_REGNUM].realreg; + cache->framereg = cache->saved_regs[ARM_SP_REGNUM].realreg (); else cache->framereg = ARM_SP_REGNUM; @@ -2760,7 +2761,8 @@ arm_make_epilogue_frame_cache (struct frame_info *this_frame) determined by arm_scan_prologue. */ for (reg = 0; reg < gdbarch_num_regs (get_frame_arch (this_frame)); reg++) if (trad_frame_addr_p (cache->saved_regs, reg)) - cache->saved_regs[reg].addr += cache->prev_sp; + cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr () + + cache->prev_sp); return cache; } @@ -3037,14 +3039,14 @@ arm_m_exception_cache (struct frame_info *this_frame) ReturnAddress, LR (R14), R12, R3, R2, R1, R0. See details in "B1.5.6 Exception entry behavior" in "ARMv7-M Architecture Reference Manual". */ - cache->saved_regs[0].addr = unwound_sp; - cache->saved_regs[1].addr = unwound_sp + 4; - cache->saved_regs[2].addr = unwound_sp + 8; - cache->saved_regs[3].addr = unwound_sp + 12; - cache->saved_regs[ARM_IP_REGNUM].addr = unwound_sp + 16; - cache->saved_regs[ARM_LR_REGNUM].addr = unwound_sp + 20; - cache->saved_regs[ARM_PC_REGNUM].addr = unwound_sp + 24; - cache->saved_regs[ARM_PS_REGNUM].addr = unwound_sp + 28; + cache->saved_regs[0].set_addr (unwound_sp); + cache->saved_regs[1].set_addr (unwound_sp + 4); + cache->saved_regs[2].set_addr (unwound_sp + 8); + cache->saved_regs[3].set_addr (unwound_sp + 12); + cache->saved_regs[ARM_IP_REGNUM].set_addr (unwound_sp + 16); + cache->saved_regs[ARM_LR_REGNUM].set_addr (unwound_sp + 20); + cache->saved_regs[ARM_PC_REGNUM].set_addr (unwound_sp + 24); + cache->saved_regs[ARM_PS_REGNUM].set_addr (unwound_sp + 28); /* Check EXC_RETURN bit FTYPE if extended stack frame (FPU regs stored) type used. */ @@ -3066,10 +3068,10 @@ arm_m_exception_cache (struct frame_info *this_frame) fpu_regs_stack_offset = unwound_sp + 0x20; for (i = 0; i < 16; i++) { - cache->saved_regs[ARM_D0_REGNUM + i].addr = fpu_regs_stack_offset; + cache->saved_regs[ARM_D0_REGNUM + i].set_addr (fpu_regs_stack_offset); fpu_regs_stack_offset += 4; } - cache->saved_regs[ARM_FPSCR_REGNUM].addr = unwound_sp + 0x60; + cache->saved_regs[ARM_FPSCR_REGNUM].set_addr (unwound_sp + 0x60); /* Offset 0x64 is reserved. */ cache->prev_sp = unwound_sp + 0x68; |