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author | Luis Machado <luis.machado@linaro.org> | 2020-06-15 13:52:27 -0300 |
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committer | Luis Machado <luis.machado@linaro.org> | 2021-03-24 14:52:08 -0300 |
commit | c1bd443b4d86e12f2a97856270e40df24c7f3df7 (patch) | |
tree | 9aae2ce3110607d8710532a75ff12c529f1cd78d /gdb/aarch64-tdep.c | |
parent | 0424512519142571509c67e83cd9dc2ed51d2dec (diff) | |
download | binutils-c1bd443b4d86e12f2a97856270e40df24c7f3df7.zip binutils-c1bd443b4d86e12f2a97856270e40df24c7f3df7.tar.gz binutils-c1bd443b4d86e12f2a97856270e40df24c7f3df7.tar.bz2 |
AArch64: Add target description/feature for MTE registers
This patch adds a target description and feature "mte" for aarch64.
It includes one new register, tag_ctl, that can be used to configure the
tag generation rules and sync/async modes. It is 64-bit in size.
The patch also adjusts the code that creates the target descriptions at
runtime based on CPU feature checks.
gdb/ChangeLog:
2021-03-24 Luis Machado <luis.machado@linaro.org>
* aarch64-linux-nat.c
(aarch64_linux_nat_target::read_description): Take MTE flag into
account.
Slight refactor to hwcap flag checking.
* aarch64-linux-tdep.c
(aarch64_linux_core_read_description): Likewise.
* aarch64-tdep.c (tdesc_aarch64_list): Add one more dimension for
MTE.
(aarch64_read_description): Add mte_p parameter and update to use it.
Update the documentation.
(aarch64_gdbarch_init): Update call to aarch64_read_description.
* aarch64-tdep.h (aarch64_read_description): Add mte_p parameter.
* arch/aarch64.c: Include ../features/aarch64-mte.c.
(aarch64_create_target_description): Add mte_p parameter and update
the code to use it.
* arch/aarch64.h (aarch64_create_target_description): Add mte_p
parameter.
* features/Makefile (FEATURE_XMLFILES): Add aarch64-mte.xml.
* features/aarch64-mte.c: New file, generated.
* features/aarch64-mte.xml: New file.
gdbserver/ChangeLog:
2021-03-24 Luis Machado <luis.machado@linaro.org>
* linux-aarch64-ipa.cc (get_ipa_tdesc): Update call to
aarch64_linux_read_description.
(initialize_low_tracepoint): Likewise.
* linux-aarch64-low.cc (aarch64_target::low_arch_setup): Take MTE flag
into account.
* linux-aarch64-tdesc.cc (tdesc_aarch64_list): Add one more dimension
for MTE.
(aarch64_linux_read_description): Add mte_p parameter and update to
use it.
* linux-aarch64-tdesc.h (aarch64_linux_read_description): Add mte_p
parameter.
Diffstat (limited to 'gdb/aarch64-tdep.c')
-rw-r--r-- | gdb/aarch64-tdep.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 3ac0564..685c50b 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -58,7 +58,7 @@ #define HA_MAX_NUM_FLDS 4 /* All possible aarch64 target descriptors. */ -static target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/]; +static target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/][2 /* mte */]; /* The standard register names, and all the valid aliases for them. */ static const struct @@ -3260,21 +3260,23 @@ aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch) /* Get the correct target description for the given VQ value. If VQ is zero then it is assumed SVE is not supported. - (It is not possible to set VQ to zero on an SVE system). */ + (It is not possible to set VQ to zero on an SVE system). + + MTE_P indicates the presence of the Memory Tagging Extension feature. */ const target_desc * -aarch64_read_description (uint64_t vq, bool pauth_p) +aarch64_read_description (uint64_t vq, bool pauth_p, bool mte_p) { if (vq > AARCH64_MAX_SVE_VQ) error (_("VQ is %" PRIu64 ", maximum supported value is %d"), vq, AARCH64_MAX_SVE_VQ); - struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p]; + struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p][mte_p]; if (tdesc == NULL) { - tdesc = aarch64_create_target_description (vq, pauth_p); - tdesc_aarch64_list[vq][pauth_p] = tdesc; + tdesc = aarch64_create_target_description (vq, pauth_p, mte_p); + tdesc_aarch64_list[vq][pauth_p][mte_p] = tdesc; } return tdesc; @@ -3374,7 +3376,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) value. */ const struct target_desc *tdesc = info.target_desc; if (!tdesc_has_registers (tdesc) || vq != aarch64_get_tdesc_vq (tdesc)) - tdesc = aarch64_read_description (vq, false); + tdesc = aarch64_read_description (vq, false, false); gdb_assert (tdesc); feature_core = tdesc_find_feature (tdesc,"org.gnu.gdb.aarch64.core"); |