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authorLuis Machado <luis.machado@arm.com>2023-04-04 17:20:46 +0100
committerLuis Machado <luis.machado@arm.com>2023-10-04 16:23:40 +0100
commit42019af621005a274d1a658f4c752a98fe5bab8e (patch)
treee1ffbb608ef942726edb6a813fde7c2b5f4ac384 /gdb/aarch64-tdep.c
parent6762e153a9e4e450b1a9904f9c96ec9f9b4cbc31 (diff)
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sme2: Enable SME2 for AArch64 gdb on Linux
SME2 defines a new 512-bit register named ZT0, and it is only available if SME is also supported. The ZT0 state is valid only if the SVCR ZA bit is enabled. Otherwise its contents are empty (0). The target description is dynamic and gets generated at runtime based on the availability of the feature. Validated under Fast Models. Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
Diffstat (limited to 'gdb/aarch64-tdep.c')
-rw-r--r--gdb/aarch64-tdep.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 8e7259a..eaae2d9 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -4048,6 +4048,10 @@ aarch64_features_from_target_desc (const struct target_desc *tdesc)
features.svq = aarch64_get_tdesc_svq (tdesc);
+ /* Check for the SME2 feature. */
+ features.sme2 = (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sme2")
+ != nullptr);
+
return features;
}
@@ -4310,6 +4314,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
}
int first_sme_regnum = -1;
+ int first_sme2_regnum = -1;
int first_sme_pseudo_regnum = -1;
const struct tdesc_feature *feature_sme
= tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sme");
@@ -4336,6 +4341,19 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Add the ZA tile pseudo registers. */
num_pseudo_regs += AARCH64_ZA_TILES_NUM;
+
+ /* Now check for the SME2 feature. SME2 is only available if SME is
+ available. */
+ const struct tdesc_feature *feature_sme2
+ = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sme2");
+ if (feature_sme2 != nullptr)
+ {
+ /* Record the first SME2 register. */
+ first_sme2_regnum = num_regs;
+
+ valid_p &= tdesc_numbered_register (feature_sme2, tdesc_data.get (),
+ num_regs++, "zt0");
+ }
}
/* Add the TLS register. */
@@ -4459,6 +4477,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep->sme_za_regnum = first_sme_regnum + 2;
tdep->sme_svq = svq;
+ /* Set the SME2 register set details. */
+ tdep->sme2_zt0_regnum = first_sme2_regnum;
+
set_gdbarch_push_dummy_call (gdbarch, aarch64_push_dummy_call);
set_gdbarch_frame_align (gdbarch, aarch64_frame_align);