x86: fold RegEip/RegRip and RegEiz/RegRiz

This allows to simplify the code in a number of places.

4 files changed, 45 insertions, 63 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5959b11..ccee98e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2018-08-06  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (build_modrm_byte): Use RegIP and RegIZ.
+	(output_disp): Use RegIP.
+	(i386_addressing_mode): Drop uses of RegEip and RegEiz.
+	(i386_index_check): Replace uses of RegEip/RegEiz.
+	(parse_real_register): Use RegIZ.
+	* config/tc-i386-intel.c (i386_intel_simplify_register): Use
+	RegIZ.
+	* testsuite/gas/i386/x86-64-mpx-inval-2.l: Adjust expectations.
+
 2018-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* testsuite/gas/i386/i386.exp: Run evex-no-scale-32 and
diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c
index dd509d5..fee9063 100644
--- a/gas/config/tc-i386-intel.c
+++ b/gas/config/tc-i386-intel.c
@@ -289,8 +289,7 @@ i386_intel_simplify_register (expressionS *e)
 	   && (i386_regtab[reg_num].reg_type.bitfield.xmmword
 	       || i386_regtab[reg_num].reg_type.bitfield.ymmword
 	       || i386_regtab[reg_num].reg_type.bitfield.zmmword
-	       || i386_regtab[reg_num].reg_num == RegRiz
-	       || i386_regtab[reg_num].reg_num == RegEiz))
+	       || i386_regtab[reg_num].reg_num == RegIZ))
     intel_state.index = i386_regtab + reg_num;
   else if (!intel_state.base && !intel_state.in_scale)
     intel_state.base = i386_regtab + reg_num;
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index e9e55f4..87cbadb 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7094,8 +7094,7 @@ build_modrm_byte (void)
 
 	  if (i.tm.opcode_modifier.vecsib)
 	    {
-	      if (i.index_reg->reg_num == RegEiz
-		  || i.index_reg->reg_num == RegRiz)
+	      if (i.index_reg->reg_num == RegIZ)
 		abort ();
 
 	      i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
@@ -7166,8 +7165,7 @@ build_modrm_byte (void)
 	      else if (!i.tm.opcode_modifier.vecsib)
 		{
 		  /* !i.base_reg && i.index_reg  */
-		  if (i.index_reg->reg_num == RegEiz
-		      || i.index_reg->reg_num == RegRiz)
+		  if (i.index_reg->reg_num == RegIZ)
 		    i.sib.index = NO_INDEX_REGISTER;
 		  else
 		    i.sib.index = i.index_reg->reg_num;
@@ -7193,8 +7191,7 @@ build_modrm_byte (void)
 		}
 	    }
 	  /* RIP addressing for 64bit mode.  */
-	  else if (i.base_reg->reg_num == RegRip ||
-		   i.base_reg->reg_num == RegEip)
+	  else if (i.base_reg->reg_num == RegIP)
 	    {
 	      gas_assert (!i.tm.opcode_modifier.vecsib);
 	      i.rm.regmem = NO_BASE_REGISTER;
@@ -7286,8 +7283,7 @@ build_modrm_byte (void)
 		}
 	      else if (!i.tm.opcode_modifier.vecsib)
 		{
-		  if (i.index_reg->reg_num == RegEiz
-		      || i.index_reg->reg_num == RegRiz)
+		  if (i.index_reg->reg_num == RegIZ)
 		    i.sib.index = NO_INDEX_REGISTER;
 		  else
 		    i.sib.index = i.index_reg->reg_num;
@@ -8133,8 +8129,7 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off)
 		    {
 		      fixP->fx_tcbit = i.rex != 0;
 		      if (i.base_reg
-			  && (i.base_reg->reg_num == RegRip
-			      || i.base_reg->reg_num == RegEip))
+			  && (i.base_reg->reg_num == RegIP))
 		      fixP->fx_tcbit2 = 1;
 		    }
 		  else
@@ -9235,9 +9230,7 @@ i386_addressing_mode (void)
 
 	  if (addr_reg)
 	    {
-	      if (addr_reg->reg_num == RegEip
-		  || addr_reg->reg_num == RegEiz
-		  || addr_reg->reg_type.bitfield.dword)
+	      if (addr_reg->reg_type.bitfield.dword)
 		addr_mode = CODE_32BIT;
 	      else if (flag_code != CODE_64BIT
 		       && addr_reg->reg_type.bitfield.word)
@@ -9347,21 +9340,18 @@ bad_address:
 	{
 	  /* 32-bit/64-bit checks.  */
 	  if ((i.base_reg
-	       && (addr_mode == CODE_64BIT
-		   ? !i.base_reg->reg_type.bitfield.qword
-		   : !i.base_reg->reg_type.bitfield.dword)
-	       && (i.index_reg
-		   || (i.base_reg->reg_num
-		       != (addr_mode == CODE_64BIT ? RegRip : RegEip))))
+	       && ((addr_mode == CODE_64BIT
+		    ? !i.base_reg->reg_type.bitfield.qword
+		    : !i.base_reg->reg_type.bitfield.dword)
+		   || (i.index_reg && i.base_reg->reg_num == RegIP)
+		   || i.base_reg->reg_num == RegIZ))
 	      || (i.index_reg
 		  && !i.index_reg->reg_type.bitfield.xmmword
 		  && !i.index_reg->reg_type.bitfield.ymmword
 		  && !i.index_reg->reg_type.bitfield.zmmword
 		  && ((addr_mode == CODE_64BIT
-		       ? !(i.index_reg->reg_type.bitfield.qword
-			   || i.index_reg->reg_num == RegRiz)
-		       : !(i.index_reg->reg_type.bitfield.dword
-			   || i.index_reg->reg_num == RegEiz))
+		       ? !i.index_reg->reg_type.bitfield.qword
+		       : !i.index_reg->reg_type.bitfield.dword)
 		      || !i.index_reg->reg_type.bitfield.baseindex)))
 	    goto bad_address;
 
@@ -9370,7 +9360,7 @@ bad_address:
 	      || (current_templates->start->base_opcode & ~1) == 0x0f1a)
 	    {
 	      /* They cannot use RIP-relative addressing. */
-	      if (i.base_reg && i.base_reg->reg_num == RegRip)
+	      if (i.base_reg && i.base_reg->reg_num == RegIP)
 		{
 		  as_bad (_("`%s' cannot be used here"), operand_string);
 		  return 0;
@@ -10430,8 +10420,7 @@ parse_real_register (char *reg_string, char **end_op)
     return (const reg_entry *) NULL;
 
   /* Don't allow fake index register unless allow_index_reg isn't 0. */
-  if (!allow_index_reg
-      && (r->reg_num == RegEiz || r->reg_num == RegRiz))
+  if (!allow_index_reg && r->reg_num == RegIZ)
     return (const reg_entry *) NULL;
 
   /* Upper 16 vector registers are only available with VREX in 64bit
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l b/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l
index e4feae9..0fc4e31 100644
--- a/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l
+++ b/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l
@@ -2,7 +2,7 @@
 .*:6: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:7: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:8: Error: `\(%rip\)' cannot be used here
-.*:9: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:9: Error: .*
 .*:12: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:13: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:15: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
@@ -23,16 +23,16 @@
 .*:38: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:39: Warning: register scaling is being ignored here
 .*:40: Error: `base\(%rip\)' cannot be used here
-.*:41: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:41: Error: .*
 .*:44: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:45: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:46: Warning: register scaling is being ignored here
 .*:47: Error: `base\(%rip\)' cannot be used here
-.*:48: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:48: Error: .*
 .*:51: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:52: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:53: Error: `\[rip\]' cannot be used here
-.*:54: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:54: Error: .*
 .*:55: Error: `\[rax\+rsp\]' is not a valid base/index expression
 .*:58: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:59: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
@@ -54,13 +54,13 @@
 .*:84: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:85: Warning: register scaling is being ignored here
 .*:86: Error: `\[rip\+base\]' cannot be used here
-.*:87: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:87: Error: .*
 .*:88: Error: `\[rax\+rsp\]' is not a valid base/index expression
 .*:91: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:92: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
 .*:93: Warning: register scaling is being ignored here
 .*:94: Error: `\[rip\+base\]' cannot be used here
-.*:95: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:95: Error: .*
 .*:96: Error: `\[rax\+rsp\]' is not a valid base/index expression
 GAS LISTING .*
 
@@ -77,10 +77,7 @@ GAS LISTING .*
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
 [ 	]*[1-9][0-9]*[ 	]+4C1903
 [ 	]*[1-9][0-9]*[ 	]+bndmk \(%rip\), %bnd3
-[ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 67F30F1B 		bndmk \(%eip\), %bnd2
-.*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
-[ 	]*[1-9][0-9]*[ 	]+15000000 
-[ 	]*[1-9][0-9]*[ 	]+00
+[ 	]*[1-9][0-9]*[ 	]+bndmk \(%eip\), %bnd2
 [ 	]*[1-9][0-9]*[ 	]+
 [ 	]*[1-9][0-9]*[ 	]+\#\#\# bndmov
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 6766410F 		bndmov \(%r8d\), %bnd1
@@ -122,12 +119,12 @@ GAS LISTING .*
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
 [ 	]*[1-9][0-9]*[ 	]+09
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 67F20F1B 		bndcn 0x3\(%ecx,%eax,1\), %bnd1
-GAS LISTING .*
-
-
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
 [ 	]*[1-9][0-9]*[ 	]+4C0103
 [ 	]*[1-9][0-9]*[ 	]+bndcn %ecx, %bnd1
+GAS LISTING .*
+
+
 [ 	]*[1-9][0-9]*[ 	]+bndcn %cx, %bnd1
 [ 	]*[1-9][0-9]*[ 	]+
 [ 	]*[1-9][0-9]*[ 	]+\#\#\# bndstx
@@ -141,9 +138,7 @@ GAS LISTING .*
 .*  Warning: register scaling is being ignored here
 [ 	]*[1-9][0-9]*[ 	]+47
 [ 	]*[1-9][0-9]*[ 	]+bndstx %bnd3, base\(%rip\)
-[ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 670F1B0D 		bndstx %bnd1, base\(%eip\)
-.*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
-[ 	]*[1-9][0-9]*[ 	]+[0-9A-F]+ 
+[ 	]*[1-9][0-9]*[ 	]+bndstx %bnd1, base\(%eip\)
 [ 	]*[1-9][0-9]*[ 	]+
 [ 	]*[1-9][0-9]*[ 	]+\#\#\# bndldx
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 670F1A44 		bndldx 0x3\(%eax,%ebx,1\), %bnd0
@@ -156,9 +151,7 @@ GAS LISTING .*
 .*  Warning: register scaling is being ignored here
 [ 	]*[1-9][0-9]*[ 	]*B8
 [ 	]*[1-9][0-9]*[ 	]*bndldx base\(%rip\), %bnd1
-[ 	]*[1-9][0-9]*[ 	]*\?\?\?\? 670F1A1D 		bndldx base\(%eip\), %bnd3
-.*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
-[ 	]*[1-9][0-9]*[ 	]+[0-9A-F]+ 
+[ 	]*[1-9][0-9]*[ 	]*bndldx base\(%eip\), %bnd3
 [ 	]*[1-9][0-9]*[ 	]+
 [ 	]*[1-9][0-9]*[ 	]+\.intel_syntax noprefix
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 67F30F1B 		bndmk bnd1, \[eax\]
@@ -168,10 +161,7 @@ GAS LISTING .*
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
 [ 	]*[1-9][0-9]*[ 	]+4C0203
 [ 	]*[1-9][0-9]*[ 	]*bndmk bnd3, \[rip\]
-[ 	]*[1-9][0-9]*[ 	]*\?\?\?\? 67F30F1B 		bndmk bnd2, \[eip\]
-.*  Error: 32-bit address isn't allowed in 64-bit MPX instructions.
-[ 	]*[1-9][0-9]*[ 	]*15000000 
-[ 	]*[1-9][0-9]*[ 	]*00
+[ 	]*[1-9][0-9]*[ 	]*bndmk bnd2, \[eip\]
 [ 	]*[1-9][0-9]*[ 	]+bndmk bnd2, \[rax\+rsp\]
 [ 	]*[1-9][0-9]*[ 	]+
 [ 	]*[1-9][0-9]*[ 	]+\#\#\# bndmov
@@ -182,9 +172,6 @@ GAS LISTING .*
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
 [ 	]*[1-9][0-9]*[ 	]+4C0203
 [ 	]*[1-9][0-9]*[ 	]+
-GAS LISTING .*
-
-
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 67660F1B 		bndmov \[eax\], bnd1
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
 [ 	]*[1-9][0-9]*[ 	]+08
@@ -195,6 +182,9 @@ GAS LISTING .*
 [ 	]*[1-9][0-9]*[ 	]+\#\#\# bndcl
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 67F30F1A 		bndcl bnd1, \[eax\]
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
+GAS LISTING .*
+
+
 [ 	]*[1-9][0-9]*[ 	]+08
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 67F30F1A 		bndcl bnd1, \[edx\+1\*eax\+0x3\]
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
@@ -234,17 +224,12 @@ GAS LISTING .*
 .*  Warning: register scaling is being ignored here
 [ 	]*[1-9][0-9]*[ 	]+B8
 [ 	]*[1-9][0-9]*[ 	]+bndstx \[rip\+base\], bnd1
-[ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 670F1B1D 		bndstx \[eip\+base\], bnd3
-.*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
-[ 	]*[1-9][0-9]*[ 	]+[0-9A-F]+ 
+[ 	]*[1-9][0-9]*[ 	]+bndstx \[eip\+base\], bnd3
 [ 	]*[1-9][0-9]*[ 	]+bndstx \[rax\+rsp\], bnd3
 [ 	]*[1-9][0-9]*[ 	]+
 [ 	]*[1-9][0-9]*[ 	]+\#\#\# bndldx
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 670F1A44 		bndldx bnd0, \[eax\+ebx\*1\+0x3\]
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
-GAS LISTING .*
-
-
 [ 	]*[1-9][0-9]*[ 	]+1803
 [ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 670F1A14 		bndldx bnd2, \[1\*ebx\+3\]
 .*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
@@ -254,8 +239,6 @@ GAS LISTING .*
 .*  Warning: register scaling is being ignored here
 [ 	]*[1-9][0-9]*[ 	]+C7
 [ 	]*[1-9][0-9]*[ 	]+bndldx bnd1, \[rip\+base\]
-[ 	]*[1-9][0-9]*[ 	]+\?\?\?\? 670F1A1D 		bndldx bnd3, \[eip\+base\]
-.*  Error: 32-bit address isn't allowed in 64-bit MPX instructions\.
-[ 	]*[1-9][0-9]*[ 	]+[0-9A-F]+ 
+[ 	]*[1-9][0-9]*[ 	]+bndldx bnd3, \[eip\+base\]
 [ 	]*[1-9][0-9]*[ 	]+bndldx bnd3, \[rax\+rsp\]
 #pass