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| author | Matthieu Longo <matthieu.longo@arm.com> | 2024-07-03 18:37:45 +0100 |
|---|---|---|
| committer | Matthieu Longo <matthieu.longo@arm.com> | 2024-07-05 15:39:28 +0100 |
| commit | aaa064b75c1469c8ea6d8e4b0b84df51ccfe6fc2 (patch) | |
| tree | 00a3218e5a0f984ba1db9abf01ceb6a397e5c11e /gas | |
| parent | f83675969be5b0a928c348d2eeae83c3257d6840 (diff) | |
| download | binutils-aaa064b75c1469c8ea6d8e4b0b84df51ccfe6fc2.zip binutils-aaa064b75c1469c8ea6d8e4b0b84df51ccfe6fc2.tar.gz binutils-aaa064b75c1469c8ea6d8e4b0b84df51ccfe6fc2.tar.bz2 | |
aarch64: add Debug Feature Register 2 (ID_AA64DFR2_EL1)
This patch also adds relevant tests. Regression tested on aarch64-none-elf,
and no regression found.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/testsuite/gas/aarch64/sysreg/sysreg.d | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sysreg/sysreg.s | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.d b/gas/testsuite/gas/aarch64/sysreg/sysreg.d index 54ade34..4fa9f0d 100644 --- a/gas/testsuite/gas/aarch64/sysreg/sysreg.d +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.d @@ -11,6 +11,11 @@ Disassembly of section \.text: .*: d53b9c60 mrs x0, pmovsclr_el0 .*: d51b9e60 msr pmovsset_el0, x0 .*: d53b9e60 mrs x0, pmovsset_el0 +.*: d5380580 mrs x0, id_aa64afr0_el1 +.*: d53805a0 mrs x0, id_aa64afr1_el1 +.*: d5380500 mrs x0, id_aa64dfr0_el1 +.*: d5380520 mrs x0, id_aa64dfr1_el1 +.*: d5380540 mrs x0, id_aa64dfr2_el1 .*: d5380140 mrs x0, id_dfr0_el1 .*: d5380100 mrs x0, id_pfr0_el1 .*: d5380120 mrs x0, id_pfr1_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.s b/gas/testsuite/gas/aarch64/sysreg/sysreg.s index 9c0fd4a..cf04614 100644 --- a/gas/testsuite/gas/aarch64/sysreg/sysreg.s +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.s @@ -5,6 +5,11 @@ rw_sys_reg sys_reg=pmovsclr_el0 rw_sys_reg sys_reg=pmovsset_el0 + rw_sys_reg sys_reg=id_aa64afr0_el1 w=0 + rw_sys_reg sys_reg=id_aa64afr1_el1 w=0 + rw_sys_reg sys_reg=id_aa64dfr0_el1 w=0 + rw_sys_reg sys_reg=id_aa64dfr1_el1 w=0 + rw_sys_reg sys_reg=id_aa64dfr2_el1 w=0 rw_sys_reg sys_reg=id_dfr0_el1 w=0 rw_sys_reg sys_reg=id_pfr0_el1 w=0 rw_sys_reg sys_reg=id_pfr1_el1 w=0 |