Remove i860, i960, bout and aout-adobe targets

Plus remove a few leftovers from the 29k support.

include/
	* aout/adobe.h: Delete.
	* aout/reloc.h: Delete.
	* coff/i860.h: Delete.
	* coff/i960.h: Delete.
	* elf/i860.h: Delete.
	* elf/i960.h: Delete.
	* opcode/i860.h: Delete.
	* opcode/i960.h: Delete.
	* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
	* aout/ar.h (ARMAGB): Remove.
	* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
	union internal_auxent): Remove i960 support.
bfd/
	* aout-adobe.c: Delete.
	* bout.c: Delete.
	* coff-i860.c: Delete.
	* coff-i960.c: Delete.
	* cpu-i860.c: Delete.
	* cpu-i960.c: Delete.
	* elf32-i860.c: Delete.
	* elf32-i960.c: Delete.
	* hosts/i860mach3.h: Delete.
	* Makefile.am: Remove i860, i960, bout, and adobe support.
	* archures.c: Remove i860 and i960 support.
	* coffcode.h: Likewise.
	* reloc.c: Likewise.
	* aoutx.h: Comment updates.
	* archive.c: Remove BOUT and i960 support.
	* bfd.c: Remove BOUT support.
	* coffswap.h: Remove i960 support.
	* config.bfd: Remove i860, i960 and adobe targets.
	* configure.ac: Remove adode, bout, i860, i960, icoff targets.
	* targets.c: Likewise.
	* ieee.c: Remove i960 support.
	* mach-o.c: Remove i860 support.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* opcodes/i860-dis.c: Delete.
	* opcodes/i960-dis.c: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* ieee.c: Remove i960 support.
	* od-macho.c: Remove i860 support.
	* readelf.c: Remove i860 and i960 support.
	* testsuite/binutils-all/objcopy.exp: Likewise.
	* testsuite/binutils-all/objdump.exp: Likewise.
	* testsuite/lib/binutils-common.exp: Likewise.
gas/
	* config/aout_gnu.h: Delete.
	* config/tc-i860.c: Delete.
	* config/tc-i860.h: Delete.
	* config/tc-i960.c: Delete.
	* config/tc-i960.h: Delete.
	* doc/c-i860.texi: Delete.
	* doc/c-i960.texi: Delete.
	* testsuite/gas/i860/README.i860: Delete.
	* testsuite/gas/i860/bitwise.d: Delete.
	* testsuite/gas/i860/bitwise.s: Delete.
	* testsuite/gas/i860/branch.d: Delete.
	* testsuite/gas/i860/branch.s: Delete.
	* testsuite/gas/i860/bte.d: Delete.
	* testsuite/gas/i860/bte.s: Delete.
	* testsuite/gas/i860/dir-align01.d: Delete.
	* testsuite/gas/i860/dir-align01.s: Delete.
	* testsuite/gas/i860/dir-intel01.d: Delete.
	* testsuite/gas/i860/dir-intel01.s: Delete.
	* testsuite/gas/i860/dir-intel02.d: Delete.
	* testsuite/gas/i860/dir-intel02.s: Delete.
	* testsuite/gas/i860/dir-intel03-err.l: Delete.
	* testsuite/gas/i860/dir-intel03-err.s: Delete.
	* testsuite/gas/i860/dual01.d: Delete.
	* testsuite/gas/i860/dual01.s: Delete.
	* testsuite/gas/i860/dual02-err.l: Delete.
	* testsuite/gas/i860/dual02-err.s: Delete.
	* testsuite/gas/i860/dual03.d: Delete.
	* testsuite/gas/i860/dual03.s: Delete.
	* testsuite/gas/i860/fldst01.d: Delete.
	* testsuite/gas/i860/fldst01.s: Delete.
	* testsuite/gas/i860/fldst02.d: Delete.
	* testsuite/gas/i860/fldst02.s: Delete.
	* testsuite/gas/i860/fldst03.d: Delete.
	* testsuite/gas/i860/fldst03.s: Delete.
	* testsuite/gas/i860/fldst04.d: Delete.
	* testsuite/gas/i860/fldst04.s: Delete.
	* testsuite/gas/i860/fldst05.d: Delete.
	* testsuite/gas/i860/fldst05.s: Delete.
	* testsuite/gas/i860/fldst06.d: Delete.
	* testsuite/gas/i860/fldst06.s: Delete.
	* testsuite/gas/i860/fldst07.d: Delete.
	* testsuite/gas/i860/fldst07.s: Delete.
	* testsuite/gas/i860/fldst08.d: Delete.
	* testsuite/gas/i860/fldst08.s: Delete.
	* testsuite/gas/i860/float01.d: Delete.
	* testsuite/gas/i860/float01.s: Delete.
	* testsuite/gas/i860/float02.d: Delete.
	* testsuite/gas/i860/float02.s: Delete.
	* testsuite/gas/i860/float03.d: Delete.
	* testsuite/gas/i860/float03.s: Delete.
	* testsuite/gas/i860/float04.d: Delete.
	* testsuite/gas/i860/float04.s: Delete.
	* testsuite/gas/i860/form.d: Delete.
	* testsuite/gas/i860/form.s: Delete.
	* testsuite/gas/i860/i860.exp: Delete.
	* testsuite/gas/i860/iarith.d: Delete.
	* testsuite/gas/i860/iarith.s: Delete.
	* testsuite/gas/i860/ldst01.d: Delete.
	* testsuite/gas/i860/ldst01.s: Delete.
	* testsuite/gas/i860/ldst02.d: Delete.
	* testsuite/gas/i860/ldst02.s: Delete.
	* testsuite/gas/i860/ldst03.d: Delete.
	* testsuite/gas/i860/ldst03.s: Delete.
	* testsuite/gas/i860/ldst04.d: Delete.
	* testsuite/gas/i860/ldst04.s: Delete.
	* testsuite/gas/i860/ldst05.d: Delete.
	* testsuite/gas/i860/ldst05.s: Delete.
	* testsuite/gas/i860/ldst06.d: Delete.
	* testsuite/gas/i860/ldst06.s: Delete.
	* testsuite/gas/i860/pfam.d: Delete.
	* testsuite/gas/i860/pfam.s: Delete.
	* testsuite/gas/i860/pfmam.d: Delete.
	* testsuite/gas/i860/pfmam.s: Delete.
	* testsuite/gas/i860/pfmsm.d: Delete.
	* testsuite/gas/i860/pfmsm.s: Delete.
	* testsuite/gas/i860/pfsm.d: Delete.
	* testsuite/gas/i860/pfsm.s: Delete.
	* testsuite/gas/i860/pseudo-ops01.d: Delete.
	* testsuite/gas/i860/pseudo-ops01.s: Delete.
	* testsuite/gas/i860/regress01.d: Delete.
	* testsuite/gas/i860/regress01.s: Delete.
	* testsuite/gas/i860/shift.d: Delete.
	* testsuite/gas/i860/shift.s: Delete.
	* testsuite/gas/i860/simd.d: Delete.
	* testsuite/gas/i860/simd.s: Delete.
	* testsuite/gas/i860/system.d: Delete.
	* testsuite/gas/i860/system.s: Delete.
	* testsuite/gas/i860/xp.d: Delete.
	* testsuite/gas/i860/xp.s: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/all.texi: Likewise.
	* testsuite/gas/all/gas.exp
	* config/obj-coff.h: Remove i960 support.
	* doc/internals.texi: Likewise.
	* expr.c: Likewise.
	* read.c: Likewise.
	* write.c: Likewise.
	* write.h: Likewise.
	* testsuite/gas/lns/lns.exp: Likewise.
	* testsuite/gas/symver/symver.exp: Likewise.
	* config/tc-m68k.c: Remove BOUT support.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* symbols.c: Likewise.
	* doc/h8.texi: Likewise.
	* configure.ac: Remove BOUT and i860 support.
	* doc/as.texinfo: Remove BOUT, i860 and i960 support
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* emulparams/coff_i860.sh: Delete.
	* emulparams/elf32_i860.sh: Delete.
	* emulparams/elf32_i960.sh: Delete.
	* emulparams/gld960.sh: Delete.
	* emulparams/gld960coff.sh: Delete.
	* emulparams/lnk960.sh: Delete.
	* emultempl/gld960.em: Delete.
	* emultempl/gld960c.em: Delete.
	* emultempl/lnk960.em: Delete.
	* scripttempl/i860coff.sc: Delete.
	* scripttempl/i960.sc: Delete.
	* ld.texinfo: Remove i960 support.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* testsuite/ld-discard/extern.d: Likewise.
	* testsuite/ld-discard/start.d: Likewise.
	* testsuite/ld-discard/static.d: Likewise.
	* testsuite/ld-elf/compressed1d.d: Likewise.
	* testsuite/ld-elf/group1.d: Likewise.
	* testsuite/ld-elf/group3b.d: Likewise.
	* testsuite/ld-elf/group8a.d: Likewise.
	* testsuite/ld-elf/group8b.d: Likewise.
	* testsuite/ld-elf/group9a.d: Likewise.
	* testsuite/ld-elf/group9b.d: Likewise.
	* testsuite/ld-elf/linkonce2.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/merge2.d: Likewise.
	* testsuite/ld-elf/merge3.d: Likewise.
	* testsuite/ld-elf/orphan-10.d: Likewise.
	* testsuite/ld-elf/orphan-11.d: Likewise.
	* testsuite/ld-elf/orphan-12.d: Likewise.
	* testsuite/ld-elf/orphan-9.d: Likewise.
	* testsuite/ld-elf/orphan-region.d: Likewise.
	* testsuite/ld-elf/orphan.d: Likewise.
	* testsuite/ld-elf/orphan3.d: Likewise.
	* testsuite/ld-elf/pr12851.d: Likewise.
	* testsuite/ld-elf/pr12975.d: Likewise.
	* testsuite/ld-elf/pr13177.d: Likewise.
	* testsuite/ld-elf/pr13195.d: Likewise.
	* testsuite/ld-elf/pr17550a.d: Likewise.
	* testsuite/ld-elf/pr17550b.d: Likewise.
	* testsuite/ld-elf/pr17550c.d: Likewise.
	* testsuite/ld-elf/pr17550d.d: Likewise.
	* testsuite/ld-elf/pr17615.d: Likewise.
	* testsuite/ld-elf/pr20528a.d: Likewise.
	* testsuite/ld-elf/pr20528b.d: Likewise.
	* testsuite/ld-elf/pr21562a.d: Likewise.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/pr22677.d: Likewise.
	* testsuite/ld-elf/pr22836-1a.d: Likewise.
	* testsuite/ld-elf/pr22836-1b.d: Likewise.
	* testsuite/ld-elf/pr349.d: Likewise.
	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-elf/warn1.d: Likewise.
	* testsuite/ld-elf/warn2.d: Likewise.
	* testsuite/ld-elf/warn3.d: Likewise.
	* testsuite/lib/ld-lib.exp: Likewise.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.

8 files changed, 19 insertions, 798 deletions

diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am
index 1faf805..aee70dd 100644
--- a/gas/doc/Makefile.am
+++ b/gas/doc/Makefile.am
@@ -60,8 +60,6 @@ CPU_DOCS = \
 	c-hppa.texi \
 	c-i370.texi \
 	c-i386.texi \
-	c-i860.texi \
-	c-i960.texi \
 	c-ip2k.texi \
 	c-lm32.texi \
 	c-m32c.texi \
diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in
index 5de99b3..8939093 100644
--- a/gas/doc/Makefile.in
+++ b/gas/doc/Makefile.in
@@ -335,8 +335,6 @@ CPU_DOCS = \
 	c-hppa.texi \
 	c-i370.texi \
 	c-i386.texi \
-	c-i860.texi \
-	c-i960.texi \
 	c-ip2k.texi \
 	c-lm32.texi \
 	c-m32c.texi \
diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index d3d3719..47d55df 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -39,8 +39,6 @@
 @set HPPA
 @set I370
 @set I80386
-@set I860
-@set I960
 @set IA64
 @set IP2K
 @set LM32
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 43286e9..dfd436f 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -32,7 +32,7 @@
 @set COFF-ELF
 @end ifset
 @ifset AOUT
-@set aout-bout
+@set aout
 @end ifset
 @ifset ARM/Thumb
 @set ARM
@@ -40,9 +40,6 @@
 @ifset Blackfin
 @set Blackfin
 @end ifset
-@ifset BOUT
-@set aout-bout
-@end ifset
 @ifset H8/300
 @set H8
 @end ifset
@@ -337,14 +334,6 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
    [@b{--32}|@b{--x32}|@b{--64}] [@b{-n}]
    [@b{-march}=@var{CPU}[+@var{EXTENSION}@dots{}]] [@b{-mtune}=@var{CPU}]
 @end ifset
-@ifset I960
-
-@emph{Target i960 options:}
-@c see md_parse_option in tc-i960.c
-   [@b{-ACA}|@b{-ACA_A}|@b{-ACB}|@b{-ACC}|@b{-AKA}|@b{-AKB}|
-    @b{-AKC}|@b{-AMC}]
-   [@b{-b}] [@b{-no-relax}]
-@end ifset
 @ifset IA64
 
 @emph{Target IA-64 options:}
@@ -1069,24 +1058,6 @@ an i386 processor.
 @end ifset
 
 @c man begin OPTIONS
-@ifset I960
-The following options are available when @value{AS} is configured for the
-Intel 80960 processor.
-
-@table @gcctabopt
-@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
-Specify which variant of the 960 architecture is the target.
-
-@item -b
-Add code to collect statistics about branches taken.
-
-@item -no-relax
-Do not alter compare-and-branch instructions for long displacements;
-error if necessary.
-
-@end table
-@end ifset
-
 @ifset IP2K
 The following options are available when @value{AS} is configured for the
 Ubicom IP2K series.
@@ -1995,10 +1966,6 @@ For the @value{TARGET} target, @command{@value{AS}} is configured to produce
 @value{OBJ-NAME} format object files.
 @end ifclear
 @c The following should exhaust all configs that set MULTI-OBJ, ideally
-@ifset I960
-On the @value{TARGET}, @command{@value{AS}} can be configured to produce either
-@code{b.out} or COFF format object files.
-@end ifset
 @ifset HPPA
 On the @value{TARGET}, @command{@value{AS}} can be configured to produce either
 SOM or ELF format object files.
@@ -2104,16 +2071,7 @@ is itself synthesized from other files.  @command{@value{AS}} understands the
 @kindex .o
 Every time you run @command{@value{AS}} it produces an output file, which is
 your assembly language program translated into numbers.  This file
-is the object file.  Its default name is
-@ifclear BOUT
-@code{a.out}.
-@end ifclear
-@ifset BOUT
-@ifset GENERIC
-@code{a.out}, or
-@end ifset
-@code{b.out} when @command{@value{AS}} is configured for the Intel 80960.
-@end ifset
+is the object file.  Its default name is @code{a.out}.
 You can give it another name by using the @option{-o} option.  Conventionally,
 object file names end with @file{.o}.  The default name is used for historical
 reasons: older assemblers were capable of assembling self-contained programs
@@ -2447,8 +2405,8 @@ displayed for a given single line of source input.  The default value is 4.
 @cindex MRI compatibility mode
 The @option{-M} or @option{--mri} option selects MRI compatibility mode.  This
 changes the syntax and pseudo-op handling of @command{@value{AS}} to make it
-compatible with the @code{ASM68K} or the @code{ASM960} (depending upon the
-configured target) assembler from Microtec Research.  The exact nature of the
+compatible with the @code{ASM68K} assembler from Microtec Research.
+The exact nature of the
 MRI syntax will not be documented here; see the MRI manuals for more
 information.  Note in particular that the handling of macros and macro
 arguments is somewhat different.  The purpose of this option is to permit
@@ -2545,30 +2503,6 @@ The m68k @code{OPT} @code{D} option is the default, unlike the MRI assembler.
 
 The m68k @code{XREF} pseudo-op is ignored.
 
-@item @code{.debug} pseudo-op
-
-The i960 @code{.debug} pseudo-op is not supported.
-
-@item @code{.extended} pseudo-op
-
-The i960 @code{.extended} pseudo-op is not supported.
-
-@item @code{.list} pseudo-op.
-
-The various options of the i960 @code{.list} pseudo-op are not supported.
-
-@item @code{.optimize} pseudo-op
-
-The i960 @code{.optimize} pseudo-op is not supported.
-
-@item @code{.output} pseudo-op
-
-The i960 @code{.output} pseudo-op is not supported.
-
-@item @code{.setreal} pseudo-op
-
-The i960 @code{.setreal} pseudo-op is not supported.
-
 @end itemize
 
 @node MD
@@ -2602,23 +2536,7 @@ disable this behaviour.
 @cindex naming object file
 @cindex object file name
 There is always one object file output when you run @command{@value{AS}}.  By
-default it has the name
-@ifset GENERIC
-@ifset I960
-@file{a.out} (or @file{b.out}, for Intel 960 targets only).
-@end ifset
-@ifclear I960
-@file{a.out}.
-@end ifclear
-@end ifset
-@ifclear GENERIC
-@ifset I960
-@file{b.out}.
-@end ifset
-@ifclear I960
-@file{a.out}.
-@end ifclear
-@end ifclear
+default it has the name @file{a.out}.
 You use this option (which takes exactly one filename) to give the
 object file a different name.
 
@@ -3153,9 +3071,6 @@ are floating point numbers, described below.
 * Bignums::                     Bignums
 * Flonums::                     Flonums
 @ifclear GENERIC
-@ifset I960
-* Bit Fields::                  Bit Fields
-@end ifset
 @end ifclear
 @end menu
 
@@ -3230,16 +3145,12 @@ A letter, to tell @command{@value{AS}} the rest of the number is a flonum.
 4.2 assembler seems to allow any of @samp{defghDEFGH}.)
 @end ignore
 
-On the H8/300, Renesas / SuperH SH,
-and AMD 29K architectures, the letter must be
+On the H8/300 and Renesas / SuperH SH architectures, the letter must be
 one of the letters @samp{DFPRSX} (in upper or lower case).
 
 On the ARC, the letter must be one of the letters @samp{DFRS}
 (in upper or lower case).
 
-On the Intel 960 architecture, the letter must be
-one of the letters @samp{DFT} (in upper or lower case).
-
 On the HPPA architecture, the letter must be @samp{E} (upper case only).
 @end ifset
 @ifclear GENERIC
@@ -3252,9 +3163,6 @@ One of the letters @samp{DFPRSX} (in upper or lower case).
 @ifset HPPA
 The letter @samp{E} (upper case only).
 @end ifset
-@ifset I960
-One of the letters @samp{DFT} (in upper or lower case).
-@end ifset
 @end ifclear
 
 @item
@@ -3290,41 +3198,6 @@ present.  The floating point number has the usual base-10 value.
 independently of any floating point hardware in the computer running
 @command{@value{AS}}.
 
-@ifclear GENERIC
-@ifset I960
-@c Bit fields are written as a general facility but are also controlled
-@c by a conditional-compilation flag---which is as of now (21mar91)
-@c turned on only by the i960 config of GAS.
-@node Bit Fields
-@subsubsection Bit Fields
-
-@cindex bit fields
-@cindex constants, bit field
-You can also define numeric constants as @dfn{bit fields}.
-Specify two numbers separated by a colon---
-@example
-@var{mask}:@var{value}
-@end example
-@noindent
-@command{@value{AS}} applies a bitwise @sc{and} between @var{mask} and
-@var{value}.
-
-The resulting number is then packed
-@ifset GENERIC
-@c this conditional paren in case bit fields turned on elsewhere than 960
-(in host-dependent byte order)
-@end ifset
-into a field whose width depends on which assembler directive has the
-bit-field as its argument.  Overflow (a result from the bitwise and
-requiring more binary digits to represent) is not an error; instead,
-more constants are generated, of the specified width, beginning with the
-least significant digits.@refill
-
-The directives @code{.byte}, @code{.hword}, @code{.int}, @code{.long},
-@code{.short}, and @code{.word} accept bit-field arguments.
-@end ifset
-@end ifclear
-
 @node Sections
 @chapter Sections and Relocation
 @cindex sections
@@ -3486,7 +3359,7 @@ use of @command{@value{AS}} and have no meaning except during assembly.
 @cindex sections, named
 @item named sections
 @end ifset
-@ifset aout-bout
+@ifset aout
 @cindex text section
 @cindex data section
 @itemx text section
@@ -3495,7 +3368,7 @@ use of @command{@value{AS}} and have no meaning except during assembly.
 These sections hold your program.  @command{@value{AS}} and @code{@value{LD}} treat them as
 separate but equal sections.  Anything you can say of one section is
 true of another.
-@c @ifset aout-bout
+@c @ifset aout
 When the program is running, however, it is
 customary for the text section to be unalterable.  The
 text section is often shared among processes: it contains
@@ -3615,7 +3488,7 @@ it in the expr section.
 
 @cindex numbered subsections
 @cindex grouping data
-@ifset aout-bout
+@ifset aout
 Assembled bytes
 @ifset COFF-ELF
 conventionally
@@ -3627,10 +3500,10 @@ You may have separate groups of
 data in named sections
 @end ifset
 @ifclear GENERIC
-@ifclear aout-bout
+@ifclear aout
 data in named sections
 @end ifclear
-@ifset aout-bout
+@ifset aout
 text or data
 @end ifset
 @end ifclear
@@ -3659,14 +3532,6 @@ On the H8/300 platform, each subsection is zero-padded to a word
 boundary (two bytes).
 The same is true on the Renesas SH.
 @end ifset
-@ifset I960
-@c FIXME section padding (alignment)?
-@c Rich Pixley says padding here depends on target obj code format; that
-@c doesn't seem particularly useful to say without further elaboration,
-@c so for now I say nothing about it.  If this is a generic BFD issue,
-@c these paragraphs might need to vanish from this manual, and be
-@c discussed in BFD chapter of binutils (or some such).
-@end ifset
 @end ifclear
 
 Subsections appear in your object file in numeric order, lowest numbered
@@ -3990,19 +3855,9 @@ would want.
 @menu
 * Symbol Value::                Value
 * Symbol Type::                 Type
-@ifset aout-bout
-@ifset GENERIC
+@ifset aout
 * a.out Symbols::               Symbol Attributes: @code{a.out}
 @end ifset
-@ifclear GENERIC
-@ifclear BOUT
-* a.out Symbols::               Symbol Attributes: @code{a.out}
-@end ifclear
-@ifset BOUT
-* a.out Symbols::               Symbol Attributes: @code{a.out}, @code{b.out}
-@end ifset
-@end ifclear
-@end ifset
 @ifset COFF
 * COFF Symbols::                Symbol Attributes for COFF
 @end ifset
@@ -4043,39 +3898,13 @@ information, any flag settings indicating that a symbol is external, and
 (optionally), other information for linkers and debuggers.  The exact
 format depends on the object-code output format in use.
 
-@ifset aout-bout
-@ifclear GENERIC
-@ifset BOUT
-@c The following avoids a "widow" subsection title.  @group would be
-@c better if it were available outside examples.
-@need 1000
-@node a.out Symbols
-@subsection Symbol Attributes: @code{a.out}, @code{b.out}
-
-@cindex @code{b.out} symbol attributes
-@cindex symbol attributes, @code{b.out}
-These symbol attributes appear only when @command{@value{AS}} is configured for
-one of the Berkeley-descended object output formats---@code{a.out} or
-@code{b.out}.
-
-@end ifset
-@ifclear BOUT
-@node a.out Symbols
-@subsection Symbol Attributes: @code{a.out}
-
-@cindex @code{a.out} symbol attributes
-@cindex symbol attributes, @code{a.out}
-
-@end ifclear
-@end ifclear
-@ifset GENERIC
+@ifset aout
 @node a.out Symbols
 @subsection Symbol Attributes: @code{a.out}
 
 @cindex @code{a.out} symbol attributes
 @cindex symbol attributes, @code{a.out}
 
-@end ifset
 @menu
 * Symbol Desc::                 Descriptor
 * Symbol Other::                Other
@@ -4410,7 +4239,7 @@ Some machine configurations provide additional directives.
 @ifset COFF
 * Def::                         @code{.def @var{name}}
 @end ifset
-@ifset aout-bout
+@ifset aout
 * Desc::                        @code{.desc @var{symbol}, @var{abs-expression}}
 @end ifset
 @ifset COFF
@@ -4594,10 +4423,6 @@ quit also.  One day @code{.abort} will not be supported.
 When producing COFF output, @command{@value{AS}} accepts this directive as a
 synonym for @samp{.abort}.
 
-@ifset BOUT
-When producing @code{b.out} output, @command{@value{AS}} accepts this directive,
-but ignores it.
-@end ifset
 @end ifset
 
 @node Align
@@ -4624,7 +4449,7 @@ required alignment; this can be useful if you want the alignment to be filled
 with no-op instructions when appropriate.
 
 The way the required alignment is specified varies from system to system.
-For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or1k,
+For the arc, hppa, i386 using ELF, iq2000, m68k, or1k,
 s390, sparc, tic4x, tic80 and xtensa, the first expression is the
 alignment request in bytes.  For example @samp{.align 8} advances
 the location counter until it is a multiple of 8.  If the location counter
@@ -5163,15 +4988,9 @@ The byte ordering is target dependent.
 @cindex debugging COFF symbols
 Begin defining debugging information for a symbol @var{name}; the
 definition extends until the @code{.endef} directive is encountered.
-@ifset BOUT
-
-This directive is only observed when @command{@value{AS}} is configured for COFF
-format output; when producing @code{b.out}, @samp{.def} is recognized,
-but ignored.
-@end ifset
 @end ifset
 
-@ifset aout-bout
+@ifset aout
 @node Desc
 @section @code{.desc @var{symbol}, @var{abs-expression}}
 
@@ -5199,12 +5018,6 @@ it, but produces no output, when configured for COFF.
 This directive is generated by compilers to include auxiliary debugging
 information in the symbol table.  It is only permitted inside
 @code{.def}/@code{.endef} pairs.
-@ifset BOUT
-
-@samp{.dim} is only meaningful when generating COFF format output; when
-@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
-ignores it.
-@end ifset
 @end ifset
 
 @node Double
@@ -5265,12 +5078,6 @@ process anything in the file past the @code{.end} directive.
 @cindex @code{endef} directive
 This directive flags the end of a symbol definition begun with
 @code{.def}.
-@ifset BOUT
-
-@samp{.endef} is only meaningful when generating COFF format output; if
-@command{@value{AS}} is configured to generate @code{b.out}, it accepts this
-directive but ignores it.
-@end ifset
 @end ifset
 
 @node Endfunc
@@ -5801,7 +5608,7 @@ assemblers, but ignores it.
 
 @cindex @code{line} directive
 @cindex logical line number
-@ifset aout-bout
+@ifset aout
 Change the logical line number.  @var{line-number} must be an absolute
 expression.  The next line has that logical line number.  Therefore any other
 statements on the current line (after a statement separator character) are
@@ -5886,12 +5693,6 @@ must be an absolute expression.  The next line has that logical
 line number, so any other statements on the current line (after a
 statement separator character @code{;}) are reported as on logical
 line number @var{line-number} @minus{} 1.
-@ifset BOUT
-
-This directive is accepted, but ignored, when @command{@value{AS}} is
-configured for @code{b.out}; its effect is only associated with COFF
-output format.
-@end ifset
 @end ifset
 
 @node Loc
@@ -6220,7 +6021,7 @@ instruction size limit is set to the maximum supported size.
 @node Octa
 @section @code{.octa @var{bignums}}
 
-@c FIXME: double size emitted for "octa" on i960, others?  Or warn?
+@c FIXME: double size emitted for "octa" on some?  Or warn?
 @cindex @code{octa} directive
 @cindex integer, 16-byte
 @cindex sixteen byte integer
@@ -6535,12 +6336,6 @@ Set the storage-class value for a symbol.  This directive may only be
 used inside a @code{.def}/@code{.endef} pair.  Storage class may flag
 whether a symbol is static or external, or it may record further
 symbolic debugging information.
-@ifset BOUT
-
-The @samp{.scl} directive is primarily associated with COFF output; when
-configured to generate @code{b.out} output format, @command{@value{AS}}
-accepts this directive but ignores it.
-@end ifset
 @end ifset
 
 @ifset COFF-ELF
@@ -6900,11 +6695,6 @@ For COFF targets, the @code{.size} directive is only permitted inside
 .size @var{expression}
 @end smallexample
 
-@ifset BOUT
-@samp{.size} is only meaningful when generating COFF format output; when
-@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
-ignores it.
-@end ifset
 @end ifset
 
 @ifset ELF
@@ -7172,12 +6962,6 @@ This directive is generated by compilers to include auxiliary debugging
 information in the symbol table.  It is only permitted inside
 @code{.def}/@code{.endef} pairs.  Tags are used to link structure
 definitions in the symbol table with instances of those structures.
-@ifset BOUT
-
-@samp{.tag} is only used when generating COFF format output; when
-@command{@value{AS}} is generating @code{b.out}, it accepts this directive but
-ignores it.
-@end ifset
 @end ifset
 
 @node Text
@@ -7225,11 +7009,6 @@ For COFF targets, this directive is permitted only within
 This records the integer @var{int} as the type attribute of a symbol table
 entry.
 
-@ifset BOUT
-@samp{.type} is associated only with COFF format output; when
-@command{@value{AS}} is configured for @code{b.out} output, it accepts this
-directive but ignores it.
-@end ifset
 @end ifset
 
 @ifset ELF
@@ -7328,11 +7107,6 @@ symbolic debugging format.  @xref{Sleb128, ,@code{.sleb128}}.
 This directive, permitted only within @code{.def}/@code{.endef} pairs,
 records the address @var{addr} as the value attribute of a symbol table
 entry.
-@ifset BOUT
-
-@samp{.val} is used only for COFF output; when @command{@value{AS}} is
-configured for @code{b.out}, it accepts this directive but ignores it.
-@end ifset
 @end ifset
 
 @ifset ELF
@@ -7422,7 +7196,7 @@ The size of the number emitted, and its byte order,
 depend on what target computer the assembly is for.
 @end ifset
 
-@c on amd29k, i960, sparc the "special treatment to support compilers" doesn't
+@c on sparc the "special treatment to support compilers" doesn't
 @c happen---32-bit addressability, period; no long/short jumps.
 @ifset DIFF-TBL-KLUGE
 @cindex difference tables altered
@@ -7764,12 +7538,6 @@ subject, see the hardware manufacturer's manual.
 @ifset I80386
 * i386-Dependent::              Intel 80386 and AMD x86-64 Dependent Features
 @end ifset
-@ifset I860
-* i860-Dependent::              Intel 80860 Dependent Features
-@end ifset
-@ifset I960
-* i960-Dependent::              Intel 80960 Dependent Features
-@end ifset
 @ifset IA64
 * IA-64-Dependent::             Intel IA-64 Dependent Features
 @end ifset
@@ -7979,14 +7747,6 @@ family.
 @include c-i386.texi
 @end ifset
 
-@ifset I860
-@include c-i860.texi
-@end ifset
-
-@ifset I960
-@include c-i960.texi
-@end ifset
-
 @ifset IA64
 @include c-ia64.texi
 @end ifset
diff --git a/gas/doc/c-i860.texi b/gas/doc/c-i860.texi
deleted file mode 100644
index 6e6726b..0000000
--- a/gas/doc/c-i860.texi
+++ /dev/null
@@ -1,197 +0,0 @@
-@c Copyright (C) 2000-2018 Free Software Foundation, Inc.
-@c This is part of the GAS manual.
-@c For copying conditions, see the file as.texinfo.
-@ifset GENERIC
-@page
-@node i860-Dependent
-@chapter Intel i860 Dependent Features
-@end ifset
-@ifclear GENERIC
-@node Machine Dependencies
-@chapter Intel i860 Dependent Features
-@end ifclear
-
-@ignore
-@c FIXME: This is basically a stub for i860. There is tons more information
-that I will add later (jle@cygnus.com).
-@end ignore
-
-@cindex i860 support
-@menu
-* Notes-i860::                  i860 Notes
-* Options-i860::                i860 Command-line Options
-* Directives-i860::             i860 Machine Directives
-* Opcodes for i860::            i860 Opcodes
-* Syntax of i860::              i860 Syntax
-@end menu
-
-@node Notes-i860
-@section i860 Notes
-This is a fairly complete i860 assembler which is compatible with the
-UNIX System V/860 Release 4 assembler. However, it does not currently
-support SVR4 PIC (i.e., @code{@@GOT, @@GOTOFF, @@PLT}).
-
-Like the SVR4/860 assembler, the output object format is ELF32. Currently,
-this is the only supported object format. If there is sufficient interest,
-other formats such as COFF may be implemented.
-
-Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
-being the default.  One difference is that AT&T syntax requires the '%'
-prefix on register names while Intel syntax does not.  Another difference
-is in the specification of relocatable expressions.  The Intel syntax
-is @code{ha%expression} whereas the SVR4 syntax is @code{[expression]@@ha}
-(and similarly for the "l" and "h" selectors).
-@node Options-i860
-@section i860 Command-line Options
-@subsection SVR4 compatibility options
-@table @code
-@item -V
-Print assembler version.
-@item -Qy
-Ignored.
-@item -Qn
-Ignored.
-@end table
-@subsection Other options
-@table @code
-@item -EL
-Select little endian output (this is the default).
-@item -EB
-Select big endian output. Note that the i860 always reads instructions
-as little endian data, so this option only effects data and not
-instructions.
-@item -mwarn-expand
-Emit a warning message if any pseudo-instruction expansions occurred.
-For example, a @code{or} instruction with an immediate larger than 16-bits
-will be expanded into two instructions. This is a very undesirable feature to
-rely on, so this flag can help detect any code where it happens. One
-use of it, for instance, has been to find and eliminate any place
-where @code{gcc} may emit these pseudo-instructions.
-@item -mxp
-Enable support for the i860XP instructions and control registers.  By default,
-this option is disabled so that only the base instruction set (i.e., i860XR)
-is supported.
-@item -mintel-syntax
-The i860 assembler defaults to AT&T/SVR4 syntax.  This option enables the
-Intel syntax.
-@end table
-
-@node Directives-i860
-@section i860 Machine Directives
-
-@cindex machine directives, i860
-@cindex i860 machine directives
-
-@table @code
-@cindex @code{dual} directive, i860
-@item .dual
-Enter dual instruction mode. While this directive is supported, the
-preferred way to use dual instruction mode is to explicitly code
-the dual bit with the @code{d.} prefix.
-@end table
-
-@table @code
-@cindex @code{enddual} directive, i860
-@item .enddual
-Exit dual instruction mode. While this directive is supported, the
-preferred way to use dual instruction mode is to explicitly code
-the dual bit with the @code{d.} prefix.
-@end table
-
-@table @code
-@cindex @code{atmp} directive, i860
-@item .atmp
-Change the temporary register used when expanding pseudo operations. The
-default register is @code{r31}.
-@end table
-
-The @code{.dual}, @code{.enddual}, and @code{.atmp} directives are available only in the Intel syntax mode.
-
-Both syntaxes allow for the standard @code{.align} directive.  However,
-the Intel syntax additionally allows keywords for the alignment
-parameter: "@code{.align type}", where `type' is one of @code{.short}, @code{.long},
-@code{.quad}, @code{.single}, @code{.double} representing alignments of 2, 4,
-16, 4, and 8, respectively.
-
-@node Opcodes for i860
-@section i860 Opcodes
-
-@cindex opcodes, i860
-@cindex i860 opcodes
-All of the Intel i860XR and i860XP machine instructions are supported. Please see
-either @emph{i860 Microprocessor Programmer's Reference Manual} or @emph{i860 Microprocessor Architecture} for more information.
-@subsection Other instruction support (pseudo-instructions)
-For compatibility with some other i860 assemblers, a number of
-pseudo-instructions are supported. While these are supported, they are
-a very undesirable feature that should be avoided -- in particular, when
-they result in an expansion to multiple actual i860 instructions. Below
-are the pseudo-instructions that result in expansions.
-@itemize @bullet
-@item Load large immediate into general register:
-
-The pseudo-instruction @code{mov imm,%rn} (where the immediate does
-not fit within a signed 16-bit field) will be expanded into:
-@smallexample
-orh large_imm@@h,%r0,%rn
-or large_imm@@l,%rn,%rn
-@end smallexample
-@item Load/store with relocatable address expression:
-
-For example, the pseudo-instruction @code{ld.b addr_exp(%rx),%rn}
-will be expanded into:
-@smallexample
-orh addr_exp@@ha,%rx,%r31
-ld.l addr_exp@@l(%r31),%rn
-@end smallexample
-
-The analogous expansions apply to @code{ld.x, st.x, fld.x, pfld.x, fst.x}, and @code{pst.x} as well.
-@item Signed large immediate with add/subtract:
-
-If any of the arithmetic operations @code{adds, addu, subs, subu} are used
-with an immediate larger than 16-bits (signed), then they will be expanded.
-For instance, the pseudo-instruction @code{adds large_imm,%rx,%rn} expands to:
-@smallexample
-orh large_imm@@h,%r0,%r31
-or large_imm@@l,%r31,%r31
-adds %r31,%rx,%rn
-@end smallexample
-@item Unsigned large immediate with logical operations:
-
-Logical operations (@code{or, andnot, or, xor}) also result in expansions.
-The pseudo-instruction @code{or large_imm,%rx,%rn} results in:
-@smallexample
-orh large_imm@@h,%rx,%r31
-or large_imm@@l,%r31,%rn
-@end smallexample
-
-Similarly for the others, except for @code{and} which expands to:
-@smallexample
-andnot (-1 - large_imm)@@h,%rx,%r31
-andnot (-1 - large_imm)@@l,%r31,%rn
-@end smallexample
-@end itemize
-
-@node Syntax of i860
-@section i860 Syntax
-@menu
-* i860-Chars::                Special Characters
-@end menu
-
-@node i860-Chars
-@subsection Special Characters
-
-@cindex line comment character, i860
-@cindex i860 line comment character
-The presence of a @samp{#} appearing anywhere on a line indicates the
-start of a comment that extends to the end of that line.
-
-If a @samp{#} appears as the first character of a line then the whole
-line is treated as a comment, but in this case the line can also be a
-logical line number directive (@pxref{Comments}) or a preprocessor
-control command (@pxref{Preprocessing}).
-
-@cindex line separator, i860
-@cindex statement separator, i860
-@cindex i860 line separator
-The @samp{;} character can be used to separate statements on the same
-line.
diff --git a/gas/doc/c-i960.texi b/gas/doc/c-i960.texi
deleted file mode 100644
index 61ff13b..0000000
--- a/gas/doc/c-i960.texi
+++ /dev/null
@@ -1,324 +0,0 @@
-@c Copyright (C) 1991-2018 Free Software Foundation, Inc.
-@c This is part of the GAS manual.
-@c For copying conditions, see the file as.texinfo.
-@ifset GENERIC
-@page
-@node i960-Dependent
-@chapter Intel 80960 Dependent Features
-@end ifset
-@ifclear GENERIC
-@node Machine Dependencies
-@chapter Intel 80960 Dependent Features
-@end ifclear
-
-@cindex i960 support
-@menu
-* Options-i960::                i960 Command-line Options
-* Floating Point-i960::         Floating Point
-* Directives-i960::             i960 Machine Directives
-* Opcodes for i960::            i960 Opcodes
-* Syntax of i960::              i960 Syntax
-@end menu
-
-@c FIXME! Add Syntax sec with discussion of bitfields here, at least so
-@c long as they're not turned on for other machines than 960.
-
-@node Options-i960
-
-@section i960 Command-line Options
-
-@cindex i960 options
-@cindex options, i960
-@table @code
-
-@cindex i960 architecture options
-@cindex architecture options, i960
-@cindex @code{-A} options, i960
-@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
-Select the 80960 architecture.  Instructions or features not supported
-by the selected architecture cause fatal errors.
-
-@samp{-ACA} is equivalent to @samp{-ACA_A}; @samp{-AKC} is equivalent to
-@samp{-AMC}.  Synonyms are provided for compatibility with other tools.
-
-If you do not specify any of these options, @code{@value{AS}} generates code
-for any instruction or feature that is supported by @emph{some} version of the
-960 (even if this means mixing architectures!).  In principle,
-@code{@value{AS}} attempts to deduce the minimal sufficient processor type if
-none is specified; depending on the object code format, the processor type may
-be recorded in the object file.  If it is critical that the @code{@value{AS}}
-output match a specific architecture, specify that architecture explicitly.
-
-@cindex @code{-b} option, i960
-@cindex branch recording, i960
-@cindex i960 branch recording
-@item -b
-Add code to collect information about conditional branches taken, for
-later optimization using branch prediction bits.  (The conditional branch
-instructions have branch prediction bits in the CA, CB, and CC
-architectures.)  If @var{BR} represents a conditional branch instruction,
-the following represents the code generated by the assembler when
-@samp{-b} is specified:
-
-@smallexample
-        call    @var{increment routine}
-        .word   0       # pre-counter
-Label:  @var{BR}
-        call    @var{increment routine}
-        .word   0       # post-counter
-@end smallexample
-
-The counter following a branch records the number of times that branch
-was @emph{not} taken; the difference between the two counters is the
-number of times the branch @emph{was} taken.
-
-@cindex @code{gbr960}, i960 postprocessor
-@cindex branch statistics table, i960
-A table of every such @code{Label} is also generated, so that the
-external postprocessor @code{gbr960} (supplied by Intel) can locate all
-the counters.  This table is always labeled @samp{__BRANCH_TABLE__};
-this is a local symbol to permit collecting statistics for many separate
-object files.  The table is word aligned, and begins with a two-word
-header.  The first word, initialized to 0, is used in maintaining linked
-lists of branch tables.  The second word is a count of the number of
-entries in the table, which follow immediately: each is a word, pointing
-to one of the labels illustrated above.
-
-@c TEXI2ROFF-KILL
-@ifinfo
-@c END TEXI2ROFF-KILL
-@example
- +------------+------------+------------+ ... +------------+
- |            |            |            |     |            |
- |  *NEXT     |  COUNT: N  | *BRLAB 1   |     | *BRLAB N   |
- |            |            |            |     |            |
- +------------+------------+------------+ ... +------------+
-
-               __BRANCH_TABLE__ layout
-@end example
-@c TEXI2ROFF-KILL
-@end ifinfo
-@need 2000
-@tex
-\vskip 1pc
-\line{\leftskip=0pt\hskip\tableindent
-\boxit{2cm}{\tt *NEXT}\boxit{2cm}{\tt COUNT: \it N}\boxit{2cm}{\tt
-*BRLAB 1}\ibox{1cm}{\quad\dots}\boxit{2cm}{\tt *BRLAB \it N}\hfil}
-\centerline{\it {\tt \_\_BRANCH\_TABLE\_\_} layout}
-@end tex
-@c END TEXI2ROFF-KILL
-
-The first word of the header is used to locate multiple branch tables,
-since each object file may contain one. Normally the links are
-maintained with a call to an initialization routine, placed at the
-beginning of each function in the file.  The @sc{gnu} C compiler
-generates these calls automatically when you give it a @samp{-b} option.
-For further details, see the documentation of @samp{gbr960}.
-
-@cindex @code{-no-relax} option, i960
-@item -no-relax
-Normally, Compare-and-Branch instructions with targets that require
-displacements greater than 13 bits (or that have external targets) are
-replaced with the corresponding compare (or @samp{chkbit}) and branch
-instructions.  You can use the @samp{-no-relax} option to specify that
-@code{@value{AS}} should generate errors instead, if the target displacement
-is larger than 13 bits.
-
-This option does not affect the Compare-and-Jump instructions; the code
-emitted for them is @emph{always} adjusted when necessary (depending on
-displacement size), regardless of whether you use @samp{-no-relax}.
-@end table
-
-@node Floating Point-i960
-@section Floating Point
-
-@cindex floating point, i960 (@sc{ieee})
-@cindex i960 floating point (@sc{ieee})
-@code{@value{AS}} generates @sc{ieee} floating-point numbers for the directives
-@samp{.float}, @samp{.double}, @samp{.extended}, and @samp{.single}.
-
-@node Directives-i960
-@section i960 Machine Directives
-
-@cindex machine directives, i960
-@cindex i960 machine directives
-
-@table @code
-@cindex @code{bss} directive, i960
-@item .bss @var{symbol}, @var{length}, @var{align}
-Reserve @var{length} bytes in the bss section for a local @var{symbol},
-aligned to the power of two specified by @var{align}.  @var{length} and
-@var{align} must be positive absolute expressions.  This directive
-differs from @samp{.lcomm} only in that it permits you to specify
-an alignment.  @xref{Lcomm,,@code{.lcomm}}.
-@end table
-
-@table @code
-@cindex @code{extended} directive, i960
-@item .extended @var{flonums}
-@code{.extended} expects zero or more flonums, separated by commas; for
-each flonum, @samp{.extended} emits an @sc{ieee} extended-format (80-bit)
-floating-point number.
-
-@cindex @code{leafproc} directive, i960
-@item .leafproc @var{call-lab}, @var{bal-lab}
-You can use the @samp{.leafproc} directive in conjunction with the
-optimized @code{callj} instruction to enable faster calls of leaf
-procedures.  If a procedure is known to call no other procedures, you
-may define an entry point that skips procedure prolog code (and that does
-not depend on system-supplied saved context), and declare it as the
-@var{bal-lab} using @samp{.leafproc}.  If the procedure also has an
-entry point that goes through the normal prolog, you can specify that
-entry point as @var{call-lab}.
-
-A @samp{.leafproc} declaration is meant for use in conjunction with the
-optimized call instruction @samp{callj}; the directive records the data
-needed later to choose between converting the @samp{callj} into a
-@code{bal} or a @code{call}.
-
-@var{call-lab} is optional; if only one argument is present, or if the
-two arguments are identical, the single argument is assumed to be the
-@code{bal} entry point.
-
-@cindex @code{sysproc} directive, i960
-@item .sysproc @var{name}, @var{index}
-The @samp{.sysproc} directive defines a name for a system procedure.
-After you define it using @samp{.sysproc}, you can use @var{name} to
-refer to the system procedure identified by @var{index} when calling
-procedures with the optimized call instruction @samp{callj}.
-
-Both arguments are required; @var{index} must be between 0 and 31
-(inclusive).
-@end table
-
-@node Opcodes for i960
-@section i960 Opcodes
-
-@cindex opcodes, i960
-@cindex i960 opcodes
-All Intel 960 machine instructions are supported;
-@pxref{Options-i960,,i960 Command-line Options} for a discussion of
-selecting the instruction subset for a particular 960
-architecture.@refill
-
-Some opcodes are processed beyond simply emitting a single corresponding
-instruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump
-instructions with target displacements larger than 13 bits.
-
-@menu
-* callj-i960::                  @code{callj}
-* Compare-and-branch-i960::     Compare-and-Branch
-@end menu
-
-@node callj-i960
-@subsection @code{callj}
-
-@cindex @code{callj}, i960 pseudo-opcode
-@cindex i960 @code{callj} pseudo-opcode
-You can write @code{callj} to have the assembler or the linker determine
-the most appropriate form of subroutine call: @samp{call},
-@samp{bal}, or @samp{calls}.  If the assembly source contains
-enough information---a @samp{.leafproc} or @samp{.sysproc} directive
-defining the operand---then @code{@value{AS}} translates the
-@code{callj}; if not, it simply emits the @code{callj}, leaving it
-for the linker to resolve.
-
-@node Compare-and-branch-i960
-@subsection Compare-and-Branch
-
-@cindex i960 compare/branch instructions
-@cindex compare/branch instructions, i960
-The 960 architectures provide combined Compare-and-Branch instructions
-that permit you to store the branch target in the lower 13 bits of the
-instruction word itself.  However, if you specify a branch target far
-enough away that its address won't fit in 13 bits, the assembler can
-either issue an error, or convert your Compare-and-Branch instruction
-into separate instructions to do the compare and the branch.
-
-@cindex compare and jump expansions, i960
-@cindex i960 compare and jump expansions
-Whether @code{@value{AS}} gives an error or expands the instruction depends
-on two choices you can make: whether you use the @samp{-no-relax} option,
-and whether you use a ``Compare and Branch'' instruction or a ``Compare
-and Jump'' instruction.  The ``Jump'' instructions are @emph{always}
-expanded if necessary; the ``Branch'' instructions are expanded when
-necessary @emph{unless} you specify @code{-no-relax}---in which case
-@code{@value{AS}} gives an error instead.
-
-These are the Compare-and-Branch instructions, their ``Jump'' variants,
-and the instruction pairs they may expand into:
-
-@c TEXI2ROFF-KILL
-@ifinfo
-@c END TEXI2ROFF-KILL
-@example
-        Compare and
-     Branch      Jump       Expanded to
-     ------    ------       ------------
-        bbc                 chkbit; bno
-        bbs                 chkbit; bo
-     cmpibe    cmpije       cmpi; be
-     cmpibg    cmpijg       cmpi; bg
-    cmpibge   cmpijge       cmpi; bge
-     cmpibl    cmpijl       cmpi; bl
-    cmpible   cmpijle       cmpi; ble
-    cmpibno   cmpijno       cmpi; bno
-    cmpibne   cmpijne       cmpi; bne
-     cmpibo    cmpijo       cmpi; bo
-     cmpobe    cmpoje       cmpo; be
-     cmpobg    cmpojg       cmpo; bg
-    cmpobge   cmpojge       cmpo; bge
-     cmpobl    cmpojl       cmpo; bl
-    cmpoble   cmpojle       cmpo; ble
-    cmpobne   cmpojne       cmpo; bne
-@end example
-@c TEXI2ROFF-KILL
-@end ifinfo
-@tex
-\hskip\tableindent
-\halign{\hfil {\tt #}\quad&\hfil {\tt #}\qquad&{\tt #}\hfil\cr
-\omit{\hfil\it Compare and\hfil}\span\omit&\cr
-{\it Branch}&{\it Jump}&{\it Expanded to}\cr
-        bbc&                 & chkbit; bno\cr
-        bbs&                 & chkbit; bo\cr
-     cmpibe&    cmpije&       cmpi; be\cr
-     cmpibg&    cmpijg&       cmpi; bg\cr
-    cmpibge&   cmpijge&       cmpi; bge\cr
-     cmpibl&    cmpijl&       cmpi; bl\cr
-    cmpible&   cmpijle&       cmpi; ble\cr
-    cmpibno&   cmpijno&       cmpi; bno\cr
-    cmpibne&   cmpijne&       cmpi; bne\cr
-     cmpibo&    cmpijo&       cmpi; bo\cr
-     cmpobe&    cmpoje&       cmpo; be\cr
-     cmpobg&    cmpojg&       cmpo; bg\cr
-    cmpobge&   cmpojge&       cmpo; bge\cr
-     cmpobl&    cmpojl&       cmpo; bl\cr
-    cmpoble&   cmpojle&       cmpo; ble\cr
-    cmpobne&   cmpojne&       cmpo; bne\cr}
-@end tex
-@c END TEXI2ROFF-KILL
-
-@node Syntax of i960
-@section Syntax for the i960
-@menu
-* i960-Chars::                Special Characters
-@end menu
-
-@node i960-Chars
-@subsection Special Characters
-
-@cindex line comment character, i960
-@cindex i960 line comment character
-The presence of a @samp{#} on a line indicates the start of a comment
-that extends to the end of the current line.
-
-If a @samp{#} appears as the first character of a line, the whole line
-is treated as a comment, but in this case the line can also be a
-logical line number directive (@pxref{Comments}) or a
-preprocessor control command (@pxref{Preprocessing}).
-
-@cindex line separator, i960
-@cindex statement separator, i960
-@cindex i960 line separator
-The @samp{;} character can be used to separate statements on the same
-line.
diff --git a/gas/doc/h8.texi b/gas/doc/h8.texi
index 8a88d6b..6291c5d 100644
--- a/gas/doc/h8.texi
+++ b/gas/doc/h8.texi
@@ -7,7 +7,6 @@
 @clear INTERNALS
 @clear MULTI-OBJ
 @clear AOUT
-@clear BOUT
 @set COFF
 @clear ELF
 @set Renesas-all
diff --git a/gas/doc/internals.texi b/gas/doc/internals.texi
index 418c700..93352ec 100644
--- a/gas/doc/internals.texi
+++ b/gas/doc/internals.texi
@@ -1096,11 +1096,6 @@ You may define this macro to parse an expression used in a data allocation
 pseudo-op such as @code{.word}.  You can use this to recognize relocation
 directives that may appear in such directives.
 
-@item BITFIELD_CONS_EXPRESSION
-@cindex BITFIELD_CONS_EXPRESSION
-If you define this macro, GAS will recognize bitfield instructions in data
-allocation pseudo-ops, as used on the i960.
-
 @item REPEAT_CONS_EXPRESSION
 @cindex REPEAT_CONS_EXPRESSION
 If you define this macro, GAS will recognize repeat counts in data allocation
@@ -1753,12 +1748,6 @@ no-op instructions, it must be able to expand or shrink the section contents
 while still preserving intra-section references and meeting alignment
 requirements.
 
-For the i960 using b.out format, no expansion is done; instead, each
-@samp{.align} directive causes extra space to be allocated, enough that when
-the linker is relaxing a section and removing unneeded space, it can discard
-some or all of this extra padding and cause the following data to be correctly
-aligned.
-
 For the H8/300, I think the linker expands calls that can't reach, and doesn't
 worry about alignment issues; the cpu probably never needs any significant
 alignment beyond the instruction size.