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author | H.J. Lu <hjl.tools@gmail.com> | 2021-10-21 06:15:31 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2021-10-22 14:45:13 -0700 |
commit | c8480b58e1968f209b6365af7422678f348222c2 (patch) | |
tree | ff36a1eb3ca713e3216661ce17cdf183e54fef18 /gas/NEWS | |
parent | aab00c2dff7511883e46735ef5e4582acd4d9911 (diff) | |
download | binutils-c8480b58e1968f209b6365af7422678f348222c2.zip binutils-c8480b58e1968f209b6365af7422678f348222c2.tar.gz binutils-c8480b58e1968f209b6365af7422678f348222c2.tar.bz2 |
x86: Add -muse-unaligned-vector-move to assembler
Unaligned load/store instructions on aligned memory or register are as
fast as aligned load/store instructions on modern Intel processors. Add
a command-line option, -muse-unaligned-vector-move, to x86 assembler to
encode encode aligned vector load/store instructions as unaligned
vector load/store instructions.
* NEWS: Mention -muse-unaligned-vector-move.
* config/tc-i386.c (use_unaligned_vector_move): New.
(encode_with_unaligned_vector_move): Likewise.
(md_assemble): Call encode_with_unaligned_vector_move for
-muse-unaligned-vector-move.
(OPTION_MUSE_UNALIGNED_VECTOR_MOVE): New.
(md_longopts): Add -muse-unaligned-vector-move.
(md_parse_option): Handle -muse-unaligned-vector-move.
(md_show_usage): Add -muse-unaligned-vector-move.
* doc/c-i386.texi: Document -muse-unaligned-vector-move.
* testsuite/gas/i386/i386.exp: Run unaligned-vector-move and
x86-64-unaligned-vector-move.
* testsuite/gas/i386/unaligned-vector-move.d: New file.
* testsuite/gas/i386/unaligned-vector-move.s: Likewise.
* testsuite/gas/i386/x86-64-unaligned-vector-move.d: Likewise.
Diffstat (limited to 'gas/NEWS')
-rw-r--r-- | gas/NEWS | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -1,5 +1,8 @@ -*- text -*- +* Add a command-line option, -muse-unaligned-vector-move, for x86 target + to encode aligned vector move as unaligned vector move. + * Add support for Cortex-R52+ for Arm. * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64. |