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authorAlan Modra <amodra@gmail.com>2020-01-30 21:59:20 +1030
committerAlan Modra <amodra@gmail.com>2020-01-30 23:39:55 +1030
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ubsan: m32c: left shift of negative value
More nonsense fixing "bugs" with left shifts of signed values. Yes, the C standard does say this is undefined (and right shifts of signed values are implementation defined BTW) but in practice there is no problem with current machines. 1's complement is a thing of the past. cpu/ * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting. (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise. (f-dst32-rn-prefixed-QI): Likewise. (f-dsp-32-s32): Mask before shifting left. (f-dsp-48-u32, f-dsp-48-s32): Likewise. (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than shifting left. (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise. (h-gr-SI): Mask before shifting. opcodes/ * m32c-ibld.c: Regenerate.
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+2020-01-30 Alan Modra <amodra@gmail.com>
+
+ * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
+ (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
+ (f-dst32-rn-prefixed-QI): Likewise.
+ (f-dsp-32-s32): Mask before shifting left.
+ (f-dsp-48-u32, f-dsp-48-s32): Likewise.
+ (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
+ shifting left.
+ (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
+ (h-gr-SI): Mask before shifting.
+
2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf.cpu (define-alu-insn-un): The unary BPF instructions