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| author | Alice Carlotti <alice.carlotti@arm.com> | 2025-07-24 18:49:36 +0100 |
|---|---|---|
| committer | Alice Carlotti <alice.carlotti@arm.com> | 2025-07-25 10:43:35 +0100 |
| commit | ff67c7a3298b902ecbc448a291e63aec4f81f8ac (patch) | |
| tree | b4e55553a0c04fc604e60583b53773b12f8b959a | |
| parent | 2b000fbeae4ceb4efa0bea4f14473f36e8bf3d96 (diff) | |
| download | binutils-ff67c7a3298b902ecbc448a291e63aec4f81f8ac.zip binutils-ff67c7a3298b902ecbc448a291e63aec4f81f8ac.tar.gz binutils-ff67c7a3298b902ecbc448a291e63aec4f81f8ac.tar.bz2 | |
gas/NEWS: Add AArch64 updates
| -rw-r--r-- | gas/NEWS | 8 |
1 files changed, 8 insertions, 0 deletions
@@ -56,6 +56,14 @@ Changes in 2.45: * For LoongArch, warn about negative right-shift amounts and division/modulus-by-zero when evaluating expressions. +* Add support for most Armv9.6 extensions, enabled by the option + `-march=armv9.6-a' and extensions '+cmpbr', '+f8f16mm', '+f8f32mm', + '+fprcvt', '+lsfe', '+lsui', '+occmo', '+pops', '+sme2p2', '+ssve-aes', + '+sve-aes', '+sve-aes2', '+sve-bfscale', '+sve-f16f32mm' and '+sve2p2'. + +* AArch64 system registers can now be assembled without restriction. The + previous behavior can be enabled with '-menable-sysreg-checking'. + Changes in 2.44: * Add support for the x86 Intel Diamond Rapids AMX instructions, including |