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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:03 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:03 +0100 |
commit | fd855fbb378e466fe8976b65743704da1136fe6e (patch) | |
tree | 615c84e74cde5371bff4acd64a084cfd9eaa39bb | |
parent | 3e4525ca0b410b558207b2cdf62c44e3fc13b4f3 (diff) | |
download | binutils-fd855fbb378e466fe8976b65743704da1136fe6e.zip binutils-fd855fbb378e466fe8976b65743704da1136fe6e.tar.gz binutils-fd855fbb378e466fe8976b65743704da1136fe6e.tar.bz2 |
aarch64: Rename REG_TYPE_ZA* to REG_TYPE_ZAT*
The ZA tile registers were called REG_TYPE_ZA, REG_TYPE_ZAH and
REG_TYPE_ZAV. However, a later patch wants to make plain "za"
a register type too, and REG_TYPE_ZA is the obvious name for that.
This patch therefore adds "T" (tile) to the existing names.
-rw-r--r-- | gas/config/tc-aarch64.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 4e75946..c8b4129 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -283,9 +283,9 @@ struct reloc_entry BASIC_REG_TYPE(VN) /* v[0-31] */ \ BASIC_REG_TYPE(ZN) /* z[0-31] */ \ BASIC_REG_TYPE(PN) /* p[0-15] */ \ - BASIC_REG_TYPE(ZA) /* za[0-15] */ \ - BASIC_REG_TYPE(ZAH) /* za[0-15]h */ \ - BASIC_REG_TYPE(ZAV) /* za[0-15]v */ \ + BASIC_REG_TYPE(ZAT) /* za[0-15] (ZA tile) */ \ + BASIC_REG_TYPE(ZATH) /* za[0-15]h (ZA tile horizontal slice) */ \ + BASIC_REG_TYPE(ZATV) /* za[0-15]v (ZA tile vertical slice) */ \ /* Typecheck: any 64-bit int reg (inc SP exc XZR). */ \ MULTI_REG_TYPE(R64_SP, REG_TYPE(R_64) | REG_TYPE(SP_64)) \ /* Typecheck: same, plus SVE registers. */ \ @@ -4297,7 +4297,7 @@ static int parse_sme_zada_operand (char **str, aarch64_opnd_qualifier_t *qualifier) { int regno; - const reg_entry *reg = parse_reg_with_qual (str, REG_TYPE_ZA, qualifier); + const reg_entry *reg = parse_reg_with_qual (str, REG_TYPE_ZAT, qualifier); if (reg == NULL) return PARSE_FAIL; @@ -4448,12 +4448,12 @@ parse_sme_za_hv_tiles_operand (char **str, const reg_entry *reg; qh = qv = *str; - if ((reg = parse_reg_with_qual (&qh, REG_TYPE_ZAH, qualifier)) != NULL) + if ((reg = parse_reg_with_qual (&qh, REG_TYPE_ZATH, qualifier)) != NULL) { *slice_indicator = HV_horizontal; *str = qh; } - else if ((reg = parse_reg_with_qual (&qv, REG_TYPE_ZAV, qualifier)) != NULL) + else if ((reg = parse_reg_with_qual (&qv, REG_TYPE_ZATV, qualifier)) != NULL) { *slice_indicator = HV_vertical; *str = qv; @@ -4566,7 +4566,8 @@ parse_sme_zero_mask(char **str) q = *str; do { - const reg_entry *reg = parse_reg_with_qual (&q, REG_TYPE_ZA, &qualifier); + const reg_entry *reg = parse_reg_with_qual (&q, REG_TYPE_ZAT, + &qualifier); if (reg) { int regno = reg->number; @@ -8266,13 +8267,13 @@ static const reg_entry reg_names[] = { REGSET16 (p, PN), REGSET16 (P, PN), /* SME ZA tile registers. */ - REGSET16 (za, ZA), REGSET16 (ZA, ZA), + REGSET16 (za, ZAT), REGSET16 (ZA, ZAT), /* SME ZA tile registers (horizontal slice). */ - REGSET16S (za, h, ZAH), REGSET16S (ZA, H, ZAH), + REGSET16S (za, h, ZATH), REGSET16S (ZA, H, ZATH), /* SME ZA tile registers (vertical slice). */ - REGSET16S (za, v, ZAV), REGSET16S (ZA, V, ZAV) + REGSET16S (za, v, ZATV), REGSET16S (ZA, V, ZATV) }; #undef REGDEF |