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| author | Alice Carlotti <alice.carlotti@arm.com> | 2025-04-17 20:42:32 +0100 |
|---|---|---|
| committer | Alice Carlotti <alice.carlotti@arm.com> | 2025-05-09 20:27:22 +0100 |
| commit | f20bd95af0a27aa40ee35db9459230c46236608b (patch) | |
| tree | ba4ca47766a52249d6156f5cbdc888d2493dd090 | |
| parent | 20687924847067ab7270c6cc2fec4316b43facf0 (diff) | |
| download | binutils-f20bd95af0a27aa40ee35db9459230c46236608b.zip binutils-f20bd95af0a27aa40ee35db9459230c46236608b.tar.gz binutils-f20bd95af0a27aa40ee35db9459230c46236608b.tar.bz2 | |
aarch64: Mark clearbhb as a pseudo instruction
This was an early name for the clrbhb hint instruction. Some software
was written with the old name before it was renamed, so we support it
for assembly but should never use it in disassembly.
This patch has no functional change, because we already pick (by
default) the last matching alias in the opcode table, and clrbhb is
listed later than clearbhb.
| -rw-r--r-- | opcodes/aarch64-tbl.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 28230aa..ae268b0 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -4607,7 +4607,7 @@ const struct aarch64_opcode aarch64_opcode_table[] = CORE_INSN ("esb", 0xd503221f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS), CORE_INSN ("psb", 0xd503223f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS), CORE_INSN ("tsb", 0xd503225f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS), - CORE_INSN ("clearbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS), + CORE_INSN ("clearbhb", 0xd50322df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS | F_PSEUDO), CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)), CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS), XS_INSN ("dsb", 0xd503323f, 0xfffff3ff, ic_system, OP1 (BARRIER_DSB_NXS), {}, F_HAS_ALIAS), |