diff options
author | Mike Frysinger <vapier@gentoo.org> | 2021-12-06 02:29:47 -0500 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2022-01-06 01:17:39 -0500 |
commit | e4c803f5bb08e946f0550260b39f71eff0192262 (patch) | |
tree | b63f746ac5cc0496d802a5c2c27f27598333dcc2 | |
parent | 9850d2d83eb919dc9e333e8ad9d7f308d2d1967b (diff) | |
download | binutils-e4c803f5bb08e946f0550260b39f71eff0192262.zip binutils-e4c803f5bb08e946f0550260b39f71eff0192262.tar.gz binutils-e4c803f5bb08e946f0550260b39f71eff0192262.tar.bz2 |
sim: common: migrate to standard uintXX_t types
Drop the sim-specific unsignedXX types and move to the standard uintXX_t
types that C11 provides.
-rw-r--r-- | sim/common/cgen-accfp.c | 64 | ||||
-rw-r--r-- | sim/common/cgen-par.h | 2 | ||||
-rw-r--r-- | sim/common/cgen-trace.c | 6 | ||||
-rw-r--r-- | sim/common/cgen-types.h | 18 | ||||
-rw-r--r-- | sim/common/dv-pal.c | 14 | ||||
-rw-r--r-- | sim/common/hw-events.c | 12 | ||||
-rw-r--r-- | sim/common/hw-events.h | 10 | ||||
-rw-r--r-- | sim/common/hw-properties.c | 2 | ||||
-rw-r--r-- | sim/common/hw-tree.c | 4 | ||||
-rw-r--r-- | sim/common/sim-alu.h | 192 | ||||
-rw-r--r-- | sim/common/sim-bits.h | 128 | ||||
-rw-r--r-- | sim/common/sim-core.c | 8 | ||||
-rw-r--r-- | sim/common/sim-events.c | 38 | ||||
-rw-r--r-- | sim/common/sim-events.h | 28 | ||||
-rw-r--r-- | sim/common/sim-fpu.c | 156 | ||||
-rw-r--r-- | sim/common/sim-fpu.h | 46 | ||||
-rw-r--r-- | sim/common/sim-memopt.c | 8 | ||||
-rw-r--r-- | sim/common/sim-n-bits.h | 4 | ||||
-rw-r--r-- | sim/common/sim-profile.c | 4 | ||||
-rw-r--r-- | sim/common/sim-trace.c | 20 | ||||
-rw-r--r-- | sim/common/sim-trace.h | 12 | ||||
-rw-r--r-- | sim/common/sim-types.h | 81 |
22 files changed, 425 insertions, 432 deletions
diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c index 345cfe8..e19b09b 100644 --- a/sim/common/cgen-accfp.c +++ b/sim/common/cgen-accfp.c @@ -25,7 +25,7 @@ addsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -44,7 +44,7 @@ subsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -63,7 +63,7 @@ mulsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -82,7 +82,7 @@ divsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -101,7 +101,7 @@ remsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -119,7 +119,7 @@ negsf (CGEN_FPU* fpu, SF x) { sim_fpu op1; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -136,7 +136,7 @@ abssf (CGEN_FPU* fpu, SF x) { sim_fpu op1; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -153,7 +153,7 @@ sqrtsf (CGEN_FPU* fpu, SF x) { sim_fpu op1; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -170,7 +170,7 @@ invsf (CGEN_FPU* fpu, SF x) { sim_fpu op1; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -188,7 +188,7 @@ minsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -207,7 +207,7 @@ maxsf (CGEN_FPU* fpu, SF x, SF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_status status; sim_fpu_32to (&op1, x); @@ -322,7 +322,7 @@ static DF fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x) { sim_fpu op1; - unsigned64 res; + uint64_t res; sim_fpu_32to (&op1, x); sim_fpu_to64 (&res, &op1); @@ -334,7 +334,7 @@ static SF ftruncdfsf (CGEN_FPU* fpu, int how UNUSED, DF x) { sim_fpu op1; - unsigned32 res; + uint32_t res; sim_fpu_64to (&op1, x); sim_fpu_to32 (&res, &op1); @@ -346,7 +346,7 @@ static SF floatsisf (CGEN_FPU* fpu, int how UNUSED, SI x) { sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_i32to (&ans, x, sim_fpu_round_near); sim_fpu_to32 (&res, &ans); @@ -357,7 +357,7 @@ static DF floatsidf (CGEN_FPU* fpu, int how UNUSED, SI x) { sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_i32to (&ans, x, sim_fpu_round_near); sim_fpu_to64 (&res, &ans); @@ -368,7 +368,7 @@ static DF floatdidf (CGEN_FPU* fpu, int how UNUSED, DI x) { sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_i64to (&ans, x, sim_fpu_round_near); sim_fpu_to64 (&res, &ans); @@ -379,7 +379,7 @@ static SF ufloatsisf (CGEN_FPU* fpu, int how UNUSED, USI x) { sim_fpu ans; - unsigned32 res; + uint32_t res; sim_fpu_u32to (&ans, x, sim_fpu_round_near); sim_fpu_to32 (&res, &ans); @@ -390,7 +390,7 @@ static SI fixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x) { sim_fpu op1; - signed32 res; + int32_t res; sim_fpu_32to (&op1, x); sim_fpu_to32i (&res, &op1, sim_fpu_round_near); @@ -401,7 +401,7 @@ static SI fixdfsi (CGEN_FPU* fpu, int how UNUSED, DF x) { sim_fpu op1; - signed32 res; + int32_t res; sim_fpu_64to (&op1, x); sim_fpu_to32i (&res, &op1, sim_fpu_round_near); @@ -412,7 +412,7 @@ static DI fixdfdi (CGEN_FPU* fpu, int how UNUSED, DF x) { sim_fpu op1; - signed64 res; + int64_t res; sim_fpu_64to (&op1, x); sim_fpu_to64i (&res, &op1, sim_fpu_round_near); @@ -423,7 +423,7 @@ static USI ufixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x) { sim_fpu op1; - unsigned32 res; + uint32_t res; sim_fpu_32to (&op1, x); sim_fpu_to32u (&res, &op1, sim_fpu_round_near); @@ -438,7 +438,7 @@ adddf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -457,7 +457,7 @@ subdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -476,7 +476,7 @@ muldf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -495,7 +495,7 @@ divdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -514,7 +514,7 @@ remdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -532,7 +532,7 @@ negdf (CGEN_FPU* fpu, DF x) { sim_fpu op1; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -549,7 +549,7 @@ absdf (CGEN_FPU* fpu, DF x) { sim_fpu op1; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -566,7 +566,7 @@ sqrtdf (CGEN_FPU* fpu, DF x) { sim_fpu op1; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -583,7 +583,7 @@ invdf (CGEN_FPU* fpu, DF x) { sim_fpu op1; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -601,7 +601,7 @@ mindf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); @@ -620,7 +620,7 @@ maxdf (CGEN_FPU* fpu, DF x, DF y) sim_fpu op1; sim_fpu op2; sim_fpu ans; - unsigned64 res; + uint64_t res; sim_fpu_status status; sim_fpu_64to (&op1, x); diff --git a/sim/common/cgen-par.h b/sim/common/cgen-par.h index c06dcd5..46364b6 100644 --- a/sim/common/cgen-par.h +++ b/sim/common/cgen-par.h @@ -38,7 +38,7 @@ enum cgen_write_queue_kind { typedef struct { enum cgen_write_queue_kind kind; /* Used to select union member below. */ IADDR insn_address; /* Address of the insn performing the write. */ - unsigned32 flags; /* Target specific flags. */ + uint32_t flags; /* Target specific flags. */ long word1; /* Target specific field. */ union { struct { diff --git a/sim/common/cgen-trace.c b/sim/common/cgen-trace.c index 4fa1cda..149ea8a 100644 --- a/sim/common/cgen-trace.c +++ b/sim/common/cgen-trace.c @@ -370,9 +370,9 @@ sim_cgen_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn, struct disassemble_info disasm_info; SFILE sfile; union { - unsigned8 bytes[CGEN_MAX_INSN_SIZE]; - unsigned16 shorts[8]; - unsigned32 words[4]; + uint8_t bytes[CGEN_MAX_INSN_SIZE]; + uint16_t shorts[8]; + uint32_t words[4]; } insn_buf; SIM_DESC sd = CPU_STATE (cpu); CGEN_CPU_DESC cd = CPU_CPU_DESC (cpu); diff --git a/sim/common/cgen-types.h b/sim/common/cgen-types.h index 414f5bb..e767c68 100644 --- a/sim/common/cgen-types.h +++ b/sim/common/cgen-types.h @@ -61,15 +61,15 @@ extern const char * const cgen_mode_names[]; #undef VOID typedef void VOID; typedef unsigned char BI; -typedef signed8 QI; -typedef signed16 HI; -typedef signed32 SI; -typedef unsigned8 UQI; -typedef unsigned16 UHI; -typedef unsigned32 USI; - -typedef signed64 DI; -typedef unsigned64 UDI; +typedef int8_t QI; +typedef int16_t HI; +typedef int32_t SI; +typedef uint8_t UQI; +typedef uint16_t UHI; +typedef uint32_t USI; + +typedef int64_t DI; +typedef uint64_t UDI; #define GETLODI(di) ((SI) (di)) #define GETHIDI(di) ((SI) ((UDI) (di) >> 32)) #define SETLODI(di, val) ((di) = (((di) & 0xffffffff00000000LL) | (val))) diff --git a/sim/common/dv-pal.c b/sim/common/dv-pal.c index 9a33de6..5f42fda 100644 --- a/sim/common/dv-pal.c +++ b/sim/common/dv-pal.c @@ -181,8 +181,8 @@ typedef struct _hw_pal_console_buffer { typedef struct _hw_pal_counter { struct hw_event *handler; - signed64 start; - unsigned32 delta; + int64_t start; + uint32_t delta; int periodic_p; } hw_pal_counter; @@ -237,10 +237,10 @@ do_counter_read (struct hw *me, hw_pal_device *pal, const char *reg, hw_pal_counter *counter, - unsigned32 *word, + uint32_t *word, unsigned nr_bytes) { - unsigned32 val; + uint32_t val; if (nr_bytes != 4) hw_abort (me, "%s - bad read size must be 4 bytes", reg); val = counter->delta; @@ -253,10 +253,10 @@ do_counter_value (struct hw *me, hw_pal_device *pal, const char *reg, hw_pal_counter *counter, - unsigned32 *word, + uint32_t *word, unsigned nr_bytes) { - unsigned32 val; + uint32_t val; if (nr_bytes != 4) hw_abort (me, "%s - bad read size must be 4 bytes", reg); if (counter->delta != 0) @@ -273,7 +273,7 @@ do_counter_write (struct hw *me, hw_pal_device *pal, const char *reg, hw_pal_counter *counter, - const unsigned32 *word, + const uint32_t *word, unsigned nr_bytes) { if (nr_bytes != 4) diff --git a/sim/common/hw-events.c b/sim/common/hw-events.c index 62eb1c7..9bde016 100644 --- a/sim/common/hw-events.c +++ b/sim/common/hw-events.c @@ -87,7 +87,7 @@ bounce_hw_event (SIM_DESC sd, struct hw_event * hw_event_queue_schedule (struct hw *me, - signed64 delta_time, + int64_t delta_time, hw_event_callback *callback, void *data) { @@ -96,7 +96,7 @@ hw_event_queue_schedule (struct hw *me, struct hw_event * hw_event_queue_schedule_tracef (struct hw *me, - signed64 delta_time, + int64_t delta_time, hw_event_callback *callback, void *data, const char *fmt, @@ -112,7 +112,7 @@ hw_event_queue_schedule_tracef (struct hw *me, struct hw_event * hw_event_queue_schedule_vtracef (struct hw *me, - signed64 delta_time, + int64_t delta_time, hw_event_callback *callback, void *data, const char *fmt, @@ -160,17 +160,17 @@ hw_event_queue_deschedule (struct hw *me, } -signed64 +int64_t hw_event_queue_time (struct hw *me) { return sim_events_time (hw_system (me)); } /* Returns the time that remains before the event is raised. */ -signed64 +int64_t hw_event_remain_time (struct hw *me, struct hw_event *event) { - signed64 t; + int64_t t; t = sim_events_remain_time (hw_system (me), event->real); return t; diff --git a/sim/common/hw-events.h b/sim/common/hw-events.h index 8cc520c..adb285f 100644 --- a/sim/common/hw-events.h +++ b/sim/common/hw-events.h @@ -33,13 +33,13 @@ typedef void (hw_event_callback) (struct hw *me, void *data); struct hw_event *hw_event_queue_schedule (struct hw *me, - signed64 delta_time, + int64_t delta_time, hw_event_callback *handler, void *data); struct hw_event *hw_event_queue_schedule_tracef (struct hw *me, - signed64 delta_time, + int64_t delta_time, hw_event_callback *handler, void *data, const char *fmt, @@ -47,7 +47,7 @@ struct hw_event *hw_event_queue_schedule_tracef struct hw_event *hw_event_queue_schedule_vtracef (struct hw *me, - signed64 delta_time, + int64_t delta_time, hw_event_callback *handler, void *data, const char *fmt, @@ -58,11 +58,11 @@ void hw_event_queue_deschedule (struct hw *me, struct hw_event *event_to_remove); -signed64 hw_event_queue_time +int64_t hw_event_queue_time (struct hw *me); /* Returns the time that remains before the event is raised. */ -signed64 hw_event_remain_time +int64_t hw_event_remain_time (struct hw *me, struct hw_event *event); #endif diff --git a/sim/common/hw-properties.c b/sim/common/hw-properties.c index 295cf2a..3d2b5cd 100644 --- a/sim/common/hw-properties.c +++ b/sim/common/hw-properties.c @@ -368,7 +368,7 @@ hw_add_boolean_property (struct hw *me, const char *property, int boolean) { - signed32 new_boolean = (boolean ? -1 : 0); + int32_t new_boolean = (boolean ? -1 : 0); hw_add_property (me, property, boolean_property, &new_boolean, sizeof (new_boolean), &new_boolean, sizeof (new_boolean), diff --git a/sim/common/hw-tree.c b/sim/common/hw-tree.c index 2e6dadd..5631933 100644 --- a/sim/common/hw-tree.c +++ b/sim/common/hw-tree.c @@ -881,7 +881,7 @@ hw_tree_vparse (struct hw *current, #endif case '[': { - unsigned8 words[1024]; + uint8_t words[1024]; char *curr = spec.value + 1; int nr_words = 0; while (1) @@ -1127,7 +1127,7 @@ print_properties (struct hw *me, } else { - unsigned8 *w = (unsigned8*)property->array; + uint8_t *w = (uint8_t*)property->array; p->print (p->file, " ["); while ((char*)w - (char*)property->array < property->sizeof_array) { diff --git a/sim/common/sim-alu.h b/sim/common/sim-alu.h index 0fe62f1..a55f648 100644 --- a/sim/common/sim-alu.h +++ b/sim/common/sim-alu.h @@ -431,12 +431,12 @@ overflow method 2 are used. */ #define ALU8_BEGIN(VAL) \ -unsigned alu8_cr = (unsigned8) (VAL); \ -signed alu8_vr = (signed8) (alu8_cr) +unsigned alu8_cr = (uint8_t) (VAL); \ +signed alu8_vr = (int8_t) (alu8_cr) #define ALU8_SET(VAL) \ -alu8_cr = (unsigned8) (VAL); \ -alu8_vr = (signed8) (alu8_cr) +alu8_cr = (uint8_t) (VAL); \ +alu8_vr = (int8_t) (alu8_cr) #define ALU8_SET_CARRY_BORROW(CARRY) \ do { \ @@ -449,9 +449,9 @@ do { \ #define ALU8_HAD_CARRY_BORROW (alu8_cr & LSBIT32(8)) #define ALU8_HAD_OVERFLOW (((alu8_vr >> 8) ^ alu8_vr) & LSBIT32 (8-1)) -#define ALU8_RESULT ((unsigned8) alu8_cr) -#define ALU8_CARRY_BORROW_RESULT ((unsigned8) alu8_cr) -#define ALU8_OVERFLOW_RESULT ((unsigned8) alu8_vr) +#define ALU8_RESULT ((uint8_t) alu8_cr) +#define ALU8_CARRY_BORROW_RESULT ((uint8_t) alu8_cr) +#define ALU8_OVERFLOW_RESULT ((uint8_t) alu8_vr) /* #define ALU8_END ????? - target dependant */ @@ -463,12 +463,12 @@ do { \ overflow method 2 are used. */ #define ALU16_BEGIN(VAL) \ -signed alu16_cr = (unsigned16) (VAL); \ -unsigned alu16_vr = (signed16) (alu16_cr) +signed alu16_cr = (uint16_t) (VAL); \ +unsigned alu16_vr = (int16_t) (alu16_cr) #define ALU16_SET(VAL) \ -alu16_cr = (unsigned16) (VAL); \ -alu16_vr = (signed16) (alu16_cr) +alu16_cr = (uint16_t) (VAL); \ +alu16_vr = (int16_t) (alu16_cr) #define ALU16_SET_CARRY_BORROW(CARRY) \ do { \ @@ -481,9 +481,9 @@ do { \ #define ALU16_HAD_CARRY_BORROW (alu16_cr & LSBIT32(16)) #define ALU16_HAD_OVERFLOW (((alu16_vr >> 16) ^ alu16_vr) & LSBIT32 (16-1)) -#define ALU16_RESULT ((unsigned16) alu16_cr) -#define ALU16_CARRY_BORROW_RESULT ((unsigned16) alu16_cr) -#define ALU16_OVERFLOW_RESULT ((unsigned16) alu16_vr) +#define ALU16_RESULT ((uint16_t) alu16_cr) +#define ALU16_CARRY_BORROW_RESULT ((uint16_t) alu16_cr) +#define ALU16_OVERFLOW_RESULT ((uint16_t) alu16_vr) /* #define ALU16_END ????? - target dependant */ @@ -495,7 +495,7 @@ do { \ method 4 and overflow method 4 are used. */ #define ALU32_BEGIN(VAL) \ -unsigned32 alu32_r = (VAL); \ +uint32_t alu32_r = (VAL); \ int alu32_c = 0; \ int alu32_v = 0 @@ -521,7 +521,7 @@ alu32_v = 0 arithmetic, it is still used. */ #define ALU64_BEGIN(VAL) \ -unsigned64 alu64_r = (VAL); \ +uint64_t alu64_r = (VAL); \ int alu64_c = 0; \ int alu64_v = 0 @@ -560,25 +560,25 @@ alu64_v = 0 #define ALU8_ADD(VAL) \ do { \ - unsigned8 alu8add_val = (VAL); \ + uint8_t alu8add_val = (VAL); \ ALU8_ADDC (alu8add_val); \ } while (0) #define ALU16_ADD(VAL) \ do { \ - unsigned16 alu16add_val = (VAL); \ + uint16_t alu16add_val = (VAL); \ ALU16_ADDC (alu8add_val); \ } while (0) #define ALU32_ADD(VAL) \ do { \ - unsigned32 alu32add_val = (VAL); \ + uint32_t alu32add_val = (VAL); \ ALU32_ADDC (alu32add_val); \ } while (0) #define ALU64_ADD(VAL) \ do { \ - unsigned64 alu64add_val = (unsigned64) (VAL); \ + uint64_t alu64add_val = (uint64_t) (VAL); \ ALU64_ADDC (alu64add_val); \ } while (0) @@ -590,34 +590,34 @@ do { \ #define ALU8_ADDC(VAL) \ do { \ - unsigned8 alu8addc_val = (VAL); \ - alu8_cr += (unsigned8)(alu8addc_val); \ - alu8_vr += (signed8)(alu8addc_val); \ + uint8_t alu8addc_val = (VAL); \ + alu8_cr += (uint8_t)(alu8addc_val); \ + alu8_vr += (int8_t)(alu8addc_val); \ } while (0) #define ALU16_ADDC(VAL) \ do { \ - unsigned16 alu16addc_val = (VAL); \ - alu16_cr += (unsigned16)(alu16addc_val); \ - alu16_vr += (signed16)(alu16addc_val); \ + uint16_t alu16addc_val = (VAL); \ + alu16_cr += (uint16_t)(alu16addc_val); \ + alu16_vr += (int16_t)(alu16addc_val); \ } while (0) #define ALU32_ADDC(VAL) \ do { \ - unsigned32 alu32addc_val = (VAL); \ - unsigned32 alu32addc_sign = alu32addc_val ^ alu32_r; \ + uint32_t alu32addc_val = (VAL); \ + uint32_t alu32addc_sign = alu32addc_val ^ alu32_r; \ alu32_r += (alu32addc_val); \ alu32_c = (alu32_r < alu32addc_val); \ - alu32_v = ((alu32addc_sign ^ - (unsigned32)alu32_c) ^ alu32_r) >> 31; \ + alu32_v = ((alu32addc_sign ^ - (uint32_t)alu32_c) ^ alu32_r) >> 31; \ } while (0) #define ALU64_ADDC(VAL) \ do { \ - unsigned64 alu64addc_val = (unsigned64) (VAL); \ - unsigned64 alu64addc_sign = alu64addc_val ^ alu64_r; \ + uint64_t alu64addc_val = (uint64_t) (VAL); \ + uint64_t alu64addc_sign = alu64addc_val ^ alu64_r; \ alu64_r += (alu64addc_val); \ alu64_c = (alu64_r < alu64addc_val); \ - alu64_v = ((alu64addc_sign ^ - (unsigned64)alu64_c) ^ alu64_r) >> 63; \ + alu64_v = ((alu64addc_sign ^ - (uint64_t)alu64_c) ^ alu64_r) >> 63; \ } while (0) #define ALU_ADDC XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_ADDC) @@ -628,40 +628,40 @@ do { \ #define ALU8_ADDC_C(VAL,C) \ do { \ - unsigned8 alu8addcc_val = (VAL); \ - unsigned8 alu8addcc_c = (C); \ - alu8_cr += (unsigned)(unsigned8)alu8addcc_val + alu8addcc_c; \ - alu8_vr += (signed)(signed8)(alu8addcc_val) + alu8addcc_c; \ + uint8_t alu8addcc_val = (VAL); \ + uint8_t alu8addcc_c = (C); \ + alu8_cr += (unsigned)(uint8_t)alu8addcc_val + alu8addcc_c; \ + alu8_vr += (signed)(int8_t)(alu8addcc_val) + alu8addcc_c; \ } while (0) #define ALU16_ADDC_C(VAL,C) \ do { \ - unsigned16 alu16addcc_val = (VAL); \ - unsigned16 alu16addcc_c = (C); \ - alu16_cr += (unsigned)(unsigned16)alu16addcc_val + alu16addcc_c; \ - alu16_vr += (signed)(signed16)(alu16addcc_val) + alu16addcc_c; \ + uint16_t alu16addcc_val = (VAL); \ + uint16_t alu16addcc_c = (C); \ + alu16_cr += (unsigned)(uint16_t)alu16addcc_val + alu16addcc_c; \ + alu16_vr += (signed)(int16_t)(alu16addcc_val) + alu16addcc_c; \ } while (0) #define ALU32_ADDC_C(VAL,C) \ do { \ - unsigned32 alu32addcc_val = (VAL); \ - unsigned32 alu32addcc_c = (C); \ - unsigned32 alu32addcc_sign = (alu32addcc_val ^ alu32_r); \ + uint32_t alu32addcc_val = (VAL); \ + uint32_t alu32addcc_c = (C); \ + uint32_t alu32addcc_sign = (alu32addcc_val ^ alu32_r); \ alu32_r += (alu32addcc_val + alu32addcc_c); \ alu32_c = ((alu32_r < alu32addcc_val) \ || (alu32addcc_c && alu32_r == alu32addcc_val)); \ - alu32_v = ((alu32addcc_sign ^ - (unsigned32)alu32_c) ^ alu32_r) >> 31;\ + alu32_v = ((alu32addcc_sign ^ - (uint32_t)alu32_c) ^ alu32_r) >> 31;\ } while (0) #define ALU64_ADDC_C(VAL,C) \ do { \ - unsigned64 alu64addcc_val = (VAL); \ - unsigned64 alu64addcc_c = (C); \ - unsigned64 alu64addcc_sign = (alu64addcc_val ^ alu64_r); \ + uint64_t alu64addcc_val = (VAL); \ + uint64_t alu64addcc_c = (C); \ + uint64_t alu64addcc_sign = (alu64addcc_val ^ alu64_r); \ alu64_r += (alu64addcc_val + alu64addcc_c); \ alu64_c = ((alu64_r < alu64addcc_val) \ || (alu64addcc_c && alu64_r == alu64addcc_val)); \ - alu64_v = ((alu64addcc_sign ^ - (unsigned64)alu64_c) ^ alu64_r) >> 63;\ + alu64_v = ((alu64addcc_sign ^ - (uint64_t)alu64_c) ^ alu64_r) >> 63;\ } while (0) #define ALU_ADDC_C XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_ADDC_C) @@ -672,25 +672,25 @@ do { \ #define ALU8_SUB(VAL) \ do { \ - unsigned8 alu8sub_val = (VAL); \ + uint8_t alu8sub_val = (VAL); \ ALU8_ADDC_C (~alu8sub_val, 1); \ } while (0) #define ALU16_SUB(VAL) \ do { \ - unsigned16 alu16sub_val = (VAL); \ + uint16_t alu16sub_val = (VAL); \ ALU16_ADDC_C (~alu16sub_val, 1); \ } while (0) #define ALU32_SUB(VAL) \ do { \ - unsigned32 alu32sub_val = (VAL); \ + uint32_t alu32sub_val = (VAL); \ ALU32_ADDC_C (~alu32sub_val, 1); \ } while (0) #define ALU64_SUB(VAL) \ do { \ - unsigned64 alu64sub_val = (VAL); \ + uint64_t alu64sub_val = (VAL); \ ALU64_ADDC_C (~alu64sub_val, 1); \ } while (0) @@ -702,25 +702,25 @@ do { \ #define ALU8_SUBC(VAL) \ do { \ - unsigned8 alu8subc_val = (VAL); \ + uint8_t alu8subc_val = (VAL); \ ALU8_ADDC_C (~alu8subc_val, 1); \ } while (0) #define ALU16_SUBC(VAL) \ do { \ - unsigned16 alu16subc_val = (VAL); \ + uint16_t alu16subc_val = (VAL); \ ALU16_ADDC_C (~alu16subc_val, 1); \ } while (0) #define ALU32_SUBC(VAL) \ do { \ - unsigned32 alu32subc_val = (VAL); \ + uint32_t alu32subc_val = (VAL); \ ALU32_ADDC_C (~alu32subc_val, 1); \ } while (0) #define ALU64_SUBC(VAL) \ do { \ - unsigned64 alu64subc_val = (VAL); \ + uint64_t alu64subc_val = (VAL); \ ALU64_ADDC_C (~alu64subc_val, 1); \ } while (0) @@ -732,29 +732,29 @@ do { \ #define ALU8_SUBC_X(VAL,C) \ do { \ - unsigned8 alu8subcx_val = (VAL); \ - unsigned8 alu8subcx_c = (C); \ + uint8_t alu8subcx_val = (VAL); \ + uint8_t alu8subcx_c = (C); \ ALU8_ADDC_C (~alu8subcx_val, alu8subcx_c); \ } while (0) #define ALU16_SUBC_X(VAL,C) \ do { \ - unsigned16 alu16subcx_val = (VAL); \ - unsigned16 alu16subcx_c = (C); \ + uint16_t alu16subcx_val = (VAL); \ + uint16_t alu16subcx_c = (C); \ ALU16_ADDC_C (~alu16subcx_val, alu16subcx_c); \ } while (0) #define ALU32_SUBC_X(VAL,C) \ do { \ - unsigned32 alu32subcx_val = (VAL); \ - unsigned32 alu32subcx_c = (C); \ + uint32_t alu32subcx_val = (VAL); \ + uint32_t alu32subcx_c = (C); \ ALU32_ADDC_C (~alu32subcx_val, alu32subcx_c); \ } while (0) #define ALU64_SUBC_X(VAL,C) \ do { \ - unsigned64 alu64subcx_val = (VAL); \ - unsigned64 alu64subcx_c = (C); \ + uint64_t alu64subcx_val = (VAL); \ + uint64_t alu64subcx_c = (C); \ ALU64_ADDC_C (~alu64subcx_val, alu64subcx_c); \ } while (0) @@ -766,34 +766,34 @@ do { \ #define ALU8_SUBB(VAL) \ do { \ - unsigned8 alu8subb_val = (VAL); \ - alu8_cr -= (unsigned)(unsigned8)alu8subb_val; \ - alu8_vr -= (signed)(signed8)alu8subb_val; \ + uint8_t alu8subb_val = (VAL); \ + alu8_cr -= (unsigned)(uint8_t)alu8subb_val; \ + alu8_vr -= (signed)(int8_t)alu8subb_val; \ } while (0) #define ALU16_SUBB(VAL) \ do { \ - unsigned16 alu16subb_val = (VAL); \ - alu16_cr -= (unsigned)(unsigned16)alu16subb_val; \ - alu16_vr -= (signed)(signed16)alu16subb_val; \ + uint16_t alu16subb_val = (VAL); \ + alu16_cr -= (unsigned)(uint16_t)alu16subb_val; \ + alu16_vr -= (signed)(int16_t)alu16subb_val; \ } while (0) #define ALU32_SUBB(VAL) \ do { \ - unsigned32 alu32subb_val = (VAL); \ - unsigned32 alu32subb_sign = alu32subb_val ^ alu32_r; \ + uint32_t alu32subb_val = (VAL); \ + uint32_t alu32subb_sign = alu32subb_val ^ alu32_r; \ alu32_c = (alu32_r < alu32subb_val); \ alu32_r -= (alu32subb_val); \ - alu32_v = ((alu32subb_sign ^ - (unsigned32)alu32_c) ^ alu32_r) >> 31; \ + alu32_v = ((alu32subb_sign ^ - (uint32_t)alu32_c) ^ alu32_r) >> 31; \ } while (0) #define ALU64_SUBB(VAL) \ do { \ - unsigned64 alu64subb_val = (VAL); \ - unsigned64 alu64subb_sign = alu64subb_val ^ alu64_r; \ + uint64_t alu64subb_val = (VAL); \ + uint64_t alu64subb_sign = alu64subb_val ^ alu64_r; \ alu64_c = (alu64_r < alu64subb_val); \ alu64_r -= (alu64subb_val); \ - alu64_v = ((alu64subb_sign ^ - (unsigned64)alu64_c) ^ alu64_r) >> 31; \ + alu64_v = ((alu64subb_sign ^ - (uint64_t)alu64_c) ^ alu64_r) >> 31; \ } while (0) #define ALU_SUBB XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SUBB) @@ -804,34 +804,34 @@ do { \ #define ALU8_SUBB_B(VAL,B) \ do { \ - unsigned8 alu8subbb_val = (VAL); \ - unsigned8 alu8subbb_b = (B); \ - alu8_cr -= (unsigned)(unsigned8)alu8subbb_val; \ - alu8_cr -= (unsigned)(unsigned8)alu8subbb_b; \ - alu8_vr -= (signed)(signed8)alu8subbb_val + alu8subbb_b; \ + uint8_t alu8subbb_val = (VAL); \ + uint8_t alu8subbb_b = (B); \ + alu8_cr -= (unsigned)(uint8_t)alu8subbb_val; \ + alu8_cr -= (unsigned)(uint8_t)alu8subbb_b; \ + alu8_vr -= (signed)(int8_t)alu8subbb_val + alu8subbb_b; \ } while (0) #define ALU16_SUBB_B(VAL,B) \ do { \ - unsigned16 alu16subbb_val = (VAL); \ - unsigned16 alu16subbb_b = (B); \ - alu16_cr -= (unsigned)(unsigned16)alu16subbb_val; \ - alu16_cr -= (unsigned)(unsigned16)alu16subbb_b; \ - alu16_vr -= (signed)(signed16)alu16subbb_val + alu16subbb_b; \ + uint16_t alu16subbb_val = (VAL); \ + uint16_t alu16subbb_b = (B); \ + alu16_cr -= (unsigned)(uint16_t)alu16subbb_val; \ + alu16_cr -= (unsigned)(uint16_t)alu16subbb_b; \ + alu16_vr -= (signed)(int16_t)alu16subbb_val + alu16subbb_b; \ } while (0) #define ALU32_SUBB_B(VAL,B) \ do { \ - unsigned32 alu32subbb_val = (VAL); \ - unsigned32 alu32subbb_b = (B); \ + uint32_t alu32subbb_val = (VAL); \ + uint32_t alu32subbb_b = (B); \ ALU32_ADDC_C (~alu32subbb_val, !alu32subbb_b); \ alu32_c = !alu32_c; \ } while (0) #define ALU64_SUBB_B(VAL,B) \ do { \ - unsigned64 alu64subbb_val = (VAL); \ - unsigned64 alu64subbb_b = (B); \ + uint64_t alu64subbb_val = (VAL); \ + uint64_t alu64subbb_b = (B); \ ALU64_ADDC_C (~alu64subbb_val, !alu64subbb_b); \ alu64_c = !alu64_c; \ } while (0) @@ -858,14 +858,14 @@ do { \ #define ALU32_NEG() \ do { \ - unsigned32 alu32neg_val = (ALU32_RESULT); \ + uint32_t alu32neg_val = (ALU32_RESULT); \ ALU32_SET (1); \ ALU32_ADDC (~alu32neg_val); \ } while(0) #define ALU64_NEG() \ do { \ - unsigned64 alu64neg_val = (ALU64_RESULT); \ + uint64_t alu64neg_val = (ALU64_RESULT); \ ALU64_SET (1); \ ALU64_ADDC (~alu64neg_val); \ } while (0) @@ -893,14 +893,14 @@ do { \ #define ALU32_NEGC() \ do { \ - unsigned32 alu32negc_val = (ALU32_RESULT); \ + uint32_t alu32negc_val = (ALU32_RESULT); \ ALU32_SET (1); \ ALU32_ADDC (~alu32negc_val); \ } while(0) #define ALU64_NEGC() \ do { \ - unsigned64 alu64negc_val = (ALU64_RESULT); \ + uint64_t alu64negc_val = (ALU64_RESULT); \ ALU64_SET (1); \ ALU64_ADDC (~alu64negc_val); \ } while (0) @@ -928,14 +928,14 @@ do { \ #define ALU32_NEGB() \ do { \ - unsigned32 alu32negb_val = (ALU32_RESULT); \ + uint32_t alu32negb_val = (ALU32_RESULT); \ ALU32_SET (0); \ ALU32_SUBB (alu32negb_val); \ } while(0) #define ALU64_NEGB() \ do { \ - unsigned64 alu64negb_val = (ALU64_RESULT); \ + uint64_t alu64negb_val = (ALU64_RESULT); \ ALU64_SET (0); \ ALU64_SUBB (alu64negb_val); \ } while (0) diff --git a/sim/common/sim-bits.h b/sim/common/sim-bits.h index c1aeafc..b1352d5 100644 --- a/sim/common/sim-bits.h +++ b/sim/common/sim-bits.h @@ -206,41 +206,41 @@ /* LS/MS Bit operations */ -#define LSBIT8(POS) ((unsigned8) 1 << (POS)) -#define LSBIT16(POS) ((unsigned16)1 << (POS)) -#define LSBIT32(POS) ((unsigned32)1 << (POS)) -#define LSBIT64(POS) ((unsigned64)1 << (POS)) +#define LSBIT8(POS) ((uint8_t) 1 << (POS)) +#define LSBIT16(POS) ((uint16_t)1 << (POS)) +#define LSBIT32(POS) ((uint32_t)1 << (POS)) +#define LSBIT64(POS) ((uint64_t)1 << (POS)) #if (WITH_TARGET_WORD_BITSIZE == 64) #define LSBIT(POS) LSBIT64 (POS) #endif #if (WITH_TARGET_WORD_BITSIZE == 32) -#define LSBIT(POS) ((unsigned32)((POS) >= 32 \ +#define LSBIT(POS) ((uint32_t)((POS) >= 32 \ ? 0 \ : (1 << ((POS) >= 32 ? 0 : (POS))))) #endif #if (WITH_TARGET_WORD_BITSIZE == 16) -#define LSBIT(POS) ((unsigned16)((POS) >= 16 \ +#define LSBIT(POS) ((uint16_t)((POS) >= 16 \ ? 0 \ : (1 << ((POS) >= 16 ? 0 : (POS))))) #endif -#define MSBIT8(POS) ((unsigned8) 1 << ( 8 - 1 - (POS))) -#define MSBIT16(POS) ((unsigned16)1 << (16 - 1 - (POS))) -#define MSBIT32(POS) ((unsigned32)1 << (32 - 1 - (POS))) -#define MSBIT64(POS) ((unsigned64)1 << (64 - 1 - (POS))) +#define MSBIT8(POS) ((uint8_t) 1 << ( 8 - 1 - (POS))) +#define MSBIT16(POS) ((uint16_t)1 << (16 - 1 - (POS))) +#define MSBIT32(POS) ((uint32_t)1 << (32 - 1 - (POS))) +#define MSBIT64(POS) ((uint64_t)1 << (64 - 1 - (POS))) #if (WITH_TARGET_WORD_BITSIZE == 64) #define MSBIT(POS) MSBIT64 (POS) #endif #if (WITH_TARGET_WORD_BITSIZE == 32) -#define MSBIT(POS) ((unsigned32)((POS) < 32 \ +#define MSBIT(POS) ((uint32_t)((POS) < 32 \ ? 0 \ : (1 << ((POS) < 32 ? 0 : (64 - 1) - (POS))))) #endif #if (WITH_TARGET_WORD_BITSIZE == 16) -#define MSBIT(POS) ((unsigned16)((POS) < 48 \ +#define MSBIT(POS) ((uint16_t)((POS) < 48 \ ? 0 \ : (1 << ((POS) < 48 ? 0 : (64 - 1) - (POS))))) #endif @@ -271,7 +271,7 @@ /* multi bit mask */ /* 111111 -> mmll11 -> mm11ll */ -#define _MASKn(WIDTH, START, STOP) (((unsigned##WIDTH)(-1) \ +#define _MASKn(WIDTH, START, STOP) (((uint##WIDTH##_t)(-1) \ >> (_MSB_SHIFT (WIDTH, START) \ + _LSB_SHIFT (WIDTH, STOP))) \ << _LSB_SHIFT (WIDTH, STOP)) @@ -375,17 +375,17 @@ /* mask the required bits, leaving them in place */ -INLINE_SIM_BITS(unsigned8) LSMASKED8 (unsigned8 word, int first, int last); -INLINE_SIM_BITS(unsigned16) LSMASKED16 (unsigned16 word, int first, int last); -INLINE_SIM_BITS(unsigned32) LSMASKED32 (unsigned32 word, int first, int last); -INLINE_SIM_BITS(unsigned64) LSMASKED64 (unsigned64 word, int first, int last); +INLINE_SIM_BITS(uint8_t) LSMASKED8 (uint8_t word, int first, int last); +INLINE_SIM_BITS(uint16_t) LSMASKED16 (uint16_t word, int first, int last); +INLINE_SIM_BITS(uint32_t) LSMASKED32 (uint32_t word, int first, int last); +INLINE_SIM_BITS(uint64_t) LSMASKED64 (uint64_t word, int first, int last); INLINE_SIM_BITS(unsigned_word) LSMASKED (unsigned_word word, int first, int last); -INLINE_SIM_BITS(unsigned8) MSMASKED8 (unsigned8 word, int first, int last); -INLINE_SIM_BITS(unsigned16) MSMASKED16 (unsigned16 word, int first, int last); -INLINE_SIM_BITS(unsigned32) MSMASKED32 (unsigned32 word, int first, int last); -INLINE_SIM_BITS(unsigned64) MSMASKED64 (unsigned64 word, int first, int last); +INLINE_SIM_BITS(uint8_t) MSMASKED8 (uint8_t word, int first, int last); +INLINE_SIM_BITS(uint16_t) MSMASKED16 (uint16_t word, int first, int last); +INLINE_SIM_BITS(uint32_t) MSMASKED32 (uint32_t word, int first, int last); +INLINE_SIM_BITS(uint64_t) MSMASKED64 (uint64_t word, int first, int last); INLINE_SIM_BITS(unsigned_word) MSMASKED (unsigned_word word, int first, int last); @@ -407,17 +407,17 @@ INLINE_SIM_BITS(unsigned_word) MSMASKED (unsigned_word word, int first, int last /* extract the required bits aligning them with the lsb */ -INLINE_SIM_BITS(unsigned8) LSEXTRACTED8 (unsigned8 val, int start, int stop); -INLINE_SIM_BITS(unsigned16) LSEXTRACTED16 (unsigned16 val, int start, int stop); -INLINE_SIM_BITS(unsigned32) LSEXTRACTED32 (unsigned32 val, int start, int stop); -INLINE_SIM_BITS(unsigned64) LSEXTRACTED64 (unsigned64 val, int start, int stop); +INLINE_SIM_BITS(uint8_t) LSEXTRACTED8 (uint8_t val, int start, int stop); +INLINE_SIM_BITS(uint16_t) LSEXTRACTED16 (uint16_t val, int start, int stop); +INLINE_SIM_BITS(uint32_t) LSEXTRACTED32 (uint32_t val, int start, int stop); +INLINE_SIM_BITS(uint64_t) LSEXTRACTED64 (uint64_t val, int start, int stop); INLINE_SIM_BITS(unsigned_word) LSEXTRACTED (unsigned_word val, int start, int stop); -INLINE_SIM_BITS(unsigned8) MSEXTRACTED8 (unsigned8 val, int start, int stop); -INLINE_SIM_BITS(unsigned16) MSEXTRACTED16 (unsigned16 val, int start, int stop); -INLINE_SIM_BITS(unsigned32) MSEXTRACTED32 (unsigned32 val, int start, int stop); -INLINE_SIM_BITS(unsigned64) MSEXTRACTED64 (unsigned64 val, int start, int stop); +INLINE_SIM_BITS(uint8_t) MSEXTRACTED8 (uint8_t val, int start, int stop); +INLINE_SIM_BITS(uint16_t) MSEXTRACTED16 (uint16_t val, int start, int stop); +INLINE_SIM_BITS(uint32_t) MSEXTRACTED32 (uint32_t val, int start, int stop); +INLINE_SIM_BITS(uint64_t) MSEXTRACTED64 (uint64_t val, int start, int stop); INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int stop); @@ -441,10 +441,10 @@ INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int st /* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */ #define _SHUFFLEDn(N, WORD, OLD, NEW) \ ((OLD) < (NEW) \ - ? (((unsigned##N)(WORD) \ + ? (((uint##N##_t)(WORD) \ >> (((NEW) > (OLD)) ? ((NEW) - (OLD)) : 0)) \ & MASK32((NEW), (NEW))) \ - : (((unsigned##N)(WORD) \ + : (((uint##N##_t)(WORD) \ << (((OLD) > (NEW)) ? ((OLD) - (NEW)) : 0)) \ & MASK32((NEW), (NEW)))) @@ -456,16 +456,16 @@ INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int st /* Insert a group of bits into a bit position */ -INLINE_SIM_BITS(unsigned8) LSINSERTED8 (unsigned8 val, int start, int stop); -INLINE_SIM_BITS(unsigned16) LSINSERTED16 (unsigned16 val, int start, int stop); -INLINE_SIM_BITS(unsigned32) LSINSERTED32 (unsigned32 val, int start, int stop); -INLINE_SIM_BITS(unsigned64) LSINSERTED64 (unsigned64 val, int start, int stop); +INLINE_SIM_BITS(uint8_t) LSINSERTED8 (uint8_t val, int start, int stop); +INLINE_SIM_BITS(uint16_t) LSINSERTED16 (uint16_t val, int start, int stop); +INLINE_SIM_BITS(uint32_t) LSINSERTED32 (uint32_t val, int start, int stop); +INLINE_SIM_BITS(uint64_t) LSINSERTED64 (uint64_t val, int start, int stop); INLINE_SIM_BITS(unsigned_word) LSINSERTED (unsigned_word val, int start, int stop); -INLINE_SIM_BITS(unsigned8) MSINSERTED8 (unsigned8 val, int start, int stop); -INLINE_SIM_BITS(unsigned16) MSINSERTED16 (unsigned16 val, int start, int stop); -INLINE_SIM_BITS(unsigned32) MSINSERTED32 (unsigned32 val, int start, int stop); -INLINE_SIM_BITS(unsigned64) MSINSERTED64 (unsigned64 val, int start, int stop); +INLINE_SIM_BITS(uint8_t) MSINSERTED8 (uint8_t val, int start, int stop); +INLINE_SIM_BITS(uint16_t) MSINSERTED16 (uint16_t val, int start, int stop); +INLINE_SIM_BITS(uint32_t) MSINSERTED32 (uint32_t val, int start, int stop); +INLINE_SIM_BITS(uint64_t) MSINSERTED64 (uint64_t val, int start, int stop); INLINE_SIM_BITS(unsigned_word) MSINSERTED (unsigned_word val, int start, int stop); #if (WITH_TARGET_WORD_MSB == 0) @@ -499,19 +499,19 @@ INLINE_SIM_BITS(unsigned_word) MSINSERTED (unsigned_word val, int start, int sto #define EXTEND4(X) (LSSEXT ((X), 3)) #define EXTEND5(X) (LSSEXT ((X), 4)) #define EXTEND6(X) (LSSEXT ((X), 5)) -#define EXTEND8(X) ((signed_word)(signed8)(X)) +#define EXTEND8(X) ((signed_word)(int8_t)(X)) #define EXTEND11(X) (LSSEXT ((X), 10)) #define EXTEND12(X) (LSSEXT ((X), 11)) #define EXTEND15(X) (LSSEXT ((X), 14)) -#define EXTEND16(X) ((signed_word)(signed16)(X)) +#define EXTEND16(X) ((signed_word)(int16_t)(X)) #define EXTEND24(X) (LSSEXT ((X), 23)) #define EXTEND25(X) (LSSEXT ((X), 24)) -#define EXTEND32(X) ((signed_word)(signed32)(X)) -#define EXTEND64(X) ((signed_word)(signed64)(X)) +#define EXTEND32(X) ((signed_word)(int32_t)(X)) +#define EXTEND64(X) ((signed_word)(int64_t)(X)) /* depending on MODE return a 64bit or 32bit (sign extended) value */ #if (WITH_TARGET_WORD_BITSIZE == 64) -#define EXTENDED(X) ((signed64)(signed32)(X)) +#define EXTENDED(X) ((int64_t)(int32_t)(X)) #endif #if (WITH_TARGET_WORD_BITSIZE == 32) #define EXTENDED(X) (X) @@ -546,37 +546,37 @@ do { \ intentionally omited. */ -INLINE_SIM_BITS(unsigned8) ROT8 (unsigned8 val, int shift); -INLINE_SIM_BITS(unsigned16) ROT16 (unsigned16 val, int shift); -INLINE_SIM_BITS(unsigned32) ROT32 (unsigned32 val, int shift); -INLINE_SIM_BITS(unsigned64) ROT64 (unsigned64 val, int shift); +INLINE_SIM_BITS(uint8_t) ROT8 (uint8_t val, int shift); +INLINE_SIM_BITS(uint16_t) ROT16 (uint16_t val, int shift); +INLINE_SIM_BITS(uint32_t) ROT32 (uint32_t val, int shift); +INLINE_SIM_BITS(uint64_t) ROT64 (uint64_t val, int shift); -INLINE_SIM_BITS(unsigned8) ROTL8 (unsigned8 val, int shift); -INLINE_SIM_BITS(unsigned16) ROTL16 (unsigned16 val, int shift); -INLINE_SIM_BITS(unsigned32) ROTL32 (unsigned32 val, int shift); -INLINE_SIM_BITS(unsigned64) ROTL64 (unsigned64 val, int shift); +INLINE_SIM_BITS(uint8_t) ROTL8 (uint8_t val, int shift); +INLINE_SIM_BITS(uint16_t) ROTL16 (uint16_t val, int shift); +INLINE_SIM_BITS(uint32_t) ROTL32 (uint32_t val, int shift); +INLINE_SIM_BITS(uint64_t) ROTL64 (uint64_t val, int shift); -INLINE_SIM_BITS(unsigned8) ROTR8 (unsigned8 val, int shift); -INLINE_SIM_BITS(unsigned16) ROTR16 (unsigned16 val, int shift); -INLINE_SIM_BITS(unsigned32) ROTR32 (unsigned32 val, int shift); -INLINE_SIM_BITS(unsigned64) ROTR64 (unsigned64 val, int shift); +INLINE_SIM_BITS(uint8_t) ROTR8 (uint8_t val, int shift); +INLINE_SIM_BITS(uint16_t) ROTR16 (uint16_t val, int shift); +INLINE_SIM_BITS(uint32_t) ROTR32 (uint32_t val, int shift); +INLINE_SIM_BITS(uint64_t) ROTR64 (uint64_t val, int shift); /* Sign extension operations */ -INLINE_SIM_BITS(unsigned8) LSSEXT8 (signed8 val, int sign_bit); -INLINE_SIM_BITS(unsigned16) LSSEXT16 (signed16 val, int sign_bit); -INLINE_SIM_BITS(unsigned32) LSSEXT32 (signed32 val, int sign_bit); -INLINE_SIM_BITS(unsigned64) LSSEXT64 (signed64 val, int sign_bit); +INLINE_SIM_BITS(uint8_t) LSSEXT8 (int8_t val, int sign_bit); +INLINE_SIM_BITS(uint16_t) LSSEXT16 (int16_t val, int sign_bit); +INLINE_SIM_BITS(uint32_t) LSSEXT32 (int32_t val, int sign_bit); +INLINE_SIM_BITS(uint64_t) LSSEXT64 (int64_t val, int sign_bit); INLINE_SIM_BITS(unsigned_word) LSSEXT (signed_word val, int sign_bit); -INLINE_SIM_BITS(unsigned8) MSSEXT8 (signed8 val, int sign_bit); -INLINE_SIM_BITS(unsigned16) MSSEXT16 (signed16 val, int sign_bit); -INLINE_SIM_BITS(unsigned32) MSSEXT32 (signed32 val, int sign_bit); -INLINE_SIM_BITS(unsigned64) MSSEXT64 (signed64 val, int sign_bit); +INLINE_SIM_BITS(uint8_t) MSSEXT8 (int8_t val, int sign_bit); +INLINE_SIM_BITS(uint16_t) MSSEXT16 (int16_t val, int sign_bit); +INLINE_SIM_BITS(uint32_t) MSSEXT32 (int32_t val, int sign_bit); +INLINE_SIM_BITS(uint64_t) MSSEXT64 (int64_t val, int sign_bit); INLINE_SIM_BITS(unsigned_word) MSSEXT (signed_word val, int sign_bit); #if (WITH_TARGET_WORD_MSB == 0) diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c index f07109e..fab8f10 100644 --- a/sim/common/sim-core.c +++ b/sim/common/sim-core.c @@ -285,14 +285,14 @@ sim_core_attach (SIM_DESC sd, { unsigned mask = modulo - 1; /* any zero bits */ - while (mask >= sizeof (unsigned64)) /* minimum modulo */ + while (mask >= sizeof (uint64_t)) /* minimum modulo */ { if ((mask & 1) == 0) mask = 0; else mask >>= 1; } - if (mask != sizeof (unsigned64) - 1) + if (mask != sizeof (uint64_t) - 1) { #if (WITH_HW) sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo); @@ -313,7 +313,7 @@ sim_core_attach (SIM_DESC sd, { if (optional_buffer == NULL) { - int padding = (addr % sizeof (unsigned64)); + int padding = (addr % sizeof (uint64_t)); unsigned long bytes = (modulo == 0 ? nr_bytes : modulo) + padding; free_buffer = zalloc (bytes); buffer = (char*) free_buffer + padding; @@ -453,7 +453,7 @@ STATIC_INLINE_SIM_CORE\ sim_core_translate (sim_core_mapping *mapping, address_word addr) { - return (void *)((unsigned8 *) mapping->buffer + return (void *)((uint8_t *) mapping->buffer + ((addr - mapping->base) & mapping->mask)); } diff --git a/sim/common/sim-events.c b/sim/common/sim-events.c index b42459a..78668e6 100644 --- a/sim/common/sim-events.c +++ b/sim/common/sim-events.c @@ -88,7 +88,7 @@ struct _sim_event { void *data; sim_event_handler *handler; /* timer event */ - signed64 time_of_event; + int64_t time_of_event; /* watch wallclock event */ unsigned wallclock; /* watch core address */ @@ -100,8 +100,8 @@ struct _sim_event { int is_within; /* 0/1 */ unsigned ub; unsigned lb; - unsigned64 ub64; - unsigned64 lb64; + uint64_t ub64; + uint64_t lb64; /* trace info (if any) */ char *trace; /* list */ @@ -350,7 +350,7 @@ sim_events_init (SIM_DESC sd) INLINE_SIM_EVENTS\ -(signed64) +(int64_t) sim_events_time (SIM_DESC sd) { sim_events *events = STATE_EVENTS (sd); @@ -375,7 +375,7 @@ sim_events_elapsed_time (SIM_DESC sd) /* Returns the time that remains before the event is raised. */ INLINE_SIM_EVENTS\ -(signed64) +(int64_t) sim_events_remain_time (SIM_DESC sd, sim_event *event) { if (event == 0) @@ -391,7 +391,7 @@ STATIC_INLINE_SIM_EVENTS\ update_time_from_event (SIM_DESC sd) { sim_events *events = STATE_EVENTS (sd); - signed64 current_time = sim_events_time (sd); + int64_t current_time = sim_events_time (sd); if (events->queue != NULL) { events->time_of_event = events->queue->time_of_event; @@ -434,12 +434,12 @@ update_time_from_event (SIM_DESC sd) static void insert_sim_event (SIM_DESC sd, sim_event *new_event, - signed64 delta) + int64_t delta) { sim_events *events = STATE_EVENTS (sd); sim_event *curr; sim_event **prev; - signed64 time_of_event; + int64_t time_of_event; if (delta < 0) sim_io_error (sd, "what is past is past!\n"); @@ -473,7 +473,7 @@ insert_sim_event (SIM_DESC sd, #if EXTERN_SIM_EVENTS_P sim_event * sim_events_schedule (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data) { @@ -485,7 +485,7 @@ sim_events_schedule (SIM_DESC sd, #if EXTERN_SIM_EVENTS_P sim_event * sim_events_schedule_tracef (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data, const char *fmt, @@ -504,7 +504,7 @@ sim_events_schedule_tracef (SIM_DESC sd, #if EXTERN_SIM_EVENTS_P sim_event * sim_events_schedule_vtracef (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data, const char *fmt, @@ -535,7 +535,7 @@ sim_events_schedule_vtracef (SIM_DESC sd, #if EXTERN_SIM_EVENTS_P void sim_events_schedule_after_signal (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data) { @@ -624,8 +624,8 @@ sim_events_watch_clock (SIM_DESC sd, sim_event * sim_events_watch_pc (SIM_DESC sd, int is_within, - unsigned64 lb, - unsigned64 ub, + uint64_t lb, + uint64_t ub, sim_event_handler *handler, void *data) { @@ -667,8 +667,8 @@ sim_events_watch_sim (SIM_DESC sd, int nr_bytes, enum bfd_endian byte_order, int is_within, - unsigned64 lb, - unsigned64 ub, + uint64_t lb, + uint64_t ub, sim_event_handler *handler, void *data) { @@ -747,8 +747,8 @@ sim_events_watch_core (SIM_DESC sd, int nr_bytes, enum bfd_endian byte_order, int is_within, - unsigned64 lb, - unsigned64 ub, + uint64_t lb, + uint64_t ub, sim_event_handler *handler, void *data) { @@ -1147,7 +1147,7 @@ INLINE_SIM_EVENTS\ sim_events_process (SIM_DESC sd) { sim_events *events = STATE_EVENTS (sd); - signed64 event_time = sim_events_time (sd); + int64_t event_time = sim_events_time (sd); /* Clear work_pending before checking nr_held. Clearing work_pending after nr_held (with out a lock could loose an diff --git a/sim/common/sim-events.h b/sim/common/sim-events.h index 1531171..b50a427 100644 --- a/sim/common/sim-events.h +++ b/sim/common/sim-events.h @@ -95,8 +95,8 @@ struct _sim_events { /* timekeeping */ unsigned long elapsed_wallclock; SIM_ELAPSED_TIME resume_wallclock; - signed64 time_of_event; - signed64 time_from_event; + int64_t time_of_event; + int64_t time_from_event; }; @@ -110,13 +110,13 @@ extern SIM_RC sim_events_install (SIM_DESC sd); extern sim_event *sim_events_schedule (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data); extern sim_event *sim_events_schedule_tracef (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data, const char *fmt, @@ -124,7 +124,7 @@ extern sim_event *sim_events_schedule_tracef extern sim_event *sim_events_schedule_vtracef (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data, const char *fmt, @@ -133,7 +133,7 @@ extern sim_event *sim_events_schedule_vtracef extern void sim_events_schedule_after_signal (SIM_DESC sd, - signed64 delta_time, + int64_t delta_time, sim_event_handler *handler, void *data); @@ -157,8 +157,8 @@ extern sim_event *sim_events_watch_clock extern sim_event *sim_events_watch_pc (SIM_DESC sd, int is_within, - unsigned64 lb, - unsigned64 ub, + uint64_t lb, + uint64_t ub, sim_event_handler *handler, void *data); @@ -177,8 +177,8 @@ extern sim_event *sim_events_watch_sim int nr_bytes, enum bfd_endian byte_order, int is_within, - unsigned64 lb, - unsigned64 ub, + uint64_t lb, + uint64_t ub, sim_event_handler *handler, void *data); @@ -198,8 +198,8 @@ extern sim_event *sim_events_watch_core int nr_bytes, enum bfd_endian byte_order, int is_within, - unsigned64 lb, - unsigned64 ub, + uint64_t lb, + uint64_t ub, sim_event_handler *handler, void *data); @@ -274,7 +274,7 @@ INLINE_SIM_EVENTS\ /* local concept of elapsed target time */ INLINE_SIM_EVENTS\ -(signed64) sim_events_time +(int64_t) sim_events_time (SIM_DESC sd); @@ -286,7 +286,7 @@ INLINE_SIM_EVENTS\ /* Returns the time that remains before the event is raised. */ INLINE_SIM_EVENTS\ -(signed64) sim_events_remain_time +(int64_t) sim_events_remain_time (SIM_DESC sd, sim_event *event); diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c index c360964..a05c578 100644 --- a/sim/common/sim-fpu.c +++ b/sim/common/sim-fpu.c @@ -50,13 +50,13 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */ If digits is -1, then print all digits. */ static void -print_bits (unsigned64 x, +print_bits (uint64_t x, int msbit, int digits, sim_fpu_print_func print, void *arg) { - unsigned64 bit = LSBIT64 (msbit); + uint64_t bit = LSBIT64 (msbit); int i = 4; while (bit && digits) { @@ -82,7 +82,7 @@ print_bits (unsigned64 x, typedef union { double d; - unsigned64 i; + uint64_t i; } sim_fpu_map; @@ -166,13 +166,13 @@ typedef union /* Integer constants */ -#define MAX_INT32 ((signed64) LSMASK64 (30, 0)) +#define MAX_INT32 ((int64_t) LSMASK64 (30, 0)) #define MAX_UINT32 LSMASK64 (31, 0) -#define MIN_INT32 ((signed64) LSMASK64 (63, 31)) +#define MIN_INT32 ((int64_t) LSMASK64 (63, 31)) -#define MAX_INT64 ((signed64) LSMASK64 (62, 0)) +#define MAX_INT64 ((int64_t) LSMASK64 (62, 0)) #define MAX_UINT64 LSMASK64 (63, 0) -#define MIN_INT64 ((signed64) LSMASK64 (63, 63)) +#define MIN_INT64 ((int64_t) LSMASK64 (63, 63)) #define MAX_INT (is_64bit ? MAX_INT64 : MAX_INT32) #define MIN_INT (is_64bit ? MIN_INT64 : MIN_INT32) @@ -180,14 +180,14 @@ typedef union #define NR_INTBITS (is_64bit ? 64 : 32) /* Squeeze an unpacked sim_fpu struct into a 32/64 bit integer. */ -STATIC_INLINE_SIM_FPU (unsigned64) +STATIC_INLINE_SIM_FPU (uint64_t) pack_fpu (const sim_fpu *src, int is_double) { int sign; - unsigned64 exp; - unsigned64 fraction; - unsigned64 packed; + uint64_t exp; + uint64_t fraction; + uint64_t packed; switch (src->class) { @@ -321,9 +321,9 @@ pack_fpu (const sim_fpu *src, /* Unpack a 32/64 bit integer into a sim_fpu structure. */ STATIC_INLINE_SIM_FPU (void) -unpack_fpu (sim_fpu *dst, unsigned64 packed, int is_double) +unpack_fpu (sim_fpu *dst, uint64_t packed, int is_double) { - unsigned64 fraction = LSMASKED64 (packed, NR_FRACBITS - 1, 0); + uint64_t fraction = LSMASKED64 (packed, NR_FRACBITS - 1, 0); unsigned exp = LSEXTRACTED64 (packed, NR_EXPBITS + NR_FRACBITS - 1, NR_FRACBITS); int sign = (packed & SIGNBIT) != 0; @@ -416,8 +416,8 @@ unpack_fpu (sim_fpu *dst, unsigned64 packed, int is_double) } else { - unsigned32 val = pack_fpu (dst, 0); - unsigned32 org = packed; + uint32_t val = pack_fpu (dst, 0); + uint32_t org = packed; ASSERT (val == org); } } @@ -426,12 +426,12 @@ unpack_fpu (sim_fpu *dst, unsigned64 packed, int is_double) /* Convert a floating point into an integer. */ STATIC_INLINE_SIM_FPU (int) -fpu2i (signed64 *i, +fpu2i (int64_t *i, const sim_fpu *s, int is_64bit, sim_fpu_round round) { - unsigned64 tmp; + uint64_t tmp; int shift; int status = 0; if (sim_fpu_is_zero (s)) @@ -526,7 +526,7 @@ fpu2i (signed64 *i, /* Convert an integer into a floating point. */ STATIC_INLINE_SIM_FPU (int) -i2fpu (sim_fpu *f, signed64 i, int is_64bit) +i2fpu (sim_fpu *f, int64_t i, int is_64bit) { int status = 0; if (i == 0) @@ -585,7 +585,7 @@ i2fpu (sim_fpu *f, signed64 i, int is_64bit) /* sanity check */ { - signed64 val; + int64_t val; fpu2i (&val, f, is_64bit, sim_fpu_round_zero); if (i >= MIN_INT32 && i <= MAX_INT32) { @@ -599,10 +599,10 @@ i2fpu (sim_fpu *f, signed64 i, int is_64bit) /* Convert a floating point into an integer. */ STATIC_INLINE_SIM_FPU (int) -fpu2u (unsigned64 *u, const sim_fpu *s, int is_64bit) +fpu2u (uint64_t *u, const sim_fpu *s, int is_64bit) { const int is_double = 1; - unsigned64 tmp; + uint64_t tmp; int shift; if (sim_fpu_is_zero (s)) { @@ -656,7 +656,7 @@ fpu2u (unsigned64 *u, const sim_fpu *s, int is_64bit) /* Convert an unsigned integer into a floating point. */ STATIC_INLINE_SIM_FPU (int) -u2fpu (sim_fpu *f, unsigned64 u, int is_64bit) +u2fpu (sim_fpu *f, uint64_t u, int is_64bit) { if (u == 0) { @@ -684,30 +684,30 @@ u2fpu (sim_fpu *f, unsigned64 u, int is_64bit) /* register <-> sim_fpu */ INLINE_SIM_FPU (void) -sim_fpu_32to (sim_fpu *f, unsigned32 s) +sim_fpu_32to (sim_fpu *f, uint32_t s) { unpack_fpu (f, s, 0); } INLINE_SIM_FPU (void) -sim_fpu_232to (sim_fpu *f, unsigned32 h, unsigned32 l) +sim_fpu_232to (sim_fpu *f, uint32_t h, uint32_t l) { - unsigned64 s = h; + uint64_t s = h; s = (s << 32) | l; unpack_fpu (f, s, 1); } INLINE_SIM_FPU (void) -sim_fpu_64to (sim_fpu *f, unsigned64 s) +sim_fpu_64to (sim_fpu *f, uint64_t s) { unpack_fpu (f, s, 1); } INLINE_SIM_FPU (void) -sim_fpu_to32 (unsigned32 *s, +sim_fpu_to32 (uint32_t *s, const sim_fpu *f) { *s = pack_fpu (f, 0); @@ -715,17 +715,17 @@ sim_fpu_to32 (unsigned32 *s, INLINE_SIM_FPU (void) -sim_fpu_to232 (unsigned32 *h, unsigned32 *l, +sim_fpu_to232 (uint32_t *h, uint32_t *l, const sim_fpu *f) { - unsigned64 s = pack_fpu (f, 1); + uint64_t s = pack_fpu (f, 1); *l = s; *h = (s >> 32); } INLINE_SIM_FPU (void) -sim_fpu_to64 (unsigned64 *u, +sim_fpu_to64 (uint64_t *u, const sim_fpu *f) { *u = pack_fpu (f, 1); @@ -736,7 +736,7 @@ INLINE_SIM_FPU (void) sim_fpu_fractionto (sim_fpu *f, int sign, int normal_exp, - unsigned64 fraction, + uint64_t fraction, int precision) { int shift = (NR_FRAC_GUARD - precision); @@ -752,13 +752,13 @@ sim_fpu_fractionto (sim_fpu *f, } -INLINE_SIM_FPU (unsigned64) +INLINE_SIM_FPU (uint64_t) sim_fpu_tofraction (const sim_fpu *d, int precision) { /* We have NR_FRAC_GUARD bits, we want only PRECISION bits. */ int shift = (NR_FRAC_GUARD - precision); - unsigned64 fraction = (d->fraction & ~IMPLICIT_1); + uint64_t fraction = (d->fraction & ~IMPLICIT_1); if (shift >= 0) return fraction >> shift; else @@ -835,9 +835,9 @@ do_normal_round (sim_fpu *f, int nr_guards, sim_fpu_round round) { - unsigned64 guardmask = LSMASK64 (nr_guards - 1, 0); - unsigned64 guardmsb = LSBIT64 (nr_guards - 1); - unsigned64 fraclsb = guardmsb << 1; + uint64_t guardmask = LSMASK64 (nr_guards - 1, 0); + uint64_t guardmsb = LSBIT64 (nr_guards - 1); + uint64_t fraclsb = guardmsb << 1; if ((f->fraction & guardmask)) { int status = sim_fpu_status_inexact; @@ -1055,8 +1055,8 @@ sim_fpu_add (sim_fpu *f, { int status = 0; int shift = l->normal_exp - r->normal_exp; - unsigned64 lfraction; - unsigned64 rfraction; + uint64_t lfraction; + uint64_t rfraction; /* use exp of larger */ if (shift >= NR_FRAC_GUARD) { @@ -1113,7 +1113,7 @@ sim_fpu_add (sim_fpu *f, /* sign? */ f->class = sim_fpu_class_number; - if (((signed64) f->fraction) >= 0) + if (((int64_t) f->fraction) >= 0) f->sign = 0; else { @@ -1208,8 +1208,8 @@ sim_fpu_sub (sim_fpu *f, { int status = 0; int shift = l->normal_exp - r->normal_exp; - unsigned64 lfraction; - unsigned64 rfraction; + uint64_t lfraction; + uint64_t rfraction; /* use exp of larger */ if (shift >= NR_FRAC_GUARD) { @@ -1267,7 +1267,7 @@ sim_fpu_sub (sim_fpu *f, /* sign? */ f->class = sim_fpu_class_number; - if (((signed64) f->fraction) >= 0) + if (((int64_t) f->fraction) >= 0) f->sign = 0; else { @@ -1354,19 +1354,19 @@ sim_fpu_mul (sim_fpu *f, /* Calculate the mantissa by multiplying both 64bit numbers to get a 128 bit number. */ { - unsigned64 low; - unsigned64 high; - unsigned64 nl = l->fraction & 0xffffffff; - unsigned64 nh = l->fraction >> 32; - unsigned64 ml = r->fraction & 0xffffffff; - unsigned64 mh = r->fraction >>32; - unsigned64 pp_ll = ml * nl; - unsigned64 pp_hl = mh * nl; - unsigned64 pp_lh = ml * nh; - unsigned64 pp_hh = mh * nh; - unsigned64 res2 = 0; - unsigned64 res0 = 0; - unsigned64 ps_hh__ = pp_hl + pp_lh; + uint64_t low; + uint64_t high; + uint64_t nl = l->fraction & 0xffffffff; + uint64_t nh = l->fraction >> 32; + uint64_t ml = r->fraction & 0xffffffff; + uint64_t mh = r->fraction >>32; + uint64_t pp_ll = ml * nl; + uint64_t pp_hl = mh * nl; + uint64_t pp_lh = ml * nh; + uint64_t pp_hh = mh * nh; + uint64_t res2 = 0; + uint64_t res0 = 0; + uint64_t ps_hh__ = pp_hl + pp_lh; if (ps_hh__ < pp_hl) res2 += UNSIGNED64 (0x100000000); pp_hl = (ps_hh__ << 32) & UNSIGNED64 (0xffffffff00000000); @@ -1497,10 +1497,10 @@ sim_fpu_div (sim_fpu *f, /* quotient = ( ( numerator / denominator) x 2^(numerator exponent - denominator exponent) */ - unsigned64 numerator; - unsigned64 denominator; - unsigned64 quotient; - unsigned64 bit; + uint64_t numerator; + uint64_t denominator; + uint64_t quotient; + uint64_t bit; f->class = sim_fpu_class_number; f->sign = l->sign ^ r->sign; @@ -1993,10 +1993,10 @@ sim_fpu_sqrt (sim_fpu *f, { /* Generate sqrt(x) bit by bit. */ - unsigned64 y; - unsigned64 q; - unsigned64 s; - unsigned64 b; + uint64_t y; + uint64_t q; + uint64_t s; + uint64_t b; f->class = sim_fpu_class_number; f->sign = 0; @@ -2018,7 +2018,7 @@ sim_fpu_sqrt (sim_fpu *f, while (b) { - unsigned64 t = s + b; + uint64_t t = s + b; if (t <= y) { s |= (b << 1); @@ -2046,7 +2046,7 @@ sim_fpu_sqrt (sim_fpu *f, INLINE_SIM_FPU (int) sim_fpu_i32to (sim_fpu *f, - signed32 i, + int32_t i, sim_fpu_round round) { i2fpu (f, i, 0); @@ -2055,7 +2055,7 @@ sim_fpu_i32to (sim_fpu *f, INLINE_SIM_FPU (int) sim_fpu_u32to (sim_fpu *f, - unsigned32 u, + uint32_t u, sim_fpu_round round) { u2fpu (f, u, 0); @@ -2064,7 +2064,7 @@ sim_fpu_u32to (sim_fpu *f, INLINE_SIM_FPU (int) sim_fpu_i64to (sim_fpu *f, - signed64 i, + int64_t i, sim_fpu_round round) { i2fpu (f, i, 1); @@ -2073,7 +2073,7 @@ sim_fpu_i64to (sim_fpu *f, INLINE_SIM_FPU (int) sim_fpu_u64to (sim_fpu *f, - unsigned64 u, + uint64_t u, sim_fpu_round round) { u2fpu (f, u, 1); @@ -2082,29 +2082,29 @@ sim_fpu_u64to (sim_fpu *f, INLINE_SIM_FPU (int) -sim_fpu_to32i (signed32 *i, +sim_fpu_to32i (int32_t *i, const sim_fpu *f, sim_fpu_round round) { - signed64 i64; + int64_t i64; int status = fpu2i (&i64, f, 0, round); *i = i64; return status; } INLINE_SIM_FPU (int) -sim_fpu_to32u (unsigned32 *u, +sim_fpu_to32u (uint32_t *u, const sim_fpu *f, sim_fpu_round round) { - unsigned64 u64; + uint64_t u64; int status = fpu2u (&u64, f, 0); *u = u64; return status; } INLINE_SIM_FPU (int) -sim_fpu_to64i (signed64 *i, +sim_fpu_to64i (int64_t *i, const sim_fpu *f, sim_fpu_round round) { @@ -2113,7 +2113,7 @@ sim_fpu_to64i (signed64 *i, INLINE_SIM_FPU (int) -sim_fpu_to64u (unsigned64 *u, +sim_fpu_to64u (uint64_t *u, const sim_fpu *f, sim_fpu_round round) { @@ -2277,18 +2277,18 @@ sim_fpu_exp (const sim_fpu *d) } -INLINE_SIM_FPU (unsigned64) +INLINE_SIM_FPU (uint64_t) sim_fpu_fraction (const sim_fpu *d) { return d->fraction; } -INLINE_SIM_FPU (unsigned64) +INLINE_SIM_FPU (uint64_t) sim_fpu_guard (const sim_fpu *d, int is_double) { - unsigned64 rv; - unsigned64 guardmask = LSMASK64 (NR_GUARDS - 1, 0); + uint64_t rv; + uint64_t guardmask = LSMASK64 (NR_GUARDS - 1, 0); rv = (d->fraction & guardmask) >> NR_PAD; return rv; } diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h index 1f47528..447621b 100644 --- a/sim/common/sim-fpu.h +++ b/sim/common/sim-fpu.h @@ -91,7 +91,7 @@ typedef enum typedef struct _sim_fpu { sim_fpu_class class; int sign; - unsigned64 fraction; + uint64_t fraction; int normal_exp; } sim_fpu; @@ -171,13 +171,13 @@ typedef enum emulating exact FPU behavior, sim_fpu_round_{32,64} should be called before packing the sim_fpu value. */ -INLINE_SIM_FPU (void) sim_fpu_32to (sim_fpu *f, unsigned32 s); -INLINE_SIM_FPU (void) sim_fpu_232to (sim_fpu *f, unsigned32 h, unsigned32 l); -INLINE_SIM_FPU (void) sim_fpu_64to (sim_fpu *f, unsigned64 d); +INLINE_SIM_FPU (void) sim_fpu_32to (sim_fpu *f, uint32_t s); +INLINE_SIM_FPU (void) sim_fpu_232to (sim_fpu *f, uint32_t h, uint32_t l); +INLINE_SIM_FPU (void) sim_fpu_64to (sim_fpu *f, uint64_t d); -INLINE_SIM_FPU (void) sim_fpu_to32 (unsigned32 *s, const sim_fpu *f); -INLINE_SIM_FPU (void) sim_fpu_to232 (unsigned32 *h, unsigned32 *l, const sim_fpu *f); -INLINE_SIM_FPU (void) sim_fpu_to64 (unsigned64 *d, const sim_fpu *f); +INLINE_SIM_FPU (void) sim_fpu_to32 (uint32_t *s, const sim_fpu *f); +INLINE_SIM_FPU (void) sim_fpu_to232 (uint32_t *h, uint32_t *l, const sim_fpu *f); +INLINE_SIM_FPU (void) sim_fpu_to64 (uint64_t *d, const sim_fpu *f); /* Create a sim_fpu struct using raw information. (FRACTION & LSMASK @@ -189,12 +189,12 @@ INLINE_SIM_FPU (void) sim_fpu_to64 (unsigned64 *d, const sim_fpu *f); You can not specify zero using this function. */ -INLINE_SIM_FPU (void) sim_fpu_fractionto (sim_fpu *f, int sign, int normal_exp, unsigned64 fraction, int precision); +INLINE_SIM_FPU (void) sim_fpu_fractionto (sim_fpu *f, int sign, int normal_exp, uint64_t fraction, int precision); /* Reverse operation. If S is a non-zero number, discards the implied leading one and returns PRECISION fraction bits. No rounding is performed. */ -INLINE_SIM_FPU (unsigned64) sim_fpu_tofraction (const sim_fpu *s, int precision); +INLINE_SIM_FPU (uint64_t) sim_fpu_tofraction (const sim_fpu *s, int precision); @@ -250,37 +250,37 @@ INLINE_SIM_FPU (int) sim_fpu_sqrt (sim_fpu *f, /* Conversion of integer <-> floating point. */ -INLINE_SIM_FPU (int) sim_fpu_i32to (sim_fpu *f, signed32 i, +INLINE_SIM_FPU (int) sim_fpu_i32to (sim_fpu *f, int32_t i, sim_fpu_round round); -INLINE_SIM_FPU (int) sim_fpu_u32to (sim_fpu *f, unsigned32 u, +INLINE_SIM_FPU (int) sim_fpu_u32to (sim_fpu *f, uint32_t u, sim_fpu_round round); -INLINE_SIM_FPU (int) sim_fpu_i64to (sim_fpu *f, signed64 i, +INLINE_SIM_FPU (int) sim_fpu_i64to (sim_fpu *f, int64_t i, sim_fpu_round round); -INLINE_SIM_FPU (int) sim_fpu_u64to (sim_fpu *f, unsigned64 u, +INLINE_SIM_FPU (int) sim_fpu_u64to (sim_fpu *f, uint64_t u, sim_fpu_round round); #if 0 -INLINE_SIM_FPU (int) sim_fpu_i232to (sim_fpu *f, signed32 h, signed32 l, +INLINE_SIM_FPU (int) sim_fpu_i232to (sim_fpu *f, int32_t h, int32_t l, sim_fpu_round round); #endif #if 0 -INLINE_SIM_FPU (int) sim_fpu_u232to (sim_fpu *f, unsigned32 h, unsigned32 l, +INLINE_SIM_FPU (int) sim_fpu_u232to (sim_fpu *f, uint32_t h, uint32_t l, sim_fpu_round round); #endif -INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 *i, const sim_fpu *f, +INLINE_SIM_FPU (int) sim_fpu_to32i (int32_t *i, const sim_fpu *f, sim_fpu_round round); -INLINE_SIM_FPU (int) sim_fpu_to32u (unsigned32 *u, const sim_fpu *f, +INLINE_SIM_FPU (int) sim_fpu_to32u (uint32_t *u, const sim_fpu *f, sim_fpu_round round); -INLINE_SIM_FPU (int) sim_fpu_to64i (signed64 *i, const sim_fpu *f, +INLINE_SIM_FPU (int) sim_fpu_to64i (int64_t *i, const sim_fpu *f, sim_fpu_round round); -INLINE_SIM_FPU (int) sim_fpu_to64u (unsigned64 *u, const sim_fpu *f, +INLINE_SIM_FPU (int) sim_fpu_to64u (uint64_t *u, const sim_fpu *f, sim_fpu_round round); #if 0 -INLINE_SIM_FPU (int) sim_fpu_to232i (signed64 *h, signed64 *l, const sim_fpu *f, +INLINE_SIM_FPU (int) sim_fpu_to232i (int64_t *h, int64_t *l, const sim_fpu *f, sim_fpu_round round); #endif #if 0 -INLINE_SIM_FPU (int) sim_fpu_to232u (unsigned64 *h, unsigned64 *l, const sim_fpu *f, +INLINE_SIM_FPU (int) sim_fpu_to232u (uint64_t *h, uint64_t *l, const sim_fpu *f, sim_fpu_round round); #endif @@ -320,8 +320,8 @@ INLINE_SIM_FPU (int) sim_fpu_is_denorm (const sim_fpu *s); /* !zero */ INLINE_SIM_FPU (int) sim_fpu_sign (const sim_fpu *s); INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s); -INLINE_SIM_FPU (unsigned64) sim_fpu_fraction (const sim_fpu *s); -INLINE_SIM_FPU (unsigned64) sim_fpu_guard (const sim_fpu *s, int is_double); +INLINE_SIM_FPU (uint64_t) sim_fpu_fraction (const sim_fpu *s); +INLINE_SIM_FPU (uint64_t) sim_fpu_guard (const sim_fpu *s, int is_double); diff --git a/sim/common/sim-memopt.c b/sim/common/sim-memopt.c index eb1bf06..3421883 100644 --- a/sim/common/sim-memopt.c +++ b/sim/common/sim-memopt.c @@ -41,7 +41,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include "sim-options.h" /* Memory fill byte. */ -static unsigned8 fill_byte_value; +static uint8_t fill_byte_value; static int fill_byte_flag = 0; /* Memory mapping; see OPTION_MEMORY_MAPFILE. */ @@ -143,7 +143,7 @@ do_memopt_add (SIM_DESC sd, { /* Allocate new well-aligned buffer, just as sim_core_attach(). */ void *aligned_buffer; - int padding = (addr % sizeof (unsigned64)); + int padding = (addr % sizeof (uint64_t)); unsigned long bytes; #ifdef HAVE_MMAP @@ -457,7 +457,7 @@ memory_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt, case OPTION_MEMORY_CLEAR: { - fill_byte_value = (unsigned8) 0; + fill_byte_value = (uint8_t) 0; fill_byte_flag = 1; return SIM_RC_OK; break; @@ -472,7 +472,7 @@ memory_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt, sim_io_eprintf (sd, "Missing fill value between 0 and 255\n"); return SIM_RC_FAIL; } - fill_byte_value = (unsigned8) fill_value; + fill_byte_value = (uint8_t) fill_value; fill_byte_flag = 1; return SIM_RC_OK; break; diff --git a/sim/common/sim-n-bits.h b/sim/common/sim-n-bits.h index b15bb95..bcb0043 100644 --- a/sim/common/sim-n-bits.h +++ b/sim/common/sim-n-bits.h @@ -34,8 +34,8 @@ #endif /* NOTE: See end of file for #undef */ -#define unsignedN XCONCAT2(unsigned,N) -#define signedN XCONCAT2(signed,N) +#define unsignedN XCONCAT3(uint,N,_t) +#define signedN XCONCAT3(int,N,_t) #define LSMASKn XCONCAT2(LSMASK,N) #define MSMASKn XCONCAT2(MSMASK,N) #define LSMASKEDn XCONCAT2(LSMASKED,N) diff --git a/sim/common/sim-profile.c b/sim/common/sim-profile.c index 93956ab..7d22982 100644 --- a/sim/common/sim-profile.c +++ b/sim/common/sim-profile.c @@ -693,7 +693,7 @@ profile_print_pc (sim_cpu *cpu, int verbose) { int ok; /* FIXME: what if the target has a 64 bit PC? */ - unsigned32 header[3]; + uint32_t header[3]; unsigned loop; if (PROFILE_PC_END (profile) != 0) { @@ -718,7 +718,7 @@ profile_print_pc (sim_cpu *cpu, int verbose) ok && (loop < PROFILE_PC_NR_BUCKETS (profile)); loop++) { - signed16 sample; + int16_t sample; if (PROFILE_PC_COUNT (profile) [loop] >= 0xffff) sample = 0xffff; else diff --git a/sim/common/sim-trace.c b/sim/common/sim-trace.c index a2ddf74..0b63bdb 100644 --- a/sim/common/sim-trace.c +++ b/sim/common/sim-trace.c @@ -558,13 +558,13 @@ print_data (SIM_DESC sd, { switch (size) { - case sizeof (unsigned32): - trace_printf (sd, cpu, " 0x%08lx", (long) * (unsigned32*) data); + case sizeof (uint32_t): + trace_printf (sd, cpu, " 0x%08lx", (long) * (uint32_t*) data); break; - case sizeof (unsigned64): + case sizeof (uint64_t): trace_printf (sd, cpu, " 0x%08lx%08lx", - (long) ((* (unsigned64*) data) >> 32), - (long) * (unsigned64*) data); + (long) ((* (uint64_t*) data) >> 32), + (long) * (uint64_t*) data); break; default: abort (); @@ -585,10 +585,10 @@ print_data (SIM_DESC sd, { /* FIXME: Assumes sizeof float == 4; sizeof double == 8 */ case 4: - sim_fpu_32to (&fp, *(unsigned32*)data); + sim_fpu_32to (&fp, *(uint32_t*)data); break; case 8: - sim_fpu_64to (&fp, *(unsigned64*)data); + sim_fpu_64to (&fp, *(uint64_t*)data); break; default: abort (); @@ -598,12 +598,12 @@ print_data (SIM_DESC sd, { case 4: trace_printf (sd, cpu, " (0x%08lx)", - (long) *(unsigned32*)data); + (long) *(uint32_t*)data); break; case 8: trace_printf (sd, cpu, " (0x%08lx%08lx)", - (long) (*(unsigned64*)data >> 32), - (long) (*(unsigned64*)data)); + (long) (*(uint64_t*)data >> 32), + (long) (*(uint64_t*)data)); break; default: abort (); diff --git a/sim/common/sim-trace.h b/sim/common/sim-trace.h index c68a5ee..d08810d 100644 --- a/sim/common/sim-trace.h +++ b/sim/common/sim-trace.h @@ -179,13 +179,13 @@ typedef struct _trace_data { /* Buffer to save the inputs for the current instruction. Use a union to force the buffer into correct alignment */ union { - unsigned8 i8; - unsigned16 i16; - unsigned32 i32; - unsigned64 i64; + uint8_t i8; + uint16_t i16; + uint32_t i32; + uint64_t i64; } trace_input_data[16]; - unsigned8 trace_input_fmt[16]; - unsigned8 trace_input_size[16]; + uint8_t trace_input_fmt[16]; + uint8_t trace_input_size[16]; int trace_input_idx; #define TRACE_INPUT_DATA(t) ((t)->trace_input_data) #define TRACE_INPUT_FMT(t) ((t)->trace_input_fmt) diff --git a/sim/common/sim-types.h b/sim/common/sim-types.h index fd06e8e..b4dad0d 100644 --- a/sim/common/sim-types.h +++ b/sim/common/sim-types.h @@ -33,8 +33,11 @@ TYPES: - signed* signed type of the given size - unsigned* The corresponding insigned type + intNN_t Signed type of the given bit size + uintNN_t The corresponding unsigned type + + signed128 Non-standard type for 128-bit integers. + unsigned128 Likewise, but unsigned. SIZES @@ -56,38 +59,28 @@ # define SIGNED32(X) (X##i32) # define SIGNED64(X) (X##i64) #else -# define UNSIGNED32(X) ((unsigned32) X##UL) -# define UNSIGNED64(X) ((unsigned64) X##ULL) -# define SIGNED32(X) ((signed32) X##L) -# define SIGNED64(X) ((signed64) X##LL) +# define UNSIGNED32(X) ((uint32_t) X##UL) +# define UNSIGNED64(X) ((uint64_t) X##ULL) +# define SIGNED32(X) ((int32_t) X##L) +# define SIGNED64(X) ((int64_t) X##LL) #endif -typedef int8_t signed8; -typedef int16_t signed16; -typedef int32_t signed32; -typedef int64_t signed64; - -typedef uint8_t unsigned8; -typedef uint16_t unsigned16; -typedef uint32_t unsigned32; -typedef uint64_t unsigned64; - -typedef struct { unsigned64 a[2]; } unsigned128; -typedef struct { signed64 a[2]; } signed128; +typedef struct { uint64_t a[2]; } unsigned128; +typedef struct { int64_t a[2]; } signed128; /* byte based */ -typedef signed8 signed_1; -typedef signed16 signed_2; -typedef signed32 signed_4; -typedef signed64 signed_8; +typedef int8_t signed_1; +typedef int16_t signed_2; +typedef int32_t signed_4; +typedef int64_t signed_8; typedef signed128 signed_16; -typedef unsigned8 unsigned_1; -typedef unsigned16 unsigned_2; -typedef unsigned32 unsigned_4; -typedef unsigned64 unsigned_8; +typedef uint8_t unsigned_1; +typedef uint16_t unsigned_2; +typedef uint32_t unsigned_4; +typedef uint64_t unsigned_8; typedef unsigned128 unsigned_16; @@ -103,16 +96,16 @@ typedef unsigned128 unsigned_16; /* target architecture based */ #if (WITH_TARGET_WORD_BITSIZE == 64) -typedef unsigned64 unsigned_word; -typedef signed64 signed_word; +typedef uint64_t unsigned_word; +typedef int64_t signed_word; #endif #if (WITH_TARGET_WORD_BITSIZE == 32) -typedef unsigned32 unsigned_word; -typedef signed32 signed_word; +typedef uint32_t unsigned_word; +typedef int32_t signed_word; #endif #if (WITH_TARGET_WORD_BITSIZE == 16) -typedef unsigned16 unsigned_word; -typedef signed16 signed_word; +typedef uint16_t unsigned_word; +typedef int16_t signed_word; #endif #define PRI_TW(t) SIM_PRI_TB (t, WITH_TARGET_WORD_BITSIZE) @@ -122,16 +115,16 @@ typedef signed16 signed_word; /* Other instructions */ #if (WITH_TARGET_ADDRESS_BITSIZE == 64) -typedef unsigned64 unsigned_address; -typedef signed64 signed_address; +typedef uint64_t unsigned_address; +typedef int64_t signed_address; #endif #if (WITH_TARGET_ADDRESS_BITSIZE == 32) -typedef unsigned32 unsigned_address; -typedef signed32 signed_address; +typedef uint32_t unsigned_address; +typedef int32_t signed_address; #endif #if (WITH_TARGET_ADDRESS_BITSIZE == 16) -typedef unsigned16 unsigned_address; -typedef signed16 signed_address; +typedef uint16_t unsigned_address; +typedef int16_t signed_address; #endif typedef unsigned_address address_word; @@ -142,12 +135,12 @@ typedef unsigned_address address_word; /* IEEE 1275 cell size */ #if (WITH_TARGET_CELL_BITSIZE == 64) -typedef unsigned64 unsigned_cell; -typedef signed64 signed_cell; +typedef uint64_t unsigned_cell; +typedef int64_t signed_cell; #endif #if (WITH_TARGET_CELL_BITSIZE == 32) -typedef unsigned32 unsigned_cell; -typedef signed32 signed_cell; +typedef uint32_t unsigned_cell; +typedef int32_t signed_cell; #endif typedef signed_cell cell_word; /* cells are normally signed */ @@ -158,10 +151,10 @@ typedef signed_cell cell_word; /* cells are normally signed */ /* Floating point registers */ #if (WITH_TARGET_FLOATING_POINT_BITSIZE == 64) -typedef unsigned64 fp_word; +typedef uint64_t fp_word; #endif #if (WITH_TARGET_FLOATING_POINT_BITSIZE == 32) -typedef unsigned32 fp_word; +typedef uint32_t fp_word; #endif #define PRI_TF(t) SIM_PRI_TB (t, WITH_TARGET_FLOATING_POINT_BITSIZE) |