aarch64: Add new test dp-general-two-source.d

lsl was already tested but is included here as part of the same encoding
group.

2 files changed, 178 insertions, 0 deletions

diff --git a/gas/testsuite/gas/aarch64/dp-general-two-source.d b/gas/testsuite/gas/aarch64/dp-general-two-source.d
new file mode 100644
index 0000000..5c0d816
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/dp-general-two-source.d
@@ -0,0 +1,89 @@
+#as: -march=armv8-a
+#objdump: -dr
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+ *[0-9a-f]+:	1ac00800 	udiv	w0, w0, w0
+ *[0-9a-f]+:	1ac0081f 	udiv	wzr, w0, w0
+ *[0-9a-f]+:	1ac00be0 	udiv	w0, wzr, w0
+ *[0-9a-f]+:	1adf0800 	udiv	w0, w0, wzr
+ *[0-9a-f]+:	9ac00800 	udiv	x0, x0, x0
+ *[0-9a-f]+:	9ac0081f 	udiv	xzr, x0, x0
+ *[0-9a-f]+:	9ac00be0 	udiv	x0, xzr, x0
+ *[0-9a-f]+:	9adf0800 	udiv	x0, x0, xzr
+ *[0-9a-f]+:	1ac00c00 	sdiv	w0, w0, w0
+ *[0-9a-f]+:	1ac00c1f 	sdiv	wzr, w0, w0
+ *[0-9a-f]+:	1ac00fe0 	sdiv	w0, wzr, w0
+ *[0-9a-f]+:	1adf0c00 	sdiv	w0, w0, wzr
+ *[0-9a-f]+:	9ac00c00 	sdiv	x0, x0, x0
+ *[0-9a-f]+:	9ac00c1f 	sdiv	xzr, x0, x0
+ *[0-9a-f]+:	9ac00fe0 	sdiv	x0, xzr, x0
+ *[0-9a-f]+:	9adf0c00 	sdiv	x0, x0, xzr
+ *[0-9a-f]+:	1ac02000 	lsl	w0, w0, w0
+ *[0-9a-f]+:	1ac0201f 	lsl	wzr, w0, w0
+ *[0-9a-f]+:	1ac023e0 	lsl	w0, wzr, w0
+ *[0-9a-f]+:	1adf2000 	lsl	w0, w0, wzr
+ *[0-9a-f]+:	9ac02000 	lsl	x0, x0, x0
+ *[0-9a-f]+:	9ac0201f 	lsl	xzr, x0, x0
+ *[0-9a-f]+:	9ac023e0 	lsl	x0, xzr, x0
+ *[0-9a-f]+:	9adf2000 	lsl	x0, x0, xzr
+ *[0-9a-f]+:	1ac02000 	lsl	w0, w0, w0
+ *[0-9a-f]+:	1ac0201f 	lsl	wzr, w0, w0
+ *[0-9a-f]+:	1ac023e0 	lsl	w0, wzr, w0
+ *[0-9a-f]+:	1adf2000 	lsl	w0, w0, wzr
+ *[0-9a-f]+:	9ac02000 	lsl	x0, x0, x0
+ *[0-9a-f]+:	9ac0201f 	lsl	xzr, x0, x0
+ *[0-9a-f]+:	9ac023e0 	lsl	x0, xzr, x0
+ *[0-9a-f]+:	9adf2000 	lsl	x0, x0, xzr
+ *[0-9a-f]+:	1ac02400 	lsr	w0, w0, w0
+ *[0-9a-f]+:	1ac0241f 	lsr	wzr, w0, w0
+ *[0-9a-f]+:	1ac027e0 	lsr	w0, wzr, w0
+ *[0-9a-f]+:	1adf2400 	lsr	w0, w0, wzr
+ *[0-9a-f]+:	9ac02400 	lsr	x0, x0, x0
+ *[0-9a-f]+:	9ac0241f 	lsr	xzr, x0, x0
+ *[0-9a-f]+:	9ac027e0 	lsr	x0, xzr, x0
+ *[0-9a-f]+:	9adf2400 	lsr	x0, x0, xzr
+ *[0-9a-f]+:	1ac02400 	lsr	w0, w0, w0
+ *[0-9a-f]+:	1ac0241f 	lsr	wzr, w0, w0
+ *[0-9a-f]+:	1ac027e0 	lsr	w0, wzr, w0
+ *[0-9a-f]+:	1adf2400 	lsr	w0, w0, wzr
+ *[0-9a-f]+:	9ac02400 	lsr	x0, x0, x0
+ *[0-9a-f]+:	9ac0241f 	lsr	xzr, x0, x0
+ *[0-9a-f]+:	9ac027e0 	lsr	x0, xzr, x0
+ *[0-9a-f]+:	9adf2400 	lsr	x0, x0, xzr
+ *[0-9a-f]+:	1ac02800 	asr	w0, w0, w0
+ *[0-9a-f]+:	1ac0281f 	asr	wzr, w0, w0
+ *[0-9a-f]+:	1ac02be0 	asr	w0, wzr, w0
+ *[0-9a-f]+:	1adf2800 	asr	w0, w0, wzr
+ *[0-9a-f]+:	9ac02800 	asr	x0, x0, x0
+ *[0-9a-f]+:	9ac0281f 	asr	xzr, x0, x0
+ *[0-9a-f]+:	9ac02be0 	asr	x0, xzr, x0
+ *[0-9a-f]+:	9adf2800 	asr	x0, x0, xzr
+ *[0-9a-f]+:	1ac02800 	asr	w0, w0, w0
+ *[0-9a-f]+:	1ac0281f 	asr	wzr, w0, w0
+ *[0-9a-f]+:	1ac02be0 	asr	w0, wzr, w0
+ *[0-9a-f]+:	1adf2800 	asr	w0, w0, wzr
+ *[0-9a-f]+:	9ac02800 	asr	x0, x0, x0
+ *[0-9a-f]+:	9ac0281f 	asr	xzr, x0, x0
+ *[0-9a-f]+:	9ac02be0 	asr	x0, xzr, x0
+ *[0-9a-f]+:	9adf2800 	asr	x0, x0, xzr
+ *[0-9a-f]+:	1ac02c00 	ror	w0, w0, w0
+ *[0-9a-f]+:	1ac02c1f 	ror	wzr, w0, w0
+ *[0-9a-f]+:	1ac02fe0 	ror	w0, wzr, w0
+ *[0-9a-f]+:	1adf2c00 	ror	w0, w0, wzr
+ *[0-9a-f]+:	9ac02c00 	ror	x0, x0, x0
+ *[0-9a-f]+:	9ac02c1f 	ror	xzr, x0, x0
+ *[0-9a-f]+:	9ac02fe0 	ror	x0, xzr, x0
+ *[0-9a-f]+:	9adf2c00 	ror	x0, x0, xzr
+ *[0-9a-f]+:	1ac02c00 	ror	w0, w0, w0
+ *[0-9a-f]+:	1ac02c1f 	ror	wzr, w0, w0
+ *[0-9a-f]+:	1ac02fe0 	ror	w0, wzr, w0
+ *[0-9a-f]+:	1adf2c00 	ror	w0, w0, wzr
+ *[0-9a-f]+:	9ac02c00 	ror	x0, x0, x0
+ *[0-9a-f]+:	9ac02c1f 	ror	xzr, x0, x0
+ *[0-9a-f]+:	9ac02fe0 	ror	x0, xzr, x0
+ *[0-9a-f]+:	9adf2c00 	ror	x0, x0, xzr
diff --git a/gas/testsuite/gas/aarch64/dp-general-two-source.s b/gas/testsuite/gas/aarch64/dp-general-two-source.s
new file mode 100644
index 0000000..95f2f00
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/dp-general-two-source.s
@@ -0,0 +1,89 @@
+	udiv	w0, w0, w0
+	udiv	wzr, w0, w0
+	udiv	w0, wzr, w0
+	udiv	w0, w0, wzr
+	udiv	x0, x0, x0
+	udiv	xzr, x0, x0
+	udiv	x0, xzr, x0
+	udiv	x0, x0, xzr
+
+	sdiv	w0, w0, w0
+	sdiv	wzr, w0, w0
+	sdiv	w0, wzr, w0
+	sdiv	w0, w0, wzr
+	sdiv	x0, x0, x0
+	sdiv	xzr, x0, x0
+	sdiv	x0, xzr, x0
+	sdiv	x0, x0, xzr
+
+	lslv	w0, w0, w0
+	lslv	wzr, w0, w0
+	lslv	w0, wzr, w0
+	lslv	w0, w0, wzr
+	lslv	x0, x0, x0
+	lslv	xzr, x0, x0
+	lslv	x0, xzr, x0
+	lslv	x0, x0, xzr
+
+	lsl	w0, w0, w0
+	lsl	wzr, w0, w0
+	lsl	w0, wzr, w0
+	lsl	w0, w0, wzr
+	lsl	x0, x0, x0
+	lsl	xzr, x0, x0
+	lsl	x0, xzr, x0
+	lsl	x0, x0, xzr
+
+	lsrv	w0, w0, w0
+	lsrv	wzr, w0, w0
+	lsrv	w0, wzr, w0
+	lsrv	w0, w0, wzr
+	lsrv	x0, x0, x0
+	lsrv	xzr, x0, x0
+	lsrv	x0, xzr, x0
+	lsrv	x0, x0, xzr
+
+	lsr	w0, w0, w0
+	lsr	wzr, w0, w0
+	lsr	w0, wzr, w0
+	lsr	w0, w0, wzr
+	lsr	x0, x0, x0
+	lsr	xzr, x0, x0
+	lsr	x0, xzr, x0
+	lsr	x0, x0, xzr
+
+	asrv	w0, w0, w0
+	asrv	wzr, w0, w0
+	asrv	w0, wzr, w0
+	asrv	w0, w0, wzr
+	asrv	x0, x0, x0
+	asrv	xzr, x0, x0
+	asrv	x0, xzr, x0
+	asrv	x0, x0, xzr
+
+	asr	w0, w0, w0
+	asr	wzr, w0, w0
+	asr	w0, wzr, w0
+	asr	w0, w0, wzr
+	asr	x0, x0, x0
+	asr	xzr, x0, x0
+	asr	x0, xzr, x0
+	asr	x0, x0, xzr
+
+	rorv	w0, w0, w0
+	rorv	wzr, w0, w0
+	rorv	w0, wzr, w0
+	rorv	w0, w0, wzr
+	rorv	x0, x0, x0
+	rorv	xzr, x0, x0
+	rorv	x0, xzr, x0
+	rorv	x0, x0, xzr
+
+	ror	w0, w0, w0
+	ror	wzr, w0, w0
+	ror	w0, wzr, w0
+	ror	w0, w0, wzr
+	ror	x0, x0, x0
+	ror	xzr, x0, x0
+	ror	x0, xzr, x0
+	ror	x0, x0, xzr