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author | Charlie Jenkins <charlie@rivosinc.com> | 2025-01-07 13:35:45 -0800 |
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committer | Nelson Chu <nelson@rivosinc.com> | 2025-01-09 10:09:28 +0800 |
commit | b5e40fa57215854e567f5eb8895e893e47a06c8e (patch) | |
tree | 541e9efa2ee08230c3b71baa4fa68b749c4cf513 | |
parent | 6a04e8230707d8bbfaae8bd4c13f5c3018337971 (diff) | |
download | binutils-b5e40fa57215854e567f5eb8895e893e47a06c8e.zip binutils-b5e40fa57215854e567f5eb8895e893e47a06c8e.tar.gz binutils-b5e40fa57215854e567f5eb8895e893e47a06c8e.tar.bz2 |
RISC-V: Add partial instruction display tests
When objdump is specified with a stop address that ends up in the middle
of an instruction, the partial instruction is expected to be displayed.
These three tests check that the partial instruction is correctly
displayed when there are 1, 2, or 3 bytes of the instruction dumped.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
-rw-r--r-- | gas/testsuite/gas/riscv/dis-partial-insn-byte.d | 11 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/dis-partial-insn-short.d | 11 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/dis-partial-insn-word.d | 11 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/dis-partial-insn.s | 2 |
4 files changed, 35 insertions, 0 deletions
diff --git a/gas/testsuite/gas/riscv/dis-partial-insn-byte.d b/gas/testsuite/gas/riscv/dis-partial-insn-byte.d new file mode 100644 index 0000000..f8c149c --- /dev/null +++ b/gas/testsuite/gas/riscv/dis-partial-insn-byte.d @@ -0,0 +1,11 @@ +#as: +#source: dis-partial-insn.s +#objdump: --start-address 0 --stop-address 1 -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]+0:[ ]+13[ ]+.byte[ ]+0x13 diff --git a/gas/testsuite/gas/riscv/dis-partial-insn-short.d b/gas/testsuite/gas/riscv/dis-partial-insn-short.d new file mode 100644 index 0000000..4a7d6d9 --- /dev/null +++ b/gas/testsuite/gas/riscv/dis-partial-insn-short.d @@ -0,0 +1,11 @@ +#as: +#source: dis-partial-insn.s +#objdump: --start-address 0 --stop-address 2 -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]+0:[ ]+0013[ ]+.short[ ]+0x0013 diff --git a/gas/testsuite/gas/riscv/dis-partial-insn-word.d b/gas/testsuite/gas/riscv/dis-partial-insn-word.d new file mode 100644 index 0000000..2f52153 --- /dev/null +++ b/gas/testsuite/gas/riscv/dis-partial-insn-word.d @@ -0,0 +1,11 @@ +#as: +#source: dis-partial-insn.s +#objdump: --start-address 0 --stop-address 3 -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]+0:[ ]+000013[ ]+.word[ ]+0x000013 diff --git a/gas/testsuite/gas/riscv/dis-partial-insn.s b/gas/testsuite/gas/riscv/dis-partial-insn.s new file mode 100644 index 0000000..9945688 --- /dev/null +++ b/gas/testsuite/gas/riscv/dis-partial-insn.s @@ -0,0 +1,2 @@ +target: + nop |