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| author | Jiawei <jiawei@iscas.ac.cn> | 2025-06-24 19:09:27 +0800 |
|---|---|---|
| committer | Nelson Chu <nelson@rivosinc.com> | 2025-06-24 19:30:04 +0800 |
| commit | a026e16514b487cb83b562764080214f66932c0a (patch) | |
| tree | c08f194a8e659e65c9103384676007968b73b306 | |
| parent | ec62621cfba13fd87d9e7a47840e575516859d7b (diff) | |
| download | binutils-a026e16514b487cb83b562764080214f66932c0a.zip binutils-a026e16514b487cb83b562764080214f66932c0a.tar.gz binutils-a026e16514b487cb83b562764080214f66932c0a.tar.bz2 | |
RISC-V: Update Profiles string in RV23.
Update the Profiles string in RV23 to include the extensions 'b' and 'supm'.
bfd/ChangeLog:
* elfxx-riscv.c: Update Profiles string in RV23.
gas/ChangeLog:
* testsuite/gas/riscv/attribute-19.d: Update test string.
* testsuite/gas/riscv/attribute-20.d: Ditto.
| -rw-r--r-- | bfd/elfxx-riscv.c | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/attribute-19.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/attribute-20.d | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 936adcd..360bd26 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1342,18 +1342,18 @@ static struct riscv_profiles riscv_profiles_table[] = /* RVA23 contains all mandatory base ISA for RVA22U64 and the new extension 'v,zihintntl,zvfhmin,zvbb,zvkt,zicond,zimop,zcmop,zfa,zawrs' as mandatory extensions. */ - {"rva23u64", "rv64imafdcv_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" + {"rva23u64", "rv64imafdcbv_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop" "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb" - "_zfa_zawrs"}, + "_zfa_zawrs_supm"}, /* RVB23 contains all mandatory base ISA for RVA22U64 and the new extension 'zihintntl,zicond,zimop,zcmop,zfa,zawrs' as mandatory extensions. */ - {"rvb23u64", "rv64imafdc_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" + {"rvb23u64", "rv64imafdcb_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop" "_zicboz_zfhmin_zkt_zihintntl_zicond_zimop_zcmop_zcb" - "_zfa_zawrs"}, + "_zfa_zawrs_supm"}, /* Currently we do not define S/M mode Profiles. */ diff --git a/gas/testsuite/gas/riscv/attribute-19.d b/gas/testsuite/gas/riscv/attribute-19.d index 1cd15d5..d73e3f0 100644 --- a/gas/testsuite/gas/riscv/attribute-19.d +++ b/gas/testsuite/gas/riscv/attribute-19.d @@ -3,4 +3,4 @@ #source: empty.s Attribute Section: riscv File Attributes - Tag_RISCV_arch: "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_v1p0_zic64b1p0_zicbom1p0_zicbop1p0_zicboz1p0_ziccamoa1p0_ziccif1p0_zicclsm1p0_ziccrse1p0_zicntr2p0_zicond1p0_zicsr2p0_zihintntl1p0_zihintpause2p0_zihpm2p0_zimop1p0_zmmul1p0_za64rs1p0_zaamo1p0_zalrsc1p0_zawrs1p0_zfa1p0_zfhmin1p0_zca1p0_zcb1p0_zcmop1p0_zba1p0_zbb1p0_zbs1p0_zkt1p0_zvbb1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvfhmin1p0_zvkb1p0_zvkt1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" + Tag_RISCV_arch: "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_b1p0_v1p0_zic64b1p0_zicbom1p0_zicbop1p0_zicboz1p0_ziccamoa1p0_ziccif1p0_zicclsm1p0_ziccrse1p0_zicntr2p0_zicond1p0_zicsr2p0_zihintntl1p0_zihintpause2p0_zihpm2p0_zimop1p0_zmmul1p0_za64rs1p0_zaamo1p0_zalrsc1p0_zawrs1p0_zfa1p0_zfhmin1p0_zca1p0_zcb1p0_zcmop1p0_zba1p0_zbb1p0_zbs1p0_zkt1p0_zvbb1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvfhmin1p0_zvkb1p0_zvkt1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0_supm1p0" diff --git a/gas/testsuite/gas/riscv/attribute-20.d b/gas/testsuite/gas/riscv/attribute-20.d index e8fb767..22bcc13 100644 --- a/gas/testsuite/gas/riscv/attribute-20.d +++ b/gas/testsuite/gas/riscv/attribute-20.d @@ -3,4 +3,4 @@ #source: empty.s Attribute Section: riscv File Attributes - Tag_RISCV_arch: "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zic64b1p0_zicbom1p0_zicbop1p0_zicboz1p0_ziccamoa1p0_ziccif1p0_zicclsm1p0_ziccrse1p0_zicntr2p0_zicond1p0_zicsr2p0_zihintntl1p0_zihintpause2p0_zihpm2p0_zimop1p0_zmmul1p0_za64rs1p0_zaamo1p0_zalrsc1p0_zawrs1p0_zfa1p0_zfhmin1p0_zca1p0_zcb1p0_zcmop1p0_zba1p0_zbb1p0_zbs1p0_zkt1p0" + Tag_RISCV_arch: "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_b1p0_zic64b1p0_zicbom1p0_zicbop1p0_zicboz1p0_ziccamoa1p0_ziccif1p0_zicclsm1p0_ziccrse1p0_zicntr2p0_zicond1p0_zicsr2p0_zihintntl1p0_zihintpause2p0_zihpm2p0_zimop1p0_zmmul1p0_za64rs1p0_zaamo1p0_zalrsc1p0_zawrs1p0_zfa1p0_zfhmin1p0_zca1p0_zcb1p0_zcmop1p0_zba1p0_zbb1p0_zbs1p0_zkt1p0_supm1p0" |