mep: ubsan: mep-ibld.c:1635,1645,1652 left shift of negative value

cpu/
	* mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
	value by two rather than shifting left.
	(f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
opcodes/
	* mep-ibld.c: Regenerate.

4 files changed, 20 insertions, 10 deletions

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index f810248..6609a05 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,9 @@
+2020-09-01  Alan Modra  <amodra@gmail.com>
+
+	* mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
+	value by two rather than shifting left.
+	(f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
+
 2020-08-26  David Faust  <david.faust@oracle.com>
 
 	* bpf.cpu (arch bpf): Add xbpf mach and isas.
diff --git a/cpu/mep-core.cpu b/cpu/mep-core.cpu
index accf00e..bdc9c62 100644
--- a/cpu/mep-core.cpu
+++ b/cpu/mep-core.cpu
@@ -430,15 +430,15 @@
 
 (df f-8s8a2 "pc-rel addr (8 bits)"    (all-mep-core-isas PCREL-ADDR)  8  7 INT
     ((value pc) (sra SI (sub SI value    pc) 1))
-    ((value pc) (add SI (sll SI value 1) pc)))
+    ((value pc) (add SI (mul SI value 2) pc)))
 
 (df f-12s4a2 "pc-rel addr (12 bits)"  (all-mep-core-isas PCREL-ADDR)  4 11 INT
     ((value pc) (sra SI (sub SI value    pc) 1))
-    ((value pc) (add SI (sll SI value 1) pc)))
+    ((value pc) (add SI (mul SI value 2) pc)))
 
 (df f-17s16a2 "pc-rel addr (17 bits)" (all-mep-core-isas PCREL-ADDR) 16 16 INT
     ((value pc) (sra SI (sub SI value    pc) 1))
-    ((value pc) (add SI (sll SI value 1) pc)))
+    ((value pc) (add SI (mul SI value 2) pc)))
 
 (df f-24s5a2n-hi "24s5a2n hi 16s16" (all-mep-core-isas PCREL-ADDR) 16 16  INT #f #f)
 (df f-24s5a2n-lo "24s5a2n lo 7s5a2" (all-mep-core-isas PCREL-ADDR)  5  7 UINT #f #f)
@@ -456,7 +456,7 @@
 		    (set (ifield f-24s5a2n-hi)
 			 (sra INT (ifield f-24s5a2n) 8))))
   (extract (set (ifield f-24s5a2n)
-		(add SI (or (sll (ifield f-24s5a2n-hi) 8)
+		(add SI (or (mul (ifield f-24s5a2n-hi) 256)
 			    (sll (ifield f-24s5a2n-lo) 1))
 		     pc)))
   )
@@ -486,7 +486,7 @@
 (df f-7u9     "tp-rel b (7 bits)"      (all-mep-core-isas)  9  7 UINT #f #f)
 (df f-7u9a2   "tp-rel h (7 bits)"      (all-mep-core-isas)  9  6 UINT
     ((value pc) (srl SI value 1))
-    ((value pc) (sll SI value 1)))
+    ((value pc) (mul SI value 2)))
 (df f-7u9a4   "tp/sp-rel w (7 bits)"   (all-mep-core-isas)  9  5 UINT
     ((value pc) (srl SI value 2))
     ((value pc) (sll SI value 2)))
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 20e7ec3..719cf05 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2020-09-01  Alan Modra  <amodra@gmail.com>
+
+	* mep-ibld.c: Regenerate.
+
 2020-08-31  Cooper Qu  <cooper.qu@linux.alibaba.com>
 
 	* csky-dis.c (csky_output_operand): Assign dis_info.value for
diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c
index 3de7ade..8f03813 100644
--- a/opcodes/mep-ibld.c
+++ b/opcodes/mep-ibld.c
@@ -1624,7 +1624,7 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value);
-        value = ((((value) << (1))) + (pc));
+        value = ((((value) * (2))) + (pc));
         fields->f_12s4a2 = value;
       }
       break;
@@ -1632,7 +1632,7 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((value) << (1))) + (pc));
+        value = ((((value) * (2))) + (pc));
         fields->f_17s16a2 = value;
       }
       break;
@@ -1642,14 +1642,14 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
         if (length <= 0) break;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 7, 32, total_length, pc, & fields->f_24s5a2n_lo);
         if (length <= 0) break;
-  FLD (f_24s5a2n) = ((((((FLD (f_24s5a2n_hi)) << (8))) | (((FLD (f_24s5a2n_lo)) << (1))))) + (pc));
+  FLD (f_24s5a2n) = ((((((FLD (f_24s5a2n_hi)) * (256))) | (((FLD (f_24s5a2n_lo)) << (1))))) + (pc));
       }
       break;
     case MEP_OPERAND_PCREL8A2 :
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 7, 32, total_length, pc, & value);
-        value = ((((value) << (1))) + (pc));
+        value = ((((value) * (2))) + (pc));
         fields->f_8s8a2 = value;
       }
       break;
@@ -1765,7 +1765,7 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 6, 32, total_length, pc, & value);
-        value = ((value) << (1));
+        value = ((value) * (2));
         fields->f_7u9a2 = value;
       }
       break;