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| author | Jiawei <jiawei@iscas.ac.cn> | 2025-06-24 21:11:26 +0800 |
|---|---|---|
| committer | Nelson Chu <nelson@rivosinc.com> | 2025-06-25 06:01:02 +0800 |
| commit | 724da17ae58dbcd70d255be66a7c6f152c69b75e (patch) | |
| tree | ff6071227f0d4f8a6bddca201f2e711d047fcf84 | |
| parent | 3b5b306522f748f2e384e58cf5dc046346f84dcb (diff) | |
| download | binutils-724da17ae58dbcd70d255be66a7c6f152c69b75e.zip binutils-724da17ae58dbcd70d255be66a7c6f152c69b75e.tar.gz binutils-724da17ae58dbcd70d255be66a7c6f152c69b75e.tar.bz2 | |
RISC-V: Add Profiles RVA/B23S64 support.
This patch adds support for the RISC-V Profiles RVA23S64 and RVB23S64.
Version log:
Fix wrong test for rvb23s.
bfd/ChangeLog:
* elfxx-riscv.c: New Profiles.
gas/ChangeLog:
* testsuite/gas/riscv/attribute-rva23s.d: New test.
* testsuite/gas/riscv/attribute-rvb23s.d: New test.
| -rw-r--r-- | bfd/elfxx-riscv.c | 16 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/attribute-rva23s.d | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/attribute-rvb23s.d | 6 |
3 files changed, 27 insertions, 1 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 360bd26..43d3c0d 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1347,6 +1347,14 @@ static struct riscv_profiles riscv_profiles_table[] = "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb" "_zfa_zawrs_supm"}, + /* RVA23S contains all mandatory base ISA for RVA23U64 and the privileged + extensions as mandatory extensions. */ + {"rva23s64", "rv64imafdcbv_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" + "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop" + "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb" + "_zfa_zawrs_supm_svbare_svade_ssccptr_sstvecd_sstvala_sscounterenw_svpbmt" + "_svinval_svnapot_sstc_sscofpmf_ssnpm_ssu64xl_sha"}, + /* RVB23 contains all mandatory base ISA for RVA22U64 and the new extension 'zihintntl,zicond,zimop,zcmop,zfa,zawrs' as mandatory extensions. */ @@ -1355,7 +1363,13 @@ static struct riscv_profiles riscv_profiles_table[] = "_zicboz_zfhmin_zkt_zihintntl_zicond_zimop_zcmop_zcb" "_zfa_zawrs_supm"}, - /* Currently we do not define S/M mode Profiles. */ + /* RVB23S contains all mandatory base ISA for RVB23U64 and the privileged + extensions as mandatory extensions. */ + {"rvb23s64", "rv64imafdcb_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa" + "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop" + "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb" + "_zfa_zawrs_supm_svbare_svade_ssccptr_sstvecd_sstvala_sscounterenw_svpbmt" + "_svinval_svnapot_sstc_sscofpmf_ssu64xl"}, /* Terminate the list. */ {NULL, NULL} diff --git a/gas/testsuite/gas/riscv/attribute-rva23s.d b/gas/testsuite/gas/riscv/attribute-rva23s.d new file mode 100644 index 0000000..54e79aa --- /dev/null +++ b/gas/testsuite/gas/riscv/attribute-rva23s.d @@ -0,0 +1,6 @@ +#as: -march=rva23s64 -misa-spec=20191213 +#readelf: -A +#source: empty.s +Attribute Section: riscv +File Attributes + Tag_RISCV_arch: "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_b1p0_v1p0_h1p0_zic64b1p0_zicbom1p0_zicbop1p0_zicboz1p0_ziccamoa1p0_ziccif1p0_zicclsm1p0_ziccrse1p0_zicntr2p0_zicond1p0_zicsr2p0_zihintntl1p0_zihintpause2p0_zihpm2p0_zimop1p0_zmmul1p0_za64rs1p0_zaamo1p0_zalrsc1p0_zawrs1p0_zfa1p0_zfhmin1p0_zca1p0_zcb1p0_zcmop1p0_zba1p0_zbb1p0_zbs1p0_zkt1p0_zvbb1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvfhmin1p0_zvkb1p0_zvkt1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0_sha1p0_shcounterenw1p0_shgatpa1p0_shtvala1p0_shvsatpa1p0_shvstvala1p0_shvstvecd1p0_ssccptr1p0_sscofpmf1p0_sscounterenw1p0_ssnpm1p0_ssstateen1p0_sstc1p0_sstvala1p0_sstvecd1p0_ssu64xl1p0_supm1p0_svade1p0_svbare1p0_svinval1p0_svnapot1p0_svpbmt1p0" diff --git a/gas/testsuite/gas/riscv/attribute-rvb23s.d b/gas/testsuite/gas/riscv/attribute-rvb23s.d new file mode 100644 index 0000000..5cee65a --- /dev/null +++ b/gas/testsuite/gas/riscv/attribute-rvb23s.d @@ -0,0 +1,6 @@ +#as: -march=rvb23s64 -misa-spec=20191213 +#readelf: -A +#source: empty.s +Attribute Section: riscv +File Attributes + Tag_RISCV_arch: "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_b1p0_zic64b1p0_zicbom1p0_zicbop1p0_zicboz1p0_ziccamoa1p0_ziccif1p0_zicclsm1p0_ziccrse1p0_zicntr2p0_zicond1p0_zicsr2p0_zihintntl1p0_zihintpause2p0_zihpm2p0_zimop1p0_zmmul1p0_za64rs1p0_zaamo1p0_zalrsc1p0_zawrs1p0_zfa1p0_zfhmin1p0_zca1p0_zcb1p0_zcmop1p0_zba1p0_zbb1p0_zbs1p0_zkt1p0_zvbb1p0_zve32f1p0_zve32x1p0_zvfhmin1p0_zvkb1p0_zvkt1p0_zvl32b1p0_ssccptr1p0_sscofpmf1p0_sscounterenw1p0_sstc1p0_sstvala1p0_sstvecd1p0_ssu64xl1p0_supm1p0_svade1p0_svbare1p0_svinval1p0_svnapot1p0_svpbmt1p0" |