ChangeLog rotation

18 files changed, 20314 insertions, 20188 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 15e104a..e33ce1b 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,4285 +1,6 @@
-2016-12-31  Alan Modra  <amodra@gmail.com>
-
-	* elfn32-mips.c (elf_backend_want_dynrelro): Define.
-
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* archures.c: Add bfd_arch_pru.
-	* Makefile.am: Add PRU target.
-	* config.bfd: Ditto.
-	* configure.ac: Ditto.
-	* elf-bfd.h (enum elf_target_id): Add PRU_ELF_DATA.
-	* targets.c: Add pru_elf32_vec.
-	* reloc.c: Add PRU relocations.
-	* cpu-pru.c: New file.
-	* elf32-pru.c: New file.
-	* Makefile.in: Regenerate.
-	* configure: Regenerate.
-	* po/SRC-POTFILES.in: Regenerate.
-	* bfd-in2.h: Regenerate
-	* libbfd.h: Regenerate.
-
-2016-12-29  Alan Modra  <amodra@gmail.com>
-
-	* elflink.c (_bfd_elf_link_hash_copy_indirect): Only omit
-	copying one flag, ref_dynamic, when versioned_hidden.
-	* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise.
-	* elf32-hppa.c (elf32_hppa_copy_indirect_symbol): Use same
-	logic for copying weakdef flags.  Copy plabel flag and merge
-	tls_type.
-	* elf32-i386.c (elf_i386_copy_indirect_symbol): Use same logic
-	for copying weakdef flags.
-	* elf32-ppc.c (ppc_elf_copy_indirect_symbol): Likewise.
-	* elf32-s390.c (elf_s390_copy_indirect_symbol): Likewise.
-	* elf32-sh.c (sh_elf_copy_indirect_symbol): Likewise.
-	* elf64-s390.c (elf_s390_copy_indirect_symbol): Likewise.
-	* elfnn-ia64.c (elfNN_ia64_hash_copy_indirect): Likewise.
-	* elf64-x86-64.c (elf_x86_64_copy_indirect_symbol): Likewise.
-	Simplify.
-
-2016-12-28  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20995
-	* elflink.c (elf_link_add_object_symbols): Mark relro sections
-	in dynamic objects SEC_READONLY.
-
-2016-12-26  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20995
-	* elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and
-	sreldynrelro.
-	(struct elf_backend_data): Add want_dynrelro.
-	* elfxx-target.h (elf_backend_want_dynrelro): Define.
-	(elfNN_bed): Update initializer.
-	* elflink.c (_bfd_elf_create_dynamic_sections): Create
-	sdynrelro and sreldynrelro sections.
-	* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables
-	copied into the executable from read-only sections into sdynrelro.
-	(elf32_arm_size_dynamic_sections): Handle sdynrelro.
-	(elf32_arm_finish_dynamic_symbol): Select sreldynrelro for
-	dynamic relocs in sdynrelro.
-	(elf_backend_want_dynrelro): Define.
-	* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol)
-	(elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-i386.c (elf_i386_adjust_dynamic_symbol)
-	(elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-metag.c (elf_metag_adjust_dynamic_symbol)
-	(elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol)
-	(microblaze_elf_size_dynamic_sections)
-	(microblaze_elf_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol)
-	(nios2_elf32_adjust_dynamic_symbol)
-	(nios2_elf32_size_dynamic_sections)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-or1k.c (or1k_elf_finish_dynamic_symbol)
-	(or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol)
-	(ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-s390.c (elf_s390_adjust_dynamic_symbol)
-	(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol)
-	(elf32_tic6x_size_dynamic_sections)
-	(elf32_tic6x_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol)
-	(tilepro_elf_size_dynamic_sections)
-	(tilepro_elf_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol)
-	(ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf64-s390.c (elf_s390_adjust_dynamic_symbol)
-	(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol)
-	(elf_x86_64_size_dynamic_sections)
-	(elf_x86_64_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol)
-	(elfNN_aarch64_size_dynamic_sections)
-	(elfNN_aarch64_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol)
-	(riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol)
-	(elf_backend_want_dynrelro): As above.
-	* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol)
-	(_bfd_mips_elf_size_dynamic_sections)
-	(_bfd_mips_vxworks_finish_dynamic_symbol): As above.
-	* elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol)
-	(_bfd_sparc_elf_size_dynamic_sections)
-	(_bfd_sparc_elf_finish_dynamic_symbol): As above.
-	* elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol)
-	(tilegx_elf_size_dynamic_sections)
-	(tilegx_elf_finish_dynamic_symbol): As above.
-	* elf32-mips.c (elf_backend_want_dynrelro): Define.
-	* elf64-mips.c (elf_backend_want_dynrelro): Define.
-	* elf32-sparc.c (elf_backend_want_dynrelro): Define.
-	* elf64-sparc.c (elf_backend_want_dynrelro): Define.
-	* elf32-tilegx.c (elf_backend_want_dynrelro): Define.
-	* elf64-tilegx.c (elf_backend_want_dynrelro): Define.
-	* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy.
-	(microblaze_elf_size_dynamic_sections): Handle sdynbss.
-	* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use
-	of linker shortcuts to dynamic sections rather than comparing
-	names.  Correctly set "got" flag.
-
-2016-12-26  Alan Modra  <amodra@gmail.com>
-
-	* elf-bfd.h (struct elf_link_hash_table): Add sdynbss and srelbss.
-	* elflink.c (_bfd_elf_create_dynamic_sections): Set them.  Create
-	.rel.bss/.rela.bss for executables, both PIE and non-PIE.
-	* elf32-arc.c (struct elf_arc_link_hash_table): Delete srelbss.
-	Use ELF hash table var throughout.
-	* elf32-arm.c (struct elf32_arm_link_hash_table): Delete sdynbss
-	and srelbss.  Use ELF hash table vars throughout.
-	* elf32-hppa.c (struct elf32_hppa_link_hash_table): Likewise.
-	* elf32-i386.c (struct elf_i386_link_hash_table): Likewise.
-	* elf32-metag.c (struct elf_metag_link_hash_table): Likewise.
-	* elf32-microblaze.c (struct elf32_mb_link_hash_table): Likewise.
-	* elf32-nios2.c (struct elf32_nios2_link_hash_table): Likewise.
-	* elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise.
-	* elf32-ppc.c (struct ppc_elf_link_hash_table): Likewise.
-	* elf32-s390.c (struct elf_s390_link_hash_table): Likewise.
-	* elf32-tic6x.c (struct elf32_tic6x_link_hash_table): Likewise.
-	* elf32-tilepro.c (struct tilepro_elf_link_hash_table): Likewise.
-	* elf64-ppc.c (struct ppc_link_hash_table): Likewise.
-	* elf64-s390.c (struct elf_s390_link_hash_table): Likewise.
-	* elf64-x86-64.c (struct elf_x86_64_link_hash_table): Likewise.
-	* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Likewise.
-	* elfnn-riscv.c (struct riscv_elf_link_hash_table): Likewise.
-	* elfxx-mips.c (struct mips_elf_link_hash_table): Likewise.
-	* elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Likewise.
-	* elfxx-sparc.c: Likewise.
-	* elfxx-tilegx.c (struct tilegx_elf_link_hash_table): Likewise.
-
-	* elf32-arc.c (arc_elf_create_dynamic_sections): Delete.
-	(elf_backend_create_dynamic_sections): Use base ELF version.
-	* elf32-microblaze.c (microblaze_elf_create_dynamic_sections): Delete.
-	(elf_backend_create_dynamic_sections): Use base ELF version.
-	* elf32-or1k.c (or1k_elf_create_dynamic_sections): Delete.
-	(elf_backend_create_dynamic_sections): Use base ELF version.
-	* elf32-s390.c (elf_s390_create_dynamic_sections): Delete.
-	(elf_backend_create_dynamic_sections): Use base ELF version.
-	* elf64-ppc.c (ppc64_elf_create_dynamic_sections): Delete.
-	(elf_backend_create_dynamic_sections): Use base ELF version.
-	* elf64-s390.c (elf_s390_create_dynamic_sections): Delete.
-	(elf_backend_create_dynamic_sections): Use base ELF version.
-
-	* elf32-tilepro.c (tilepro_elf_create_dynamic_sections): Remove
-	extraneous tests.
-	* elfnn-aarch64.c (elfNN_aarch64_create_dynamic_sections): Likewise.
-	* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Likewise.
-	* elfxx-tilegx.c (tilegx_elf_create_dynamic_sections): Likewise.
-
-	* elf32-i386.c (elf_i386_create_dynamic_sections): Don't create
-	".rel.bss" for executables.
-	* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Don't create
-	".rela.bss" for executables.
-	* elf32-nios2.c (nios2_elf32_create_dynamic_sections): Don't
-	ignore return status from _bfd_elf_create_dynamic_sections.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* bfd/elfxx-mips.c (_bfd_mips_post_process_headers): Revert
-	2016-02-23 change and remove EI_ABIVERSION 5 support.
-
-2016-12-23  Alan Modra  <amodra@gmail.com>
-
-	* linker.c (generic_link_check_archive_element): Call target
-	bfd_link_add_symbols to add element symbols.
-
-2016-12-23  Alan Modra  <amodra@gmail.com>
-
-	* linker.c (generic_link_add_symbols): Delete.  Merge into..
-	(_bfd_generic_link_add_symbols): ..here.
-	(generic_link_check_archive_element_no_collect): Delete.
-	(generic_link_check_archive_element_collect): Likewise.
-	(generic_link_add_object_symbols): Remove "collect" param.  Update
-	callers.
-	(generic_link_add_symbol_list): Likewise.
-	(generic_link_check_archive_element): Likewise.  Call
-	bfd_link_add_symbols rather than generic_link_add_object_symbols.
-	* libbfd-in.h (_bfd_generic_link_add_symbols_collect): Delete.
-	* libbfd.h: Regenerate.
-
-2016-12-23  Alan Modra  <amodra@gmail.com>
-
-	PR binutils/20464
-	PR binutils/14625
-	* configure.ac: Revert 2016-05-25 configure change setting
-	want_64_bit_archive for mips64 and s390x.  Revise USE_64_BIT_ARCHIVE
-	description.
-	* configure: Regenerate.
-	* config.in: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* version.m4: Bump version to 2.28.51
-	* configure: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* po/bfd.pot: Regenerate.
-
-2016-12-22  Alan Modra  <amodra@gmail.com>
-
-	* libbfd-in.h (_bfd_vms_lib_slurp_armap): Use _bfd_noarchive function.
-	(_bfd_vms_lib_slurp_extended_name_table: Likewise.
-	(_bfd_vms_lib_construct_extended_name_table: Likewise.
-	(_bfd_vms_lib_truncate_arname: Likewise.
-	(_bfd_vms_lib_write_armap: Likewise.
-	(_bfd_vms_lib_read_ar_hdr: Likewise.
-	(_bfd_vms_lib_write_ar_hdr: Likewise.
-	* libbfd.h: Regenerate.
-
-2016-12-21: Yury Norov <ynorov@caviumnetworks.com>
-            Andreas Schwab <schwab@suse.de>
-
-	* cpu-aarch64.c: Fix word and address size declaration in
-	ilp32 mode in bfd_arch_info_type bfd_aarch64_arch_ilp32
-	structure.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
-	EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* elfnn-riscv.c (bfd_riscv_get_max_alignment): Return bfd_vma
-	instead of unsigned int.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-	    Kuan-Lin Chen  <kuanlinchentw@gmail.com>
-
-	* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
-	(BFD_RELOC_RISCV_TPREL_S): Likewise.
-	(BFD_RELOC_RISCV_RELAX): Likewise.
-	(BFD_RELOC_RISCV_CFA): Likewise.
-	(BFD_RELOC_RISCV_SUB6): Likewise.
-	(BFD_RELOC_RISCV_SET8): Likewise.
-	(BFD_RELOC_RISCV_SET8): Likewise.
-	(BFD_RELOC_RISCV_SET16): Likewise.
-	(BFD_RELOC_RISCV_SET32): Likewise.
-	* elfnn-riscv.c (perform_relocation): Handle the new
-	relocations.
-	(_bfd_riscv_relax_tls_le): Likewise.
-	(_bfd_riscv_relax_align): Likewise.
-	(_bfd_riscv_relax_section): Likewise.
-	(howto_table): Likewise.
-	(riscv_reloc_map): Likewise.
-	(relax_func_t): New type.
-	(_bfd_riscv_relax_call): Add reserve_size argument, which
-	controls the maximal offset pessimism.  Correct type of max_alignment.
-	(_bfd_riscv_relax_lui): Likewise.
-	(_bfd_riscv_relax_tls_le): Likewise.
-	(_bfd_riscv_relax_align): Likewise.
-	(_bfd_riscv_relax_section): Compute the required reserve size
-	when relocating and use it to when calling relax_func.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Likewise.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* elfnn-riscv.c: Formatting and comment fixes throughout.
-	* elfxx-riscv.c: Likewise.
-	(howto_table): Change the src_mask field from MINUS_ONE to 0 for
-	R_RISCV_TLS_DTPMOD32, R_RISCV_TLS_DTPMOD64, R_RISCV_TLS_DTPREL32,
-	R_RISCV_TLS_DTPREL64, R_RISCV_TLS_TPREL32, R_RISCV_TLS_TPREL64.
-
-2016-12-20  Palmer Dabbelt  <palmer@dabbelt.com>
-
-	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Improve
-	error message when linking elf32 and elf64.
-
-2016-12-19  Christian Groessler  <chris@groessler.org>
-
-	* elf32-arm.c (elf32_arm_popcount): Rename from 'popcount'.  Make
-	'sum' local variable signed.
-
-2016-12-16  fincs  <fincs.alt1@gmail.com>
-
-	* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Add handling
-	for info->gc_keep_exported.
-	(bfd_elf_gc_sections): Likewise.
-
-2016-12-15  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20968
-	PR ld/20908
-	* elflink.c (bfd_elf_final_link): Revert 2016-12-02 change.  Move
-	reloc counting code later after ELF flavour test.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
-	(bfd_mips_elf_get_abiflags): New prototype.
-	* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
-	* bfd-in2.h: Regenerate.
-
-2016-12-14  Yury Norov <ynorov@caviumnetworks.com>
-
-         * bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where
-         TCB_SIZE is used.
-
-2016-12-13  Alan Modra  <amodra@gmail.com>
-
-	* elf64-hppa.c (elf64_hppa_modify_segment_map): Don't add PHDR
-	for objcopy/strip or when a ld script specifies PHDRS.
-
-2016-12-13  Alan Modra  <amodra@gmail.com>
-
-	* elf32-rx.c (elf32_rx_modify_program_headers): Don't adjust
-	segments that include the ELF file header or program headers.
-
-2016-12-08  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20932
-	* elflink.c (bfd_elf_record_link_assignment): Handle warning symbols.
-
-2016-12-07  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20932
-	* elflink.c (bfd_elf_record_link_assignment): Replace call to
-	abort with an error message and error return value.
-
-2016-12-06  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20931
-	* elf.c (copy_special_section_fields): Check for an invalid
-	sh_link field before attempting to follow it.
-
-	PR binutils/20929
-	* aoutx.h (squirt_out_relocs): Check for relocs without an
-	associated symbol.
-
-2016-12-06  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ok_lo_toc_insn): Add r_type param.  Recognize
-	lq,lfq,lxv,lxsd,lxssp,lfdp,stq,stfq,stxv,stxsd,stxssp,stfdp.
-	Don't match lmd and stmd.
-
-2016-12-05  Alyssa Milburn <amilburn@zall.org>
-
-	* elfxx-sparc.c: Do not stop processing relocations after
-	partially relaxing a call with WDISP30.
-
-2016-12-05  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20905
-	* peicode.h (pe_ILF_object_p): Use strnlen to avoid running over
-	the end of the string buffer.
-
-	PR binutils/20907
-	* peicode.h (pe_ILF_build_a_bfd): Replace abort with error return.
-
-	PR binutils/20921
-	* aoutx.h (squirt_out_relocs): Check for and report any relocs
-	that could not be recognised.
-
-	PR binutils/20922
-	* elf.c (find_link): Check for null headers before attempting to
-	match them.
-
-	PR ld/20925
-	* aoutx.h (aout_link_add_symbols): Replace BFD_ASSERT with return
-	FALSE.
-
-	PR ld/20924
-	(aout_link_add_symbols): Fix off by one error checking for
-	overflow of string offset.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (struct ppc_link_hash_entry): Delete "was_undefined".
-	(struct ppc_link_hash_table): Delete "twiddled_syms".  Add
-	"need_func_desc_adj".
-	(lookup_fdh): Link direct fdh sym via oh field and set flags.
-	(make_fdh): Make strong and weak undefined function descriptor
-	symbols.
-	(ppc64_elf_merge_symbol): New function.
-	(elf_backend_merge_symbol): Define.
-	(ppc64_elf_archive_symbol_lookup): Don't test undefweak for fake
-	function descriptors.
-	(add_symbol_adjust): Don't twiddle symbols to undefweak.
-	Propagate more ref flags to function descriptor symbol.  Make
-	some function descriptor symbols dynamic.
-	(ppc64_elf_before_check_relocs): Only run add_symbol_adjust for
-	ELFv1.  Set need_func_desc_adj.  Don't fix undefs list.
-	(ppc64_elf_check_relocs): Set non_ir_ref for descriptors.
-	Don't call lookup_fdh here.
-	(ppc64_elf_gc_sections): New function.
-	(bfd_elf64_bfd_gc_sections): Define.
-	(ppc64_elf_gc_mark_hook): Mark descriptor.
-	(func_desc_adjust): Don't make fake function descriptor syms strong
-	here.  Exit earlier on non-dotsyms.  Take note of elf.dynamic
-	flag when deciding whether a dynamic function descriptor might
-	be needed.  Transfer elf.dynamic and set elf.needs_plt.  Move
-	plt regardless of visibility.  Make descriptor dynamic if
-	entry sym is dynamic, not for other cases.
-	(ppc64_elf_func_desc_adjust): Don't run func_desc_adjust if
-	already done.
-	(ppc64_elf_edit_opd): Use oh field rather than lookup_fdh.
-	(ppc64_elf_size_stubs): Likewise.
-	(ppc_build_one_stub): Don't clear was_undefined.  Only set sym
-	undefweak if stub symbol is defined.
-	(undo_symbol_twiddle, ppc64_elf_restore_symbols): Delete.
-	* elf64-ppc.h (ppc64_elf_restore_symbols): Don't declare.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_hide_symbol): Access hash table as
-	elf_link_hash_table rather than ppc_link_hash_table.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (add_symbol_adjust): Delete dead code.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (add_symbol_adjust): Correct order of tests for
-	warning and indirect symbols.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Don't copy dynamic
-	flags when direct symbol is versioned_hidden.
-
-2016-12-02  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20908
-	* elflink.c (bfd_elf_final_link): Check for ELF flavour binaries
-	when following indirect links.
-
-	PR ld/20909
-	* aoutx.h (aout_link_add_symbols): Fix off-by-one error in check
-	for an illegal string offset.
-
-2016-12-02  Gary Benson  <gbenson@redhat.com>
-
-	* elf.c (_bfd_elf_make_section_from_shdr): Pass offset to
-	elf_parse_notes.
-
-2016-12-02  Josh Conner  <joshconner@google.com>
-
-	* config.bfd: Add support for fuchsia (OS).
-
-2016-12-01  Yury Norov  <ynorov@caviumnetworks.com>
-
-	PR ld/20868
-	* elfnn-aarch64.c (elfNN_aarch64_tls_relax): Use 32-bit accesses
-	to the GOT when operating in 32-bit mode.
-
-2016-12-01  Ma Jiang  <ma.jiang@zte.com.cn>
-
-	PR ld/16720
-	* elfxx-mips.c (mips_elf_calculate_relocation): Remove overflow
-	test for HI16 relocs.
-
-2016-12-01  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20891
-	* aoutx.h (find_nearest_line): Handle the case where the main file
-	name and the directory name are both empty.
-
-	PR binutils/20892
-	* aoutx.h (find_nearest_line): Handle the case where the function
-	name is empty.
-
-2016-11-30  Alan Modra  <amodra@gmail.com>
-
-	* elf.c (get_program_header_size): Revert accidental change.
-
-2016-11-30  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20886
-	* elf64-ppc.c (ppc64_elf_size_stubs): Make rawsize max size seen
-	on any pass past STUB_SHRINK_ITER.
-
-2016-11-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elflink.c (_bfd_elf_fix_symbol_flags): Hide hidden versioned
-	symbol in executable.
-	(elf_link_output_extsym): Don't change bind from global to
-	local when linking executable.
-
-2016-11-28  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20815
-	* elf.c (phdr_sorter): Delete.
-	(assign_file_positions_except_relocs): Do not sort program
-	headers.
-
-2016-11-25  Jon Turney  <jon.turney@dronecode.org.uk>
-
-	PR ld/20193
-	* peXXigen.c (rsrc_process_section): Do not shrink the merged
-	.rsrc section.
-
-2016-11-24  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20737
-	* elf32-arm.c (elf32_arm_final_link_relocate): Bind defined symbol
-	locally in PIE.
-
-2016-11-24  Kuan-Lin Chen  <kuanlinchentw@gmail.com>
-
-	* bfd/elfxx-riscv.c (howto_table): Fix bitsize of R_RISCV_ADD8.
-
-2016-11-23  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20815
-	* elf.c (elf_modify_segment_map): Allow empty LOAD segments if
-	they contain the program headers.
-	(_bfd_elf_map_sections_to_segments): If the linker created the
-	PHDR segment then always attempt to include it in a LOAD segment.
-	(assign_file_positions_for_non_load_sections): Allow LOAD segments
-	to overlap PHDR segments.
-	(phdr_sorter): New function.  Sorts program headers.
-	(assign_file_positions_except_relocs): Sort the program headers
-	before writing them out.  Issue an error if the PHDR segment is
-	not covered by a LOAD segment, unless the backend allows it.
-	* elf-bfd.h (struct elf_backend_data): Add
-	elf_backend_allow_non_load_phdr.
-	* elfxx-target.h (elf_backend_allow_non_load_phdr): Provide
-	default definition that returns FALSE.
-	(elfNN_bed): Initialise the elf_backend_allow_non_load_phdr
-	field.
-	* elf64-hppa.c (elf64_hppa_allow_non_load_phdr): New function.
-	Returns TRUE.
-	(elf_backend_allow_non_load_phdr): Define.
-	* elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Do not
-	place the interpreter string into the .interp section if the
-	nointerp flag is set in the link info structure.
-	* elf32-arc.c (elf_arc_size_dynamic_sections): Likewise.
-	* elf32-score7.c (score_elf_final_link_relocate): Allow for the
-	_gp symbol not being part of the output.
-
-2016-11-23  Alan Modra  <amodra@gmail.com>
-
-	* elf-bfd.h (struct elf_backend_data): Add dtrel_excludes_plt.
-	* elfxx-target.h (elf_backend_dtrel_excludes_plt): Define.
-	(elfNN_bed): Init new field.
-	* elflink.c (bfd_elf_final_link): Add and use htab variable.  Handle
-	dtrel_excludes_plt.
-	* elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Delete
-	DT_RELASZ code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-arc.c (elf_arc_finish_dynamic_sections): Delete DT_RELASZ code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-arm.c (elf32_arm_finish_dynamic_sections): Delete code
-	subtracting off plt relocs from DT_RELSZ, DT_RELASZ.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Delete
-	DT_RELASZ code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-cris.c (elf_cris_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-hppa.c (elf32_hppa_finish_dynamic_sections): Delete DT_RELASZ
-	and DT_RELA code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-i386.c (elf_i386_finish_dynamic_sections): Delete DT_RELSZ
-	and DT_REL code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-m32r.c (m32r_elf_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-m68k.c (elf_m68k_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-metag.c (elf_metag_finish_dynamic_sections): Delete DT_RELASZ
-	and DT_RELA code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Delete
-	DT_RELASZ and DT_RELA code.  Use ELF htab shortcuts for other
-	dynamic sections.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-mips.c (elf_backend_dtrel_excludes_plt): Define.
-	* elf32-nds32.c (nds32_elf_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-or1k.c (or1k_elf_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-ppc.c (ppc_elf_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-sh.c (sh_elf_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-sparc.c (elf_backend_dtrel_excludes_plt): Define.
-	* elf32-vax.c (elf_vax_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf64-ppc.c (ppc64_elf_finish_dynamic_sections): Delete DT_RELASZ
-	and DT_RELA code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Delete
-	DT_RELASZ code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elfnn-ia64.c (elfNN_ia64_finish_dynamic_sections): Delete DT_RELASZ
-	code.
-	(elf_backend_dtrel_excludes_plt): Define.
-	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Delete
-	DT_RELASZ code.
-	* elfxx-sparc.c (sparc_finish_dyn): Delete DT_RELASZ code.
-
-2016-11-23  Alan Modra  <amodra@gmail.com>
-
-	* elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts
-	to dynamic sections.
-	(mn10300_elf_final_link_relocate): Likewise.
-	(_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise.
-	(_bfd_mn10300_elf_size_dynamic_sections): Likewise.
-	(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
-	(_bfd_mn10300_elf_finish_dynamic_sections): Likewise.
-	* elf32-bfin.c (bfin_check_relocs): Likewise.
-	(bfin_relocate_section): Likewise.
-	(bfin_gc_sweep_hook): Likewise.
-	(struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt
-	and spltrel.
-	(bfinfdpic_got_section, bfinfdpic_gotrel_section,
-	bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf
-	shortcut sections.
-	(_bfin_create_got_section): Use elf htab shortcuts to dyn sections.
-	Delete dead code.
-	(bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections.
-	(bfin_size_dynamic_sections): Likewise.
-	* elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise.
-	(cr16_elf_check_relocs): Likewise.
-	(cr16_elf_final_link_relocate): Likewise.
-	(_bfd_cr16_elf_create_dynamic_sections): Likewise.
-	(_bfd_cr16_elf_adjust_dynamic_symbol): Likewise.
-	(_bfd_cr16_elf_size_dynamic_sections): Likewise.
-	(_bfd_cr16_elf_finish_dynamic_symbol): Likewise.
-	(_bfd_cr16_elf_finish_dynamic_sections): Likewise.
-	* elf32-cris.c (cris_elf_relocate_section): Likewise.
-	(elf_cris_finish_dynamic_symbol): Likewise.
-	(elf_cris_finish_dynamic_sections): Likewise.
-	(cris_elf_gc_sweep_hook): Likewise.
-	(elf_cris_adjust_gotplt_to_got): Likewise.
-	(elf_cris_adjust_dynamic_symbol): Likewise.
-	(cris_elf_check_relocs): Likewise.  Delete dead code.
-	(elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic
-	sections.
-	(elf_cris_discard_excess_program_dynamics): Likewise.
-	* elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot,
-	sgotrel, splt and spltrel.
-	(frvfdpic_got_section, frvfdpic_gotrel_section,
-	frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf
-	shortcut sections.
-	(_frv_create_got_section): Likewise.
-	* elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot,
-	srelgot, splt and srelplt.
-	(hppa_build_one_stub): Use elf htab shortcuts to dynamic sections.
-	(elf32_hppa_create_dynamic_sections): Likewise.
-	(elf32_hppa_check_relocs): Likewise.
-	(allocate_plt_static): Likewise.
-	(allocate_dynrelocs): Likewise.
-	(elf32_hppa_size_dynamic_sections): Likewise.
-	(elf32_hppa_relocate_section): Likewise.
-	(elf32_hppa_finish_dynamic_symbol): Likewise.
-	(elf32_hppa_finish_dynamic_sections): Likewise.
-	* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
-	* elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot,
-	sgotplt, srelgot, splt and srelplt.
-	(lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf
-	shortcut sections.
-	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
-	(lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections.
-	(lm32_elf_check_relocs): Likewise.
-	(lm32_elf_finish_dynamic_sections): Likewise.
-	(lm32_elf_finish_dynamic_symbol): Likewise.
-	(allocate_dynrelocs): Likewise.
-	(lm32_elf_size_dynamic_sections): Likewise.
-	(lm32_elf_create_dynamic_sections): Likewise.
-	* elf32-m32c.c (m32c_elf_relocate_section): Likewise.
-	(m32c_elf_check_relocs): Likewise.
-	(m32c_elf_finish_dynamic_sections): Likewise.
-	(m32c_elf_always_size_sections): Likewise.
-	* elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot,
-	sgotplt, srelgot, splt and srelplt.
-	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
-	(m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
-	sections.
-	(allocate_dynrelocs): Likewise.
-	(m32r_elf_size_dynamic_sections): Likewise.
-	(m32r_elf_relocate_section): Likewise.
-	(m32r_elf_finish_dynamic_symbol): Likewise.
-	(m32r_elf_finish_dynamic_sections): Likewise.
-	(m32r_elf_check_relocs): Likewise.
-	* elf32-m68k.c (elf_m68k_partition_multi_got): Likewise.
-	(elf_m68k_check_relocs): Likewise.
-	(elf_m68k_adjust_dynamic_symbol): Likewise.
-	(elf_m68k_size_dynamic_sections): Likewise.
-	(elf_m68k_relocate_section): Likewise.
-	(elf_m68k_finish_dynamic_symbol): Likewise.
-	(elf_m68k_finish_dynamic_sections): Likewise.
-	* elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot,
-	sgotplt, srelgot, splt and srelplt.
-	(elf_metag_relocate_section): Use elf htab shortcuts to dynamic
-	sections.
-	(elf_metag_create_dynamic_sections): Likewise.  Allocate got header
-	here in .got.
-	(elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections.
-	(allocate_dynrelocs): Likewise.
-	(elf_metag_size_dynamic_sections): Likewise.
-	(elf_metag_finish_dynamic_symbol): Likewise.
-	(elf_metag_finish_dynamic_sections): Likewise.
-	(elf_metag_size_stubs): Likewise.
-	(elf_backend_got_header_size): Don't define.
-	(elf_backend_want_got_plt): Define.
-	* elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot,
-	sgotplt, srelgot, splt and srelpl.
-	(microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic
-	sections.
-	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
-	(microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections.
-	(microblaze_elf_create_dynamic_sections): Likewise.
-	(allocate_dynrelocs): Likewise.
-	(microblaze_elf_size_dynamic_sections): Likewise.
-	(microblaze_elf_finish_dynamic_symbol): Likewise.
-	(microblaze_elf_finish_dynamic_sections): Likewise.
-	* elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL
-	already zero fields.
-	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
-	(nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
-	sections.
-	(allocate_dynrelocs): Likewise.
-	(nds32_elf_size_dynamic_sections): Likewise.
-	(nds32_elf_relocate_section): Likewise.
-	(nds32_elf_finish_dynamic_symbol): Likewise.
-	(nds32_elf_finish_dynamic_sections): Likewise.
-	(nds32_elf_check_relocs): Likewise.
-	(calculate_plt_memory_address): Likewise.
-	(calculate_got_memory_address): Likewise.
-	* elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot,
-	sgotplt, srelgot, splt and srelplt.
-	* elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise.
-	(or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections.
-	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
-	(or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections.
-	(or1k_elf_finish_dynamic_sections): Likewise.
-	(or1k_elf_finish_dynamic_symbol): Likewise.
-	(allocate_dynrelocs): Likewise.
-	(or1k_elf_size_dynamic_sections): Likewise.
-	(or1k_elf_create_dynamic_sections): Likewise.
-	* elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot,
-	plt, relplt, iplt, reliplt and sgotplt.
-	(ppc_elf_create_got): Use elf htab shortcuts to dynamic sections.
-	(ppc_elf_create_glink): Likewise.
-	(ppc_elf_create_dynamic_sections): Likewise.
-	(ppc_elf_check_relocs): Likewise.
-	(ppc_elf_select_plt_layout): Likewise.
-	(ppc_elf_tls_setup): Likewise.
-	(allocate_got): Likewise.
-	(allocate_dynrelocs): Likewise.
-	(ppc_elf_size_dynamic_sections): Likewise.
-	(ppc_elf_relax_section): Likewise.
-	(ppc_elf_relocate_section): Likewise.
-	(ppc_elf_finish_dynamic_symbol): Likewise.
-	(ppc_elf_reloc_type_class): Likewise.
-	(ppc_elf_finish_dynamic_sections): Likewise.
-	* elf32-rl78.c (rl78_elf_relocate_section): Likewise.
-	(rl78_elf_check_relocs): Likewise.
-	(rl78_elf_finish_dynamic_sections): Likewise.
-	(rl78_elf_always_size_sections): Likewise.
-	* elf32-s390.c 	(create_got_section): Delete.
-	(elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section.
-	(elf_s390_check_relocs): Likewise.
-	* elf32-score.c (score_elf_create_got_section): Set elf shortcuts.
-	(s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts.
-	* elf32-score7.c (score_elf_create_got_section): As above.
-	(s7_bfd_score_elf_finish_dynamic_sections): As above.
-	* elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot,
-	sgotplt, srelgot, splt and srelplt.
-	(create_got_section): Don't set them.
-	(sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
-	sections.
-	(allocate_dynrelocs): Likewise.
-	(sh_elf_size_dynamic_sections): Likewise.
-	(sh_elf_add_rofixup): Likewise.
-	(sh_elf_relocate_section): Likewise.
-	(sh_elf_check_relocs): Likewise.
-	(sh_elf_finish_dynamic_symbol): Likewise.
-	(sh_elf_finish_dynamic_sections): Likewise.
-	* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise.
-	* elf32-tilepro.c (tilepro_elf_create_got_section): Likewise.
-	* elf32-vax.c (elf_vax_check_relocs): Likewise.
-	(elf_vax_adjust_dynamic_symbol): Likewise.
-	(elf_vax_always_size_sections): Likewise.
-	(elf_vax_instantiate_got_entries): Likewise.
-	(elf_vax_relocate_section): Likewise.
-	(elf_vax_finish_dynamic_symbol): Likewise.
-	(elf_vax_finish_dynamic_sections): Likewise.
-	* elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise.
-	(xstormy16_elf_always_size_sections): Likewise.
-	(xstormy16_elf_relocate_section): Likewise.
-	(xstormy16_elf_finish_dynamic_sections): Likewise.
-	* elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot,
-	sgotplt, srelgot, splt and srelplt.
-	(elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to
-	dynamic sections.
-	(elf_xtensa_allocate_dynrelocs): Likewise.
-	(elf_xtensa_allocate_local_got_size): Likewise.
-	(elf_xtensa_size_dynamic_sections): Likewise.
-	(elf_xtensa_relocate_section): Likewise.
-	(elf_xtensa_finish_dynamic_sections): Likewise.
-	(shrink_dynamic_reloc_sections): Likewise.
-	(elf_xtensa_get_plt_section): Likewise.
-	(elf_xtensa_get_gotplt_section): Likewise.
-	(xtensa_callback_required_dependence): Likewise.
-	* elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab
-	shortcuts to dynamic sections.
-	(elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to
-	dynamic sections.
-	(elf64_alpha_size_plt_section): Likewise.
-	(elf64_alpha_size_rela_got_1): Likewise.
-	(elf64_alpha_size_rela_got_section): Likewise.
-	(elf64_alpha_relocate_section): Likewise.
-	(elf64_alpha_finish_dynamic_symbol): Likewise.
-	(elf64_alpha_finish_dynamic_sections): Likewise.
-	* elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise.
-	* elf64-s390.c (create_got_section): Delete.
-	(elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section.
-	(elf_s390_check_relocs): Likewise.
-	* elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to
-	dynamic sections.
-	(sh_elf64_check_relocs): Likewise.
-	(sh64_elf64_adjust_dynamic_symbol): Likewise.
-	(sh64_elf64_size_dynamic_sections): Likewise.
-	(sh64_elf64_finish_dynamic_symbol): Likewise.
-	(sh64_elf64_finish_dynamic_sections): Likewise.
-	* elflink.c (_bfd_elf_create_got_section): Likewise.
-	* elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise.
-	* elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise.
-	(elfNN_ia64_finish_dynamic_sections): Likewise.
-	* elfnn-riscv.c (riscv_elf_create_got_section): Likewise.
-	* elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt,
-	sgotplt, splt and sgot.
-	(mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic
-	sections.
-	(mips_elf_gotplt_index): Likewise.
-	(mips_elf_primary_global_got_index): Likewise.
-	(mips_elf_global_got_index): Likewise.
-	(mips_elf_got_offset_from_index): Likewise.
-	(mips_elf_create_local_got_entry): Likewise.
-	(mips_elf_create_got_section): Likewise.
-	(mips_elf_calculate_relocation): Likewise.
-	(_bfd_mips_elf_create_dynamic_sections): Likewise.
-	(_bfd_mips_elf_adjust_dynamic_symbol): Likewise.
-	(mips_elf_lay_out_got): Likewise.
-	(mips_elf_set_plt_sym_value): Likewise.
-	(_bfd_mips_elf_size_dynamic_sections): Likewise.
-	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
-	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
-	(mips_finish_exec_plt): Likewise.
-	(mips_vxworks_finish_exec_plt): Likewise.
-	(mips_vxworks_finish_shared_plt): Likewise.
-	(_bfd_mips_elf_finish_dynamic_sections): Likewise.
-	* elfxx-sparc.c (sparc_finish_dyn): Likewise.
-	* elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
-
-2016-11-23  Alan Modra  <amodra@gmail.com>
-
-	* po/BLD-POTFILES.in: Regenerate.
-	* po/SRC-POTFILES.in: Regenerate.
-
-2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-        * warning.m4: Fix spelling in comments.
-        * configure.ac: Fix spelling in comments.
-        * configure: Regenerate.
-
-2016-11-22  Alan Modra  <amodra@gmail.com>
-
-	PR 20744
-	* elf32-ppc.h (struct ppc_elf_params): Add vle_reloc_fixup field.
-	* elf32-ppc.c: Include opcode/ppc.h.
-	(ppc_elf_howto_raw): Correct dst_mask for R_PPC_VLE_LO16A,
-	R_PPC_VLE_LO16D, R_PPC_VLE_HI16A, R_PPC_VLE_HI16D, R_PPC_VLE_HA16A,
-	R_PPC_VLE_HA16D, R_PPC_VLE_SDAREL_LO16A, R_PPC_VLE_SDAREL_LO16D,
-	R_PPC_VLE_SDAREL_HI16A, R_PPC_VLE_SDAREL_HI16D,
-	R_PPC_VLE_SDAREL_HA16A, and R_PPC_VLE_SDAREL_HA16D relocs.
-	(ppc_elf_link_hash_table_create): Update default_params init.
-	(ppc_elf_vle_split16): Correct shift and mask.  Add params.
-	Report or fix insn/reloc mismatches.
-	(ppc_elf_relocate_section): Pass input_section, offset and fixup
-	to ppc_elf_vle_split16.
-
-2016-11-22  Alan Modra  <amodra@gmail.com>
-
-	* elf32-ppc.c (ppc64_elf_relocate_section): Calculate d_offset for
-	input_bfd.  Replace occurrences of output_bfd as bfd_get_32 and
-	bfd_put_32 param with input_bfd.
-	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.  Also
-	ppc_elf_vle_split16 param.
-	(ppc_elf_vle_split16): Rename output_bfd param to input_bfd.
-
-2016-11-21  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* dwarf2.c (build_line_info_table): Rename `index' local
-	variable to `line_index'.
-	(build_lookup_funcinfo_table): Rename `index' local variable to
-	`func_index'.
-
-2016-11-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Do not
-	apply the negative GOT offset optimization in 64-bit code.
-
-2016-11-18  James Clarke  <jrtc27@jrtc27.com>
-
-	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
-	R_SPARC_GOTDATA_OP_HIX22 and R_SPARC_GOTDATA_OP_LOX10 to
-	R_SPARC_GOT* for non-local references. Instead, treat them like
-	R_SPARC_GOTDATA_HIX22/R_SPARC_GOTDATA_LOX10 when filling in the
-	immediate with the calculated relocation.
-
-2016-11-18  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20675
-	* elf32-metag.c (elf_metag_relocate_section): Replace abort with
-	an informative error message.
-
-2016-11-15  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20789
-	* bfd/elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Do signed
-	manipulation of diff value, and don't assume sym2 is less than sym1.
-	(elf32_avr_adjust_reloc_if_spans_insn): New function.
-	(elf32_avr_relax_delete_bytes): Use elf32_avr_adjust_diff_reloc_value,
-	and remove redundant did_pad.
-
-
-2016-11-14  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20800
-	* elf64-x86-64.c (elf_x86_64_relocate_section): Also check
-	plt_got.offset for R_X86_64_PLTOFF64.
-
-2016-11-14  Nick Clifton  <nickc@redhat.com>
-
-	* coffcode.h (coff_slurp_symbol_table): Fix typo: Faal -> Fall.
-
-2016-11-11  Luke Allardyce  <lukeallardyce@gmail.com>
-
-	PR ld/20722
-	* coffcode.h (coff_slurp_symbol_table): Accept C_HIDDEN symbols,
-	but treat them as debugging symbols.
-
-2016-11-10  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20737
-	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Bind defined
-	symbol locally in PIE.
-
-2016-11-10  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20801
-	* compress.c (bfd_get_full_section_contents): Provide a more
-	helpful error message when a section is too large to load.
-
-2016-11-08  Pedro Alves  <palves@redhat.com>
-
-	* dwarf2.c (struct funcinfo) <is_linkage>: Type is bfd_boolean,
-	not "bfd boolean".
-
-2016-11-08  Igor Tsimbalist  <tigor.tools@gmail.com>
-
-	* dwarf2.c (comp_unit): Add new fields 'lookup_funcinfo_table' and
-	'number_of_functions' to keep lookup table and number of entries in
-	the table.
-	(line_sequence): Add new fields 'line_info_lookup' and 'num_lines'
-	to keep lookup table and number of entries in the table.
-	(lookup_funcinfo): New structure for lookup table for function
-	references.
-	(build_line_info_table): New function to create and build the lookup
-	table for line information.
-	(lookup_address_in_line_info_table): Use the lookup table instead of
-	traverse a linked list.
-	(compare_lookup_funcinfos): New compare fuction used in sorting of
-	lookup table for function references.
-	(build_lookup_funcinfo_table): New function to create, build and
-	sort the lookup table for functions references.
-	(lookup_address_in_function_table): Use the table instead of
-	traverse a linked list.
-	(_bfd_dwarf2_cleanup_debug_info): Free memory from function references
-	lookup table.
-
-2016-11-04  Nick Clifton  <nickc@redhat.com>
-
-	* targets.c (bfd_target_vector): Only add riscv_elf32_vec target
-	when supporting 64-bit BFD targets.
-
-2016-11-03  Tristan Gingold  <gingold@adacore.com>
-
-	* config.bfd: Deprecate many old triplets.
-
-2016-11-03  Nick Clifton  <nickc@redhat.com>
-
-	* po/da.po: Updated Danish translation.
-
-2016-11-01  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* reloc.c (bfd_default_reloc_type_lookup) <BFD_RELOC_CTOR>: Do
-	not fall through to the default case.
-
-2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
-	    Andrew Waterman <andrew@sifive.com>
-
-	Add support for RISC-V architecture.
-	* Makefile.am: Add entries for riscv32-elf and riscv64-elf.
-	* config.bdf: Likewise.
-	* configure.ac: Likewise.
-	* Makefile.in: Regenerate.
-	* configure: Regenerate.
-	* archures.c: Add bfd_riscv_arch.
-	* reloc.c: Add riscv relocs.
-	* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Regenerate.
-	* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
-	* elfnn-riscv.c: New file.
-	* elfxx-riscv.c: New file.
-	* elfxx-riscv.h: New file.
-
-2016-10-31  Alan Modra  <amodra@gmail.com>
-
-	PR 20748
-	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Revert
-	2016-05-13 change.
-
-2016-10-27  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* cpu-arc.c (arc_get_mach): Delete.
-
-2016-10-25  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (STUB_JALR): Correct description.
-
-2016-10-20  Nick Clifton  <nickc@redhat.com>
-
-	* po/gas.pot: Regenerate.
-
-2016-10-19  Nick Clifton  <nickc@redhat.com>
-
-	* aout-adobe.c: Add missing c-format tags for translatable strings.
-	* aout-cris.c: Likewise.
-	* aoutx.h: Likewise.
-	* bfd.c: Likewise.
-	* binary.c: Likewise.
-	* cache.c: Likewise.
-	* coff-alpha.c: Likewise.
-	* coff-arm.c: Likewise.
-	* coff-i860.c: Likewise.
-	* coff-mcore.c: Likewise.
-	* coff-ppc.c: Likewise.
-	* coff-rs6000.c: Likewise.
-	* coff-sh.c: Likewise.
-	* coff-tic4x.c: Likewise.
-	* coff-tic54x.c: Likewise.
-	* coff-tic80.c: Likewise.
-	* coff64-rs6000.c: Likewise.
-	* coffcode.h: Likewise.
-	* coffgen.c: Likewise.
-	* cofflink.c: Likewise.
-	* coffswap.h: Likewise.
-	* cpu-arm.c: Likewise.
-	* dwarf2.c: Likewise.
-	* ecoff.c: Likewise.
-	* elf-attrs.c: Likewise.
-	* elf-eh-frame.c: Likewise.
-	* elf-ifunc.c: Likewise.
-	* elf-m10300.c: Likewise.
-	* elf-s390-common.c: Likewise.
-	* elf.c: Likewise.
-	* elf32-arc.c: Likewise.
-	* elf32-arm.c: Likewise.
-	* elf32-avr.c: Likewise.
-	* elf32-bfin.c: Likewise.
-	* elf32-cr16.c: Likewise.
-	* elf32-cr16c.c: Likewise.
-	* elf32-cris.c: Likewise.
-	* elf32-crx.c: Likewise.
-	* elf32-d10v.c: Likewise.
-	* elf32-d30v.c: Likewise.
-	* elf32-epiphany.c: Likewise.
-	* elf32-fr30.c: Likewise.
-	* elf32-frv.c: Likewise.
-	* elf32-gen.c: Likewise.
-	* elf32-hppa.c: Likewise.
-	* elf32-i370.c: Likewise.
-	* elf32-i386.c: Likewise.
-	* elf32-i960.c: Likewise.
-	* elf32-ip2k.c: Likewise.
-	* elf32-iq2000.c: Likewise.
-	* elf32-lm32.c: Likewise.
-	* elf32-m32c.c: Likewise.
-	* elf32-m32r.c: Likewise.
-	* elf32-m68hc11.c: Likewise.
-	* elf32-m68hc12.c: Likewise.
-	* elf32-m68hc1x.c: Likewise.
-	* elf32-m68k.c: Likewise.
-	* elf32-mcore.c: Likewise.
-	* elf32-mep.c: Likewise.
-	* elf32-metag.c: Likewise.
-	* elf32-microblaze.c: Likewise.
-	* elf32-moxie.c: Likewise.
-	* elf32-msp430.c: Likewise.
-	* elf32-mt.c: Likewise.
-	* elf32-nds32.c: Likewise.
-	* elf32-nios2.c: Likewise.
-	* elf32-or1k.c: Likewise.
-	* elf32-pj.c: Likewise.
-	* elf32-ppc.c: Likewise.
-	* elf32-rl78.c: Likewise.
-	* elf32-rx.c: Likewise.
-	* elf32-s390.c: Likewise.
-	* elf32-score.c: Likewise.
-	* elf32-score7.c: Likewise.
-	* elf32-sh-symbian.c: Likewise.
-	* elf32-sh.c: Likewise.
-	* elf32-sh64.c: Likewise.
-	* elf32-spu.c: Likewise.
-	* elf32-tic6x.c: Likewise.
-	* elf32-tilepro.c: Likewise.
-	* elf32-v850.c: Likewise.
-	* elf32-vax.c: Likewise.
-	* elf32-visium.c: Likewise.
-	* elf32-xgate.c: Likewise.
-	* elf32-xtensa.c: Likewise.
-	* elf64-alpha.c: Likewise.
-	* elf64-gen.c: Likewise.
-	* elf64-hppa.c: Likewise.
-	* elf64-ia64-vms.c: Likewise.
-	* elf64-mmix.c: Likewise.
-	* elf64-ppc.c: Likewise.
-	* elf64-s390.c: Likewise.
-	* elf64-sh64.c: Likewise.
-	* elf64-sparc.c: Likewise.
-	* elf64-x86-64.c: Likewise.
-	* elfcode.h: Likewise.
-	* elfcore.h: Likewise.
-	* elflink.c: Likewise.
-	* elfnn-aarch64.c: Likewise.
-	* elfnn-ia64.c: Likewise.
-	* elfxx-mips.c: Likewise.
-	* elfxx-sparc.c: Likewise.
-	* elfxx-tilegx.c: Likewise.
-	* ieee.c: Likewise.
-	* ihex.c: Likewise.
-	* libbfd.c: Likewise.
-	* linker.c: Likewise.
-	* m68klinux.c: Likewise.
-	* mach-o.c: Likewise.
-	* merge.c: Likewise.
-	* mmo.c: Likewise.
-	* oasys.c: Likewise.
-	* pdp11.c: Likewise.
-	* pe-mips.c: Likewise.
-	* peXXigen.c: Likewise.
-	* pei-x86_64.c: Likewise.
-	* peicode.h: Likewise.
-	* ppcboot.c: Likewise.
-	* reloc.c: Likewise.
-	* sparclinux.c: Likewise.
-	* srec.c: Likewise.
-	* stabs.c: Likewise.
-	* vms-alpha.c: Likewise.
-	* vms-lib.c: Likewise.
-	* xcofflink.c: Likewise.
-
-2016-10-18  Nick Clifton  <nickc@redhat.com>
-
-	* po/da.po: Updated Danish translation.
-
-2016-10-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf32-nds32.c (nds32_elf_check_relocs): Avoid aliasing warning
-	from GCC.
-
-2016-10-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf32-arm.c (elf32_arm_update_relocs): Rename `index' local
-	variable to `reloc_index'.
-
-2016-10-12  Alan Modra  <amodra@gmail.com>
-
-	* section.c (BFD_FAKE_SECTION): Reorder parameters.  Formatting.
-	(STD_SECTION): Adjust to suit.
-	* elf.c (_bfd_elf_large_com_section): Likewise.
-	* bfd-in2.h: Regenerate.
-
-2016-10-11  Alan Modra  <amodra@gmail.com>
-
-	* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Handle symbols
-	defined temporarily with bfd_und_section.
-	* elflink.c (_bfd_elf_gc_keep): Don't set SEC_KEEP for bfd_und_section.
-	* elfxx-mips.c (mips_elf_local_pic_function_p): Exclude defined
-	symbols with bfd_und_section.
-
-2016-10-07  Alan Modra  <amodra@gmail.com>
-
-	* targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace
-	obfd param with struct bfd_link_info param.  Update all callers.
-	* linker.c (bfd_merge_private_bfd_data): Likewise.
-	(_bfd_generic_verify_endian_match): Likewise.
-	* aoutf1.h (sunos_merge_private_bfd_data): Likewise.
-	* coff-arm.c (coff_arm_merge_private_bfd_data): Likewise.
-	* elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise.
-	* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise.
-	(_bfd_elf_merge_object_attributes): Likewise.
-	* elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise.
-	* elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise.
-	* elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise.
-	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise.
-	(elf32_arm_merge_private_bfd_data): Likewise.
-	* elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise.
-	* elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise.
-	* elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise.
-	* elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise.
-	* elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise.
-	* elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise.
-	* elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise.
-	* elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise.
-	* elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise.
-	* elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
-	* elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
-	* elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise.
-	* elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise.
-	* elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise.
-	* elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise.
-	(elf32_msp430_merge_private_bfd_data): Likewise.
-	* elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise.
-	* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise.
-	* elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise.
-	* elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise.
-	* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise.
-	(ppc_elf_merge_obj_attributes): Likewise.
-	(ppc_elf_merge_private_bfd_data): Likewise.
-	* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise.
-	* elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise.
-	* elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise.
-	* elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise.
-	(elf32_score_merge_private_bfd_data): Likewise.
-	* elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise.
-	* elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise.
-	* elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise.
-	* elf32-sh64.c (sh64_elf_merge_private_data): Likewise.
-	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise.
-	* elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise.
-	(elf32_tic6x_merge_private_bfd_data): Likewise.
-	* elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise.
-	* elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise.
-	* elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise.
-	* elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise.
-	* elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise.
-	* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise.
-	* elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise.
-	* elf64-sh64.c (sh_elf64_merge_private_data): Likewise.
-	* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
-	* elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise.
-	* elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise.
-	* elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise.
-	(mips_elf_merge_obj_attributes): Likewise.
-	(_bfd_mips_elf_merge_private_bfd_data): Likewise.
-	* elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise.
-	* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
-	* elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
-	* elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise.
-	* elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
-	* elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
-	* libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Regenerate.
-
-2016-10-07  Alan Modra  <amodra@gmail.com>
-
-	* Makefile.am (LIBBFD_H_FILES): Update.
-	* doc/Makefile.am (LIBBFD_H_DEP): Likewise.
-	* cpu-sh.c (sh_merge_bfd_arch): Move to..
-	* elf32-sh.c: ..here, and make static.
-	* elf32-arc.c (arc_elf_merge_private_bfd_data): Delete extraneous
-	error.
-	* elf32-cris.c (cris_elf_merge_private_bfd_data): Don't call
-	_bfd_generic_verify_endian_match.
-	* elf32-microblaze.c (microblaze_elf_merge_private_bfd_data): Delete.
-	(bfd_elf32_bfd_merge_private_bfd_data): Define as
-	_bfd_generic_verify_endian_match.
-	* elf32-mt.c (mt_elf_merge_private_bfd_data): Don't test
-	boolean == FALSE.
-	* elf32-xgate.c (_bfd_xgate_elf_merge_private_bfd_data): Delete.
-	(bfd_elf32_bfd_merge_private_bfd_data): Don't define.
-	* elf32-xgate.h (_bfd_xgate_elf_merge_private_bfd_data): Delete.
-	* libbfd-in.h (_bfd_generic_verify_endian_match): Delete.
-	* libbfd.c (_bfd_generic_verify_endian_match): Move to..
-	* linker.c: ..here, and make internal.
-	* bfd.c (bfd_merge_private_bfd_data): Move to..
-	* linker.c: ..here.
-	* Makefile.in: Regenerate.
-	* doc/Makefile.in: Regenerate.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Regenerate.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* coff-h8300.c: Spell fall through comments consistently.
-	* coffgen.c: Likewise.
-	* elf32-hppa.c: Likewise.
-	* elf32-ppc.c: Likewise.
-	* elf32-score.c: Likewise.
-	* elf32-score7.c: Likewise.
-	* elf64-ppc.c: Likewise.
-	* elfxx-aarch64.c: Likewise.
-	* elfxx-mips.c: Likewise.
-	* cpu-ns32k.c: Add missing fall through comments.
-	* elf-m10300.c: Likewise.
-	* elf32-arm.c: Likewise.
-	* elf32-avr.c: Likewise.
-	* elf32-bfin.c: Likewise.
-	* elf32-frv.c: Likewise.
-	* elf32-i386.c: Likewise.
-	* elf32-microblaze.c: Likewise.
-	* elf32-nds32.c: Likewise.
-	* elf32-ppc.c: Likewise.
-	* elf32-rl78.c: Likewise.
-	* elf32-rx.c: Likewise.
-	* elf32-s390.c: Likewise.
-	* elf32-sh.c: Likewise.
-	* elf32-tic6x.c: Likewise.
-	* elf64-ia64-vms.c: Likewise.
-	* elf64-ppc.c: Likewise.
-	* elf64-s390.c: Likewise.
-	* elf64-x86-64.c: Likewise.
-	* elflink.c: Likewise.
-	* elfnn-aarch64.c: Likewise.
-	* elfnn-ia64.c: Likewise.
-	* ieee.c: Likewise.
-	* oasys.c: Likewise.
-	* pdp11.c: Likewise.
-	* srec.c: Likewise.
-	* versados.c: Likewise.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* coffcode.h (coff_slurp_symbol_table): Revert accidental commit
-	made 2015-01-08.
-	* elf32-nds32.c (nds32_elf_grok_psinfo): Add missing break.
-	* reloc.c (bfd_default_reloc_type_lookup): Add missing breaks.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* elf32-epiphany.c (epiphany_final_link_relocate): Use bitwise
-	OR in arithmetic expression, not boolean OR.
-
-2016-09-30  Alan Modra  <amodra@gmail.com>
-
-	* Makefile.am (BFD_H_FILES): Add linker.c and simple.c.  Sort
-	as per comment at head of bfd-in2.h.
-	* Makefile.in: Regenerate.
-
-2016-09-30  Alan Modra  <amodra@gmail.com>
-
-	* aout-adobe.c: Replace (*_bfd_error_handler) (...) with
-	_bfd_error_handler (...) throughout.
-	* aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c,
-	* cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c,
-	* coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c,
-	* coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
-	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
-	* coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c,
-	* ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c,
-	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
-	* elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c,
-	* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c,
-	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c,
-	* elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
-	* elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c,
-	* elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c,
-	* elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c,
-	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c,
-	* elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c,
-	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
-	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
-	* elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c,
-	* elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c,
-	* elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c,
-	* ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c,
-	* mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c,
-	* pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c,
-	* rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c,
-	* stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c,
-	* xcofflink.c: Likewise.
-
-2016-09-30  Alan Modra  <amodra@gmail.com>
-
-	* bfd-in.h: Include stdarg.h.
-	* bfd.c (bfd_error_handler_type): Make like vprintf.
-	(_bfd_error_internal): Rename from _bfd_error_handler.  Make static.
-	(error_handler_internal): New function, split out from..
-	(_bfd_default_error_handler): ..here.  Rename to _bfd_error_handler.
-	(bfd_set_error_handler): Update.
-	(bfd_get_error_handler, bfd_get_assert_handler): Delete.
-	(_bfd_assert_handler): Make static.
-	* coffgen.c (null_error_handler): Update params.
-	* elf-bfd.h (struct elf_backend_data <link_order_error_handler>):
-	Don't use bfd_error_handler_type.
-	* elf64-mmix.c (mmix_dump_bpo_gregs): Likewise.
-	* elfxx-target.h (elf_backend_link_order_error_handler): Default
-	to _bfd_error_handler.
-	* libbfd-in.h (_bfd_default_error_handler): Don't declare.
-	(bfd_assert_handler_type): Likewise.
-	(_bfd_error_handler): Update.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Regenerate.
-
-2016-09-28  Akihiko Odaki  <akihiko.odaki.4i@stu.hosei.ac.jp>
-
-	PR ld/20636
-	* elf-bfd.h (struct elf_backend_data): Delete
-	elf_backend_count_output_relocs callback and add
-	elf_backend_update_relocs.
-	* elf32-arm.c (elf32_arm_count_output_relocs): Deleted.
-	(emit_relocs): Deleted.
-	(elf32_arm_emit_relocs): Deleted.
-	(elf_backend_emit_relocs): Updated not to use the old functions.
-	(elf32_arm_update_relocs): New function.
-	(elf_backend_update_relocs): New define.
-	* elflink.c (bfd_elf_final_link): Add additional_reloc_count to the
-	relocation count. Call elf_backend_emit_relocs.
-	(_bfd_elf_size_reloc_section): Do not call
-	elf_backend_count_output_relocs.
-	* elfxx-target.h (elf_backend_count_output_relocs): Deleted.
-	(elf_backend_update_relocs): New define.
-
-2016-09-28  Christophe Lyon  <christophe.lyon@linaro.org>
-
-	PR ld/20608
-	* elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT
-	Thumb-ARM stub is too far.
-
-2016-09-27  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20634
-	* peXXigen.c (_bfd_XXi_only_swap_filehdr_out): Put 0 in the
-	timestamp field if real time values are not being stored.
-
-2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
-
-	* warning.m4 (AC_EGREP_CPP_FOR_BUILD): Introduce macro
-	to verify CC_FOR_BUILD compiler.
-	(AM_BINUTILS_WARNINGS): Introduce ac_cpp_for_build variable
-	and add CC_FOR_BUILD compiler checks.
-	* Makefile.in: Regenerate.
-	* configure: Likewise.
-	* doc/Makefile.in: Likewise.
-
-2016-09-26  Awson  <kyrab@mail.ru>
-
-	PR ld/17955
-	* coff-x86_64.c (coff_amd64_rtype_to_howto): Use an 8 byte offset
-	for R_AMD64_PCRQUAD relocations.
-
-2016-09-26  Alan Modra  <amodra@gmail.com>
-
-	* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Declare.
-	* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): New function.
-	(ppc_elf_merge_obj_attributes): Use it.  Don't copy first file
-	attributes, merge them.  Don't warn about undefined tag bits,
-	or copy unknown values to output.
-	* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Call
-	_bfd_elf_ppc_merge_fp_attributes.
-
-2016-09-23  Akihiko Odaki  <akihiko.odaki.4i@stu.hosei.ac.jp>
-
-	PR ld/20595
-	* elf-bfd.h (struct elf_backend_data): Add
-	elf_backend_count_output_relocs callback to count relocations in
-	the final output.
-	* elf-arm.c (elf32_arm_add_relocation): Deleted.
-	(elf32_arm_write_section): Move additional relocation to emit_relocs.
-	(elf32_arm_count_output_relocs): New function.
-	(emit_relocs): New function.
-	(elf32_arm_emit_relocs): New function.
-	(elf32_arm_vxworks_emit_relocs): New function.
-	(elf_backend_emit_relocs): Updated to use the new functions.
-	(elf_backend_count_output_relocs): New define.
-	* bfd/elflink.c (bfd_elf_final_link): Do not add additional_reloc_count
-	to the relocation count.
-	(_bfd_elf_link_size_reloc_section): Use callback to count the
-	relocations which will be in output.
-	(_bfd_elf_default_count_output_relocs): New function.
-	* bfd/elfxx-target.h (elf_backend_count_output_relocs): New define.
-
-2016-09-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Allow
-	negative offsets to _GLOBAL_OFFSET_TABLE_ if the .got section is
-	bigger than 0x1000 bytes.
-
-2016-09-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section
-	not already marked.
-
-2016-09-14  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20605
-	* peicode.h (pe_bfd_read_buildid): Check that the Data Directory
-	contains a valid size for the Debug directory.
-
-2016-09-14  Bhushan Attarde  <bhushan.attarde@imgtec.com>
-
-	* format.c (struct bfd_preserve): New "build_id" field.
-	(bfd_preserve_save): Save "build_id".
-	(bfd_preserve_restore): Restore "build_id".
-
-2016-09-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20550
-	* elf64-x86-64.c (elf_x86_64_relocate_section): Resolve size
-	relocation with copy relocation when building executable.
-
-2016-09-02  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20545
-	* elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter
-	delete_shrinks_insn. Modify computation of shrinked_insn_address.
-	Compute shrink_boundary and adjust addend only if
-	addend_within_shrink_boundary.
-	(elf32_avr_relax_section): Modify calls to
-	elf32_avr_relax_delete_bytes to pass extra parameter.
-
-2016-09-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (cmse_entry_fct_p): Store instruction encoding in an
-	array of bytes and use bfd_get_16 to interpret its encoding according
-	to endianness of target.
-
-2016-09-01  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (synthetic_opd): New static var.
-	(compare_symbols): Don't treat symbols in .opd specially for ELFv2.
-	(ppc64_elf_get_synthetic_symtab): Likewise.  Comment.
-
-2016-08-31  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (group_sections): Delete stub14_group_size.  Instead,
-	track max group size with a new "group_size" var that is reduced
-	by a factor of 1024 from the 24-bit branch size whenever a 14-bit
-	branch is seen.
-
-2016-08-31  Alan Modra  <amodra@gmail.com>
-
-	* elf32-ppc.c (ppc_elf_section_processing): Delete.
-	(elf_backend_section_processing): Don't define.
-	(ppc_elf_modify_segment_map): Set p_flags and mark valid.  Don't
-	split on non-exec sections differing in SHF_PPC_VLE.  When
-	splitting segments, mark size invalid.
-
-2016-08-30  Alan Modra  <amodra@gmail.com>
-
-	PR 20531
-	* elf32-ppc.c (_bfd_elf_ppc_set_arch): Add missing "break".
-
-2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/14961
-	PR ld/20515
-	* elf32-i386.c (elf_i386_check_relocs): Issue an error when
-	R_386_PC32 relocation is used to call IFUNC function in PIC
-	object.
-
-2016-08-27  Alan Modra  <amodra@gmail.com>
-
-	PR 20520
-	* elf.c (_bfd_elf_setup_sections): Check that SHT_GROUP sections
-	have corresponding SHF_GROUP sections.
-	(bfd_elf_set_group_contents): Comment.
-
-2016-08-27  Alan Modra  <amodra@gmail.com>
-
-	PR 20519
-	* elf64-ppc.c (pc_dynrelocs): New function.
-	(ppc64_elf_relocate_section): Use it and must_be_dyn_reloc to
-	handle pic dynamic relocs.
-
-2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* bfd-in.h (struct elf32_arm_params): Define.
-	(bfd_elf32_arm_set_target_relocs): Rename into ...
-	(bfd_elf32_arm_set_target_params): This.  Use a struct
-	elf32_arm_params to pass all parameters but the bfd and bfd_link_info.
-	* bfd-in2.h: Regenerate.
-	* elf32-arm.c (bfd_elf32_arm_set_target_relocs): Rename into ...
-	(bfd_elf32_arm_set_target_params): This.  Pass all values via a struct
-	elf32_arm_params rather than as individual parameters.
-
-2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (elf32_arm_get_stub_entry): Assert that we don't access
-	passed the end of htab->stub_group array.
-	(elf32_arm_create_or_find_stub_sec): Likewise.
-	(elf32_arm_create_stub): Likewise.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c (elf_arc_relocate_section): Changed. Set should_relocate
-	to TRUE for GOT and TLS relocs.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synospsys.com>
-
-	* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf-bfd.h: Added ARC_ELF_DATA to enum elf_target_id.
-	* elf32-arc.c (struct elf_arc_link_hash_entry): Added.
-	(struct elf_arc_link_hash_table): Likewise.
-	(elf_arc_link_hash_newfunc): Likewise.
-	(elf_arc_link_hash_table_free): Likewise.
-	(arc_elf_link_hash_table_create): Likewise.
-	(elf_arc_relocate_section): Fixed conditions related to dynamic
-	(elf_arc_check_relocs): Likewise.
-	(arc_elf_create_dynamic_sections): Added
-	(elf_arc_adjust_dynamic_symbol): Changed access to .rela.bss to be done
-	through the hash table.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* arc-got.h (relocate_fix_got_relocs_for_got_info): Fixed addresses in
-	debug comments. Fixed address in .got related to TLS_IE_GOT dynamic
-	relocation.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* reloc.c: Fixed type in ARC_SECTOFF relocations. Added ARC_SDA_12
-	relocation.
-	* bfd-in2.h: Regenerated from the previous changes.
-	* libbfd.h: Regenerated from the previous changes.
-
-2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for
-	the input import library bfd.
-	* bfd-in2.h: Regenerate.
-	* elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd
-	and new_cmse_stub_offset fields.
-	(stub_hash_newfunc): Initialize stub_offset and stub_template_size to
-	-1.
-	(elf32_arm_add_stub): Likewise for stub_offset.
-	(arm_new_stubs_start_offset_ptr): New function.
-	(arm_build_one_stub): Only allocate a stub_offset if it is -1.  Allow
-	empty SG veneers to have zero relocations.
-	(arm_size_one_stub): Only initialize stub size and template
-	information for non empty veneers.  Do not update veneer section size
-	if veneer already has an offset.
-	(elf32_arm_create_stub): Return the stub entry pointer or NULL instead
-	of a boolean indicating success or failure.
-	(cmse_scan): Change stub_changed parameter into an integer pointer
-	parameter cmse_stub_created to count the number of stub created and
-	adapt to change of return value in elf32_arm_create_stub.
-	(cmse_entry_fct_p): New function.
-	(arm_list_new_cmse_stub): Likewise.
-	(set_cmse_veneer_addr_from_implib): Likewise.
-	(elf32_arm_size_stubs): Define cmse_stub_created, pass its address to
-	cmse_scan instead of that of cmse_stub_changed to compute the number
-	of stub created and use it to initialize stub_changed.  Call
-	set_cmse_veneer_addr_from_implib after all cmse_scan.  Adapt to change
-	of return value in elf32_arm_create_stub.  Use
-	arm_stub_section_start_offset () if not NULL to initialize size of
-	secure gateway veneers section.  Initialize stub_offset of Cortex-A8
-	erratum fix to -1.  Use ret to hold return value.
-	(elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not
-	NULL to initialize size of secure gateway veneers section.  Adapt
-	comment to stress the importance of zeroing veneer section content.
-	(bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to
-	initialize eponymous field in struct elf32_arm_link_hash_table.
-
-2016-08-25  Andreas Arnez  <arnez@linux.vnet.ibm.com>
-
-	* elf32-s390.c (stdarg.h): New include.
-	(elf_s390_grok_psinfo): New function.
-	(elf_s390_write_core_note): New function.
-	(elf_backend_grok_psinfo): Declare backend hook.
-	(elf_backend_write_core_note): Likewise.
-	* elf64-s390.c (stdarg.h): New include.
-	(elf_s390_grok_prstatus): New function.
-	(elf_s390_grok_psinfo): New function.
-	(elf_s390_write_core_note): New function.
-	(elf_backend_grok_prstatus): Declare backend hook.
-	(elf_backend_grok_psinfo): Likewise.
-	(elf_backend_write_core_note): Likewise.
-
-2016-08-25  Andreas Arnez  <arnez@linux.vnet.ibm.com>
-
-	* elf32-s390.c (allocate_dynrelocs): Fix indentation.
-	(elf_s390_finish_ifunc_symbol): Likewise.
-	(elf_s390_finish_dynamic_symbol): Likewise.
-	(elf_s390_finish_dynamic_sections): Likewise.
-	(elf_s390_grok_prstatus): Likewise.
-	* elf64-s390.c (elf_s390_hash_table): Fix indentation.
-	(elf_s390_finish_dynamic_symbol): Likewise.
-
-2016-08-24  Anton Kolesov  <Anton.Kolesov@synopsys.com>
-
-	* elf32-arc.c (elf32_arc_grok_prstatus): New function.
-
-2016-08-23  Nick Clifton  <nickc@redhat.com>
-
-	* elf32-arm.c (elf32_arm_count_additional_relocs): Return zero if
-	there is no arm data associated with the section.
-
-2016-08-23  Alan Modra  <amodra@gmail.com>
-
-	PR 20475
-	* elf32-or1k.c (or1k_elf_relocate_section): Offset from
-	_GLOBAL_OFFSET_TABLE_, not start of .got section.
-
-2016-08-22  Nick Clifton  <nickc@redhat.com>
-
-	* doc/chew.c (main): Free the string buffer used to files as they
-	are parsed.
-
-2016-08-22  Alan Modra  <amodra@gmail.com>
-
-	* elf32-ppc.c (ppc_elf_check_relocs): Move error for @local ifunc..
-	(ppc_elf_relocate_section): ..to here.  Comment.  Error on
-	detecting -mbss-plt -fPIC local ifuncs too.
-	(ppc_elf_size_dynamic_sections): Comment on unnecessary glink
-	branch table entries.
-
-2016-08-19  Nick Clifton  <nickc@redhat.com>
-
-	* elf.c (assign_section_numbers): Assign number for the .shstrtab
-	section after the symbol table and string table sections.
-
-2016-08-19  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (struct ppc_link_hash_entry): Add weakref.
-	(ppc64_elf_copy_indirect_symbol): Set weakref.  Don't merge
-	dyn_relocs for weakdefs.
-	(alias_readonly_dynrelocs): New function.
-	(ppc64_elf_adjust_dynamic_symbol): Use alias_readonly_dynrelocs.
-	(ppc64_elf_relocate_section): Simplify condition under which
-	dyn_relocs are emitted.
-
-2016-08-19  Alan Modra  <amodra@gmail.com>
-
-	PR 20472
-	* elf64-ppc.c (ppc64_elf_before_check_relocs): Tweak abiversion test.
-	(readonly_dynrelocs): Comment fix.
-	(global_entry_stub): New function.
-	(ppc64_elf_adjust_dynamic_symbol): Tweak abiversion test.  Match
-	ELFv2 code deciding on dynamic relocs vs. global entry stubs to
-	that in size_global_entry_stubs, handling ifunc too.  Delete dead
-	weak sym code.
-	(allocate_dynrelocs): Ensure dyn_relocs field is cleared when no
-	dyn_relocs are needed.  Correct handling of ifunc dyn_relocs.
-	Tidy ELIMINATE_COPY_RELOCS code, only setting dynindx for
-	undefweak syms.  Expand and correct comments.
-	(size_global_entry_stubs): Ensure symbol is defined.
-	(ppc64_elf_relocate_section): Match condition under which
-	dyn_relocs are emitted to that in allocate_dynrelocs.
-
-2016-08-12  Alan Modra  <amodra@gmail.com>
-
-	* elf-bfd.h (struct elf_link_hash_table): Add local_dynsymcount.
-	* elflink.c (_bfd_elf_link_renumber_dynsyms): Set local_dynsymcount.
-	(bfd_elf_final_link): Set .dynsym sh_info from local_dynsymcount.
-
-2016-08-11  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Don't exit with
-	non_got_ref true in any case where we could have generated dynbss
-	copies but decide not to do so.
-
-2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_add_la25_stub): Clear the ISA bit of
-	the stub address retrieved if associated with a microMIPS
-	function.
-
-2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_create_stub_symbol): For a microMIPS
-	stub also add STO_MICROMIPS annotation.
-
-2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_calculate_relocation): Set the ISA bit
-	in microMIPS LA25 stub references.
-
-2016-08-09  Jiaming Wei  <jmwei@hxgpt.com>
-
-	* elf64-alpha.c (elf64_alpha_copy_indirect_symbol): Fix thinko
-	adjusting the use_count of merged .got entries.
-
-2016-08-08  Nick Clifton  <nickc@redhat.com>
-
-	* doc/chew.c (delete_string): Only free the string buffer if it is
-	there.  Mark the buffer as NULL after freeing.
-	(drop): Free the dropped string.
-	(free_words): New function: Frees the memory allocated to the
-	dictionary.
-	(add_instrinsic): Duplicate the name string, so that it can be
-	freed later on.
-	(compile): Free unused words.
-	(main): Free the dictionary and top level string buffers at the
-	end.
-
-2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add one parameter.
-	* bfd-in2.h: Regenerate.
-	* elf32-arm.c (struct elf32_arm_link_hash_table): Declare new
-	cmse_implib field.
-	(bfd_elf32_arm_set_target_relocs): Add new parameter to initialize
-	cmse_implib field in struct elf32_arm_link_hash_table.
-	(elf32_arm_filter_cmse_symbols): New function.
-	(elf32_arm_filter_implib_symbols): Likewise.
-	(elf_backend_filter_implib_symbols): Define to
-	elf32_arm_filter_implib_symbols.
-
-2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (CMSE_PREFIX): Define macro.
-	(elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence.
-	(cmse_branch_thumb_only): Declare stub.
-	(struct elf32_arm_link_hash_table): Define cmse_stub_sec field.
-	(elf32_arm_get_plt_info): Add globals parameter.  Use it to return
-	FALSE if there is no PLT.
-	(arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature.
-	(elf32_arm_final_link_relocate): Likewise.
-	(elf32_arm_gc_sweep_hook): Likewise.
-	(elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M
-	secure entry functions.
-	(arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only.
-	(arm_dedicated_stub_output_section_required): Change to a switch case
-	and add a case for arm_stub_cmse_branch_thumb_only.
-	(arm_dedicated_stub_output_section_required_alignment): Likewise.
-	(arm_stub_dedicated_output_section_name): Likewise.
-	(arm_stub_dedicated_input_section_ptr): Likewise and remove
-	ATTRIBUTE_UNUSED for htab parameter.
-	(arm_stub_required_alignment): Likewise.
-	(arm_stub_sym_claimed): Likewise.
-	(arm_dedicated_stub_section_padding): Likewise.
-	(cmse_scan): New function.
-	(elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets.
-	Set stub_changed to TRUE if such veneers were created.
-	(elf32_arm_swap_symbol_in): Add detection code for CMSE special
-	symbols.
-
-2016-08-02  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20428
-	* elf64-ppc.c (ppc_get_stub_entry): Don't segfault on NULL group.
-
-2016-08-02  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/17739
-	* elf32-sh.c (sh_elf_gc_sweep_hook): Delete.
-	(elf_backend_sweep_hook): Delete.
-
-2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
-	Kwok Cheung Yeung  <kcy@codesourcery.com>
-
-	* elf32-ppc.c (is_branch_reloc): Recognise VLE branch relocations.
-	(ppc_elf_howto_raw): Fix dst_mask of R_PPC_VLE_REL15.
-	(ppc_elf_vle_split16): Clear field before inserting.
-
-2016-08-01  Nick Clifton  <nickc@redhat.com>
-
-	* po/sv.po: Updated Swedish translation.
-
-2016-07-27  Ozkan Sezer  <sezeroz@gmail.com>
-	    Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20401
-	* coffgen.c (fini_reloc_cookie_rels): Check for the extistence
-	of the coff_section_data before using it.
-
-2016-07-26  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_calculate_relocation): Handle branches
-	in PLT compression selection.
-	(_bfd_mips_elf_check_relocs): Likewise.
-
-2016-07-22  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* arc-got.h (relocate_fix_got_relocs_for_got_info): Handle the
-	case where there's no elf_link_hash_entry while processing
-	GOT_NORMAL got entries.
-
-2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* version.m4 (BFD_VERSION): Set to 2.27.51.
-	* configure: Regenerated.
-
-2016-07-21  Nick Clifton  <nickc@redhat.com>
-
-	* elf.c (_bfd_elf_filter_global_symbols): Skip local symbols.
-	(swap_out_syms): Return an error when not finding ELF output
-	section rather than asserting.
-
-2016-07-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elflink.c (elf_output_implib): Call bfd_set_error on no symbols.
-
-2016-07-20  John Baldwin  <jhb@FreeBSD.org>
-
-	* elf.c (elfcore_grok_freebsd_psinfo): Check for minimum note size
-	and handle pr_pid if present.
-
-2016-07-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20376
-	* elf.c (assign_file_positions_for_load_sections): Also check
-	p_paddr for program header space.
-
-2016-07-20  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_PLTREL32>): Put
-	ppc64_elf_unhandled_reloc for special_function.
-	* elf32-ppc.c (ppc_elf_howto_raw): Similarly for lots of relocs.
-
-2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode
-	BAL to JALX.
-	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a
-	corresponding error message.
-
-2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1,
-	R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC7_S1.
-	(branch_reloc_p): New function.
-	(mips_elf_calculate_relocation): Handle ISA mode determination
-	for relocations against section symbols, against absolute
-	symbols and absolute relocations.  Also set `*cross_mode_jump_p'
-	for branches.
-	<R_MIPS16_26, R_MIPS_26, R_MICROMIPS_26_S1>: Suppress alignment
-	checks for weak undefined symbols.  Also check target alignment
-	within the same ISA mode.
-	<R_MIPS_PC16, R_MIPS_GNU_REL16_S2>: Handle cross-mode branches
-	in the alignment check.
-	<R_MICROMIPS_PC7_S1>: Add an alignment check.
-	<R_MICROMIPS_PC10_S1>: Likewise.
-	<R_MICROMIPS_PC16_S1>: Likewise.
-	(mips_elf_perform_relocation): Report a failure for unsupported
-	same-mode JALX instructions and cross-mode branches.
-	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add
-	error messages for jumps to misaligned addresses.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* elflink.c: Include plugin-api.h.
-	* plugin.c (bfd_plugin_open_input): New function, extracted from..
-	(try_claim): ..here.
-	* plugin.h: Don't include bfd.h.
-	(bfd_plugin_open_input): Declare.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* targets.c (bfd_seach_for_target): Rename to..
-	(bfd_iterate_over_targets): ..this.  Rewrite doc.
-	* bfd-in2.h: Regenerate.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* archures.c (bfd_default_set_arch_mach): Make available in bfd.h.
-	* libbfd.h: Regenerate.
-	* bfd-in2.h: Regenerate.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* libbfd-in.h (BFD_ALIGN): Move to..
-	* bfd-in.h: ..here.
-	* elf32-ppc.h (struct ppc_elf_params): Add pagesize.
-	* elf32-ppc.c (default_params): Adjust init.
-	(ppc_elf_link_params): Set pagesize_p2.
-	* libbfd.h: Regenerate.
-	* bfd-in2.h: Regenerate.
-
-2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf-bfd.h (elf_backend_filter_implib_symbols): Declare backend hook.
-	(_bfd_elf_filter_global_symbols): Declare.
-	* elf.c (_bfd_elf_filter_global_symbols): New function.
-	* elflink.c (elf_filter_global_symbols): Likewise.
-	(elf_output_implib): Likewise.
-	(bfd_elf_final_link): Call above function, failing if it does.
-	* elfxx-target.h (elf_backend_filter_implib_symbols): Define macro and
-	default it to NULL.
-	(elf_backend_copy_indirect_symbol): Fix spacing.
-	(elf_backend_hide_symbol): Likewise.
-	(elfNN_bed): Initialize elf_backend_filter_implib_symbols backend hook.
-
-2016-07-15  Andrew Burgess  <andrew.burgess@embecosm.com>
-	    Nick Clifton  <nickc@redhat.com>
-
-	* elf32-arc.c (PR_DEBUG): Delete.
-	Fix printing of debug information.  Fix formatting of debug
-	statements.
-	(debug_arc_reloc): Handle symbols that are not from an input file.
-	(arc_do_relocation): Remove excessive exclamation points.
-
-	* arc-got.h: Fix formatting.  Fix printing of debug information.
-	(new_got_entry_to_list): Use xmalloc.
-	* config.bfd: use the big-endian arc vector as the default vector
-	for big-endian arc targets.
-
-2016-07-15  Alan Modra  <amodra@gmail.com>
-
-	* cofflink.c (mark_relocs): Exclude relocs with -1 r_symndx
-	from marking sym_indices.
-
-2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* reloc.c (bfd_perform_relocation): Try the `howto' handler
-	first with relocations against absolute symbols.
-	(bfd_install_relocation): Likewise.
-
-2016-07-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Align
-	.got/.got.plt sections to 8 bytes.
-
-2016-07-12  Nick Clifton  <nickc@redhat.com>
-
-	* binary.c (binary_set_section_contents): Second grammar fix.
-
-2016-07-12  Douglas B Rupp  <rupp@adacore.com>
-
-	* binary.c (binary_set_section_contents): Fix grammar in warning
-	message.
-
-2016-07-11  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c: made PR_DEBUG always defined.
-
-2016-07-11  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* arc-got.h: Moved got related structures from elf32-arc.c to
-	this file. More precisely, tls_type_e, tls_got_entries, got_entry.
-	* (arc_get_local_got_ents, got_entry_for_type, new_got_entry_to_list,
-	tls_type_for_reloc, symbol_has_entry_of_type,
-	get_got_entry_list_for_symbol, arc_got_entry_type_for_reloc,
-	ADD_SYMBOL_REF_SEC_AND_RELOC, rc_fill_got_info_for_reloc,
-	relocate_fix_got_relocs_for_got_info,
-	create_got_dynrelocs_for_single_entry,
-	create_got_dynrelocs_for_got_info): Added to file.
-	* elf32-arc.c: Removed GOT & TLS related structs and functions to
-	arc-got.h.
-
-2016-07-08  James Bowman  <james.bowman@ftdichip.com>
-
-	* elf32-ft32.c (ft32_reloc_map): Use R_FT32_32 for BFD_RELOC_32.
-
-2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
-
-	* elf32-arm.c (THUMB32_MOVT): New veneer macro.
-	(THUMB32_MOVW): Likewise.
-	(elf32_arm_stub_long_branch_thumb2_only_pure): New.
-	(DEF_STUBS): Define long_branch_thumb2_only_pure.
-	(arm_stub_is_thumb): Add new veneer stub.
-	(arm_type_of_stub): Use new veneer.
-	(arm_stub_required_alignment): Add new veneer.
-
-2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
-
-	* bfd-in2.h (SEC_ELF_NOREAD): Rename to ...
-	(SEC_ELF_PURECODE): ... this.
-	* elf32-arm.c (elf32_arm_post_process_headers): Rename SEC_ELF_NOREAD
-	to SEC_ELF_NOREAD.
-	(elf32_arm_fake_sections): Likewise.
-	(elf_32_arm_section_flags): Likewise.
-	(elf_32_arm_lookup_section_flags): Likewise.
-	* section.c (SEC_ELF_NOREAD): Rename to ...
-	(SEC_ELF_PURECODE): ... this.
-
-2016-07-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (using_thumb2_bl): New function.
-	(arm_type_of_stub): Declare thumb2 variable together and change type
-	to bfd_boolean.  Use using_thumb2_bl () to determine whether
-	THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
-	checked for BL range.
-	(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
-	the bit size of BL offset.
-
-2016-06-29  Nick Clifton  <nickc@redhat.com>
-
-	* elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
-	Returns TRUE for AArch64 mapping symbols.
-	(elfNN_aarch64_backend_symbol_processing): New function.  Marks
-	mapping symbols as precious in object files so that they will not
-	be stripped.
-	(elf_backend_symbol_processing): Define.
-
-	* elf32-arm.c (is_arm_mapping_symbol): New function.  Returns TRUE
-	for ARM mapping symbols.
-	(elf32_arm_backend_symbol_processing): Make use of the new function.
-
-2016-06-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20306
-	* elflink.c (elf_link_check_versioned_symbol): Return false
-	for unreferenced undefined symbol.
-
-2016-06-28  Nick Clifton  <nickc@redhat.com>
-
-	* elf32-bfin.c (bfin_adjust_dynamic_symbol): Fail if a COPY reloc
-	is needed.
-
-	* elf32-arm.c (elf32_arm_backend_symbol_processing): New
-	function.  Marks mapping symbols in object files as precious, so
-	that strip will not remove them.
-	(elf_backend_symbol_processing): Define.
-
-2016-06-28  James Clarke  <jrtc27@jrtc27.com>
-
-	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
-	R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.
-
-2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf32-mips.c (elf_mips16_howto_table_rel): Add
-	R_MIPS16_PC16_S1.
-	(mips16_reloc_map): Likewise.
-	* elf64-mips.c (mips16_elf64_howto_table_rel): Likewise.
-	(mips16_elf64_howto_table_rela): Likewise.
-	(mips16_reloc_map): Likewise.
-	* elfn32-mips.c (elf_mips16_howto_table_rel): Likewise.
-	(elf_mips16_howto_table_rela): Likewise.
-	(mips16_reloc_map): Likewise.
-	* elfxx-mips.c (mips16_branch_reloc_p): New function.
-	(mips16_reloc_p): Handle R_MIPS16_PC16_S1.
-	(b_reloc_p): Likewise.
-	(mips_elf_calculate_relocation): Likewise.
-	(_bfd_mips_elf_check_relocs): Likewise.
-	* reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Regenerate.
-
-2016-06-27  Alan Modra  <amodra@gmail.com>
-
-	PR ld/19264
-	* elf64-ppc.c (STUB_SHRINK_ITER): Define.
-	(ppc64_elf_size_stubs): Exit stub sizing loop past STUB_SHRINK_ITER
-	if shrinking stubs.
-	(ppc64_elf_size_stubs): Adjust to suit.
-
-2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf32-dlx.h: New file.
-	* elf32-dlx.c: Adjust.
-
-2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf32-xtensa.c (xtensa_make_property_section): Remove prototype.
-
-2016-06-24  John Baldwin  <jhb@FreeBSD.org>
-
-	* elf.c (elfcore_grok_freebsd_note): Handle NT_FREEBSD_PROCSTAT_AUXV
-	notes.
-
-2016-06-24  John Baldwin  <jhb@FreeBSD.org>
-
-	* elf.c (elfcore_grok_note): Remove handling of NT_X86_XSTATE for
-	FreeBSD.  Remove case for NT_FREEBSD_THRMISC.
-	(elfcore_grok_freebsd_psinfo): New function.
-	(elfcore_grok_freebsd_prstatus): New function.
-	(elfcore_grok_freebsd_note): New function.
-	(elf_parse_notes): Use "elfcore_grok_freebsd_note" for "FreeBSD"
-	notes.
-
-2016-06-24  Joel Brobecker  <brobecker@adacore.com>
-
-	* elflink.c: Check the value of BFD_SUPPORTS_PLUGINS rather
-	than its existance.
-
-2016-06-24  Alan Modra  <amodra@gmail.com>
-
-	* config.bfd: Delete mips vxworks patterns matched earlier.
-	Combine mips*-*-none with mips*-*-elf*.
-
-2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_perform_relocation): Call
-	`info->callbacks->einfo' rather than `*_bfd_error_handler' and
-	use the `%X%H' format for the cross-mode jump conversion error
-	message.  Remove the full stop from the end of the message.
-	Continue processing rather than returning failure.
-
-2016-06-21  Graham Markall  <graham.markall@embecosm.com>
-
-	* archures.c: Remove bfd_mach_arc_nps400.
-	* bfd-in2.h: Likewise.
-	* cpu-arc.c (arch_info_struct): Likewise.
-	* elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing):
-	Likewise.
-
-2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/18250
-	PR ld/20267
-	* elflink.c: Include plugin.h if BFD_SUPPORTS_PLUGINS is
-	defined.
-	(elf_link_is_defined_archive_symbol): Call
-	bfd_link_plugin_object_p on unknown plugin object and use the
-	IR symbol table if the input is an IR object.
-	* plugin.c (bfd_link_plugin_object_p): New function.
-	* plugin.h (bfd_link_plugin_object_p): New prototype.
-
-2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20276
-	* elflink.c (elf_link_add_object_symbols): Don't check alignment
-	on symbol from plugin dummy input.
-
-2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* bfd.c (bfd_plugin_format): Rename bfd_plugin_uknown to
-	bfd_plugin_unknown.
-	* bfd-in2.h: Regenerated.
-	* plugin.c (bfd_plugin_object_p): Replace bfd_plugin_uknown
-	with bfd_plugin_unknown.
-
-2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20253
-	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add an
-	bfd_boolean argument.
-	* elf-ifunc.c (_bfd_elf_create_ifunc_sections): Replace
-	"shared object" with "PIC object" in comments.
-	(_bfd_elf_allocate_ifunc_dyn_relocs): Updated.  Replace
-	"shared object" with "PIC object" in comments.  Avoid PLT if
-	requested.  Generate dynamic relocations for non-GOT references.
-	Make room for the special first entry in PLT and allocate PLT
-	entry only for PLT and PC-relative references.  Store dynamic
-	GOT relocations in .rel[a].iplt section for static executables.
-	If PLT isn't used, always use GOT for symbol value.  Don't
-	allocate GOT entry if it isn't used.
-	* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
-	count only in the code section.  Allocate dynamic pointer
-	relocation against STT_GNU_IFUNC symbol in the non-code section.
-	(elf_i386_adjust_dynamic_symbol): Increment PLT reference count
-	only for PC-relative references.
-	(elf_i386_allocate_dynrelocs): Pass TRUE to
-	_bfd_elf_allocate_ifunc_dyn_relocs.
-	(elf_i386_relocate_section): Allow R_386_GOT32/R_386_GOT32X
-	relocations against STT_GNU_IFUNC symbols without PLT.  Generate
-	dynamic pointer relocation against STT_GNU_IFUNC symbol in
-	the non-code section and store it in the proper REL section.
-	Don't allow non-pointer relocation against STT_GNU_IFUNC symbol
-	without PLT.
-	(elf_i386_finish_dynamic_symbol): Generate dynamic
-	R_386_IRELATIVE and R_386_GLOB_DAT GOT relocations against
-	STT_GNU_IFUNC symbols without PLT.
-	(elf_i386_finish_dynamic_sections): Don't handle local
-	STT_GNU_IFUNC symbols here.
-	(elf_i386_output_arch_local_syms): Handle local STT_GNU_IFUNC
-	symbols here.
-	(elf_backend_output_arch_local_syms): New.
-	* elf32-x86-64.c (elf_i386_check_relocs): Increment PLT reference
-	count only in the code section.  Allocate dynamic pointer
-	relocation against STT_GNU_IFUNC symbol in the non-code section.
-	(elf_x86_64_adjust_dynamic_symbol): Increment PLT reference
-	count only for PC-relative references.
-	(elf_x86_64_allocate_dynrelocs): Pass TRUE to
-	_bfd_elf_allocate_ifunc_dyn_relocs.
-	(elf_x86_64_relocate_section): Allow R_X86_64_GOTPCREL,
-	R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX and
-	R_X86_64_GOTPCREL64 relocations against STT_GNU_IFUNC symbols
-	without PLT.  Generate dynamic pointer relocation against
-	STT_GNU_IFUNC symbol in the non-code section and store it in
-	the proper RELA section.  Don't allow non-pointer relocation
-	against STT_GNU_IFUNC symbol without PLT.
-	(elf_x86_64_finish_dynamic_symbol): Generate dynamic
-	R_X86_64_IRELATIVE and R_X86_64_GLOB_DAT GOT relocations against
-	STT_GNU_IFUNC symbols without PLT.
-	(elf_x86_64_finish_dynamic_sections): Don't handle local
-	STT_GNU_IFUNC symbols here.
-	(elf_x86_64_output_arch_local_syms): Handle local STT_GNU_IFUNC
-	symbols here.
-	(elf_backend_output_arch_local_syms): New.
-	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
-	Pass FALSE to _bfd_elf_allocate_ifunc_dyn_relocs.
-
-2016-06-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-	    Tony Wang  <tony.wang@arm.com>
-
-	* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
-	sequence.
-	(stub_long_branch_thumb2_only): Define stub.
-	(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
-	(arm_stub_long_branch_thumb2_only): Likewise.
-	(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
-	capable targets.
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* archures.c (bfd_mach_sparc_v8plusc): Define.
-	(bfd_mach_sparc_v9c): Likewise.
-	(bfd_mach_sparc_v8plusd): Likewise.
-	(bfd_mach_sparc_v9d): Likewise.
-	(bfd_mach_sparc_v8pluse): Likewise.
-	(bfd_mach_sparc_v9e): Likewise.
-	(bfd_mach_sparc_v8plusv): Likewise
-	(bfd_mach_sparc_v9v): Likewise.
-	(bfd_mach_sparc_v8plusm): Likewise.
-	(bfd_mach_sparc_v9m): Likewise.
-	(bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m.
-	(bfd_mach_sparc_64bit_p): Likewise.
-	* bfd-in2.h: Regenerate.
-	* cpu-sparc.c (arch_info_struct): Add entries for
-	bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}.
-	* aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m}
-	and bfd_mach_sparc_v9{c,d,e,v,m}.
-	* elf32-sparc.c (elf32_sparc_final_write_processing): Likewise.
-	* elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise.
-
-2016-06-16  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_check_relocs): Don't check undefined
-	symbols for relocations against IFUNC symbols.
-	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
-
-2016-06-16  Marcin Kościelnicki  <koriakin@0x04.net>
-
-	* elf32-s390.c (elf_s390_finish_dynamic_sections): Include
-	.rela.iplt in DT_PLTRELSZ.
-	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise,
-	for DT_PLTRELSZ and DT_RELASZ as well.
-
-2016-06-16  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_check_relocs): Skip relocations in
-	non-loaded, non-alloced sections.
-	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
-
-2016-06-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_check_relocs): Check SEC_ALLOC before
-	allocating dynamic relocation.
-	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
-
-2016-06-14  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20254
-	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
-	offsets until reloc_toaddr.
-
-2016-06-14  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE.
-	Don't check symbol type for STN_UNDEF symbol index.
-	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Check
-	R_X86_64_IRELATIVE.  Don't check symbol type for STN_UNDEF symbol
-	index.
-
-2016-06-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (using_thumb_only): Force review of arch check logic for
-	new architecture.
-	(using_thumb2): Try Tag_THUMB_ISA_use first and check
-	for exact arch value then.  Force review of arch check logic for new
-	architecture.
-	(arch_has_arm_nop): Update and fix arch check logic.  Force review of
-	that logic for new architecture.
-	(arch_has_thumb2_nop): Remove.
-	(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
-	(elf32_arm_final_link_relocate): Likewise but using thumb2.
-
-2016-06-14  Alan Modra  <amodra@gmail.com>
-
-	* bfd-in.h (bfd_my_archive): Delete.
-	* bfd-in2.h: Regenerate.
-
-2016-06-14  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20241
-	* archive.c (open_nested_file): Set my_archive.
-	* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
-	for thin archives.
-	* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
-	(bfd_seek): Likewise.
-	* bfdwin.c (bfd_get_file_window): Likewise.
-	* cache.c (cache_bmmap): Likewise.
-	(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
-	* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
-	thin archives.
-	* plugin.c (try_claim): Likewise.
-	* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
-	file within thin archive, not the archive.
-
-2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20244
-	* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
-	section address for R_386_GOT32/R_386_GOT32X relocations against
-	IFUNC symbols if there is no base register and return error for
-	PIC.
-
-2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
-	GOT32 adjustment for static executables.
-
-2016-06-13  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
-
-2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
-
-	* elf32-arc.c (elf_arc_relocate_section): Fixed condition.
-
-2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
-
-	* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
-
-2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
-
-	* elf32-arc.c (arc_local_data, arc_local_data): Removed.
-	(SECTSTART): Changed.
-	(elf_arc_relocate_section): Fixed mistake in PIE related
-	condition.
-	(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
-
-2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
-
-	* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
-	enable support for "-z combreloc" and DT_RELACOUNT.
-	(elf_backend_reloc_type_class): Likewise
-
-2016-06-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20244
-	* elf32-i386.c (elf_i386_relocate_section): When relocating
-	R_386_GOT32, return error without a base register for PIC and
-	subtract the .got.plt section address only with a base register.
-
-2016-06-10  Alan Modra  <amodra@gmail.com>
-
-	* elf-strtab.c (struct strtab_save): Use size_t for "size".
-	(struct elf_strtab_hash): Likewise for "size" and "alloced".
-	(_bfd_elf_strtab_init): Formatting.
-	(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
-	(_bfd_elf_strtab_addref): Take size_t idx param.
-	(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
-	(_bfd_elf_strtab_offset): Likewise.
-	(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
-	(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
-	(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
-	(_bfd_elf_strtab_finalize): Similarly.
-	* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
-	(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
-	(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
-	* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
-	using bfd_size_type.
-	(bfd_section_from_shdr): Delete amt.
-	(_bfd_elf_init_reloc_shdr): Likewise.
-	(_bfd_elf_link_assign_sym_version): Likewise.
-	(assign_section_numbers): Use size_t reloc_count.
-	* elflink.c (struct elf_symbuf_head): Use size_t "count".
-	(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
-	(elf_link_is_defined_archive_symbol): Likewise.
-	(elf_add_dt_needed_tag): Likewise.
-	(elf_finalize_dynstr): Likewise.
-	(elf_link_add_object_symbols): Likewise.
-	(bfd_elf_size_dynamic_sections): Likewise.
-	(elf_create_symbuf): Similarly.
-	(bfd_elf_match_symbols_in_sections): Likewise.
-	(elf_link_swap_symbols_out): Likewise.
-	(elf_link_check_versioned_symbol): Likewise.
-	(bfd_elf_gc_record_vtinherit): Likewise.
-	(bfd_elf_gc_common_finalize_got_offsets): Likewise.
-
-2016-06-08  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20221
-	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
-	and relocs only if shrinking occurred.
-
-2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
-	(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
-	(elf_i386_check_tls_transition): Check indirect call and direct
-	call with the addr32 prefix for general and local dynamic models.
-	Set the tls_get_addr feild.
-	(elf_i386_convert_load_reloc): Always use addr32 prefix for
-	indirect ___tls_get_addr call via GOT.
-	(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
-	transitions with indirect call and direct call with the addr32
-	prefix.
-
-2016-06-07  Marcin Kościelnicki  <koriakin@0x04.net>
-
-	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
-	* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
-	(elf_s390_relocate_section): Fix comment.
-	(elf_s390_finish_dynamic_sections): Fix initialization of fixed
-	.got.plt entries.
-
-2016-06-07  Ulrich Weigand  <ulrich.weigand@de.ibm.com>
-
-	* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
-	section offset when calculation the larl operand in the first PLT
-	entry.
-
-2016-06-07  Alan Modra  <amodra@gmail.com>
-
-	* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
-	to match other 32-bit archs.
-	* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
-	(ppc_elf_object_p): Call it.
-	(ppc_elf_special_sections): Use APUINFO_SECTION_NAME.  Fix
-	overlong line.
-	(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
-	* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
-	* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
-	_bfd_elf_ppc_at_tprel_transform): Move to..
-	* elf-bfd.h: ..here.
-	(_bfd_elf_ppc_set_arch): Declare.
-	* bfd-in2.h: Regenerate.
-
-2016-06-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
-	(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
-	(elf_x86_64_check_tls_transition): Check indirect call and
-	direct call with the addr32 prefix for general and local dynamic
-	models.  Set the tls_get_addr feild.
-	(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
-	indirect __tls_get_addr call via GOT.
-	(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
-	transitions with indirect call and direct call with the addr32
-	prefix.
-
-2016-06-04  Christian Groessler  <chris@groessler.org>
-
-	* coff-z8k.c (extra_case): Fix range check for R_JR relocation.
-
-2016-06-02  Nick Clifton  <nickc@redhat.com>
-
-	PR target/20088
-	* cpu-arm.c (processors): Add "arm_any" type to match any ARM
-	architecture.
-	(arch_info_struct): Likewise.
-	(architectures): Likewise.
-
-2016-06-02  Vineet Gupta  <Vineet.Gupta1@synopsys.com>
-
-	* config.bfd: Replace -uclibc with *.
-
-2016-06-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf64-x86-64.c: Replace data32 with data16 in comments.
-
-2016-05-31  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20159
-	PR ld/16467
-	* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
-	(_bfd_elf_add_default_symbol): Don't indirect to/from defined
-	symbol given a version by a script different to the version
-	of the symbol being added.
-	(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
-	_bfd_elf_strtab_restore.  Don't fudge dynstr references.
-	* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
-	(struct strtab_save): New.
-	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
-	* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
-	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
-
-2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf32-hppa.h: Add extern "C".
-	* elf32-nds32.h: Likewise.
-	* elf32-tic6x.h: Likewise.
-
-2016-06-01  Nick Clifton  <nickc@redhat.com>
-
-	* po/sr.po: New Serbian translation.
-	* configure.ac (ALL_LINGUAS): Add sr.
-	* configure: Regenerate.
-
-2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (b_reloc_p): New function.
-	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Handle
-	branch relocations.
-
-2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26>
-	<R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the
-	reloc location from calculation, treat the addend as signed with
-	local non-section symbols and enable overflow detection.
-
-2016-05-28  Alan Modra  <amodra@gmail.com>
-
-	* aoutx.h: Adjust linker callback calls throughout file,
-	removing dead code.
-	* bout.c: Likewise.
-	* coff-alpha.c: Likewise.
-	* coff-arm.c: Likewise.
-	* coff-h8300.c: Likewise.
-	* coff-h8500.c: Likewise.
-	* coff-i960.c: Likewise.
-	* coff-mcore.c: Likewise.
-	* coff-mips.c: Likewise.
-	* coff-ppc.c: Likewise.
-	* coff-rs6000.c: Likewise.
-	* coff-sh.c: Likewise.
-	* coff-tic80.c: Likewise.
-	* coff-w65.c: Likewise.
-	* coff-z80.c: Likewise.
-	* coff-z8k.c: Likewise.
-	* coff64-rs6000.c: Likewise.
-	* cofflink.c: Likewise.
-	* ecoff.c: Likewise.
-	* elf-bfd.h: Likewise.
-	* elf-m10200.c: Likewise.
-	* elf-m10300.c: Likewise.
-	* elf32-arc.c: Likewise.
-	* elf32-arm.c: Likewise.
-	* elf32-avr.c: Likewise.
-	* elf32-bfin.c: Likewise.
-	* elf32-cr16.c: Likewise.
-	* elf32-cr16c.c: Likewise.
-	* elf32-cris.c: Likewise.
-	* elf32-crx.c: Likewise.
-	* elf32-d10v.c: Likewise.
-	* elf32-epiphany.c: Likewise.
-	* elf32-fr30.c: Likewise.
-	* elf32-frv.c: Likewise.
-	* elf32-ft32.c: Likewise.
-	* elf32-h8300.c: Likewise.
-	* elf32-hppa.c: Likewise.
-	* elf32-i370.c: Likewise.
-	* elf32-i386.c: Likewise.
-	* elf32-i860.c: Likewise.
-	* elf32-ip2k.c: Likewise.
-	* elf32-iq2000.c: Likewise.
-	* elf32-lm32.c: Likewise.
-	* elf32-m32c.c: Likewise.
-	* elf32-m32r.c: Likewise.
-	* elf32-m68hc1x.c: Likewise.
-	* elf32-m68k.c: Likewise.
-	* elf32-mep.c: Likewise.
-	* elf32-metag.c: Likewise.
-	* elf32-microblaze.c: Likewise.
-	* elf32-moxie.c: Likewise.
-	* elf32-msp430.c: Likewise.
-	* elf32-mt.c: Likewise.
-	* elf32-nds32.c: Likewise.
-	* elf32-nios2.c: Likewise.
-	* elf32-or1k.c: Likewise.
-	* elf32-ppc.c: Likewise.
-	* elf32-s390.c: Likewise.
-	* elf32-score.c: Likewise.
-	* elf32-score7.c: Likewise.
-	* elf32-sh.c: Likewise.
-	* elf32-sh64.c: Likewise.
-	* elf32-spu.c: Likewise.
-	* elf32-tic6x.c: Likewise.
-	* elf32-tilepro.c: Likewise.
-	* elf32-v850.c: Likewise.
-	* elf32-vax.c: Likewise.
-	* elf32-visium.c: Likewise.
-	* elf32-xstormy16.c: Likewise.
-	* elf32-xtensa.c: Likewise.
-	* elf64-alpha.c: Likewise.
-	* elf64-hppa.c: Likewise.
-	* elf64-ia64-vms.c: Likewise.
-	* elf64-mmix.c: Likewise.
-	* elf64-ppc.c: Likewise.
-	* elf64-s390.c: Likewise.
-	* elf64-sh64.c: Likewise.
-	* elf64-x86-64.c: Likewise.
-	* elflink.c: Likewise.
-	* elfnn-aarch64.c: Likewise.
-	* elfnn-ia64.c: Likewise.
-	* elfxx-mips.c: Likewise.
-	* elfxx-sparc.c: Likewise.
-	* elfxx-tilegx.c: Likewise.
-	* linker.c: Likewise.
-	* pdp11.c: Likewise.
-	* pe-mips.c: Likewise.
-	* reloc.c: Likewise.
-	* reloc16.c: Likewise.
-	* simple.c: Likewise.
-	* vms-alpha.c: Likewise.
-	* xcofflink.c: Likewise.
-	* elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete
-	status param.  Adjust calls to these and linker callbacks throughout.
-	* elf32-rx.c: (get_symbol_value, get_gp, get_romstart,
-	get_ramstart): Delete status param.  Adjust calls to these and
-	linker callbacks throughout.
-
-2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS16_26>
-	<R_MIPS_26, R_MICROMIPS_26_S1>: Include the addend in JALX's
-	target alignment verification.
-
-2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_calculate_relocation): Also use the
-	section name if `bfd_elf_string_from_elf_section' returns an
-	empty string.
-
-2016-05-26  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
-	<bfd_reloc_outofrange>: Use the `%X%H' rather than `%C' format
-	for message.  Continue processing rather than returning failure.
-
-2016-05-25  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
-	<bfd_reloc_outofrange>: Call `->einfo' rather than `->warning'.
-	Call `bfd_set_error'.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/14625
-	* archive.c (bfd_slurp_armap): Replace
-	bfd_elf64_archive_slurp_armap with
-	_bfd_archive_64_bit_slurp_armap.
-	(bsd_write_armap): Call _bfd_archive_64_bit_write_armap if
-	BFD64 is defined and the archive is too big.
-	(coff_write_armap): Likewise.
-	* archive64.c (bfd_elf64_archive_slurp_armap): Renamed to ...
-	(_bfd_archive_64_bit_slurp_armap): This.
-	(bfd_elf64_archive_write_armap): Renamed to ...
-	(_bfd_archive_64_bit_write_armap): This.
-	* configure.ac: Add --enable-64-bit-archive.
-	(want_64_bit_archive): New.  Set to true by default for 64-bit
-	MIPS and s390 ELF targets.
-	(USE_64_BIT_ARCHIVE): New AC_DEFINE.
-	* config.in: Regenerated.
-	* configure: Likewise.
-	* elf64-mips.c (bfd_elf64_archive_functions): Removed.
-	(bfd_elf64_archive_slurp_armap): Likewise.
-	(bfd_elf64_archive_write_armap): Likewise.
-	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
-	(bfd_elf64_archive_construct_extended_name_table): Likewise.
-	(bfd_elf64_archive_truncate_arname): Likewise.
-	(bfd_elf64_archive_read_ar_hdr): Likewise.
-	(bfd_elf64_archive_write_ar_hdr): Likewise.
-	(bfd_elf64_archive_openr_next_archived_file): Likewise.
-	(bfd_elf64_archive_get_elt_at_index): Likewise.
-	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
-	(bfd_elf64_archive_update_armap_timestamp): Likewise.
-	* elf64-s390.c (bfd_elf64_archive_functions): Removed.
-	(bfd_elf64_archive_slurp_armap): Likewise.
-	(bfd_elf64_archive_write_armap): Likewise.
-	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
-	(bfd_elf64_archive_construct_extended_name_table): Likewise.
-	(bfd_elf64_archive_truncate_arname): Likewise.
-	(bfd_elf64_archive_read_ar_hdr): Likewise.
-	(bfd_elf64_archive_write_ar_hdr): Likewise.
-	(bfd_elf64_archive_openr_next_archived_file): Likewise.
-	(bfd_elf64_archive_get_elt_at_index): Likewise.
-	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
-	(bfd_elf64_archive_update_armap_timestamp): Likewise.
-	* elfxx-target.h (TARGET_BIG_SYM): Use _bfd_archive_64_bit on
-	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined and
-	bfd_elfNN_archive_functions isn't defined.
-	(TARGET_LITTLE_SYM): Likewise.
-	* libbfd-in.h (_bfd_archive_64_bit_slurp_armap): New prototype.
-	(_bfd_archive_64_bit_write_armap): Likewise.
-	(_bfd_archive_64_bit_slurp_extended_name_table): New macro.
-	(_bfd_archive_64_bit_construct_extended_name_table): Likewise.
-	(_bfd_archive_64_bit_truncate_arname): Likewise.
-	(_bfd_archive_64_bit_read_ar_hdr): Likewise.
-	(_bfd_archive_64_bit_write_ar_hdr): Likewise.
-	(_bfd_archive_64_bit_openr_next_archived_file): Likewise.
-	(_bfd_archive_64_bit_get_elt_at_index): Likewise.
-	(_bfd_archive_64_bit_generic_stat_arch_elt): Likewise.
-	(_bfd_archive_64_bit_update_armap_timestamp): Likewise.
-	* libbfd.h: Regenerated.
-	* plugin.c (plugin_vec): Use _bfd_archive_64_bit on
-	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20103
-	* cofflink.c (coff_link_check_archive_element): Return TRUE if
-	linker add_archive_element callback returns FALSE.
-	* ecoff.c (ecoff_link_check_archive_element): Likewise.
-	* elf64-ia64-vms.c (elf64_vms_link_add_archive_symbols): Skip
-	archive element if linker add_archive_element callback returns
-	FALSE.
-	* elflink.c (elf_link_add_archive_symbols): Likewise.
-	* pdp11.c (aout_link_check_ar_symbols): Likewise.
-	* vms-alpha.c (alpha_vms_link_add_archive_symbols): Likewise.
-	* xcofflink.c (xcoff_link_check_dynamic_ar_symbols): Likewise.
-	(xcoff_link_check_ar_symbols): Likewise.
-
-2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
-	<bfd_reloc_outofrange>: Unify error reporting code.
-
-2016-05-23  Jim Wilson  <jim.wilson@linaro.org>
-
-	* elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and
-	R_AARCH64_NONE.  Use HOWTO64 for R_AARCH64_NULL.
-	* relocs.c: Add BFD_RELOC_AARCH64_NULL.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Likewise.
-
-2016-05-23  Kuba Sejdak  <jakub.sejdak@phoesys.com>
-
-	* config.bfd: Add entry for arm-phoenix.
-
-2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (arm_dedicated_stub_section_padding): New function.
-	(elf32_arm_size_stubs): Declare stub_type in a more outer scope and
-	account for padding for stub section requiring one.
-	(elf32_arm_build_stubs): Add comment to stress the importance of
-	zeroing veneer section content.
-
-2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* bfd-in.h (bfd_elf32_arm_keep_private_stub_output_sections): Declare
-	bfd hook.
-	* bfd-in2.h: Regenerate.
-	* elf32-arm.c (arm_dedicated_stub_output_section_required): New
-	function.
-	(arm_dedicated_stub_output_section_required_alignment): Likewise.
-	(arm_dedicated_stub_output_section_name): Likewise.
-	(arm_dedicated_stub_input_section_ptr): Likewise.
-	(elf32_arm_create_or_find_stub_sec): Add stub type parameter and
-	function description comment. Add support for dedicated output stub
-	section to given stub types.
-	(elf32_arm_add_stub): Add a stub type parameter and pass it down to
-	elf32_arm_create_or_find_stub_sec.
-	(elf32_arm_create_stub): Pass stub type down to elf32_arm_add_stub.
-	(elf32_arm_size_stubs): Pass stub type when calling
-	elf32_arm_create_or_find_stub_sec for Cortex-A8 erratum veneers.
-	(bfd_elf32_arm_keep_private_stub_output_sections): New function.
-
-2016-05-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_check_relocs): Don't check R_386_GOT32
-	when setting need_convert_load.
-
-2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_read_rel_addend): Adjust the addend for
-	microMIPS JALX.
-
-2016-05-19  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20117
-	* elf32-i386.c (elf_i386_convert_load_reloc): Don't check
-	R_386_GOT32X.
-	(elf_i386_convert_load): Don't convert R_386_GOT32.
-
-2016-05-20  Alan Modra  <amodra@gmail.com>
-
-	PR gas/20118
-	* elf.c (elf_fake_sections): Set sh_entsize for SHT_INIT_ARRAY,
-	SHT_FINI_ARRAY, and SHT_PREINIT_ARRAY.
-
-2016-05-19  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c (arc_elf_final_write_processing): Changed.
-	(debug_arc_reloc): Likewise.
-	(elf_arc_relocate_section): Likewise.
-	(elf_arc_check_relocs): Likewise.
-	(elf_arc_adjust_dynamic_symbol): Likewise.
-	(elf_arc_add_symbol_hook): Likewise.
-
-2016-05-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config.bfd: Remove `am34-*-linux*' support.
-
-2016-05-19  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (allocate_dynrelocs): Allocate got and other dynamic
-	relocs before plt relocs.
-
-2016-05-19  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_branch_reloc): Check for NULL owner
-	before dereferencing.
-
-2016-05-18  Nick Clifton  <nickc@redhat.com>
-
-	* po/sv.po: Updated Swedish translation.
-
-2016-05-18  Alan Modra  <amodra@gmail.com>
-
-	* elf32-arm.c (elf32_arm_size_stubs): Free or cache local syms
-	for each BFD.  Don't goto error_ret_free_local from outside loop.
-
-2016-05-17  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf-s390-common.c (elf_s390_add_symbol_hook): Remove
-	STB_GNU_UNIQUE handling.
-	* elf32-arc.c (elf_arc_add_symbol_hook): Likewise.
-	* elf32-arm.c (elf32_arm_add_symbol_hook): Likewise.
-	* elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise.
-	* elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise.
-	* elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise.
-	* elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise.
-	* elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise.
-	* elf64-x86-64.c (elf_x86_64_add_symbol_hook): Likewise.
-	* elfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise.
-	* elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Likewise.
-	* elf32-i386.c (elf_i386_add_symbol_hook): Remove function.
-	(elf_backend_add_symbol_hook): Remove macro.
-	* elflink.c (elf_link_add_object_symbols): Set `has_gnu_symbols'
-	for STB_GNU_UNIQUE symbols.
-
-2016-05-16  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf32-v850.c (v850_elf_copy_notes): New function, factored out
-	from...
-	(v850_elf_copy_private_bfd_data): ... here.  Call the new
-	function and `_bfd_elf_copy_private_bfd_data'.
-
-2016-05-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20093
-	* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't convert
-	GOTPCREL relocation against large section.
-
-2016-05-13  Alan Modra  <amodra@gmail.com>
-
-	* elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Use
-	linker dynamic sections in calculating size and address of
-	dynamic tags rather than using output sections.  Remove asserts.
-	* elf32-arm.c (elf32_arm_finish_dynamic_sections): Likewise.
-	* elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Likewise.
-	* elf32-cris.c (elf_cris_finish_dynamic_sections): Likewise.
-	* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
-	* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise.
-	* elf32-m32r.c (m32r_elf_finish_dynamic_sections): Likewise.
-	* elf32-m68k.c (elf_m68k_finish_dynamic_sections): Likewise.
-	* elf32-metag.c (elf_metag_finish_dynamic_sections): Likewise.
-	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Likewise.
-	* elf32-nds32.c (nds32_elf_finish_dynamic_sections): Likewise.
-	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Likewise.
-	* elf32-or1k.c (or1k_elf_finish_dynamic_sections): Likewise.
-	* elf32-s390.c (elf_s390_finish_dynamic_sections): Likewise.
-	* elf32-score.c (s3_bfd_score_elf_finish_dynamic_sections): Likewise.
-	* elf32-score7.c (s7_bfd_score_elf_finish_dynamic_sections): Likewise.
-	* elf32-vax.c (elf_vax_finish_dynamic_sections): Likewise.
-	* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Likewise.
-	* elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Likewise.
-	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise.
-	* elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Likewise.
-	* elflink.c (bfd_elf_final_link): Likewise.
-	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
-	* elfxx-sparc.c (sparc_finish_dyn): Likewise.  Adjust error message.
-	* elf32-arc.c (GET_SYMBOL_OR_SECTION): Remove ASSERT arg and
-	don't set doit.  Look up dynobj section.
-	(elf_arc_finish_dynamic_sections): Adjust GET_SYMBOL_OR_SECTION
-	invocation and dynamic tag vma calculation.  Don't test
-	boolean var == TRUE.
-	* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Fix
-	DT_JMPREL calc.
-
-2016-05-13  Alan Modra  <amodra@gmail.com>
-
-	* elflink.c (elf_link_sort_relocs): Wrap overlong lines.  Fix
-	octets_per_byte.  Put dynamic .rela.plt last in link orders.
-	Assign output_offset for reloc sections rather than writing
-	sorted relocs from block corresponding to output_offset.
-
-2016-05-12  Alan Modra  <amodra@gmail.com>
-
-	* elf-bfd.h (elf_reloc_type_class): Put reloc_class_plt last.
-
-2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
-
-	* elfxx-mips.c (print_mips_ases): Add DSPR3.
-
-2016-05-11  Alan Modra  <amodra@gmail.com>
-
-	* elf32-hppa.c (elf32_hppa_init_stub_bfd): New function.
-	(elf32_hppa_check_relocs): Don't set dynobj.
-	(elf32_hppa_size_stubs): Test !SEC_LINKER_CREATED for stub sections.
-	(elf32_hppa_build_stubs): Likewise.
-	* elf32-hppa.h (elf32_hppa_init_stub_bfd): Declare.
-
-2016-05-11  Alan Modra  <amodra@gmail.com>
-
-	PR 20060
-	* elf64-ppc.c (ppc64_elf_tls_setup): Clear forced_local.
-	* elf32-ppc.c (ppc_elf_tls_setup): Likewise.
-
-2016-05-10  Jiong Wang  <jiong.wang@arm.com>
-
-	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Remove redundant
-	aarch64_tls_transition check.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (enum elf32_arm_stub_type): New max_stub_type
-	enumerator.
-	(arm_stub_sym_claimed): New function.
-	(elf32_arm_create_stub): Use veneered symbol name and section if
-	veneer needs to claim its symbol, and keep logic unchanged otherwise.
-	(arm_stub_claim_sym): New function.
-	(arm_map_one_stub): Call arm_stub_claim_sym if veneer needs to claim
-	veneered symbol, otherwise create local symbol as before.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (elf32_arm_size_stubs): Use new macros
-	ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
-	and set branch type of a symbol.
-	(bfd_elf32_arm_process_before_allocation): Likewise.
-	(elf32_arm_relocate_section): Likewise and fix identation along the
-	way.
-	(allocate_dynrelocs_for_symbol): Likewise.
-	(elf32_arm_finish_dynamic_symbol): Likewise.
-	(elf32_arm_swap_symbol_in): Likewise.
-	(elf32_arm_swap_symbol_out): Likewise.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* bfd-in.h (elf32_arm_size_stubs): Add an output section parameter.
-	* bfd-in2.h: Regenerated.
-	* elf32-arm.c (struct elf32_arm_link_hash_table): Add an output section
-	parameter to add_stub_section callback.
-	(elf32_arm_create_or_find_stub_sec): Get output section from link_sec
-	and pass it down to add_stub_section.
-	(elf32_arm_add_stub): Set section to stub_sec if NULL before using it
-	for error message.
-	(elf32_arm_size_stubs): Add output section parameter to
-	add_stub_section function pointer parameter.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (elf32_arm_create_stub): New function.
-	(elf32_arm_size_stubs): Use elf32_arm_create_stub for stub creation.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (enum elf32_arm_stub_type): Delete
-	arm_stub_a8_veneer_lwm enumerator.
-	(arm_stub_a8_veneer_lwm): New unsigned constant to replace
-	aforementioned enumerator.
-	(struct elf32_arm_stub_hash_entry): Delete target_addend
-	field and add source_value.
-	(struct a8_erratum_fix): Delete addend field and add target_offset.
-	(stub_hash_newfunc): Initialize source_value field amd remove
-	initialization for target_addend.
-	(arm_build_one_stub): Stop special casing Thumb relocations: promote
-	the else to being always executed, moving the
-	arm_stub_a8_veneer_b_cond specific code in it.  Remove
-	stub_entry->target_addend from points_to computation.
-	(cortex_a8_erratum_scan): Store in a8_erratum_fix structure the offset
-	to target symbol from start of section rather than the offset from the
-	stub address.
-	(elf32_arm_size_stubs): Set stub_entry's source_value and target_value
-	fields from struct a8_erratum_fix's offset and target_offset
-	respectively.
-	(make_branch_to_a8_stub): Rename target variable to loc.  Compute
-	veneered_insn_loc and loc using stub_entry's source_value.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	(elf32_arm_merge_eabi_attributes): Add merging logic for
-	Tag_DSP_extension.
-
-2016-05-10  Pip Cet  <pipcet@gmail.com>
-
-	PR ld/20059
-	* elfxx-target.h (bfd_elfNN_bfd_copy_link_hash_symbol_type):
-	Define as _bfd_generic_copy_link_hash_symbol_type when using
-	generic hash table.
-
-2016-05-09  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20063
-	* elf.c (bfd_elf_get_elf_syms): Check for out of range sh_link
-	field before accessing sections array.
-
-2016-05-09  Christophe Monat  <christophe.monat@st.com>
-
-	PR ld/20030
-	* elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding.
-	(stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs
-	to nb_words.
-	(create_instruction_vldmia): Add is_dp to disambiguate SP/DP
-	encoding.
-	(create_instruction_vldmdb): Likewise.
-	(stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding,
-	uses it to re-encode.
-
-2016-05-09  Nick Clifton  <nickc@redhat.com>
-
-	PR 19938
-	* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Revert accidental
-	commit.
-
-2016-05-09  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_init_stub_bfd): Remove redundant NULL check.
-
-2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/17550
-	* elf-bfd.h (elf_link_hash_entry): Update comments for indx,
-	documenting that indx == -3 if symbol is defined in a discarded
-	section.
-	* elflink.c (elf_link_add_object_symbols): Set indx to -3 if
-	symbol is defined in a discarded section.
-	(elf_link_output_extsym): Strip a global symbol defined in a
-	discarded section.
-
-2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_backend_add_symbol_hook): Defined for Intel
-	MCU.
-
-2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_convert_load): Extract the GOT load
-	conversion to ...
-	(elf_i386_convert_load_reloc): This.  New function.
-	* elf64-x86-64.c (elf_x86_64_convert_load): Extract the GOT load
-	conversion to ...
-	(elf_x86_64_convert_load_reloc): This.  New function.
-
-2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_check_tls_transition): Remove abfd.
-	Don't check if contents == NULL.
-	(elf_i386_tls_transition): Add from_relocate_section.  Check
-	from_relocate_section instead of contents != NULL.  Update
-	elf_i386_check_tls_transition call.
-	(elf_i386_check_relocs): Cache the section contents if
-	keep_memory is FALSE.  Pass FALSE as from_relocate_section to
-	elf_i386_tls_transition.
-	(elf_i386_relocate_section): Pass TRUE as from_relocate_section
-	to elf_i386_tls_transition.
-	(elf_backend_caches_rawsize): New.
-	* elf64-x86-64.c (elf_x86_64_check_tls_transition): Don't check
-	if contents == NULL.
-	(elf_x86_64_tls_transition): Add from_relocate_section.  Check
-	from_relocate_section instead of contents != NULL.
-	(elf_x86_64_check_relocs): Cache the section contents if
-	keep_memory is FALSE.  Pass FALSE as from_relocate_section to
-	elf_x86_64_tls_transition.
-	(elf_x86_64_relocate_section): Pass TRUE as from_relocate_section
-	to elf_x86_64_tls_transition.
-	(elf_backend_caches_rawsize): New.
-
-2016-05-03  Maciej W. Rozycki  <macro@imgtec.com>
-
-	PR 10549
-	* elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Handle
-	STB_GNU_UNIQUE.
-
-2016-05-03  Jiong Wang  <jiong.wang@arm.com>
-
-	* bfd-in.h (bfd_elf64_aarch64_set_options): Update prototype.
-	* bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise.
-	* elfnn-aarch64.c (bfd_elfNN_aarch64_set_options): Initialize
-	no_apply_dynamic_relocs.
-	(elfNN_aarch64_final_link_relocate): Apply absolute relocations even though
-	dynamic relocations generated.
-
-2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_size_dynamic_sections): Move interp
-	setting to ...
-	(elf_i386_create_dynamic_sections): Here.
-	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Move
-	interp setting to ...
-	(elf_x86_64_create_dynamic_sections): Here.
-
-2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Take GOT_RELOC
-	and replace (EH)->has_got_reloc with GOT_RELOC.
-	(elf_i386_fixup_symbol): Pass has_got_reloc to
-	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
-	(elf_i386_allocate_dynrelocs): Likewise.
-	(elf_i386_relocate_section): Likewise.
-	(elf_i386_finish_dynamic_symbol): Likewise.
-	(elf_i386_convert_load): Pass TRUE to
-	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
-	* elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Take
-	GOT_RELOC and replace (EH)->has_got_reloc with GOT_RELOC.
-	(elf_x86_64_fixup_symbol): Pass has_got_reloc to
-	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
-	(elf_x86_64_allocate_dynrelocs): Likewise.
-	(elf_x86_64_relocate_section): Likewise.
-	(elf_x86_64_finish_dynamic_symbol): Likewise.
-	(elf_x86_64_convert_load): Pass TRUE to
-	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
-
-2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (check_relocs_failed): New.
-	(elf_i386_check_relocs): Set check_relocs_failed on error.
-	(elf_i386_relocate_section): Skip if check_relocs failed.
-
-2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf64-x86-64.c (elf_x86_64_check_relocs): Set
-	check_relocs_failed on error.
-
-2016-04-29  Nick Clifton  <nickc@redhat.com>
-
-	PR 19938
-	* elf-bfd.h (struct elf_backend_data): Rename
-	elf_backend_set_special_section_info_and_link to
-	elf_backend_copy_special_section_fields.
-	* elfxx-target.h: Likewise.
-	* elf.c (section_match): Ignore the SHF_INFO_LINK flag when
-	comparing section flags.
-	(copy_special_section_fields): New function.
-	(_bfd_elf_copy_private_bfd_data): Copy the EI_ABIVERSION field.
-	Perform two scans over special sections.  The first one looks for
-	a direct mapping between the output section and an input section.
-	The second scan looks for a possible match based upon section
-	characteristics.
-	* elf32-arm.c (elf32_arm_copy_special_section_fields): New
-	function.  Handle setting the sh_link field of SHT_ARM_EXIDX
-	sections.
-	* elf32-i386.c (elf32_i386_set_special_info_link): Rename to
-	elf32_i386_copy_solaris_special_section_fields.
-	* elf32-sparc.c (elf32_sparc_set_special_section_info_link):
-	Rename to elf32_sparc_copy_solaris_special_section_fields.
-	* elf64-x86-64.c (elf64_x86_64_set_special_info_link): Rename to
-	elf64_x86_64_copy_solaris_special_section_fields.
-
-2016-04-28  Nick Clifton  <nickc@redhat.com>
-
-	* po/zh_CN.po: Updated Chinese (simplified) translation.
-
-2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20006
-	* elf64-x86-64.c (elf_x86_64_convert_load): Skip debug sections
-	when estimating distances between output sections.
-
-2016-04-27  Alan Modra  <amodra@gmail.com>
-
-	* elflink.c (_bfd_elf_is_start_stop): New function.
-	(_bfd_elf_gc_mark_rsec): Use it.
-	* elf-bfd.h (_bfd_elf_is_start_stop): Declare.
-
-2016-04-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf32-rx.c (rx_set_section_contents): Avoid arithmetic on void *.
-	* mmo.c (mmo_get_section_contents): Likewise.
-	(mmo_set_section_contents): Likewise.
-
-2016-04-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf-bfd.h (elf_link_hash_table): Update comments for
-	dynsymcount.
-	* elflink.c (_bfd_elf_link_renumber_dynsyms): Always count for
-	the unused NULL entry at the head of dynamic symbol table.
-	(bfd_elf_size_dynsym_hash_dynstr): Remove dynsymcount != 0
-	checks.
-
-2016-04-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elflink.c (_bfd_elf_link_create_dynstrtab): Exclude linker
-	created file from dynobj.
-
-2016-04-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elflink.c (_bfd_elf_link_create_dynstrtab): Set dynobj to a
-	normal input file if possible.
-
-2016-04-21  Nick Clifton  <nickc@redhat.com>
-
-	* aout-adobe.c: Use _bfd_generic_link_check_relocs.
-	* aout-target.h: Likewise.
-	* aout-tic30.c: Likewise.
-	* binary.c: Likewise.
-	* bout.c: Likewise.
-	* coff-alpha.c: Likewise.
-	* coff-rs6000.c: Likewise.
-	* coff64-rs6000.c: Likewise.
-	* coffcode.h: Likewise.
-	* i386msdos.c: Likewise.
-	* i386os9k.c: Likewise.
-	* ieee.c: Likewise.
-	* ihex.c: Likewise.
-	* libbfd-in.h: Likewise.
-	* libecoff.h: Likewise.
-	* mach-o-target.c: Likewise.
-	* mmo.c: Likewise.
-	* nlm-target.h: Likewise.
-	* oasys.c: Likewise.
-	* pef.c: Likewise.
-	* plugin.c: Likewise.
-	* ppcboot.c: Likewise.
-	* som.c: Likewise.
-	* srec.c: Likewise.
-	* tekhex.c: Likewise.
-	* versados.c: Likewise.
-	* vms-alpha.c: Likewise.
-	* xsym.c: Likewise.
-	* elfxx-target.h: Use _bfd_elf_link_check_relocs.
-	* linker.c (bfd_link_check_relocs): New function.
-	(_bfd_generic_link_check_relocs): New function.
-	* targets.c (BFD_JUMP_TABLE_LINK): Add initialization of
-	_bfd_link_check_relocs field.
-	(struct bfd_target)L Add _bfd_link_check_relocs field.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Regenerate.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_gc_sweep_hook): Removed.
-	(elf_backend_gc_sweep_hook): Likewise.
-	* elf64-x86-64.c (elf_x86_64_gc_sweep_hook): Likewise.
-	(elf_backend_gc_sweep_hook): Likewise.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elflink.c (_bfd_elf_link_check_relocs): Don't check relocations
-	in excluded sections
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19969
-	* elf64-x86-64.c (check_relocs_failed): New.
-	(elf_x86_64_need_pic): Moved before elf_x86_64_check_relocs.
-	Support relocation agaist local symbol.  Set check_relocs_failed.
-	(elf_x86_64_check_relocs): Use elf_x86_64_need_pic.  Check
-	R_X86_64_32 relocation overflow.
-	(elf_x86_64_relocate_section): Skip if check_relocs failed.
-	Update one elf_x86_64_need_pic and remove one elf_x86_64_need_pic.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_check_relocs): Call
-	_bfd_elf_create_ifunc_sections only for STT_GNU_IFUNC symbol.
-	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf-bfd.h (_bfd_elf_link_check_relocs): New.
-	* elflink.c (_bfd_elf_link_check_relocs): New function.
-	(elf_link_add_object_symbols): Call _bfd_elf_link_check_relocs
-	if check_relocs_after_open_input is FALSE.
-
-2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* cache.c: Update old style function definitions.
-	* elf32-m68k.c: Likewise.
-	* elf64-mmix.c: Likewise.
-	* stab-syms.c: Likewise.
-
-2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf32-arm.c (put_thumb2_insn): Change argument type to bfd_byte *.
-
-2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.in: Regenerated with automake 1.11.6.
-	* aclocal.m4: Likewise.
-	* doc/Makefile.in: Likewise.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
-	* bfd-in2.h: Regenerate.
-	* libbfd.h: Regenerate.
-	* elf32-arc.c: Add 'opcode/arc.h' include.
-	(struct arc_relocation_data): Add symbol_name.
-	(arc_special_overflow_checks): New function.
-	(arc_do_relocation): Use arc_special_overflow_checks, reindent as
-	required, add an extra comment.
-	(elf_arc_relocate_section): Setup symbol_name in reloc_data.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf32-arc.c (tls_got_entries): Add 'TLS_GOT_' prefix to all
-	entries.
-	(elf_arc_relocate_section): Update enum uses.
-	(elf_arc_check_relocs): Likewise.
-	(elf_arc_finish_dynamic_symbol): Likewise.
-
-2016-04-14  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf.c (_bfd_elf_copy_private_bfd_data): Replace "link" with
-	"sh_link".
-
-2016-04-14  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19938
-	* elf-bbfd.h (struct elf_backend_data): New field:
-	elf_strtab_flags.
-	New field: elf_backend_set_special_section_info_and_link
-	* elfxx-target.h (elf_backend_strtab_flags): Define if not already
-	defined.
-	(elf_backend_set_special_section_info_and_link): Define if not
-	already defined.
-	(elfNN_bed): Use elf_backend_set_special_section_info_and_link and
-	elf_backend_strtab_flags macros to initialise fields in structure.
-	* elf.c (_bfd_elf_make_section_from_shdr): Check for SHF_STRINGS
-	being set even if SHF_MERGE is not set.
-	(elf_fake_sections): Likewise.
-	(section_match): New function.  Matches two ELF sections based
-	upon fixed characteristics.
-	(find_link): New function.  Locates a section in a BFD that
-	matches a section in a different BFD.
-	(_bfd_elf_copy_private_bfd_data): Copy the sh_info and sh_link
-	fields of reserved sections.
-	(bfd_elf_compute_section_file_positions): Set the flags for the
-	.shstrtab section based upon the elf_strtab_flags field in the
-	elf_backend_data structure.
-	(swap_out_syms): Likewise for the .strtab section.
-	* elflink.c (bfd_elf_final_link): Set the flags for the
-	.strtab section based upon the elf_strtab_flags field in the
-	elf_backend_data structure.
-	* elf32-i386.c (elf32_i386_set_special_info_link): New function.
-	(elf_backend_strtab_flags): Set to SHF_STRINGS for Solaris
-	targets.
-	(elf_backend_set_special_section_info_and_link): Define for
-	Solaris targets.
-	* elf32-sparc.c: Likewise.
-	* elf64-x86-64.c: Likewise.
-
-2016-04-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19939
-	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add a pointer
-	to bfd_boolean.
-	* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Updated.
-	Set *readonly_dynrelocs_against_ifunc_p to TRUE if dynamic reloc
-	applies to read-only section.
-	* elf32-i386.c (elf_i386_link_hash_table): Add
-	readonly_dynrelocs_against_ifunc.
-	(elf_i386_allocate_dynrelocs): Updated.
-	(elf_i386_size_dynamic_sections): Issue an error for read-only
-	segment with dynamic IFUNC relocations only if
-	readonly_dynrelocs_against_ifunc is TRUE.
-	* elf64-x86-64.c (elf_x86_64_link_hash_table): Add
-	readonly_dynrelocs_against_ifunc.
-	(elf_x86_64_allocate_dynrelocs): Updated.
-	(elf_x86_64_size_dynamic_sections): Issue an error for read-only
-	segment with dynamic IFUNC relocations only if
-	readonly_dynrelocs_against_ifunc is TRUE.
-	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
-	Updated.
-
-2016-04-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf32-arm.c (elf32_arm_size_stubs): Move error_ret_free_local to be
-	a fall through from error_ret_free_internal.  Free local_syms in
-	error_ret_free_local if allocated from bfd_elf_get_elf_syms ().
-
-2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c (plt_do_relocs_for_symbol): Changed.
-	(relocate_plt_for_entry): Likewise.
-
-2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c (elf_arc_check_relocs): Changed
-
-2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c (name_for_global_symbol): Changed assert.
-	(get_replace_function): Created.:
-	(struct arc_relocation_data): Changed to signed types.
-	(defines S, L, P, PDATA): Casted to signed type.
-	(defines SECTSTART, _SDA_BASE_, TLS_REL): Likewise.
-	(PRINT_DEBUG_RELOC_INFO_BEFORE): Changed.
-	(arc_do_relocation): Changed.
-
-2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c (name_for_global_symbol): Added assert to check for
-	symbol index.
-	(elf_arc_relocate_section): Added and changed asserts, validating
-	the synamic symbol index.
-	(elf_arc_finish_dynamic_symbol): Do not fill the dynamic
-	relocation if symbol has dynindx set to -1.
-
-2016-04-05  Maciej W. Rozycki  <macro@imgtec.com>
-
-	PR ld/19908
-	* elflink.c (elf_link_add_object_symbols): Always turn hidden
-	and internal symbols which have a dynamic index into local
-	ones.
-
-2016-04-04  Nick Clifton  <nickc@redhat.com>
-
-	PR 19872
-	* dwarf2.c (parse_comp_unit): Skip warning about unrecognised
-	version number if the version is zero.
-
-2016-04-01  Alan Modra  <amodra@gmail.com>
-
-	PR 19886
-	* elflink.c (on_needed_list): Recursively check needed status.
-	(elf_link_add_object_symbols): Adjust.
-
-2016-03-30  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* elf32-avr.c (avr_elf32_load_records_from_section): Free
-	internal_relocs only if they aren't cached.
-
-2016-03-29  Nick Clifton  <nickc@redhat.com>
-
-	PR 17334
-	* elf32-bfin.c (elf32_bfinfdpic_finish_dynamic_sections): Relax
-	assertion on the size of the got section to allow it to be bigger
-	than the number of relocs.
-
-2016-03-29  Toni Spets  <toni.spets@iki.fi>
-
-	PR 19878
-	* coffcode.h (coff_write_object_contents): Revert accidental
-	2014-11-10 change.
-
-2016-03-22  Alan Modra  <amodra@gmail.com>
-
-	PR 19850
-	* dwarf2.c (read_attribute_value): Skip info_ptr check for
-	DW_FORM_flag_present.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	* cpu-v850_rh850.c (arch_info_struct): Restore v850-rh850 as an
-	architecture name for backwards compatibility.
-
-	* peXXigen.c (_bfd_XXi_write_codeview_record): Fix possible
-	unbounded stack use.
-
-	* warning.m4 (GCC_WARN_CFLAGS): Only add -Wstack-usage if using a
-	sufficiently recent version of GCC.
-	* configure: Regenerate.
-
-2016-03-22  Alan Modra  <amodra@gmail.com>
-
-	PR 19851
-	* plugin.c (try_load_plugin): Avoid -Wstack-usage warning.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* archures.c (bfd_mach_arc_nps400): Define.
-	* bfd-in2.h: Regenerate.
-	* cpu-arc.c (arch_info_struct): New entry for nps400, renumber
-	some existing entries to make space.
-	* elf32-arc.c (arc_elf_object_p): Add nps400 case.
-	(arc_elf_final_write_processing): Likewise.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf32-arc.c (arc_elf_print_private_bfd_data): Remove use of
-	EF_ARC_CPU_GENERIC.
-	(arc_elf_final_write_processing): Don't bother setting cpu field
-	in e_flags, this will have been set elsewhere.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf32-arc.c (arc_elf_final_write_processing): Switch to using
-	EF_ARC_MACH_MSK.
-
-2016-03-21  Nick Clifton  <nickc@redhat.com>
-
-	* warning.m4 (GCC_WARN_CFLAGS): Add -Wstack-usage=262144
-	* configure: Regenerate.
-	* elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Replace use of
-	alloca with call to xmalloc.
-	* elf32-nds32.c: Likewise.
-	* elf64-hppa.c: Likewise.
-	* elfxx-mips.c: Likewise.
-	* pef.c: Likewise.
-	* pei-x86_64.c: Likewise.
-	* som.c: Likewise.
-	* xsym.c: Likewise.
-
-2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19827
-	* elf32-i386.c (elf_i386_check_relocs): Bind defined symbol
-	locally in PIE.
-	(elf_i386_relocate_section): Likewise.
-	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
-	(elf_x86_64_relocate_section): Likewise.
-
-2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19807
-	* elf64-x86-64.c (elf_x86_64_relocate_section): Check
-	no_reloc_overflow_check to diable R_X86_64_32/R_X86_64_32S
-	relocation overflow check.
-
-2016-03-14  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* bfd-in2.h: Regenerated.
-
-2016-03-11  Dan Gissel  <dgisselq@ieee.org>
-
-	PR 19713
-	* elf.c (_bfd_elf_section_offset): Ensure that the returned offset
-	uses bytes not octets.
-	* elflink.c (resolve_section): Likewise.
-	Add a bfd parameter.
-	(eval_section): Pass the input_bfd to resolve_section.
-	(bfd_elf_perform_complex_relocation): Convert byte offset to
-	octets before read and writing values.
-	(elf_link_input_bfd): Add byte to octet conversions.
-	(elf_reloc_link_order): Likewise.
-	(elf_fixup_link_order): Likewise.
-	(bfd_elf_final_link): Likewise.
-	* reloc.c (_bfd_final_link_relocate): Likewise.
-	* syms.c (_bfd_stab_section_find_nearest_line): Likewise.
-
-2016-03-10  Nick Clifton  <nickc@redhat.com>
-
-	* config.bfd: Mark the i370 target as obsolete.
-
-2016-03-09  Pedro Alves  <palves@redhat.com>
-
-	* cpu-v850.c (N): Append ":old-gcc-abi" instead of " (using old
-	gcc ABI)" to printable name.
-	* cpu-v850_rh850.c (bfd_v850_rh850_arch): Use "v850:rh850" instead
-	of "v850-rh850" as printable name.
-
-2016-03-09  Leon Winter  <winter-gcc@bfw-online.de>
-
-	PR ld/19623
-	* cofflink.c (_bfd_coff_generic_relocate_section): Do not apply
-	relocations against absolute symbols.
-
-2016-03-09  Alan Modra  <amodra@gmail.com>
-
-	PR binutils/19775
-	* coff-alpha.c (alpha_ecoff_openr_next_archived_file): Allow zero
-	length elements in the archive.
-
-2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19789
-	* elflink.c (elf_link_add_object_symbols): Create dynamic sections
-	for -E/--dynamic-list only when not relocatable.
-
-2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19784
-	* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
-	count for locally defined local IFUNC symbols in shared object.
-	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
-
-2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19579
-	* elflink.c (_bfd_elf_merge_symbol): Group common symbol checking
-	together.
-
-2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
-	    Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf32-arc.c (arc_bfd_get_32): Becomes an alias for bfd_get_32.
-	(arc_bfd_put_32): Becomes an alias for bfd_put_32.
-	(arc_elf_howto_init): Added assert to validate relocations.
-	(get_middle_endian_relocation): Delete.
-	(middle_endian_convert): New function.
-	(ME): Redefine, now does nothing.
-	(IS_ME): New define.
-	(arc_do_relocation): Extend the attached 'ARC_RELOC_HOWTO'
-	definition to call middle_endian_convert.  Add a new local
-	variable and make use of this throughout. Added call to
-	arc_bfd_get_8 and arc_bfd_put_8 for 8 bit relocations.
-
-2016-03-07  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/19775
-	* archive.c (bfd_generic_openr_next_archived_file): Allow zero
-	length elements in the archive.
-
-2016-03-07  Jiong Wang  <jiong.wang@arm.com>
-
-	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Always create .got
-	section if the symbol "_GLOBAL_OFFSET_TABLE_" is referenced.
-
-2016-03-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19579
-	* elflink.c (_bfd_elf_merge_symbol): Treat common symbol in
-	executable as definition if the new definition comes from a
-	shared library.
-
-2016-03-02  Alan Modra  <amodra@gmail.com>
-
-	* Makefile.in: Regenerate.
-	* po/SRC-POTFILES.in: Regenerate.
-
-2016-02-29  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* elf32-arc.c (elf_arc_relocate_section): Added rules to fix the
-	relocation addend when sections get merged.
-
-2016-02-29  Cupertino Miranda <Cupertino.Miranda@synopsys.com>
-
-	* elf32-arc.c (arc_elf_final_write_processing): Add condition to
-	the flag change.
-        (elf_arc_relocate_section): Fixes and conditions to support PIE.
-	Assert for code sections dynamic relocs.
-
-2016-02-26  Renlin Li  <renlin.li@arm.com>
-
-	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow
-	check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19609
-	* elf32-i386.c (elf_i386_convert_load): Convert to R_386_32 for
-	load with locally bound symbols if PIC is false or there is no
-	base register.  Optimize branch to 0 if PIC is false.
-	(elf_i386_relocate_section): Don't generate dynamic relocations
-	against undefined weak symbols if PIC is false.
-	* elf64-x86-64.c (elf_x86_64_convert_load): Disable optimization
-	if we can't estimate relocation overflow with --no-relax.
-	Convert to R_X86_64_32S/R_X86_64_32 for load with locally bound
-	symbols if PIC is false.  Optimize branch to 0 if PIC is false.
-	(elf_x86_64_relocate_section): Don't generate dynamic relocations
-	against undefined weak symbols if PIC is false.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19645
-	* bfd.c (bfd): Change flags to 20 bits.
-	(BFD_CONVERT_ELF_COMMON): New.
-	(BFD_USE_ELF_STT_COMMON): Likewise.
-	(BFD_FLAGS_SAVED): Add BFD_CONVERT_ELF_COMMON and
-	BFD_USE_ELF_STT_COMMON.
-	(BFD_FLAGS_FOR_BFD_USE_MASK): Likewise.
-	* configure.ac: Remove --enable-elf-stt-common.
-	* elf.c (swap_out_syms): Choose STT_COMMON or STT_OBJECT for
-	common symbol depending on BFD_CONVERT_ELF_COMMON and
-	BFD_USE_ELF_STT_COMMON.
-	* elfcode.h (elf_slurp_symbol_table): Set BSF_ELF_COMMON for
-	STT_COMMON.
-	* elflink.c (bfd_elf_link_mark_dynamic_symbol): Also check
-	STT_COMMON.
-	(elf_link_convert_common_type): New function.
-	(elf_link_output_extsym): Choose STT_COMMON or STT_OBJECT for
-	common symbol depending on BFD_CONVERT_ELF_COMMON and
-	BFD_USE_ELF_STT_COMMON.  Set sym.st_info after sym.st_shndx.
-	* elfxx-target.h (TARGET_BIG_SYM): Add BFD_CONVERT_ELF_COMMON
-	and BFD_USE_ELF_STT_COMMON to object_flags.
-	(TARGET_LITTLE_SYM): Likewise.
-	* syms.c (BSF_KEEP_G): Renamed to ...
-	(BSF_ELF_COMMON): This.
-	* bfd-in2.h: Regenerated.
-	* config.in: Likewise.
-	* configure: Likewise.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19636
-	PR ld/19704
-	PR ld/19719
-	* elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): New.
-	(elf_i386_link_hash_entry): Add has_got_reloc and
-	has_non_got_reloc.
-	(elf_i386_link_hash_table): Add interp.
-	(elf_i386_link_hash_newfunc): Initialize has_got_reloc and
-	has_non_got_reloc.
-	(elf_i386_copy_indirect_symbol): Copy has_got_reloc and
-	has_non_got_reloc.
-	(elf_i386_check_relocs): Set has_got_reloc and has_non_got_reloc.
-	(elf_i386_fixup_symbol): New function.
-	(elf_i386_pie_finish_undefweak_symbol): Likewise.
-	(elf_i386_allocate_dynrelocs): Don't allocate space for dynamic
-	relocations and discard relocations against resolved undefined
-	weak symbols in executable.  Don't make resolved undefined weak
-	symbols in executable dynamic.  Keep dynamic non-GOT/non-PLT
-	relocation against undefined weak symbols in PIE.
-	(elf_i386_size_dynamic_sections): Set interp to .interp section.
-	(elf_i386_relocate_section): Don't generate dynamic relocations
-	against resolved undefined weak symbols in PIE, except for
-	R_386_PC32.
-	(elf_i386_finish_dynamic_symbol): Keep PLT/GOT entries without
-	dynamic PLT/GOT relocations for resolved undefined weak symbols.
-	Don't generate dynamic relocation against resolved undefined weak
-	symbol in executable.
-	(elf_i386_finish_dynamic_sections): Call
-	elf_i386_pie_finish_undefweak_symbol on all symbols in PIE.
-	(elf_backend_fixup_symbol): New.
-	* elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): New.
-	(elf_x86_64_link_hash_entry): Add has_got_reloc and
-	has_non_got_reloc.
-	(elf_x86_64_link_hash_table): Add interp.
-	(elf_x86_64_link_hash_newfunc): Initialize has_got_reloc and
-	has_non_got_reloc.
-	(elf_x86_64_copy_indirect_symbol): Copy has_got_reloc and
-	has_non_got_reloc.
-	(elf_x86_64_check_relocs): Set has_got_reloc and
-	has_non_got_reloc.
-	(elf_x86_64_fixup_symbol): New function.
-	(elf_x86_64_pie_finish_undefweak_symbol): Likewise.
-	(elf_x86_64_allocate_dynrelocs): Don't allocate space for dynamic
-	relocations and discard relocations against resolved undefined
-	weak symbols in executable.  Don't make resolved undefined weak
-	symbols in executable dynamic.
-	(elf_x86_64_size_dynamic_sections): Set interp to .interp section.
-	(elf_x86_64_relocate_section): Check relocation overflow for
-	dynamic relocations against unresolved weak undefined symbols.
-	Don't generate dynamic relocations against resolved weak
-	undefined symbols in PIE.
-	(elf_x86_64_finish_dynamic_symbol): Keep PLT/GOT entries without
-	dynamic PLT/GOT relocations for resolved undefined weak symbols.
-	Don't generate dynamic relocation against resolved undefined weak
-	symbol in executable.
-	(elf_x86_64_finish_dynamic_sections): Call
-	elf_x86_64_pie_finish_undefweak_symbol on all symbols in PIE.
-	(elf_backend_fixup_symbol): New.
-
-2016-02-26  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (create_linkage_sections): Create sfpr when
-	save_restore_funcs, rest of sections when not relocatable.
-	(ppc64_elf_init_stub_bfd): Always call create_linkage_sections.
-	(sfpr_define): Define all symbols on emitted code.
-	(ppc64_elf_func_desc_adjust): Adjust for sfpr now being created
-	when relocatable.  Move sfpr_define loop earlier.
-
-2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf64-x86-64.c (elf_x86_64_need_pic): New function.
-	(elf_x86_64_relocate_section): Use it.  Replace
-	x86_64_elf_howto_table[r_type] with howto.
-
-2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19698
-	* elflink.c (bfd_elf_record_link_assignment): Set versioned if
-	symbol version is unknown.
-
-2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf32-i386.c (elf_i386_allocate_dynrelocs): Set plt_got.offset
-	to (bfd_vma) -1 when setting needs_plt to 0.
-	* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise.
-
-2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elflink.c (bfd_elf_record_link_assignment): Check for shared
-	library, instead of PIC, and don't check PDE when making linker
-	assigned symbol dynamic.
-
-2016-02-23  Faraz Shahbazker  <faraz.shahbazker@imgtec.com>
-
-	* bfd/elfxx-mips.c (_bfd_mips_post_process_headers): Increment
-	ABIVERSION for non-executable stack.
-
-2016-02-23  Rich Felker  <bugdal@aerifal.cx>
-
-	PR target/19516
-	* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol):
-	Always produce a RELATIVE reloc for a local symbol.
-
-2016-02-23  Hans-Peter Nilsson  <hp@axis.com>
-
-	Fix test-case ld-elf/pr19617b
-	* elf32-cris.c (elf_cris_discard_excess_program_dynamics): Don't
-	discard unused non-function symbols when --dynamic-list-data.
-
-2016-02-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elflink.c (_bfd_elf_link_renumber_dynsyms): Always create the
-	dynsym section, even if it is empty, with dynamic sections.
-
-2016-02-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* syms.c: Remove BSF_COMMON from comments.
-	* bfd-in2.h: Regenerated.
-
-2016-02-22  Jiong Wang  <jiong.wang@arm.com>
-
-	* elfnn-aarch64. (aarch64_type_of_stub): Remove redundation calcuation
-	for destination.  Remove useless function parameters.
-	(elfNN_aarch64_size_stubs): Update parameters for aarch64_type_of_stub.
-
-2016-02-19  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/19629
-	* aoutx.h (aout_link_add_symbols): Check for out of range string
-	table offsets.
-
-	PR ld/19628
-	* reloc.c (bfd_generic_get_relocated_section_contents): Stop
-	processing if we encounter a reloc without an associated symbol.
-
-2016-02-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19617
-	* elflink.c (elf_link_add_object_symbols): Always create dynamic
-	sections for -E/--dynamic-list.
-
-2016-02-17  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elf64-x86-64.c (elf_backend_omit_section_dynsym): New.  Defined
-	to bfd_true.
-
-2016-02-16  Joseph Myers  <joseph@codesourcery.com>
-
-	* plugin.c (plugin_vec): Set match priority to 255.
-	* format.c (bfd_check_format_matches) [BFD_SUPPORTS_PLUGINS]: When
-	matching against the plugin vector, take priority from there not
-	from TEMP.
-
-2016-02-15  Nick Clifton  <nickc@redhat.com>
-
-	* elf-bfd.h (struct bfd_elf_special_section): Use unsigned values
-	for length and type fields.  Use a signed value for the
-	suffix_length field.
-
-2016-02-10  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19601
-	* elf32-i386.c (elf_i386_relocate_section): Mask off the least
-	significant bit in GOT offset for R_386_GOT32X.
-
-2016-02-10  Nick Clifton  <nickc@redhat.com>
-
-	PR 19405
-	* elf32-nios2.c (nios2_elf32_install_imm16): Allow for signed
-	immediate values.
-	* elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Limit the
-	number of messages about FDE encoding preventing .eh_frame_hdr
-	generation.
-
-2016-02-09  Nick Clifton  <nickc@redhat.com>
-
-	* oasys.c (oasys_archive_p): Fix indentation.
-	* elf32-nds32.c (nds32_elf_relax_section): Use an unsigned
-	constant for left shifting.
-
-	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more
-	helpful warning message to explain why certain AArch64 relocs
-	might overflow.
-
-2016-02-05  Simon Marchi  <simon.marchi@ericsson.com>
-
-	* pe-mips.c (coff_mips_reloc): Fix formatting.
-
-2016-02-05  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
-
-	* cpu-arc.c: Change default archure from bfd_mach_arc_arcv2
-	to bfd_mach_arc_arc600.
-
-2016-02-04  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_relocate_section): Adjust last patch
-	for big-endian.
-
-2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19542
-	* elf64-x86-64.c (elf_x86_64_convert_load): Store the estimated
-	distances in the compressed_size field of the output section.
-
-2016-02-02  Alan Modra  <amodra@gmail.com>
-
-	* elf64-ppc.c (ppc64_elf_relocate_section): Further restrict
-	ELFv2 entry optimization.
-
-2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/19547
-	* elf.c (assign_section_numbers): Clear HAS_RELOC if there are
-	no relocations in relocatable files.
-
-2016-02-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19553
-	* elflink.c (elf_link_add_object_symbols): Don't add DT_NEEDED
-	if a symbol from a library loaded via DT_NEEDED doesn't match
-	the symbol referenced by regular object.
-
-2016-02-01  Nathaniel Smith  <njs@pobox.com>
-
-	* peicode.h (pe_ILF_build_a_bfd): Create an import symbol for both
-	CODE and DATA.
-
-2016-02-01  Alan Modra  <amodra@gmail.com>
-
-	* elf64-x86-64.c (elf_x86_64_get_plt_sym_val): Don't abort on
-	an out of range reloc_index.
-	* elf32-i386.c (elf_i386_get_plt_sym_val): Likewise.
-
-2016-02-01  Kamil Rytarowski  <n54@gmx.com>
-
-	* Makefile.am (OPTIONAL_BACKENDS): Add netbsd-core.lo.
-	(OPTIONAL_BACKENDS_CFILES): Add netbsd-core.c.
-	* Makefile.in: Regenerated.
-
-2016-02-01  Jan Kratochvil  <jan.kratochvil@redhat.com>
-
-	* elf64-s390.c (elf_s390_reloc_name_lookup): Fix indentation.
-
-2016-01-31  John David Anglin  <danglin@gcc.gnu.org>
-
-	PR ld/19526
-	* elf32-hppa.c (elf32_hppa_final_link): Don't sort non-regular output
-	files.
-	* elf64-hppa.c (elf32_hppa_final_link): Likewise.  Remove retval.
-
-2016-01-30  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19539
-	* elf32-i386.c (elf_i386_reloc_type_class): Check relocation
-	against STT_GNU_IFUNC symbol only with dynamic symbols.
-	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.
-
-2016-01-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/19523
-	* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to
-	decompress debug sections.
-
-2016-01-25  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf32-arc.c (elf_arc_finish_dynamic_symbol): Rename `index' to
-	`dynindx'.
-
-2016-01-25  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19435
-	* mach-o.c (bfd_mach_o_close_and_cleanup): Suppress code to free
-	dsym filename buffer.
-
-2016-01-24  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (BZ16_REG_FIELD): Simplify calculation.
-
-2016-01-24  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (BZ16_REG): Correct calculation.
-
-2016-01-21  Nick Clifton  <nickc@redhat.com>
-
-	* elf32-arc.c (ADD_RELA): Fix compile time warning errors by
-	changing the type of _loc to be bfd_byte *.
-	(elf_arc_finish_dynamic_symbol): Likewise.
-
-2016-01-21  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/19455
-	* elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF
-	class of the linker stub bfd.
-	(elf32_arm_check_relocs): Skip check for pic format after
-	processing a vxWorks R_ARM_ABS12 reloc.
-	* elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when
-	reporting a class mismatch.
-
-2016-01-21  Jiong Wang  <jiong.wang@arm.com>
-
-	* elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
-	veneer for sym_sec != input_sec.
-	(elfNN_aarch64_size_stub): Support STT_SECTION symbol.
-	(elfNN_aarch64_final_link_relocate): Take rela addend into account when
-	calculation destination.
-
-2016-01-21  Alan Modra  <amodra@gmail.com>
-
-	* elf-linux-core.h (swap_linux_prpsinfo32_out): New function.
-	(swap_linux_prpsinfo64_out): New function.
-	(LINUX_PRPSINFO32_SWAP_FIELDS): Delete.
-	(LINUX_PRPSINFO64_SWAP_FIELDS): Delete.
-	* elf.c (elfcore_write_linux_prpsinfo32): Adjust.  Don't memset.
-	(elfcore_write_linux_prpsinfo64): Likewise.
-	* elf32-ppc.c (swap_ppc_linux_prpsinfo32_out): New function.
-	(PPC_LINUX_PRPSINFO32_SWAP_FIELDS): Delete.
-	(elfcore_write_ppc_linux_prpsinfo32): Adjust.  Don't memset.
-
-2016-01-21  Alan Modra  <amodra@gmail.com>
-
-	* elf-linux-core.h: Rename from elf-linux-psinfo.h.
-	* elf.c: Adjust #include.
-	* elf32-ppc.c: Don't #include elf-linux-psinfo.h
-	* Makefile.am (SOURCE_HFILES): Update.
-	* Makefile.in: Regenerate.
-	* po/SRC-PORFILES.in: Regenerate.
-
-2016-01-21  Alan Modra  <amodra@gmail.com>
-
-	* configure.ac: Move corefile selection later in file.  Move
-	tdefaults code immediately after other target vector code.
-	* configure: Regenerate.
-
-2016-01-20  Mickael Guene  <mickael.guene@st.com>
-
-	* elf32-arm.c (elf32_arm_special_sections): Remove catch of noread
-	section using '.text.noread' pattern.
-
-2016-01-19  John Baldwin  <jhb@FreeBSD.org>
-
-	* elf.c (elfcore_grok_note): Recognize NT_FREEBSD_THRMISC notes.
-
-2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
-	    Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
-
-	* arc-plt.def: New file.
-	* arc-plt.h: Likewise.
-	* elf32-arc.c (elf_arc_abs_plt0_entry, elf_arc_abs_pltn_entry,
-		       elf_arcV2_abs_plt0_entry, elf_arcV2_abs_pltn_entry,
-		       elf_arc_pic_plt0_entry, elf_arc_pic_pltn_entry,
-		       elf_arcV2_pic_plt0_entry, elf_arcV2_pic_pltn_entry): Remove.
-	(name_for_global_symbol): Added.
-	(ADD_RELA): Helper to create dynamic relocs.
-	(new_got_entry_to_list): Create a new got entry in linked list.
-	(symbol_has_entry_of_type): Search for specific type of entry in
-	list.
-	(is_reloc_for_GOT): return FALSE for any TLS related relocs.
-	(is_reloc_for_TLS, arc_elf_set_private_flags)
-	(arc_elf_print_private_bfd_data, arc_elf_copy_private_bfd_data)
-	(arc_elf_merge_private_bfd_data): New functions.
-	(debug_arc_reloc): Cleaned debug info printing.
-	(PDATA reloc): Changed not to perform address alignment.
-	(reverse_me): Added. Fix for ARC_32 relocs.
-	(arc_do_relocation): Return bfd_reloc_of when no relocation should
-	occur.
-	(arc_get_local_got_ents): Renamed from arc_get_local_got_offsets.
-	Changed function to access an array of list of GOT entries instead
-	of just an array of offsets.
-	(elf_arc_relocate_section): Added support for PIC and TLS related relocations.
-	(elf_arc_check_relocs): Likewise.
-	(elf_arc_adjust_dynamic_symbol, elf_arc_finish_dynamic_symbol,
-	(elf_arc_finish_dynamic_sections): Likewise
-	(arc_create_dynamic_sections): Modified conditions to create
-	dynamic sections.
-	(ADD_SYMBOL_REF_SEC_AND_RELOC): New macro.
-	(plt_do_relocs_for_symbol, relocate_plt_for_symbol)
-	(relocate_plt_for_entry): Changed to support new way to define PLT
-	related code.
-	(add_symbol_to_plt): Likewise.
-	(arc_elf_link_hash_table_create): New function.
-
-2016-01-18  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/19440
-	* coff-rs6000.c (_bfd_xcoff_swap_sym_in): Sign extend external
-	section number into internal section number.
-	* coff64-rs6000.c (_bfd_xcoff64_swap_sym_in): Likewise.
-	* coffswap.h (coff_swap_sym_in): Likewise.
-	* peXXigen.c (_bfd_XXi_swap_sym_in): Likewise.
-	* coffcode.h (_coff_bigobj_swap_sym_in): Make sure that internal
-	section number field is big enough to hold the external value.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-12  Yury Usishchev  <y.usishchev@samsung.com>
-
-	* elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind
-	when address in first unwind entry does not match start of
-	section.
-
-2016-01-08  Richard Sandiford  <richard.sandiford@arm.com>
-	    Jiong Wang  <jiong.wang@arm.com>
-
-	PR ld/19368
-	* elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to
-	reloc_class_ifunc.
-
-2016-01-06  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf32-arc.c (reloc_type_to_name): Change ARC_RELOC_HOWTO to
-	place 'R_' before the reloc name returned.
-	(elf_arc_howto_table): Change ARC_RELOC_HOWTO to place 'R_' before
-	the relocation string.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_merge_obj_abiflags): New function,
-	factored out from...
-	(_bfd_mips_elf_merge_private_bfd_data): ... here.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move
-	attribute check after ELF file header flag check.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_merge_obj_attributes): Propagate the
-	return status from `_bfd_elf_merge_object_attributes'.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (mips_elf_merge_obj_e_flags): New function,
-	factored out from...
-	(_bfd_mips_elf_merge_private_bfd_data): ... here.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Fold the
-	handling of input MIPS ABI flags together.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Suppress
-	attribute checks for null input.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Use local
-	pointers to target data.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Correct
-	an FP ABI warning.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-2015 and doc/ChangeLog-0415
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/bfd/ChangeLog-2016 b/bfd/ChangeLog-2016
new file mode 100644
index 0000000..15e104a
--- /dev/null
+++ b/bfd/ChangeLog-2016
@@ -0,0 +1,4293 @@
+2016-12-31  Alan Modra  <amodra@gmail.com>
+
+	* elfn32-mips.c (elf_backend_want_dynrelro): Define.
+
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* archures.c: Add bfd_arch_pru.
+	* Makefile.am: Add PRU target.
+	* config.bfd: Ditto.
+	* configure.ac: Ditto.
+	* elf-bfd.h (enum elf_target_id): Add PRU_ELF_DATA.
+	* targets.c: Add pru_elf32_vec.
+	* reloc.c: Add PRU relocations.
+	* cpu-pru.c: New file.
+	* elf32-pru.c: New file.
+	* Makefile.in: Regenerate.
+	* configure: Regenerate.
+	* po/SRC-POTFILES.in: Regenerate.
+	* bfd-in2.h: Regenerate
+	* libbfd.h: Regenerate.
+
+2016-12-29  Alan Modra  <amodra@gmail.com>
+
+	* elflink.c (_bfd_elf_link_hash_copy_indirect): Only omit
+	copying one flag, ref_dynamic, when versioned_hidden.
+	* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise.
+	* elf32-hppa.c (elf32_hppa_copy_indirect_symbol): Use same
+	logic for copying weakdef flags.  Copy plabel flag and merge
+	tls_type.
+	* elf32-i386.c (elf_i386_copy_indirect_symbol): Use same logic
+	for copying weakdef flags.
+	* elf32-ppc.c (ppc_elf_copy_indirect_symbol): Likewise.
+	* elf32-s390.c (elf_s390_copy_indirect_symbol): Likewise.
+	* elf32-sh.c (sh_elf_copy_indirect_symbol): Likewise.
+	* elf64-s390.c (elf_s390_copy_indirect_symbol): Likewise.
+	* elfnn-ia64.c (elfNN_ia64_hash_copy_indirect): Likewise.
+	* elf64-x86-64.c (elf_x86_64_copy_indirect_symbol): Likewise.
+	Simplify.
+
+2016-12-28  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20995
+	* elflink.c (elf_link_add_object_symbols): Mark relro sections
+	in dynamic objects SEC_READONLY.
+
+2016-12-26  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20995
+	* elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and
+	sreldynrelro.
+	(struct elf_backend_data): Add want_dynrelro.
+	* elfxx-target.h (elf_backend_want_dynrelro): Define.
+	(elfNN_bed): Update initializer.
+	* elflink.c (_bfd_elf_create_dynamic_sections): Create
+	sdynrelro and sreldynrelro sections.
+	* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables
+	copied into the executable from read-only sections into sdynrelro.
+	(elf32_arm_size_dynamic_sections): Handle sdynrelro.
+	(elf32_arm_finish_dynamic_symbol): Select sreldynrelro for
+	dynamic relocs in sdynrelro.
+	(elf_backend_want_dynrelro): Define.
+	* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol)
+	(elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-i386.c (elf_i386_adjust_dynamic_symbol)
+	(elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-metag.c (elf_metag_adjust_dynamic_symbol)
+	(elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol)
+	(microblaze_elf_size_dynamic_sections)
+	(microblaze_elf_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol)
+	(nios2_elf32_adjust_dynamic_symbol)
+	(nios2_elf32_size_dynamic_sections)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-or1k.c (or1k_elf_finish_dynamic_symbol)
+	(or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol)
+	(ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-s390.c (elf_s390_adjust_dynamic_symbol)
+	(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol)
+	(elf32_tic6x_size_dynamic_sections)
+	(elf32_tic6x_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol)
+	(tilepro_elf_size_dynamic_sections)
+	(tilepro_elf_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol)
+	(ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf64-s390.c (elf_s390_adjust_dynamic_symbol)
+	(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol)
+	(elf_x86_64_size_dynamic_sections)
+	(elf_x86_64_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol)
+	(elfNN_aarch64_size_dynamic_sections)
+	(elfNN_aarch64_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol)
+	(riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol)
+	(elf_backend_want_dynrelro): As above.
+	* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol)
+	(_bfd_mips_elf_size_dynamic_sections)
+	(_bfd_mips_vxworks_finish_dynamic_symbol): As above.
+	* elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol)
+	(_bfd_sparc_elf_size_dynamic_sections)
+	(_bfd_sparc_elf_finish_dynamic_symbol): As above.
+	* elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol)
+	(tilegx_elf_size_dynamic_sections)
+	(tilegx_elf_finish_dynamic_symbol): As above.
+	* elf32-mips.c (elf_backend_want_dynrelro): Define.
+	* elf64-mips.c (elf_backend_want_dynrelro): Define.
+	* elf32-sparc.c (elf_backend_want_dynrelro): Define.
+	* elf64-sparc.c (elf_backend_want_dynrelro): Define.
+	* elf32-tilegx.c (elf_backend_want_dynrelro): Define.
+	* elf64-tilegx.c (elf_backend_want_dynrelro): Define.
+	* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy.
+	(microblaze_elf_size_dynamic_sections): Handle sdynbss.
+	* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use
+	of linker shortcuts to dynamic sections rather than comparing
+	names.  Correctly set "got" flag.
+
+2016-12-26  Alan Modra  <amodra@gmail.com>
+
+	* elf-bfd.h (struct elf_link_hash_table): Add sdynbss and srelbss.
+	* elflink.c (_bfd_elf_create_dynamic_sections): Set them.  Create
+	.rel.bss/.rela.bss for executables, both PIE and non-PIE.
+	* elf32-arc.c (struct elf_arc_link_hash_table): Delete srelbss.
+	Use ELF hash table var throughout.
+	* elf32-arm.c (struct elf32_arm_link_hash_table): Delete sdynbss
+	and srelbss.  Use ELF hash table vars throughout.
+	* elf32-hppa.c (struct elf32_hppa_link_hash_table): Likewise.
+	* elf32-i386.c (struct elf_i386_link_hash_table): Likewise.
+	* elf32-metag.c (struct elf_metag_link_hash_table): Likewise.
+	* elf32-microblaze.c (struct elf32_mb_link_hash_table): Likewise.
+	* elf32-nios2.c (struct elf32_nios2_link_hash_table): Likewise.
+	* elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise.
+	* elf32-ppc.c (struct ppc_elf_link_hash_table): Likewise.
+	* elf32-s390.c (struct elf_s390_link_hash_table): Likewise.
+	* elf32-tic6x.c (struct elf32_tic6x_link_hash_table): Likewise.
+	* elf32-tilepro.c (struct tilepro_elf_link_hash_table): Likewise.
+	* elf64-ppc.c (struct ppc_link_hash_table): Likewise.
+	* elf64-s390.c (struct elf_s390_link_hash_table): Likewise.
+	* elf64-x86-64.c (struct elf_x86_64_link_hash_table): Likewise.
+	* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Likewise.
+	* elfnn-riscv.c (struct riscv_elf_link_hash_table): Likewise.
+	* elfxx-mips.c (struct mips_elf_link_hash_table): Likewise.
+	* elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Likewise.
+	* elfxx-sparc.c: Likewise.
+	* elfxx-tilegx.c (struct tilegx_elf_link_hash_table): Likewise.
+
+	* elf32-arc.c (arc_elf_create_dynamic_sections): Delete.
+	(elf_backend_create_dynamic_sections): Use base ELF version.
+	* elf32-microblaze.c (microblaze_elf_create_dynamic_sections): Delete.
+	(elf_backend_create_dynamic_sections): Use base ELF version.
+	* elf32-or1k.c (or1k_elf_create_dynamic_sections): Delete.
+	(elf_backend_create_dynamic_sections): Use base ELF version.
+	* elf32-s390.c (elf_s390_create_dynamic_sections): Delete.
+	(elf_backend_create_dynamic_sections): Use base ELF version.
+	* elf64-ppc.c (ppc64_elf_create_dynamic_sections): Delete.
+	(elf_backend_create_dynamic_sections): Use base ELF version.
+	* elf64-s390.c (elf_s390_create_dynamic_sections): Delete.
+	(elf_backend_create_dynamic_sections): Use base ELF version.
+
+	* elf32-tilepro.c (tilepro_elf_create_dynamic_sections): Remove
+	extraneous tests.
+	* elfnn-aarch64.c (elfNN_aarch64_create_dynamic_sections): Likewise.
+	* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Likewise.
+	* elfxx-tilegx.c (tilegx_elf_create_dynamic_sections): Likewise.
+
+	* elf32-i386.c (elf_i386_create_dynamic_sections): Don't create
+	".rel.bss" for executables.
+	* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Don't create
+	".rela.bss" for executables.
+	* elf32-nios2.c (nios2_elf32_create_dynamic_sections): Don't
+	ignore return status from _bfd_elf_create_dynamic_sections.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* bfd/elfxx-mips.c (_bfd_mips_post_process_headers): Revert
+	2016-02-23 change and remove EI_ABIVERSION 5 support.
+
+2016-12-23  Alan Modra  <amodra@gmail.com>
+
+	* linker.c (generic_link_check_archive_element): Call target
+	bfd_link_add_symbols to add element symbols.
+
+2016-12-23  Alan Modra  <amodra@gmail.com>
+
+	* linker.c (generic_link_add_symbols): Delete.  Merge into..
+	(_bfd_generic_link_add_symbols): ..here.
+	(generic_link_check_archive_element_no_collect): Delete.
+	(generic_link_check_archive_element_collect): Likewise.
+	(generic_link_add_object_symbols): Remove "collect" param.  Update
+	callers.
+	(generic_link_add_symbol_list): Likewise.
+	(generic_link_check_archive_element): Likewise.  Call
+	bfd_link_add_symbols rather than generic_link_add_object_symbols.
+	* libbfd-in.h (_bfd_generic_link_add_symbols_collect): Delete.
+	* libbfd.h: Regenerate.
+
+2016-12-23  Alan Modra  <amodra@gmail.com>
+
+	PR binutils/20464
+	PR binutils/14625
+	* configure.ac: Revert 2016-05-25 configure change setting
+	want_64_bit_archive for mips64 and s390x.  Revise USE_64_BIT_ARCHIVE
+	description.
+	* configure: Regenerate.
+	* config.in: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* version.m4: Bump version to 2.28.51
+	* configure: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* po/bfd.pot: Regenerate.
+
+2016-12-22  Alan Modra  <amodra@gmail.com>
+
+	* libbfd-in.h (_bfd_vms_lib_slurp_armap): Use _bfd_noarchive function.
+	(_bfd_vms_lib_slurp_extended_name_table: Likewise.
+	(_bfd_vms_lib_construct_extended_name_table: Likewise.
+	(_bfd_vms_lib_truncate_arname: Likewise.
+	(_bfd_vms_lib_write_armap: Likewise.
+	(_bfd_vms_lib_read_ar_hdr: Likewise.
+	(_bfd_vms_lib_write_ar_hdr: Likewise.
+	* libbfd.h: Regenerate.
+
+2016-12-21: Yury Norov <ynorov@caviumnetworks.com>
+            Andreas Schwab <schwab@suse.de>
+
+	* cpu-aarch64.c: Fix word and address size declaration in
+	ilp32 mode in bfd_arch_info_type bfd_aarch64_arch_ilp32
+	structure.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
+	EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* elfnn-riscv.c (bfd_riscv_get_max_alignment): Return bfd_vma
+	instead of unsigned int.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+	    Kuan-Lin Chen  <kuanlinchentw@gmail.com>
+
+	* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
+	(BFD_RELOC_RISCV_TPREL_S): Likewise.
+	(BFD_RELOC_RISCV_RELAX): Likewise.
+	(BFD_RELOC_RISCV_CFA): Likewise.
+	(BFD_RELOC_RISCV_SUB6): Likewise.
+	(BFD_RELOC_RISCV_SET8): Likewise.
+	(BFD_RELOC_RISCV_SET8): Likewise.
+	(BFD_RELOC_RISCV_SET16): Likewise.
+	(BFD_RELOC_RISCV_SET32): Likewise.
+	* elfnn-riscv.c (perform_relocation): Handle the new
+	relocations.
+	(_bfd_riscv_relax_tls_le): Likewise.
+	(_bfd_riscv_relax_align): Likewise.
+	(_bfd_riscv_relax_section): Likewise.
+	(howto_table): Likewise.
+	(riscv_reloc_map): Likewise.
+	(relax_func_t): New type.
+	(_bfd_riscv_relax_call): Add reserve_size argument, which
+	controls the maximal offset pessimism.  Correct type of max_alignment.
+	(_bfd_riscv_relax_lui): Likewise.
+	(_bfd_riscv_relax_tls_le): Likewise.
+	(_bfd_riscv_relax_align): Likewise.
+	(_bfd_riscv_relax_section): Compute the required reserve size
+	when relocating and use it to when calling relax_func.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Likewise.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* elfnn-riscv.c: Formatting and comment fixes throughout.
+	* elfxx-riscv.c: Likewise.
+	(howto_table): Change the src_mask field from MINUS_ONE to 0 for
+	R_RISCV_TLS_DTPMOD32, R_RISCV_TLS_DTPMOD64, R_RISCV_TLS_DTPREL32,
+	R_RISCV_TLS_DTPREL64, R_RISCV_TLS_TPREL32, R_RISCV_TLS_TPREL64.
+
+2016-12-20  Palmer Dabbelt  <palmer@dabbelt.com>
+
+	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Improve
+	error message when linking elf32 and elf64.
+
+2016-12-19  Christian Groessler  <chris@groessler.org>
+
+	* elf32-arm.c (elf32_arm_popcount): Rename from 'popcount'.  Make
+	'sum' local variable signed.
+
+2016-12-16  fincs  <fincs.alt1@gmail.com>
+
+	* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Add handling
+	for info->gc_keep_exported.
+	(bfd_elf_gc_sections): Likewise.
+
+2016-12-15  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20968
+	PR ld/20908
+	* elflink.c (bfd_elf_final_link): Revert 2016-12-02 change.  Move
+	reloc counting code later after ELF flavour test.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
+	(bfd_mips_elf_get_abiflags): New prototype.
+	* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
+	* bfd-in2.h: Regenerate.
+
+2016-12-14  Yury Norov <ynorov@caviumnetworks.com>
+
+         * bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where
+         TCB_SIZE is used.
+
+2016-12-13  Alan Modra  <amodra@gmail.com>
+
+	* elf64-hppa.c (elf64_hppa_modify_segment_map): Don't add PHDR
+	for objcopy/strip or when a ld script specifies PHDRS.
+
+2016-12-13  Alan Modra  <amodra@gmail.com>
+
+	* elf32-rx.c (elf32_rx_modify_program_headers): Don't adjust
+	segments that include the ELF file header or program headers.
+
+2016-12-08  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20932
+	* elflink.c (bfd_elf_record_link_assignment): Handle warning symbols.
+
+2016-12-07  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20932
+	* elflink.c (bfd_elf_record_link_assignment): Replace call to
+	abort with an error message and error return value.
+
+2016-12-06  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20931
+	* elf.c (copy_special_section_fields): Check for an invalid
+	sh_link field before attempting to follow it.
+
+	PR binutils/20929
+	* aoutx.h (squirt_out_relocs): Check for relocs without an
+	associated symbol.
+
+2016-12-06  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ok_lo_toc_insn): Add r_type param.  Recognize
+	lq,lfq,lxv,lxsd,lxssp,lfdp,stq,stfq,stxv,stxsd,stxssp,stfdp.
+	Don't match lmd and stmd.
+
+2016-12-05  Alyssa Milburn <amilburn@zall.org>
+
+	* elfxx-sparc.c: Do not stop processing relocations after
+	partially relaxing a call with WDISP30.
+
+2016-12-05  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20905
+	* peicode.h (pe_ILF_object_p): Use strnlen to avoid running over
+	the end of the string buffer.
+
+	PR binutils/20907
+	* peicode.h (pe_ILF_build_a_bfd): Replace abort with error return.
+
+	PR binutils/20921
+	* aoutx.h (squirt_out_relocs): Check for and report any relocs
+	that could not be recognised.
+
+	PR binutils/20922
+	* elf.c (find_link): Check for null headers before attempting to
+	match them.
+
+	PR ld/20925
+	* aoutx.h (aout_link_add_symbols): Replace BFD_ASSERT with return
+	FALSE.
+
+	PR ld/20924
+	(aout_link_add_symbols): Fix off by one error checking for
+	overflow of string offset.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (struct ppc_link_hash_entry): Delete "was_undefined".
+	(struct ppc_link_hash_table): Delete "twiddled_syms".  Add
+	"need_func_desc_adj".
+	(lookup_fdh): Link direct fdh sym via oh field and set flags.
+	(make_fdh): Make strong and weak undefined function descriptor
+	symbols.
+	(ppc64_elf_merge_symbol): New function.
+	(elf_backend_merge_symbol): Define.
+	(ppc64_elf_archive_symbol_lookup): Don't test undefweak for fake
+	function descriptors.
+	(add_symbol_adjust): Don't twiddle symbols to undefweak.
+	Propagate more ref flags to function descriptor symbol.  Make
+	some function descriptor symbols dynamic.
+	(ppc64_elf_before_check_relocs): Only run add_symbol_adjust for
+	ELFv1.  Set need_func_desc_adj.  Don't fix undefs list.
+	(ppc64_elf_check_relocs): Set non_ir_ref for descriptors.
+	Don't call lookup_fdh here.
+	(ppc64_elf_gc_sections): New function.
+	(bfd_elf64_bfd_gc_sections): Define.
+	(ppc64_elf_gc_mark_hook): Mark descriptor.
+	(func_desc_adjust): Don't make fake function descriptor syms strong
+	here.  Exit earlier on non-dotsyms.  Take note of elf.dynamic
+	flag when deciding whether a dynamic function descriptor might
+	be needed.  Transfer elf.dynamic and set elf.needs_plt.  Move
+	plt regardless of visibility.  Make descriptor dynamic if
+	entry sym is dynamic, not for other cases.
+	(ppc64_elf_func_desc_adjust): Don't run func_desc_adjust if
+	already done.
+	(ppc64_elf_edit_opd): Use oh field rather than lookup_fdh.
+	(ppc64_elf_size_stubs): Likewise.
+	(ppc_build_one_stub): Don't clear was_undefined.  Only set sym
+	undefweak if stub symbol is defined.
+	(undo_symbol_twiddle, ppc64_elf_restore_symbols): Delete.
+	* elf64-ppc.h (ppc64_elf_restore_symbols): Don't declare.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_hide_symbol): Access hash table as
+	elf_link_hash_table rather than ppc_link_hash_table.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (add_symbol_adjust): Delete dead code.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (add_symbol_adjust): Correct order of tests for
+	warning and indirect symbols.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Don't copy dynamic
+	flags when direct symbol is versioned_hidden.
+
+2016-12-02  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20908
+	* elflink.c (bfd_elf_final_link): Check for ELF flavour binaries
+	when following indirect links.
+
+	PR ld/20909
+	* aoutx.h (aout_link_add_symbols): Fix off-by-one error in check
+	for an illegal string offset.
+
+2016-12-02  Gary Benson  <gbenson@redhat.com>
+
+	* elf.c (_bfd_elf_make_section_from_shdr): Pass offset to
+	elf_parse_notes.
+
+2016-12-02  Josh Conner  <joshconner@google.com>
+
+	* config.bfd: Add support for fuchsia (OS).
+
+2016-12-01  Yury Norov  <ynorov@caviumnetworks.com>
+
+	PR ld/20868
+	* elfnn-aarch64.c (elfNN_aarch64_tls_relax): Use 32-bit accesses
+	to the GOT when operating in 32-bit mode.
+
+2016-12-01  Ma Jiang  <ma.jiang@zte.com.cn>
+
+	PR ld/16720
+	* elfxx-mips.c (mips_elf_calculate_relocation): Remove overflow
+	test for HI16 relocs.
+
+2016-12-01  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20891
+	* aoutx.h (find_nearest_line): Handle the case where the main file
+	name and the directory name are both empty.
+
+	PR binutils/20892
+	* aoutx.h (find_nearest_line): Handle the case where the function
+	name is empty.
+
+2016-11-30  Alan Modra  <amodra@gmail.com>
+
+	* elf.c (get_program_header_size): Revert accidental change.
+
+2016-11-30  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20886
+	* elf64-ppc.c (ppc64_elf_size_stubs): Make rawsize max size seen
+	on any pass past STUB_SHRINK_ITER.
+
+2016-11-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elflink.c (_bfd_elf_fix_symbol_flags): Hide hidden versioned
+	symbol in executable.
+	(elf_link_output_extsym): Don't change bind from global to
+	local when linking executable.
+
+2016-11-28  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20815
+	* elf.c (phdr_sorter): Delete.
+	(assign_file_positions_except_relocs): Do not sort program
+	headers.
+
+2016-11-25  Jon Turney  <jon.turney@dronecode.org.uk>
+
+	PR ld/20193
+	* peXXigen.c (rsrc_process_section): Do not shrink the merged
+	.rsrc section.
+
+2016-11-24  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20737
+	* elf32-arm.c (elf32_arm_final_link_relocate): Bind defined symbol
+	locally in PIE.
+
+2016-11-24  Kuan-Lin Chen  <kuanlinchentw@gmail.com>
+
+	* bfd/elfxx-riscv.c (howto_table): Fix bitsize of R_RISCV_ADD8.
+
+2016-11-23  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20815
+	* elf.c (elf_modify_segment_map): Allow empty LOAD segments if
+	they contain the program headers.
+	(_bfd_elf_map_sections_to_segments): If the linker created the
+	PHDR segment then always attempt to include it in a LOAD segment.
+	(assign_file_positions_for_non_load_sections): Allow LOAD segments
+	to overlap PHDR segments.
+	(phdr_sorter): New function.  Sorts program headers.
+	(assign_file_positions_except_relocs): Sort the program headers
+	before writing them out.  Issue an error if the PHDR segment is
+	not covered by a LOAD segment, unless the backend allows it.
+	* elf-bfd.h (struct elf_backend_data): Add
+	elf_backend_allow_non_load_phdr.
+	* elfxx-target.h (elf_backend_allow_non_load_phdr): Provide
+	default definition that returns FALSE.
+	(elfNN_bed): Initialise the elf_backend_allow_non_load_phdr
+	field.
+	* elf64-hppa.c (elf64_hppa_allow_non_load_phdr): New function.
+	Returns TRUE.
+	(elf_backend_allow_non_load_phdr): Define.
+	* elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Do not
+	place the interpreter string into the .interp section if the
+	nointerp flag is set in the link info structure.
+	* elf32-arc.c (elf_arc_size_dynamic_sections): Likewise.
+	* elf32-score7.c (score_elf_final_link_relocate): Allow for the
+	_gp symbol not being part of the output.
+
+2016-11-23  Alan Modra  <amodra@gmail.com>
+
+	* elf-bfd.h (struct elf_backend_data): Add dtrel_excludes_plt.
+	* elfxx-target.h (elf_backend_dtrel_excludes_plt): Define.
+	(elfNN_bed): Init new field.
+	* elflink.c (bfd_elf_final_link): Add and use htab variable.  Handle
+	dtrel_excludes_plt.
+	* elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Delete
+	DT_RELASZ code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-arc.c (elf_arc_finish_dynamic_sections): Delete DT_RELASZ code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-arm.c (elf32_arm_finish_dynamic_sections): Delete code
+	subtracting off plt relocs from DT_RELSZ, DT_RELASZ.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Delete
+	DT_RELASZ code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-cris.c (elf_cris_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-hppa.c (elf32_hppa_finish_dynamic_sections): Delete DT_RELASZ
+	and DT_RELA code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-i386.c (elf_i386_finish_dynamic_sections): Delete DT_RELSZ
+	and DT_REL code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-m32r.c (m32r_elf_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-m68k.c (elf_m68k_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-metag.c (elf_metag_finish_dynamic_sections): Delete DT_RELASZ
+	and DT_RELA code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Delete
+	DT_RELASZ and DT_RELA code.  Use ELF htab shortcuts for other
+	dynamic sections.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-mips.c (elf_backend_dtrel_excludes_plt): Define.
+	* elf32-nds32.c (nds32_elf_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-or1k.c (or1k_elf_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-ppc.c (ppc_elf_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-sh.c (sh_elf_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-sparc.c (elf_backend_dtrel_excludes_plt): Define.
+	* elf32-vax.c (elf_vax_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf64-ppc.c (ppc64_elf_finish_dynamic_sections): Delete DT_RELASZ
+	and DT_RELA code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Delete
+	DT_RELASZ code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elfnn-ia64.c (elfNN_ia64_finish_dynamic_sections): Delete DT_RELASZ
+	code.
+	(elf_backend_dtrel_excludes_plt): Define.
+	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Delete
+	DT_RELASZ code.
+	* elfxx-sparc.c (sparc_finish_dyn): Delete DT_RELASZ code.
+
+2016-11-23  Alan Modra  <amodra@gmail.com>
+
+	* elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts
+	to dynamic sections.
+	(mn10300_elf_final_link_relocate): Likewise.
+	(_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise.
+	(_bfd_mn10300_elf_size_dynamic_sections): Likewise.
+	(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
+	(_bfd_mn10300_elf_finish_dynamic_sections): Likewise.
+	* elf32-bfin.c (bfin_check_relocs): Likewise.
+	(bfin_relocate_section): Likewise.
+	(bfin_gc_sweep_hook): Likewise.
+	(struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt
+	and spltrel.
+	(bfinfdpic_got_section, bfinfdpic_gotrel_section,
+	bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf
+	shortcut sections.
+	(_bfin_create_got_section): Use elf htab shortcuts to dyn sections.
+	Delete dead code.
+	(bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections.
+	(bfin_size_dynamic_sections): Likewise.
+	* elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise.
+	(cr16_elf_check_relocs): Likewise.
+	(cr16_elf_final_link_relocate): Likewise.
+	(_bfd_cr16_elf_create_dynamic_sections): Likewise.
+	(_bfd_cr16_elf_adjust_dynamic_symbol): Likewise.
+	(_bfd_cr16_elf_size_dynamic_sections): Likewise.
+	(_bfd_cr16_elf_finish_dynamic_symbol): Likewise.
+	(_bfd_cr16_elf_finish_dynamic_sections): Likewise.
+	* elf32-cris.c (cris_elf_relocate_section): Likewise.
+	(elf_cris_finish_dynamic_symbol): Likewise.
+	(elf_cris_finish_dynamic_sections): Likewise.
+	(cris_elf_gc_sweep_hook): Likewise.
+	(elf_cris_adjust_gotplt_to_got): Likewise.
+	(elf_cris_adjust_dynamic_symbol): Likewise.
+	(cris_elf_check_relocs): Likewise.  Delete dead code.
+	(elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic
+	sections.
+	(elf_cris_discard_excess_program_dynamics): Likewise.
+	* elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot,
+	sgotrel, splt and spltrel.
+	(frvfdpic_got_section, frvfdpic_gotrel_section,
+	frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf
+	shortcut sections.
+	(_frv_create_got_section): Likewise.
+	* elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot,
+	srelgot, splt and srelplt.
+	(hppa_build_one_stub): Use elf htab shortcuts to dynamic sections.
+	(elf32_hppa_create_dynamic_sections): Likewise.
+	(elf32_hppa_check_relocs): Likewise.
+	(allocate_plt_static): Likewise.
+	(allocate_dynrelocs): Likewise.
+	(elf32_hppa_size_dynamic_sections): Likewise.
+	(elf32_hppa_relocate_section): Likewise.
+	(elf32_hppa_finish_dynamic_symbol): Likewise.
+	(elf32_hppa_finish_dynamic_sections): Likewise.
+	* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
+	* elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot,
+	sgotplt, srelgot, splt and srelplt.
+	(lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf
+	shortcut sections.
+	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
+	(lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections.
+	(lm32_elf_check_relocs): Likewise.
+	(lm32_elf_finish_dynamic_sections): Likewise.
+	(lm32_elf_finish_dynamic_symbol): Likewise.
+	(allocate_dynrelocs): Likewise.
+	(lm32_elf_size_dynamic_sections): Likewise.
+	(lm32_elf_create_dynamic_sections): Likewise.
+	* elf32-m32c.c (m32c_elf_relocate_section): Likewise.
+	(m32c_elf_check_relocs): Likewise.
+	(m32c_elf_finish_dynamic_sections): Likewise.
+	(m32c_elf_always_size_sections): Likewise.
+	* elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot,
+	sgotplt, srelgot, splt and srelplt.
+	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
+	(m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
+	sections.
+	(allocate_dynrelocs): Likewise.
+	(m32r_elf_size_dynamic_sections): Likewise.
+	(m32r_elf_relocate_section): Likewise.
+	(m32r_elf_finish_dynamic_symbol): Likewise.
+	(m32r_elf_finish_dynamic_sections): Likewise.
+	(m32r_elf_check_relocs): Likewise.
+	* elf32-m68k.c (elf_m68k_partition_multi_got): Likewise.
+	(elf_m68k_check_relocs): Likewise.
+	(elf_m68k_adjust_dynamic_symbol): Likewise.
+	(elf_m68k_size_dynamic_sections): Likewise.
+	(elf_m68k_relocate_section): Likewise.
+	(elf_m68k_finish_dynamic_symbol): Likewise.
+	(elf_m68k_finish_dynamic_sections): Likewise.
+	* elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot,
+	sgotplt, srelgot, splt and srelplt.
+	(elf_metag_relocate_section): Use elf htab shortcuts to dynamic
+	sections.
+	(elf_metag_create_dynamic_sections): Likewise.  Allocate got header
+	here in .got.
+	(elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections.
+	(allocate_dynrelocs): Likewise.
+	(elf_metag_size_dynamic_sections): Likewise.
+	(elf_metag_finish_dynamic_symbol): Likewise.
+	(elf_metag_finish_dynamic_sections): Likewise.
+	(elf_metag_size_stubs): Likewise.
+	(elf_backend_got_header_size): Don't define.
+	(elf_backend_want_got_plt): Define.
+	* elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot,
+	sgotplt, srelgot, splt and srelpl.
+	(microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic
+	sections.
+	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
+	(microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections.
+	(microblaze_elf_create_dynamic_sections): Likewise.
+	(allocate_dynrelocs): Likewise.
+	(microblaze_elf_size_dynamic_sections): Likewise.
+	(microblaze_elf_finish_dynamic_symbol): Likewise.
+	(microblaze_elf_finish_dynamic_sections): Likewise.
+	* elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL
+	already zero fields.
+	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
+	(nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
+	sections.
+	(allocate_dynrelocs): Likewise.
+	(nds32_elf_size_dynamic_sections): Likewise.
+	(nds32_elf_relocate_section): Likewise.
+	(nds32_elf_finish_dynamic_symbol): Likewise.
+	(nds32_elf_finish_dynamic_sections): Likewise.
+	(nds32_elf_check_relocs): Likewise.
+	(calculate_plt_memory_address): Likewise.
+	(calculate_got_memory_address): Likewise.
+	* elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot,
+	sgotplt, srelgot, splt and srelplt.
+	* elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise.
+	(or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections.
+	(create_got_section): Delete.  Use _bfd_elf_create_got_section instead.
+	(or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections.
+	(or1k_elf_finish_dynamic_sections): Likewise.
+	(or1k_elf_finish_dynamic_symbol): Likewise.
+	(allocate_dynrelocs): Likewise.
+	(or1k_elf_size_dynamic_sections): Likewise.
+	(or1k_elf_create_dynamic_sections): Likewise.
+	* elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot,
+	plt, relplt, iplt, reliplt and sgotplt.
+	(ppc_elf_create_got): Use elf htab shortcuts to dynamic sections.
+	(ppc_elf_create_glink): Likewise.
+	(ppc_elf_create_dynamic_sections): Likewise.
+	(ppc_elf_check_relocs): Likewise.
+	(ppc_elf_select_plt_layout): Likewise.
+	(ppc_elf_tls_setup): Likewise.
+	(allocate_got): Likewise.
+	(allocate_dynrelocs): Likewise.
+	(ppc_elf_size_dynamic_sections): Likewise.
+	(ppc_elf_relax_section): Likewise.
+	(ppc_elf_relocate_section): Likewise.
+	(ppc_elf_finish_dynamic_symbol): Likewise.
+	(ppc_elf_reloc_type_class): Likewise.
+	(ppc_elf_finish_dynamic_sections): Likewise.
+	* elf32-rl78.c (rl78_elf_relocate_section): Likewise.
+	(rl78_elf_check_relocs): Likewise.
+	(rl78_elf_finish_dynamic_sections): Likewise.
+	(rl78_elf_always_size_sections): Likewise.
+	* elf32-s390.c 	(create_got_section): Delete.
+	(elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section.
+	(elf_s390_check_relocs): Likewise.
+	* elf32-score.c (score_elf_create_got_section): Set elf shortcuts.
+	(s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts.
+	* elf32-score7.c (score_elf_create_got_section): As above.
+	(s7_bfd_score_elf_finish_dynamic_sections): As above.
+	* elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot,
+	sgotplt, srelgot, splt and srelplt.
+	(create_got_section): Don't set them.
+	(sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
+	sections.
+	(allocate_dynrelocs): Likewise.
+	(sh_elf_size_dynamic_sections): Likewise.
+	(sh_elf_add_rofixup): Likewise.
+	(sh_elf_relocate_section): Likewise.
+	(sh_elf_check_relocs): Likewise.
+	(sh_elf_finish_dynamic_symbol): Likewise.
+	(sh_elf_finish_dynamic_sections): Likewise.
+	* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise.
+	* elf32-tilepro.c (tilepro_elf_create_got_section): Likewise.
+	* elf32-vax.c (elf_vax_check_relocs): Likewise.
+	(elf_vax_adjust_dynamic_symbol): Likewise.
+	(elf_vax_always_size_sections): Likewise.
+	(elf_vax_instantiate_got_entries): Likewise.
+	(elf_vax_relocate_section): Likewise.
+	(elf_vax_finish_dynamic_symbol): Likewise.
+	(elf_vax_finish_dynamic_sections): Likewise.
+	* elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise.
+	(xstormy16_elf_always_size_sections): Likewise.
+	(xstormy16_elf_relocate_section): Likewise.
+	(xstormy16_elf_finish_dynamic_sections): Likewise.
+	* elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot,
+	sgotplt, srelgot, splt and srelplt.
+	(elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to
+	dynamic sections.
+	(elf_xtensa_allocate_dynrelocs): Likewise.
+	(elf_xtensa_allocate_local_got_size): Likewise.
+	(elf_xtensa_size_dynamic_sections): Likewise.
+	(elf_xtensa_relocate_section): Likewise.
+	(elf_xtensa_finish_dynamic_sections): Likewise.
+	(shrink_dynamic_reloc_sections): Likewise.
+	(elf_xtensa_get_plt_section): Likewise.
+	(elf_xtensa_get_gotplt_section): Likewise.
+	(xtensa_callback_required_dependence): Likewise.
+	* elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab
+	shortcuts to dynamic sections.
+	(elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to
+	dynamic sections.
+	(elf64_alpha_size_plt_section): Likewise.
+	(elf64_alpha_size_rela_got_1): Likewise.
+	(elf64_alpha_size_rela_got_section): Likewise.
+	(elf64_alpha_relocate_section): Likewise.
+	(elf64_alpha_finish_dynamic_symbol): Likewise.
+	(elf64_alpha_finish_dynamic_sections): Likewise.
+	* elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise.
+	* elf64-s390.c (create_got_section): Delete.
+	(elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section.
+	(elf_s390_check_relocs): Likewise.
+	* elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to
+	dynamic sections.
+	(sh_elf64_check_relocs): Likewise.
+	(sh64_elf64_adjust_dynamic_symbol): Likewise.
+	(sh64_elf64_size_dynamic_sections): Likewise.
+	(sh64_elf64_finish_dynamic_symbol): Likewise.
+	(sh64_elf64_finish_dynamic_sections): Likewise.
+	* elflink.c (_bfd_elf_create_got_section): Likewise.
+	* elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise.
+	* elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise.
+	(elfNN_ia64_finish_dynamic_sections): Likewise.
+	* elfnn-riscv.c (riscv_elf_create_got_section): Likewise.
+	* elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt,
+	sgotplt, splt and sgot.
+	(mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic
+	sections.
+	(mips_elf_gotplt_index): Likewise.
+	(mips_elf_primary_global_got_index): Likewise.
+	(mips_elf_global_got_index): Likewise.
+	(mips_elf_got_offset_from_index): Likewise.
+	(mips_elf_create_local_got_entry): Likewise.
+	(mips_elf_create_got_section): Likewise.
+	(mips_elf_calculate_relocation): Likewise.
+	(_bfd_mips_elf_create_dynamic_sections): Likewise.
+	(_bfd_mips_elf_adjust_dynamic_symbol): Likewise.
+	(mips_elf_lay_out_got): Likewise.
+	(mips_elf_set_plt_sym_value): Likewise.
+	(_bfd_mips_elf_size_dynamic_sections): Likewise.
+	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
+	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
+	(mips_finish_exec_plt): Likewise.
+	(mips_vxworks_finish_exec_plt): Likewise.
+	(mips_vxworks_finish_shared_plt): Likewise.
+	(_bfd_mips_elf_finish_dynamic_sections): Likewise.
+	* elfxx-sparc.c (sparc_finish_dyn): Likewise.
+	* elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
+
+2016-11-23  Alan Modra  <amodra@gmail.com>
+
+	* po/BLD-POTFILES.in: Regenerate.
+	* po/SRC-POTFILES.in: Regenerate.
+
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+        * warning.m4: Fix spelling in comments.
+        * configure.ac: Fix spelling in comments.
+        * configure: Regenerate.
+
+2016-11-22  Alan Modra  <amodra@gmail.com>
+
+	PR 20744
+	* elf32-ppc.h (struct ppc_elf_params): Add vle_reloc_fixup field.
+	* elf32-ppc.c: Include opcode/ppc.h.
+	(ppc_elf_howto_raw): Correct dst_mask for R_PPC_VLE_LO16A,
+	R_PPC_VLE_LO16D, R_PPC_VLE_HI16A, R_PPC_VLE_HI16D, R_PPC_VLE_HA16A,
+	R_PPC_VLE_HA16D, R_PPC_VLE_SDAREL_LO16A, R_PPC_VLE_SDAREL_LO16D,
+	R_PPC_VLE_SDAREL_HI16A, R_PPC_VLE_SDAREL_HI16D,
+	R_PPC_VLE_SDAREL_HA16A, and R_PPC_VLE_SDAREL_HA16D relocs.
+	(ppc_elf_link_hash_table_create): Update default_params init.
+	(ppc_elf_vle_split16): Correct shift and mask.  Add params.
+	Report or fix insn/reloc mismatches.
+	(ppc_elf_relocate_section): Pass input_section, offset and fixup
+	to ppc_elf_vle_split16.
+
+2016-11-22  Alan Modra  <amodra@gmail.com>
+
+	* elf32-ppc.c (ppc64_elf_relocate_section): Calculate d_offset for
+	input_bfd.  Replace occurrences of output_bfd as bfd_get_32 and
+	bfd_put_32 param with input_bfd.
+	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.  Also
+	ppc_elf_vle_split16 param.
+	(ppc_elf_vle_split16): Rename output_bfd param to input_bfd.
+
+2016-11-21  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* dwarf2.c (build_line_info_table): Rename `index' local
+	variable to `line_index'.
+	(build_lookup_funcinfo_table): Rename `index' local variable to
+	`func_index'.
+
+2016-11-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Do not
+	apply the negative GOT offset optimization in 64-bit code.
+
+2016-11-18  James Clarke  <jrtc27@jrtc27.com>
+
+	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
+	R_SPARC_GOTDATA_OP_HIX22 and R_SPARC_GOTDATA_OP_LOX10 to
+	R_SPARC_GOT* for non-local references. Instead, treat them like
+	R_SPARC_GOTDATA_HIX22/R_SPARC_GOTDATA_LOX10 when filling in the
+	immediate with the calculated relocation.
+
+2016-11-18  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20675
+	* elf32-metag.c (elf_metag_relocate_section): Replace abort with
+	an informative error message.
+
+2016-11-15  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20789
+	* bfd/elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Do signed
+	manipulation of diff value, and don't assume sym2 is less than sym1.
+	(elf32_avr_adjust_reloc_if_spans_insn): New function.
+	(elf32_avr_relax_delete_bytes): Use elf32_avr_adjust_diff_reloc_value,
+	and remove redundant did_pad.
+
+
+2016-11-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20800
+	* elf64-x86-64.c (elf_x86_64_relocate_section): Also check
+	plt_got.offset for R_X86_64_PLTOFF64.
+
+2016-11-14  Nick Clifton  <nickc@redhat.com>
+
+	* coffcode.h (coff_slurp_symbol_table): Fix typo: Faal -> Fall.
+
+2016-11-11  Luke Allardyce  <lukeallardyce@gmail.com>
+
+	PR ld/20722
+	* coffcode.h (coff_slurp_symbol_table): Accept C_HIDDEN symbols,
+	but treat them as debugging symbols.
+
+2016-11-10  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20737
+	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Bind defined
+	symbol locally in PIE.
+
+2016-11-10  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20801
+	* compress.c (bfd_get_full_section_contents): Provide a more
+	helpful error message when a section is too large to load.
+
+2016-11-08  Pedro Alves  <palves@redhat.com>
+
+	* dwarf2.c (struct funcinfo) <is_linkage>: Type is bfd_boolean,
+	not "bfd boolean".
+
+2016-11-08  Igor Tsimbalist  <tigor.tools@gmail.com>
+
+	* dwarf2.c (comp_unit): Add new fields 'lookup_funcinfo_table' and
+	'number_of_functions' to keep lookup table and number of entries in
+	the table.
+	(line_sequence): Add new fields 'line_info_lookup' and 'num_lines'
+	to keep lookup table and number of entries in the table.
+	(lookup_funcinfo): New structure for lookup table for function
+	references.
+	(build_line_info_table): New function to create and build the lookup
+	table for line information.
+	(lookup_address_in_line_info_table): Use the lookup table instead of
+	traverse a linked list.
+	(compare_lookup_funcinfos): New compare fuction used in sorting of
+	lookup table for function references.
+	(build_lookup_funcinfo_table): New function to create, build and
+	sort the lookup table for functions references.
+	(lookup_address_in_function_table): Use the table instead of
+	traverse a linked list.
+	(_bfd_dwarf2_cleanup_debug_info): Free memory from function references
+	lookup table.
+
+2016-11-04  Nick Clifton  <nickc@redhat.com>
+
+	* targets.c (bfd_target_vector): Only add riscv_elf32_vec target
+	when supporting 64-bit BFD targets.
+
+2016-11-03  Tristan Gingold  <gingold@adacore.com>
+
+	* config.bfd: Deprecate many old triplets.
+
+2016-11-03  Nick Clifton  <nickc@redhat.com>
+
+	* po/da.po: Updated Danish translation.
+
+2016-11-01  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* reloc.c (bfd_default_reloc_type_lookup) <BFD_RELOC_CTOR>: Do
+	not fall through to the default case.
+
+2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
+	    Andrew Waterman <andrew@sifive.com>
+
+	Add support for RISC-V architecture.
+	* Makefile.am: Add entries for riscv32-elf and riscv64-elf.
+	* config.bdf: Likewise.
+	* configure.ac: Likewise.
+	* Makefile.in: Regenerate.
+	* configure: Regenerate.
+	* archures.c: Add bfd_riscv_arch.
+	* reloc.c: Add riscv relocs.
+	* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+	* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
+	* elfnn-riscv.c: New file.
+	* elfxx-riscv.c: New file.
+	* elfxx-riscv.h: New file.
+
+2016-10-31  Alan Modra  <amodra@gmail.com>
+
+	PR 20748
+	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Revert
+	2016-05-13 change.
+
+2016-10-27  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* cpu-arc.c (arc_get_mach): Delete.
+
+2016-10-25  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (STUB_JALR): Correct description.
+
+2016-10-20  Nick Clifton  <nickc@redhat.com>
+
+	* po/gas.pot: Regenerate.
+
+2016-10-19  Nick Clifton  <nickc@redhat.com>
+
+	* aout-adobe.c: Add missing c-format tags for translatable strings.
+	* aout-cris.c: Likewise.
+	* aoutx.h: Likewise.
+	* bfd.c: Likewise.
+	* binary.c: Likewise.
+	* cache.c: Likewise.
+	* coff-alpha.c: Likewise.
+	* coff-arm.c: Likewise.
+	* coff-i860.c: Likewise.
+	* coff-mcore.c: Likewise.
+	* coff-ppc.c: Likewise.
+	* coff-rs6000.c: Likewise.
+	* coff-sh.c: Likewise.
+	* coff-tic4x.c: Likewise.
+	* coff-tic54x.c: Likewise.
+	* coff-tic80.c: Likewise.
+	* coff64-rs6000.c: Likewise.
+	* coffcode.h: Likewise.
+	* coffgen.c: Likewise.
+	* cofflink.c: Likewise.
+	* coffswap.h: Likewise.
+	* cpu-arm.c: Likewise.
+	* dwarf2.c: Likewise.
+	* ecoff.c: Likewise.
+	* elf-attrs.c: Likewise.
+	* elf-eh-frame.c: Likewise.
+	* elf-ifunc.c: Likewise.
+	* elf-m10300.c: Likewise.
+	* elf-s390-common.c: Likewise.
+	* elf.c: Likewise.
+	* elf32-arc.c: Likewise.
+	* elf32-arm.c: Likewise.
+	* elf32-avr.c: Likewise.
+	* elf32-bfin.c: Likewise.
+	* elf32-cr16.c: Likewise.
+	* elf32-cr16c.c: Likewise.
+	* elf32-cris.c: Likewise.
+	* elf32-crx.c: Likewise.
+	* elf32-d10v.c: Likewise.
+	* elf32-d30v.c: Likewise.
+	* elf32-epiphany.c: Likewise.
+	* elf32-fr30.c: Likewise.
+	* elf32-frv.c: Likewise.
+	* elf32-gen.c: Likewise.
+	* elf32-hppa.c: Likewise.
+	* elf32-i370.c: Likewise.
+	* elf32-i386.c: Likewise.
+	* elf32-i960.c: Likewise.
+	* elf32-ip2k.c: Likewise.
+	* elf32-iq2000.c: Likewise.
+	* elf32-lm32.c: Likewise.
+	* elf32-m32c.c: Likewise.
+	* elf32-m32r.c: Likewise.
+	* elf32-m68hc11.c: Likewise.
+	* elf32-m68hc12.c: Likewise.
+	* elf32-m68hc1x.c: Likewise.
+	* elf32-m68k.c: Likewise.
+	* elf32-mcore.c: Likewise.
+	* elf32-mep.c: Likewise.
+	* elf32-metag.c: Likewise.
+	* elf32-microblaze.c: Likewise.
+	* elf32-moxie.c: Likewise.
+	* elf32-msp430.c: Likewise.
+	* elf32-mt.c: Likewise.
+	* elf32-nds32.c: Likewise.
+	* elf32-nios2.c: Likewise.
+	* elf32-or1k.c: Likewise.
+	* elf32-pj.c: Likewise.
+	* elf32-ppc.c: Likewise.
+	* elf32-rl78.c: Likewise.
+	* elf32-rx.c: Likewise.
+	* elf32-s390.c: Likewise.
+	* elf32-score.c: Likewise.
+	* elf32-score7.c: Likewise.
+	* elf32-sh-symbian.c: Likewise.
+	* elf32-sh.c: Likewise.
+	* elf32-sh64.c: Likewise.
+	* elf32-spu.c: Likewise.
+	* elf32-tic6x.c: Likewise.
+	* elf32-tilepro.c: Likewise.
+	* elf32-v850.c: Likewise.
+	* elf32-vax.c: Likewise.
+	* elf32-visium.c: Likewise.
+	* elf32-xgate.c: Likewise.
+	* elf32-xtensa.c: Likewise.
+	* elf64-alpha.c: Likewise.
+	* elf64-gen.c: Likewise.
+	* elf64-hppa.c: Likewise.
+	* elf64-ia64-vms.c: Likewise.
+	* elf64-mmix.c: Likewise.
+	* elf64-ppc.c: Likewise.
+	* elf64-s390.c: Likewise.
+	* elf64-sh64.c: Likewise.
+	* elf64-sparc.c: Likewise.
+	* elf64-x86-64.c: Likewise.
+	* elfcode.h: Likewise.
+	* elfcore.h: Likewise.
+	* elflink.c: Likewise.
+	* elfnn-aarch64.c: Likewise.
+	* elfnn-ia64.c: Likewise.
+	* elfxx-mips.c: Likewise.
+	* elfxx-sparc.c: Likewise.
+	* elfxx-tilegx.c: Likewise.
+	* ieee.c: Likewise.
+	* ihex.c: Likewise.
+	* libbfd.c: Likewise.
+	* linker.c: Likewise.
+	* m68klinux.c: Likewise.
+	* mach-o.c: Likewise.
+	* merge.c: Likewise.
+	* mmo.c: Likewise.
+	* oasys.c: Likewise.
+	* pdp11.c: Likewise.
+	* pe-mips.c: Likewise.
+	* peXXigen.c: Likewise.
+	* pei-x86_64.c: Likewise.
+	* peicode.h: Likewise.
+	* ppcboot.c: Likewise.
+	* reloc.c: Likewise.
+	* sparclinux.c: Likewise.
+	* srec.c: Likewise.
+	* stabs.c: Likewise.
+	* vms-alpha.c: Likewise.
+	* vms-lib.c: Likewise.
+	* xcofflink.c: Likewise.
+
+2016-10-18  Nick Clifton  <nickc@redhat.com>
+
+	* po/da.po: Updated Danish translation.
+
+2016-10-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf32-nds32.c (nds32_elf_check_relocs): Avoid aliasing warning
+	from GCC.
+
+2016-10-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf32-arm.c (elf32_arm_update_relocs): Rename `index' local
+	variable to `reloc_index'.
+
+2016-10-12  Alan Modra  <amodra@gmail.com>
+
+	* section.c (BFD_FAKE_SECTION): Reorder parameters.  Formatting.
+	(STD_SECTION): Adjust to suit.
+	* elf.c (_bfd_elf_large_com_section): Likewise.
+	* bfd-in2.h: Regenerate.
+
+2016-10-11  Alan Modra  <amodra@gmail.com>
+
+	* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Handle symbols
+	defined temporarily with bfd_und_section.
+	* elflink.c (_bfd_elf_gc_keep): Don't set SEC_KEEP for bfd_und_section.
+	* elfxx-mips.c (mips_elf_local_pic_function_p): Exclude defined
+	symbols with bfd_und_section.
+
+2016-10-07  Alan Modra  <amodra@gmail.com>
+
+	* targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace
+	obfd param with struct bfd_link_info param.  Update all callers.
+	* linker.c (bfd_merge_private_bfd_data): Likewise.
+	(_bfd_generic_verify_endian_match): Likewise.
+	* aoutf1.h (sunos_merge_private_bfd_data): Likewise.
+	* coff-arm.c (coff_arm_merge_private_bfd_data): Likewise.
+	* elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise.
+	* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise.
+	(_bfd_elf_merge_object_attributes): Likewise.
+	* elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise.
+	* elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise.
+	* elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise.
+	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise.
+	(elf32_arm_merge_private_bfd_data): Likewise.
+	* elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise.
+	* elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise.
+	* elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise.
+	* elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise.
+	* elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise.
+	* elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise.
+	* elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise.
+	* elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise.
+	* elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise.
+	* elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
+	* elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
+	* elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise.
+	* elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise.
+	* elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise.
+	* elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise.
+	(elf32_msp430_merge_private_bfd_data): Likewise.
+	* elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise.
+	* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise.
+	* elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise.
+	* elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise.
+	* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise.
+	(ppc_elf_merge_obj_attributes): Likewise.
+	(ppc_elf_merge_private_bfd_data): Likewise.
+	* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise.
+	* elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise.
+	* elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise.
+	* elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise.
+	(elf32_score_merge_private_bfd_data): Likewise.
+	* elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise.
+	* elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise.
+	* elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise.
+	* elf32-sh64.c (sh64_elf_merge_private_data): Likewise.
+	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise.
+	* elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise.
+	(elf32_tic6x_merge_private_bfd_data): Likewise.
+	* elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise.
+	* elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise.
+	* elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise.
+	* elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise.
+	* elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise.
+	* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise.
+	* elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise.
+	* elf64-sh64.c (sh_elf64_merge_private_data): Likewise.
+	* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
+	* elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise.
+	* elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise.
+	* elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise.
+	(mips_elf_merge_obj_attributes): Likewise.
+	(_bfd_mips_elf_merge_private_bfd_data): Likewise.
+	* elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise.
+	* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
+	* elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
+	* elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise.
+	* elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
+	* elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
+	* libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
+2016-10-07  Alan Modra  <amodra@gmail.com>
+
+	* Makefile.am (LIBBFD_H_FILES): Update.
+	* doc/Makefile.am (LIBBFD_H_DEP): Likewise.
+	* cpu-sh.c (sh_merge_bfd_arch): Move to..
+	* elf32-sh.c: ..here, and make static.
+	* elf32-arc.c (arc_elf_merge_private_bfd_data): Delete extraneous
+	error.
+	* elf32-cris.c (cris_elf_merge_private_bfd_data): Don't call
+	_bfd_generic_verify_endian_match.
+	* elf32-microblaze.c (microblaze_elf_merge_private_bfd_data): Delete.
+	(bfd_elf32_bfd_merge_private_bfd_data): Define as
+	_bfd_generic_verify_endian_match.
+	* elf32-mt.c (mt_elf_merge_private_bfd_data): Don't test
+	boolean == FALSE.
+	* elf32-xgate.c (_bfd_xgate_elf_merge_private_bfd_data): Delete.
+	(bfd_elf32_bfd_merge_private_bfd_data): Don't define.
+	* elf32-xgate.h (_bfd_xgate_elf_merge_private_bfd_data): Delete.
+	* libbfd-in.h (_bfd_generic_verify_endian_match): Delete.
+	* libbfd.c (_bfd_generic_verify_endian_match): Move to..
+	* linker.c: ..here, and make internal.
+	* bfd.c (bfd_merge_private_bfd_data): Move to..
+	* linker.c: ..here.
+	* Makefile.in: Regenerate.
+	* doc/Makefile.in: Regenerate.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* coff-h8300.c: Spell fall through comments consistently.
+	* coffgen.c: Likewise.
+	* elf32-hppa.c: Likewise.
+	* elf32-ppc.c: Likewise.
+	* elf32-score.c: Likewise.
+	* elf32-score7.c: Likewise.
+	* elf64-ppc.c: Likewise.
+	* elfxx-aarch64.c: Likewise.
+	* elfxx-mips.c: Likewise.
+	* cpu-ns32k.c: Add missing fall through comments.
+	* elf-m10300.c: Likewise.
+	* elf32-arm.c: Likewise.
+	* elf32-avr.c: Likewise.
+	* elf32-bfin.c: Likewise.
+	* elf32-frv.c: Likewise.
+	* elf32-i386.c: Likewise.
+	* elf32-microblaze.c: Likewise.
+	* elf32-nds32.c: Likewise.
+	* elf32-ppc.c: Likewise.
+	* elf32-rl78.c: Likewise.
+	* elf32-rx.c: Likewise.
+	* elf32-s390.c: Likewise.
+	* elf32-sh.c: Likewise.
+	* elf32-tic6x.c: Likewise.
+	* elf64-ia64-vms.c: Likewise.
+	* elf64-ppc.c: Likewise.
+	* elf64-s390.c: Likewise.
+	* elf64-x86-64.c: Likewise.
+	* elflink.c: Likewise.
+	* elfnn-aarch64.c: Likewise.
+	* elfnn-ia64.c: Likewise.
+	* ieee.c: Likewise.
+	* oasys.c: Likewise.
+	* pdp11.c: Likewise.
+	* srec.c: Likewise.
+	* versados.c: Likewise.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* coffcode.h (coff_slurp_symbol_table): Revert accidental commit
+	made 2015-01-08.
+	* elf32-nds32.c (nds32_elf_grok_psinfo): Add missing break.
+	* reloc.c (bfd_default_reloc_type_lookup): Add missing breaks.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* elf32-epiphany.c (epiphany_final_link_relocate): Use bitwise
+	OR in arithmetic expression, not boolean OR.
+
+2016-09-30  Alan Modra  <amodra@gmail.com>
+
+	* Makefile.am (BFD_H_FILES): Add linker.c and simple.c.  Sort
+	as per comment at head of bfd-in2.h.
+	* Makefile.in: Regenerate.
+
+2016-09-30  Alan Modra  <amodra@gmail.com>
+
+	* aout-adobe.c: Replace (*_bfd_error_handler) (...) with
+	_bfd_error_handler (...) throughout.
+	* aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c,
+	* cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c,
+	* coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c,
+	* coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
+	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
+	* coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c,
+	* ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c,
+	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
+	* elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c,
+	* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c,
+	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c,
+	* elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
+	* elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c,
+	* elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c,
+	* elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c,
+	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c,
+	* elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c,
+	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
+	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
+	* elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c,
+	* elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c,
+	* elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c,
+	* ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c,
+	* mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c,
+	* pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c,
+	* rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c,
+	* stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c,
+	* xcofflink.c: Likewise.
+
+2016-09-30  Alan Modra  <amodra@gmail.com>
+
+	* bfd-in.h: Include stdarg.h.
+	* bfd.c (bfd_error_handler_type): Make like vprintf.
+	(_bfd_error_internal): Rename from _bfd_error_handler.  Make static.
+	(error_handler_internal): New function, split out from..
+	(_bfd_default_error_handler): ..here.  Rename to _bfd_error_handler.
+	(bfd_set_error_handler): Update.
+	(bfd_get_error_handler, bfd_get_assert_handler): Delete.
+	(_bfd_assert_handler): Make static.
+	* coffgen.c (null_error_handler): Update params.
+	* elf-bfd.h (struct elf_backend_data <link_order_error_handler>):
+	Don't use bfd_error_handler_type.
+	* elf64-mmix.c (mmix_dump_bpo_gregs): Likewise.
+	* elfxx-target.h (elf_backend_link_order_error_handler): Default
+	to _bfd_error_handler.
+	* libbfd-in.h (_bfd_default_error_handler): Don't declare.
+	(bfd_assert_handler_type): Likewise.
+	(_bfd_error_handler): Update.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
+2016-09-28  Akihiko Odaki  <akihiko.odaki.4i@stu.hosei.ac.jp>
+
+	PR ld/20636
+	* elf-bfd.h (struct elf_backend_data): Delete
+	elf_backend_count_output_relocs callback and add
+	elf_backend_update_relocs.
+	* elf32-arm.c (elf32_arm_count_output_relocs): Deleted.
+	(emit_relocs): Deleted.
+	(elf32_arm_emit_relocs): Deleted.
+	(elf_backend_emit_relocs): Updated not to use the old functions.
+	(elf32_arm_update_relocs): New function.
+	(elf_backend_update_relocs): New define.
+	* elflink.c (bfd_elf_final_link): Add additional_reloc_count to the
+	relocation count. Call elf_backend_emit_relocs.
+	(_bfd_elf_size_reloc_section): Do not call
+	elf_backend_count_output_relocs.
+	* elfxx-target.h (elf_backend_count_output_relocs): Deleted.
+	(elf_backend_update_relocs): New define.
+
+2016-09-28  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR ld/20608
+	* elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT
+	Thumb-ARM stub is too far.
+
+2016-09-27  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20634
+	* peXXigen.c (_bfd_XXi_only_swap_filehdr_out): Put 0 in the
+	timestamp field if real time values are not being stored.
+
+2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
+
+	* warning.m4 (AC_EGREP_CPP_FOR_BUILD): Introduce macro
+	to verify CC_FOR_BUILD compiler.
+	(AM_BINUTILS_WARNINGS): Introduce ac_cpp_for_build variable
+	and add CC_FOR_BUILD compiler checks.
+	* Makefile.in: Regenerate.
+	* configure: Likewise.
+	* doc/Makefile.in: Likewise.
+
+2016-09-26  Awson  <kyrab@mail.ru>
+
+	PR ld/17955
+	* coff-x86_64.c (coff_amd64_rtype_to_howto): Use an 8 byte offset
+	for R_AMD64_PCRQUAD relocations.
+
+2016-09-26  Alan Modra  <amodra@gmail.com>
+
+	* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Declare.
+	* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): New function.
+	(ppc_elf_merge_obj_attributes): Use it.  Don't copy first file
+	attributes, merge them.  Don't warn about undefined tag bits,
+	or copy unknown values to output.
+	* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Call
+	_bfd_elf_ppc_merge_fp_attributes.
+
+2016-09-23  Akihiko Odaki  <akihiko.odaki.4i@stu.hosei.ac.jp>
+
+	PR ld/20595
+	* elf-bfd.h (struct elf_backend_data): Add
+	elf_backend_count_output_relocs callback to count relocations in
+	the final output.
+	* elf-arm.c (elf32_arm_add_relocation): Deleted.
+	(elf32_arm_write_section): Move additional relocation to emit_relocs.
+	(elf32_arm_count_output_relocs): New function.
+	(emit_relocs): New function.
+	(elf32_arm_emit_relocs): New function.
+	(elf32_arm_vxworks_emit_relocs): New function.
+	(elf_backend_emit_relocs): Updated to use the new functions.
+	(elf_backend_count_output_relocs): New define.
+	* bfd/elflink.c (bfd_elf_final_link): Do not add additional_reloc_count
+	to the relocation count.
+	(_bfd_elf_link_size_reloc_section): Use callback to count the
+	relocations which will be in output.
+	(_bfd_elf_default_count_output_relocs): New function.
+	* bfd/elfxx-target.h (elf_backend_count_output_relocs): New define.
+
+2016-09-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Allow
+	negative offsets to _GLOBAL_OFFSET_TABLE_ if the .got section is
+	bigger than 0x1000 bytes.
+
+2016-09-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section
+	not already marked.
+
+2016-09-14  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20605
+	* peicode.h (pe_bfd_read_buildid): Check that the Data Directory
+	contains a valid size for the Debug directory.
+
+2016-09-14  Bhushan Attarde  <bhushan.attarde@imgtec.com>
+
+	* format.c (struct bfd_preserve): New "build_id" field.
+	(bfd_preserve_save): Save "build_id".
+	(bfd_preserve_restore): Restore "build_id".
+
+2016-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20550
+	* elf64-x86-64.c (elf_x86_64_relocate_section): Resolve size
+	relocation with copy relocation when building executable.
+
+2016-09-02  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20545
+	* elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter
+	delete_shrinks_insn. Modify computation of shrinked_insn_address.
+	Compute shrink_boundary and adjust addend only if
+	addend_within_shrink_boundary.
+	(elf32_avr_relax_section): Modify calls to
+	elf32_avr_relax_delete_bytes to pass extra parameter.
+
+2016-09-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (cmse_entry_fct_p): Store instruction encoding in an
+	array of bytes and use bfd_get_16 to interpret its encoding according
+	to endianness of target.
+
+2016-09-01  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (synthetic_opd): New static var.
+	(compare_symbols): Don't treat symbols in .opd specially for ELFv2.
+	(ppc64_elf_get_synthetic_symtab): Likewise.  Comment.
+
+2016-08-31  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (group_sections): Delete stub14_group_size.  Instead,
+	track max group size with a new "group_size" var that is reduced
+	by a factor of 1024 from the 24-bit branch size whenever a 14-bit
+	branch is seen.
+
+2016-08-31  Alan Modra  <amodra@gmail.com>
+
+	* elf32-ppc.c (ppc_elf_section_processing): Delete.
+	(elf_backend_section_processing): Don't define.
+	(ppc_elf_modify_segment_map): Set p_flags and mark valid.  Don't
+	split on non-exec sections differing in SHF_PPC_VLE.  When
+	splitting segments, mark size invalid.
+
+2016-08-30  Alan Modra  <amodra@gmail.com>
+
+	PR 20531
+	* elf32-ppc.c (_bfd_elf_ppc_set_arch): Add missing "break".
+
+2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/14961
+	PR ld/20515
+	* elf32-i386.c (elf_i386_check_relocs): Issue an error when
+	R_386_PC32 relocation is used to call IFUNC function in PIC
+	object.
+
+2016-08-27  Alan Modra  <amodra@gmail.com>
+
+	PR 20520
+	* elf.c (_bfd_elf_setup_sections): Check that SHT_GROUP sections
+	have corresponding SHF_GROUP sections.
+	(bfd_elf_set_group_contents): Comment.
+
+2016-08-27  Alan Modra  <amodra@gmail.com>
+
+	PR 20519
+	* elf64-ppc.c (pc_dynrelocs): New function.
+	(ppc64_elf_relocate_section): Use it and must_be_dyn_reloc to
+	handle pic dynamic relocs.
+
+2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* bfd-in.h (struct elf32_arm_params): Define.
+	(bfd_elf32_arm_set_target_relocs): Rename into ...
+	(bfd_elf32_arm_set_target_params): This.  Use a struct
+	elf32_arm_params to pass all parameters but the bfd and bfd_link_info.
+	* bfd-in2.h: Regenerate.
+	* elf32-arm.c (bfd_elf32_arm_set_target_relocs): Rename into ...
+	(bfd_elf32_arm_set_target_params): This.  Pass all values via a struct
+	elf32_arm_params rather than as individual parameters.
+
+2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (elf32_arm_get_stub_entry): Assert that we don't access
+	passed the end of htab->stub_group array.
+	(elf32_arm_create_or_find_stub_sec): Likewise.
+	(elf32_arm_create_stub): Likewise.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c (elf_arc_relocate_section): Changed. Set should_relocate
+	to TRUE for GOT and TLS relocs.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synospsys.com>
+
+	* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf-bfd.h: Added ARC_ELF_DATA to enum elf_target_id.
+	* elf32-arc.c (struct elf_arc_link_hash_entry): Added.
+	(struct elf_arc_link_hash_table): Likewise.
+	(elf_arc_link_hash_newfunc): Likewise.
+	(elf_arc_link_hash_table_free): Likewise.
+	(arc_elf_link_hash_table_create): Likewise.
+	(elf_arc_relocate_section): Fixed conditions related to dynamic
+	(elf_arc_check_relocs): Likewise.
+	(arc_elf_create_dynamic_sections): Added
+	(elf_arc_adjust_dynamic_symbol): Changed access to .rela.bss to be done
+	through the hash table.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* arc-got.h (relocate_fix_got_relocs_for_got_info): Fixed addresses in
+	debug comments. Fixed address in .got related to TLS_IE_GOT dynamic
+	relocation.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* reloc.c: Fixed type in ARC_SECTOFF relocations. Added ARC_SDA_12
+	relocation.
+	* bfd-in2.h: Regenerated from the previous changes.
+	* libbfd.h: Regenerated from the previous changes.
+
+2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for
+	the input import library bfd.
+	* bfd-in2.h: Regenerate.
+	* elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd
+	and new_cmse_stub_offset fields.
+	(stub_hash_newfunc): Initialize stub_offset and stub_template_size to
+	-1.
+	(elf32_arm_add_stub): Likewise for stub_offset.
+	(arm_new_stubs_start_offset_ptr): New function.
+	(arm_build_one_stub): Only allocate a stub_offset if it is -1.  Allow
+	empty SG veneers to have zero relocations.
+	(arm_size_one_stub): Only initialize stub size and template
+	information for non empty veneers.  Do not update veneer section size
+	if veneer already has an offset.
+	(elf32_arm_create_stub): Return the stub entry pointer or NULL instead
+	of a boolean indicating success or failure.
+	(cmse_scan): Change stub_changed parameter into an integer pointer
+	parameter cmse_stub_created to count the number of stub created and
+	adapt to change of return value in elf32_arm_create_stub.
+	(cmse_entry_fct_p): New function.
+	(arm_list_new_cmse_stub): Likewise.
+	(set_cmse_veneer_addr_from_implib): Likewise.
+	(elf32_arm_size_stubs): Define cmse_stub_created, pass its address to
+	cmse_scan instead of that of cmse_stub_changed to compute the number
+	of stub created and use it to initialize stub_changed.  Call
+	set_cmse_veneer_addr_from_implib after all cmse_scan.  Adapt to change
+	of return value in elf32_arm_create_stub.  Use
+	arm_stub_section_start_offset () if not NULL to initialize size of
+	secure gateway veneers section.  Initialize stub_offset of Cortex-A8
+	erratum fix to -1.  Use ret to hold return value.
+	(elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not
+	NULL to initialize size of secure gateway veneers section.  Adapt
+	comment to stress the importance of zeroing veneer section content.
+	(bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to
+	initialize eponymous field in struct elf32_arm_link_hash_table.
+
+2016-08-25  Andreas Arnez  <arnez@linux.vnet.ibm.com>
+
+	* elf32-s390.c (stdarg.h): New include.
+	(elf_s390_grok_psinfo): New function.
+	(elf_s390_write_core_note): New function.
+	(elf_backend_grok_psinfo): Declare backend hook.
+	(elf_backend_write_core_note): Likewise.
+	* elf64-s390.c (stdarg.h): New include.
+	(elf_s390_grok_prstatus): New function.
+	(elf_s390_grok_psinfo): New function.
+	(elf_s390_write_core_note): New function.
+	(elf_backend_grok_prstatus): Declare backend hook.
+	(elf_backend_grok_psinfo): Likewise.
+	(elf_backend_write_core_note): Likewise.
+
+2016-08-25  Andreas Arnez  <arnez@linux.vnet.ibm.com>
+
+	* elf32-s390.c (allocate_dynrelocs): Fix indentation.
+	(elf_s390_finish_ifunc_symbol): Likewise.
+	(elf_s390_finish_dynamic_symbol): Likewise.
+	(elf_s390_finish_dynamic_sections): Likewise.
+	(elf_s390_grok_prstatus): Likewise.
+	* elf64-s390.c (elf_s390_hash_table): Fix indentation.
+	(elf_s390_finish_dynamic_symbol): Likewise.
+
+2016-08-24  Anton Kolesov  <Anton.Kolesov@synopsys.com>
+
+	* elf32-arc.c (elf32_arc_grok_prstatus): New function.
+
+2016-08-23  Nick Clifton  <nickc@redhat.com>
+
+	* elf32-arm.c (elf32_arm_count_additional_relocs): Return zero if
+	there is no arm data associated with the section.
+
+2016-08-23  Alan Modra  <amodra@gmail.com>
+
+	PR 20475
+	* elf32-or1k.c (or1k_elf_relocate_section): Offset from
+	_GLOBAL_OFFSET_TABLE_, not start of .got section.
+
+2016-08-22  Nick Clifton  <nickc@redhat.com>
+
+	* doc/chew.c (main): Free the string buffer used to files as they
+	are parsed.
+
+2016-08-22  Alan Modra  <amodra@gmail.com>
+
+	* elf32-ppc.c (ppc_elf_check_relocs): Move error for @local ifunc..
+	(ppc_elf_relocate_section): ..to here.  Comment.  Error on
+	detecting -mbss-plt -fPIC local ifuncs too.
+	(ppc_elf_size_dynamic_sections): Comment on unnecessary glink
+	branch table entries.
+
+2016-08-19  Nick Clifton  <nickc@redhat.com>
+
+	* elf.c (assign_section_numbers): Assign number for the .shstrtab
+	section after the symbol table and string table sections.
+
+2016-08-19  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (struct ppc_link_hash_entry): Add weakref.
+	(ppc64_elf_copy_indirect_symbol): Set weakref.  Don't merge
+	dyn_relocs for weakdefs.
+	(alias_readonly_dynrelocs): New function.
+	(ppc64_elf_adjust_dynamic_symbol): Use alias_readonly_dynrelocs.
+	(ppc64_elf_relocate_section): Simplify condition under which
+	dyn_relocs are emitted.
+
+2016-08-19  Alan Modra  <amodra@gmail.com>
+
+	PR 20472
+	* elf64-ppc.c (ppc64_elf_before_check_relocs): Tweak abiversion test.
+	(readonly_dynrelocs): Comment fix.
+	(global_entry_stub): New function.
+	(ppc64_elf_adjust_dynamic_symbol): Tweak abiversion test.  Match
+	ELFv2 code deciding on dynamic relocs vs. global entry stubs to
+	that in size_global_entry_stubs, handling ifunc too.  Delete dead
+	weak sym code.
+	(allocate_dynrelocs): Ensure dyn_relocs field is cleared when no
+	dyn_relocs are needed.  Correct handling of ifunc dyn_relocs.
+	Tidy ELIMINATE_COPY_RELOCS code, only setting dynindx for
+	undefweak syms.  Expand and correct comments.
+	(size_global_entry_stubs): Ensure symbol is defined.
+	(ppc64_elf_relocate_section): Match condition under which
+	dyn_relocs are emitted to that in allocate_dynrelocs.
+
+2016-08-12  Alan Modra  <amodra@gmail.com>
+
+	* elf-bfd.h (struct elf_link_hash_table): Add local_dynsymcount.
+	* elflink.c (_bfd_elf_link_renumber_dynsyms): Set local_dynsymcount.
+	(bfd_elf_final_link): Set .dynsym sh_info from local_dynsymcount.
+
+2016-08-11  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Don't exit with
+	non_got_ref true in any case where we could have generated dynbss
+	copies but decide not to do so.
+
+2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_add_la25_stub): Clear the ISA bit of
+	the stub address retrieved if associated with a microMIPS
+	function.
+
+2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_create_stub_symbol): For a microMIPS
+	stub also add STO_MICROMIPS annotation.
+
+2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_calculate_relocation): Set the ISA bit
+	in microMIPS LA25 stub references.
+
+2016-08-09  Jiaming Wei  <jmwei@hxgpt.com>
+
+	* elf64-alpha.c (elf64_alpha_copy_indirect_symbol): Fix thinko
+	adjusting the use_count of merged .got entries.
+
+2016-08-08  Nick Clifton  <nickc@redhat.com>
+
+	* doc/chew.c (delete_string): Only free the string buffer if it is
+	there.  Mark the buffer as NULL after freeing.
+	(drop): Free the dropped string.
+	(free_words): New function: Frees the memory allocated to the
+	dictionary.
+	(add_instrinsic): Duplicate the name string, so that it can be
+	freed later on.
+	(compile): Free unused words.
+	(main): Free the dictionary and top level string buffers at the
+	end.
+
+2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add one parameter.
+	* bfd-in2.h: Regenerate.
+	* elf32-arm.c (struct elf32_arm_link_hash_table): Declare new
+	cmse_implib field.
+	(bfd_elf32_arm_set_target_relocs): Add new parameter to initialize
+	cmse_implib field in struct elf32_arm_link_hash_table.
+	(elf32_arm_filter_cmse_symbols): New function.
+	(elf32_arm_filter_implib_symbols): Likewise.
+	(elf_backend_filter_implib_symbols): Define to
+	elf32_arm_filter_implib_symbols.
+
+2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (CMSE_PREFIX): Define macro.
+	(elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence.
+	(cmse_branch_thumb_only): Declare stub.
+	(struct elf32_arm_link_hash_table): Define cmse_stub_sec field.
+	(elf32_arm_get_plt_info): Add globals parameter.  Use it to return
+	FALSE if there is no PLT.
+	(arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature.
+	(elf32_arm_final_link_relocate): Likewise.
+	(elf32_arm_gc_sweep_hook): Likewise.
+	(elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M
+	secure entry functions.
+	(arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only.
+	(arm_dedicated_stub_output_section_required): Change to a switch case
+	and add a case for arm_stub_cmse_branch_thumb_only.
+	(arm_dedicated_stub_output_section_required_alignment): Likewise.
+	(arm_stub_dedicated_output_section_name): Likewise.
+	(arm_stub_dedicated_input_section_ptr): Likewise and remove
+	ATTRIBUTE_UNUSED for htab parameter.
+	(arm_stub_required_alignment): Likewise.
+	(arm_stub_sym_claimed): Likewise.
+	(arm_dedicated_stub_section_padding): Likewise.
+	(cmse_scan): New function.
+	(elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets.
+	Set stub_changed to TRUE if such veneers were created.
+	(elf32_arm_swap_symbol_in): Add detection code for CMSE special
+	symbols.
+
+2016-08-02  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20428
+	* elf64-ppc.c (ppc_get_stub_entry): Don't segfault on NULL group.
+
+2016-08-02  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/17739
+	* elf32-sh.c (sh_elf_gc_sweep_hook): Delete.
+	(elf_backend_sweep_hook): Delete.
+
+2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
+	Kwok Cheung Yeung  <kcy@codesourcery.com>
+
+	* elf32-ppc.c (is_branch_reloc): Recognise VLE branch relocations.
+	(ppc_elf_howto_raw): Fix dst_mask of R_PPC_VLE_REL15.
+	(ppc_elf_vle_split16): Clear field before inserting.
+
+2016-08-01  Nick Clifton  <nickc@redhat.com>
+
+	* po/sv.po: Updated Swedish translation.
+
+2016-07-27  Ozkan Sezer  <sezeroz@gmail.com>
+	    Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20401
+	* coffgen.c (fini_reloc_cookie_rels): Check for the extistence
+	of the coff_section_data before using it.
+
+2016-07-26  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_calculate_relocation): Handle branches
+	in PLT compression selection.
+	(_bfd_mips_elf_check_relocs): Likewise.
+
+2016-07-22  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* arc-got.h (relocate_fix_got_relocs_for_got_info): Handle the
+	case where there's no elf_link_hash_entry while processing
+	GOT_NORMAL got entries.
+
+2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* version.m4 (BFD_VERSION): Set to 2.27.51.
+	* configure: Regenerated.
+
+2016-07-21  Nick Clifton  <nickc@redhat.com>
+
+	* elf.c (_bfd_elf_filter_global_symbols): Skip local symbols.
+	(swap_out_syms): Return an error when not finding ELF output
+	section rather than asserting.
+
+2016-07-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elflink.c (elf_output_implib): Call bfd_set_error on no symbols.
+
+2016-07-20  John Baldwin  <jhb@FreeBSD.org>
+
+	* elf.c (elfcore_grok_freebsd_psinfo): Check for minimum note size
+	and handle pr_pid if present.
+
+2016-07-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20376
+	* elf.c (assign_file_positions_for_load_sections): Also check
+	p_paddr for program header space.
+
+2016-07-20  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_PLTREL32>): Put
+	ppc64_elf_unhandled_reloc for special_function.
+	* elf32-ppc.c (ppc_elf_howto_raw): Similarly for lots of relocs.
+
+2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode
+	BAL to JALX.
+	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a
+	corresponding error message.
+
+2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1,
+	R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC7_S1.
+	(branch_reloc_p): New function.
+	(mips_elf_calculate_relocation): Handle ISA mode determination
+	for relocations against section symbols, against absolute
+	symbols and absolute relocations.  Also set `*cross_mode_jump_p'
+	for branches.
+	<R_MIPS16_26, R_MIPS_26, R_MICROMIPS_26_S1>: Suppress alignment
+	checks for weak undefined symbols.  Also check target alignment
+	within the same ISA mode.
+	<R_MIPS_PC16, R_MIPS_GNU_REL16_S2>: Handle cross-mode branches
+	in the alignment check.
+	<R_MICROMIPS_PC7_S1>: Add an alignment check.
+	<R_MICROMIPS_PC10_S1>: Likewise.
+	<R_MICROMIPS_PC16_S1>: Likewise.
+	(mips_elf_perform_relocation): Report a failure for unsupported
+	same-mode JALX instructions and cross-mode branches.
+	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add
+	error messages for jumps to misaligned addresses.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* elflink.c: Include plugin-api.h.
+	* plugin.c (bfd_plugin_open_input): New function, extracted from..
+	(try_claim): ..here.
+	* plugin.h: Don't include bfd.h.
+	(bfd_plugin_open_input): Declare.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* targets.c (bfd_seach_for_target): Rename to..
+	(bfd_iterate_over_targets): ..this.  Rewrite doc.
+	* bfd-in2.h: Regenerate.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* archures.c (bfd_default_set_arch_mach): Make available in bfd.h.
+	* libbfd.h: Regenerate.
+	* bfd-in2.h: Regenerate.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* libbfd-in.h (BFD_ALIGN): Move to..
+	* bfd-in.h: ..here.
+	* elf32-ppc.h (struct ppc_elf_params): Add pagesize.
+	* elf32-ppc.c (default_params): Adjust init.
+	(ppc_elf_link_params): Set pagesize_p2.
+	* libbfd.h: Regenerate.
+	* bfd-in2.h: Regenerate.
+
+2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf-bfd.h (elf_backend_filter_implib_symbols): Declare backend hook.
+	(_bfd_elf_filter_global_symbols): Declare.
+	* elf.c (_bfd_elf_filter_global_symbols): New function.
+	* elflink.c (elf_filter_global_symbols): Likewise.
+	(elf_output_implib): Likewise.
+	(bfd_elf_final_link): Call above function, failing if it does.
+	* elfxx-target.h (elf_backend_filter_implib_symbols): Define macro and
+	default it to NULL.
+	(elf_backend_copy_indirect_symbol): Fix spacing.
+	(elf_backend_hide_symbol): Likewise.
+	(elfNN_bed): Initialize elf_backend_filter_implib_symbols backend hook.
+
+2016-07-15  Andrew Burgess  <andrew.burgess@embecosm.com>
+	    Nick Clifton  <nickc@redhat.com>
+
+	* elf32-arc.c (PR_DEBUG): Delete.
+	Fix printing of debug information.  Fix formatting of debug
+	statements.
+	(debug_arc_reloc): Handle symbols that are not from an input file.
+	(arc_do_relocation): Remove excessive exclamation points.
+
+	* arc-got.h: Fix formatting.  Fix printing of debug information.
+	(new_got_entry_to_list): Use xmalloc.
+	* config.bfd: use the big-endian arc vector as the default vector
+	for big-endian arc targets.
+
+2016-07-15  Alan Modra  <amodra@gmail.com>
+
+	* cofflink.c (mark_relocs): Exclude relocs with -1 r_symndx
+	from marking sym_indices.
+
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* reloc.c (bfd_perform_relocation): Try the `howto' handler
+	first with relocations against absolute symbols.
+	(bfd_install_relocation): Likewise.
+
+2016-07-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Align
+	.got/.got.plt sections to 8 bytes.
+
+2016-07-12  Nick Clifton  <nickc@redhat.com>
+
+	* binary.c (binary_set_section_contents): Second grammar fix.
+
+2016-07-12  Douglas B Rupp  <rupp@adacore.com>
+
+	* binary.c (binary_set_section_contents): Fix grammar in warning
+	message.
+
+2016-07-11  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c: made PR_DEBUG always defined.
+
+2016-07-11  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* arc-got.h: Moved got related structures from elf32-arc.c to
+	this file. More precisely, tls_type_e, tls_got_entries, got_entry.
+	* (arc_get_local_got_ents, got_entry_for_type, new_got_entry_to_list,
+	tls_type_for_reloc, symbol_has_entry_of_type,
+	get_got_entry_list_for_symbol, arc_got_entry_type_for_reloc,
+	ADD_SYMBOL_REF_SEC_AND_RELOC, rc_fill_got_info_for_reloc,
+	relocate_fix_got_relocs_for_got_info,
+	create_got_dynrelocs_for_single_entry,
+	create_got_dynrelocs_for_got_info): Added to file.
+	* elf32-arc.c: Removed GOT & TLS related structs and functions to
+	arc-got.h.
+
+2016-07-08  James Bowman  <james.bowman@ftdichip.com>
+
+	* elf32-ft32.c (ft32_reloc_map): Use R_FT32_32 for BFD_RELOC_32.
+
+2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
+
+	* elf32-arm.c (THUMB32_MOVT): New veneer macro.
+	(THUMB32_MOVW): Likewise.
+	(elf32_arm_stub_long_branch_thumb2_only_pure): New.
+	(DEF_STUBS): Define long_branch_thumb2_only_pure.
+	(arm_stub_is_thumb): Add new veneer stub.
+	(arm_type_of_stub): Use new veneer.
+	(arm_stub_required_alignment): Add new veneer.
+
+2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
+
+	* bfd-in2.h (SEC_ELF_NOREAD): Rename to ...
+	(SEC_ELF_PURECODE): ... this.
+	* elf32-arm.c (elf32_arm_post_process_headers): Rename SEC_ELF_NOREAD
+	to SEC_ELF_NOREAD.
+	(elf32_arm_fake_sections): Likewise.
+	(elf_32_arm_section_flags): Likewise.
+	(elf_32_arm_lookup_section_flags): Likewise.
+	* section.c (SEC_ELF_NOREAD): Rename to ...
+	(SEC_ELF_PURECODE): ... this.
+
+2016-07-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (using_thumb2_bl): New function.
+	(arm_type_of_stub): Declare thumb2 variable together and change type
+	to bfd_boolean.  Use using_thumb2_bl () to determine whether
+	THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
+	checked for BL range.
+	(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
+	the bit size of BL offset.
+
+2016-06-29  Nick Clifton  <nickc@redhat.com>
+
+	* elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
+	Returns TRUE for AArch64 mapping symbols.
+	(elfNN_aarch64_backend_symbol_processing): New function.  Marks
+	mapping symbols as precious in object files so that they will not
+	be stripped.
+	(elf_backend_symbol_processing): Define.
+
+	* elf32-arm.c (is_arm_mapping_symbol): New function.  Returns TRUE
+	for ARM mapping symbols.
+	(elf32_arm_backend_symbol_processing): Make use of the new function.
+
+2016-06-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20306
+	* elflink.c (elf_link_check_versioned_symbol): Return false
+	for unreferenced undefined symbol.
+
+2016-06-28  Nick Clifton  <nickc@redhat.com>
+
+	* elf32-bfin.c (bfin_adjust_dynamic_symbol): Fail if a COPY reloc
+	is needed.
+
+	* elf32-arm.c (elf32_arm_backend_symbol_processing): New
+	function.  Marks mapping symbols in object files as precious, so
+	that strip will not remove them.
+	(elf_backend_symbol_processing): Define.
+
+2016-06-28  James Clarke  <jrtc27@jrtc27.com>
+
+	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
+	R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.
+
+2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf32-mips.c (elf_mips16_howto_table_rel): Add
+	R_MIPS16_PC16_S1.
+	(mips16_reloc_map): Likewise.
+	* elf64-mips.c (mips16_elf64_howto_table_rel): Likewise.
+	(mips16_elf64_howto_table_rela): Likewise.
+	(mips16_reloc_map): Likewise.
+	* elfn32-mips.c (elf_mips16_howto_table_rel): Likewise.
+	(elf_mips16_howto_table_rela): Likewise.
+	(mips16_reloc_map): Likewise.
+	* elfxx-mips.c (mips16_branch_reloc_p): New function.
+	(mips16_reloc_p): Handle R_MIPS16_PC16_S1.
+	(b_reloc_p): Likewise.
+	(mips_elf_calculate_relocation): Likewise.
+	(_bfd_mips_elf_check_relocs): Likewise.
+	* reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
+2016-06-27  Alan Modra  <amodra@gmail.com>
+
+	PR ld/19264
+	* elf64-ppc.c (STUB_SHRINK_ITER): Define.
+	(ppc64_elf_size_stubs): Exit stub sizing loop past STUB_SHRINK_ITER
+	if shrinking stubs.
+	(ppc64_elf_size_stubs): Adjust to suit.
+
+2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf32-dlx.h: New file.
+	* elf32-dlx.c: Adjust.
+
+2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf32-xtensa.c (xtensa_make_property_section): Remove prototype.
+
+2016-06-24  John Baldwin  <jhb@FreeBSD.org>
+
+	* elf.c (elfcore_grok_freebsd_note): Handle NT_FREEBSD_PROCSTAT_AUXV
+	notes.
+
+2016-06-24  John Baldwin  <jhb@FreeBSD.org>
+
+	* elf.c (elfcore_grok_note): Remove handling of NT_X86_XSTATE for
+	FreeBSD.  Remove case for NT_FREEBSD_THRMISC.
+	(elfcore_grok_freebsd_psinfo): New function.
+	(elfcore_grok_freebsd_prstatus): New function.
+	(elfcore_grok_freebsd_note): New function.
+	(elf_parse_notes): Use "elfcore_grok_freebsd_note" for "FreeBSD"
+	notes.
+
+2016-06-24  Joel Brobecker  <brobecker@adacore.com>
+
+	* elflink.c: Check the value of BFD_SUPPORTS_PLUGINS rather
+	than its existance.
+
+2016-06-24  Alan Modra  <amodra@gmail.com>
+
+	* config.bfd: Delete mips vxworks patterns matched earlier.
+	Combine mips*-*-none with mips*-*-elf*.
+
+2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_perform_relocation): Call
+	`info->callbacks->einfo' rather than `*_bfd_error_handler' and
+	use the `%X%H' format for the cross-mode jump conversion error
+	message.  Remove the full stop from the end of the message.
+	Continue processing rather than returning failure.
+
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+	* archures.c: Remove bfd_mach_arc_nps400.
+	* bfd-in2.h: Likewise.
+	* cpu-arc.c (arch_info_struct): Likewise.
+	* elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing):
+	Likewise.
+
+2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/18250
+	PR ld/20267
+	* elflink.c: Include plugin.h if BFD_SUPPORTS_PLUGINS is
+	defined.
+	(elf_link_is_defined_archive_symbol): Call
+	bfd_link_plugin_object_p on unknown plugin object and use the
+	IR symbol table if the input is an IR object.
+	* plugin.c (bfd_link_plugin_object_p): New function.
+	* plugin.h (bfd_link_plugin_object_p): New prototype.
+
+2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20276
+	* elflink.c (elf_link_add_object_symbols): Don't check alignment
+	on symbol from plugin dummy input.
+
+2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* bfd.c (bfd_plugin_format): Rename bfd_plugin_uknown to
+	bfd_plugin_unknown.
+	* bfd-in2.h: Regenerated.
+	* plugin.c (bfd_plugin_object_p): Replace bfd_plugin_uknown
+	with bfd_plugin_unknown.
+
+2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20253
+	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add an
+	bfd_boolean argument.
+	* elf-ifunc.c (_bfd_elf_create_ifunc_sections): Replace
+	"shared object" with "PIC object" in comments.
+	(_bfd_elf_allocate_ifunc_dyn_relocs): Updated.  Replace
+	"shared object" with "PIC object" in comments.  Avoid PLT if
+	requested.  Generate dynamic relocations for non-GOT references.
+	Make room for the special first entry in PLT and allocate PLT
+	entry only for PLT and PC-relative references.  Store dynamic
+	GOT relocations in .rel[a].iplt section for static executables.
+	If PLT isn't used, always use GOT for symbol value.  Don't
+	allocate GOT entry if it isn't used.
+	* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
+	count only in the code section.  Allocate dynamic pointer
+	relocation against STT_GNU_IFUNC symbol in the non-code section.
+	(elf_i386_adjust_dynamic_symbol): Increment PLT reference count
+	only for PC-relative references.
+	(elf_i386_allocate_dynrelocs): Pass TRUE to
+	_bfd_elf_allocate_ifunc_dyn_relocs.
+	(elf_i386_relocate_section): Allow R_386_GOT32/R_386_GOT32X
+	relocations against STT_GNU_IFUNC symbols without PLT.  Generate
+	dynamic pointer relocation against STT_GNU_IFUNC symbol in
+	the non-code section and store it in the proper REL section.
+	Don't allow non-pointer relocation against STT_GNU_IFUNC symbol
+	without PLT.
+	(elf_i386_finish_dynamic_symbol): Generate dynamic
+	R_386_IRELATIVE and R_386_GLOB_DAT GOT relocations against
+	STT_GNU_IFUNC symbols without PLT.
+	(elf_i386_finish_dynamic_sections): Don't handle local
+	STT_GNU_IFUNC symbols here.
+	(elf_i386_output_arch_local_syms): Handle local STT_GNU_IFUNC
+	symbols here.
+	(elf_backend_output_arch_local_syms): New.
+	* elf32-x86-64.c (elf_i386_check_relocs): Increment PLT reference
+	count only in the code section.  Allocate dynamic pointer
+	relocation against STT_GNU_IFUNC symbol in the non-code section.
+	(elf_x86_64_adjust_dynamic_symbol): Increment PLT reference
+	count only for PC-relative references.
+	(elf_x86_64_allocate_dynrelocs): Pass TRUE to
+	_bfd_elf_allocate_ifunc_dyn_relocs.
+	(elf_x86_64_relocate_section): Allow R_X86_64_GOTPCREL,
+	R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX and
+	R_X86_64_GOTPCREL64 relocations against STT_GNU_IFUNC symbols
+	without PLT.  Generate dynamic pointer relocation against
+	STT_GNU_IFUNC symbol in the non-code section and store it in
+	the proper RELA section.  Don't allow non-pointer relocation
+	against STT_GNU_IFUNC symbol without PLT.
+	(elf_x86_64_finish_dynamic_symbol): Generate dynamic
+	R_X86_64_IRELATIVE and R_X86_64_GLOB_DAT GOT relocations against
+	STT_GNU_IFUNC symbols without PLT.
+	(elf_x86_64_finish_dynamic_sections): Don't handle local
+	STT_GNU_IFUNC symbols here.
+	(elf_x86_64_output_arch_local_syms): Handle local STT_GNU_IFUNC
+	symbols here.
+	(elf_backend_output_arch_local_syms): New.
+	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
+	Pass FALSE to _bfd_elf_allocate_ifunc_dyn_relocs.
+
+2016-06-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+	    Tony Wang  <tony.wang@arm.com>
+
+	* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
+	sequence.
+	(stub_long_branch_thumb2_only): Define stub.
+	(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
+	(arm_stub_long_branch_thumb2_only): Likewise.
+	(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
+	capable targets.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* archures.c (bfd_mach_sparc_v8plusc): Define.
+	(bfd_mach_sparc_v9c): Likewise.
+	(bfd_mach_sparc_v8plusd): Likewise.
+	(bfd_mach_sparc_v9d): Likewise.
+	(bfd_mach_sparc_v8pluse): Likewise.
+	(bfd_mach_sparc_v9e): Likewise.
+	(bfd_mach_sparc_v8plusv): Likewise
+	(bfd_mach_sparc_v9v): Likewise.
+	(bfd_mach_sparc_v8plusm): Likewise.
+	(bfd_mach_sparc_v9m): Likewise.
+	(bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m.
+	(bfd_mach_sparc_64bit_p): Likewise.
+	* bfd-in2.h: Regenerate.
+	* cpu-sparc.c (arch_info_struct): Add entries for
+	bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}.
+	* aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m}
+	and bfd_mach_sparc_v9{c,d,e,v,m}.
+	* elf32-sparc.c (elf32_sparc_final_write_processing): Likewise.
+	* elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise.
+
+2016-06-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_check_relocs): Don't check undefined
+	symbols for relocations against IFUNC symbols.
+	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
+
+2016-06-16  Marcin Kościelnicki  <koriakin@0x04.net>
+
+	* elf32-s390.c (elf_s390_finish_dynamic_sections): Include
+	.rela.iplt in DT_PLTRELSZ.
+	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise,
+	for DT_PLTRELSZ and DT_RELASZ as well.
+
+2016-06-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_check_relocs): Skip relocations in
+	non-loaded, non-alloced sections.
+	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
+
+2016-06-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_check_relocs): Check SEC_ALLOC before
+	allocating dynamic relocation.
+	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
+
+2016-06-14  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20254
+	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
+	offsets until reloc_toaddr.
+
+2016-06-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE.
+	Don't check symbol type for STN_UNDEF symbol index.
+	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Check
+	R_X86_64_IRELATIVE.  Don't check symbol type for STN_UNDEF symbol
+	index.
+
+2016-06-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (using_thumb_only): Force review of arch check logic for
+	new architecture.
+	(using_thumb2): Try Tag_THUMB_ISA_use first and check
+	for exact arch value then.  Force review of arch check logic for new
+	architecture.
+	(arch_has_arm_nop): Update and fix arch check logic.  Force review of
+	that logic for new architecture.
+	(arch_has_thumb2_nop): Remove.
+	(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
+	(elf32_arm_final_link_relocate): Likewise but using thumb2.
+
+2016-06-14  Alan Modra  <amodra@gmail.com>
+
+	* bfd-in.h (bfd_my_archive): Delete.
+	* bfd-in2.h: Regenerate.
+
+2016-06-14  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20241
+	* archive.c (open_nested_file): Set my_archive.
+	* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
+	for thin archives.
+	* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
+	(bfd_seek): Likewise.
+	* bfdwin.c (bfd_get_file_window): Likewise.
+	* cache.c (cache_bmmap): Likewise.
+	(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
+	* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
+	thin archives.
+	* plugin.c (try_claim): Likewise.
+	* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
+	file within thin archive, not the archive.
+
+2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20244
+	* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
+	section address for R_386_GOT32/R_386_GOT32X relocations against
+	IFUNC symbols if there is no base register and return error for
+	PIC.
+
+2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
+	GOT32 adjustment for static executables.
+
+2016-06-13  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
+
+2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
+
+	* elf32-arc.c (elf_arc_relocate_section): Fixed condition.
+
+2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
+
+	* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
+
+2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
+
+	* elf32-arc.c (arc_local_data, arc_local_data): Removed.
+	(SECTSTART): Changed.
+	(elf_arc_relocate_section): Fixed mistake in PIE related
+	condition.
+	(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
+
+2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
+
+	* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
+	enable support for "-z combreloc" and DT_RELACOUNT.
+	(elf_backend_reloc_type_class): Likewise
+
+2016-06-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20244
+	* elf32-i386.c (elf_i386_relocate_section): When relocating
+	R_386_GOT32, return error without a base register for PIC and
+	subtract the .got.plt section address only with a base register.
+
+2016-06-10  Alan Modra  <amodra@gmail.com>
+
+	* elf-strtab.c (struct strtab_save): Use size_t for "size".
+	(struct elf_strtab_hash): Likewise for "size" and "alloced".
+	(_bfd_elf_strtab_init): Formatting.
+	(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
+	(_bfd_elf_strtab_addref): Take size_t idx param.
+	(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
+	(_bfd_elf_strtab_offset): Likewise.
+	(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
+	(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
+	(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
+	(_bfd_elf_strtab_finalize): Similarly.
+	* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
+	(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
+	(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
+	* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
+	using bfd_size_type.
+	(bfd_section_from_shdr): Delete amt.
+	(_bfd_elf_init_reloc_shdr): Likewise.
+	(_bfd_elf_link_assign_sym_version): Likewise.
+	(assign_section_numbers): Use size_t reloc_count.
+	* elflink.c (struct elf_symbuf_head): Use size_t "count".
+	(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
+	(elf_link_is_defined_archive_symbol): Likewise.
+	(elf_add_dt_needed_tag): Likewise.
+	(elf_finalize_dynstr): Likewise.
+	(elf_link_add_object_symbols): Likewise.
+	(bfd_elf_size_dynamic_sections): Likewise.
+	(elf_create_symbuf): Similarly.
+	(bfd_elf_match_symbols_in_sections): Likewise.
+	(elf_link_swap_symbols_out): Likewise.
+	(elf_link_check_versioned_symbol): Likewise.
+	(bfd_elf_gc_record_vtinherit): Likewise.
+	(bfd_elf_gc_common_finalize_got_offsets): Likewise.
+
+2016-06-08  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20221
+	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
+	and relocs only if shrinking occurred.
+
+2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
+	(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
+	(elf_i386_check_tls_transition): Check indirect call and direct
+	call with the addr32 prefix for general and local dynamic models.
+	Set the tls_get_addr feild.
+	(elf_i386_convert_load_reloc): Always use addr32 prefix for
+	indirect ___tls_get_addr call via GOT.
+	(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
+	transitions with indirect call and direct call with the addr32
+	prefix.
+
+2016-06-07  Marcin Kościelnicki  <koriakin@0x04.net>
+
+	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
+	* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
+	(elf_s390_relocate_section): Fix comment.
+	(elf_s390_finish_dynamic_sections): Fix initialization of fixed
+	.got.plt entries.
+
+2016-06-07  Ulrich Weigand  <ulrich.weigand@de.ibm.com>
+
+	* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
+	section offset when calculation the larl operand in the first PLT
+	entry.
+
+2016-06-07  Alan Modra  <amodra@gmail.com>
+
+	* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
+	to match other 32-bit archs.
+	* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
+	(ppc_elf_object_p): Call it.
+	(ppc_elf_special_sections): Use APUINFO_SECTION_NAME.  Fix
+	overlong line.
+	(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
+	* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
+	* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
+	_bfd_elf_ppc_at_tprel_transform): Move to..
+	* elf-bfd.h: ..here.
+	(_bfd_elf_ppc_set_arch): Declare.
+	* bfd-in2.h: Regenerate.
+
+2016-06-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
+	(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
+	(elf_x86_64_check_tls_transition): Check indirect call and
+	direct call with the addr32 prefix for general and local dynamic
+	models.  Set the tls_get_addr feild.
+	(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
+	indirect __tls_get_addr call via GOT.
+	(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
+	transitions with indirect call and direct call with the addr32
+	prefix.
+
+2016-06-04  Christian Groessler  <chris@groessler.org>
+
+	* coff-z8k.c (extra_case): Fix range check for R_JR relocation.
+
+2016-06-02  Nick Clifton  <nickc@redhat.com>
+
+	PR target/20088
+	* cpu-arm.c (processors): Add "arm_any" type to match any ARM
+	architecture.
+	(arch_info_struct): Likewise.
+	(architectures): Likewise.
+
+2016-06-02  Vineet Gupta  <Vineet.Gupta1@synopsys.com>
+
+	* config.bfd: Replace -uclibc with *.
+
+2016-06-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c: Replace data32 with data16 in comments.
+
+2016-05-31  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20159
+	PR ld/16467
+	* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
+	(_bfd_elf_add_default_symbol): Don't indirect to/from defined
+	symbol given a version by a script different to the version
+	of the symbol being added.
+	(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
+	_bfd_elf_strtab_restore.  Don't fudge dynstr references.
+	* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
+	(struct strtab_save): New.
+	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
+	* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
+	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf32-hppa.h: Add extern "C".
+	* elf32-nds32.h: Likewise.
+	* elf32-tic6x.h: Likewise.
+
+2016-06-01  Nick Clifton  <nickc@redhat.com>
+
+	* po/sr.po: New Serbian translation.
+	* configure.ac (ALL_LINGUAS): Add sr.
+	* configure: Regenerate.
+
+2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (b_reloc_p): New function.
+	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Handle
+	branch relocations.
+
+2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26>
+	<R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the
+	reloc location from calculation, treat the addend as signed with
+	local non-section symbols and enable overflow detection.
+
+2016-05-28  Alan Modra  <amodra@gmail.com>
+
+	* aoutx.h: Adjust linker callback calls throughout file,
+	removing dead code.
+	* bout.c: Likewise.
+	* coff-alpha.c: Likewise.
+	* coff-arm.c: Likewise.
+	* coff-h8300.c: Likewise.
+	* coff-h8500.c: Likewise.
+	* coff-i960.c: Likewise.
+	* coff-mcore.c: Likewise.
+	* coff-mips.c: Likewise.
+	* coff-ppc.c: Likewise.
+	* coff-rs6000.c: Likewise.
+	* coff-sh.c: Likewise.
+	* coff-tic80.c: Likewise.
+	* coff-w65.c: Likewise.
+	* coff-z80.c: Likewise.
+	* coff-z8k.c: Likewise.
+	* coff64-rs6000.c: Likewise.
+	* cofflink.c: Likewise.
+	* ecoff.c: Likewise.
+	* elf-bfd.h: Likewise.
+	* elf-m10200.c: Likewise.
+	* elf-m10300.c: Likewise.
+	* elf32-arc.c: Likewise.
+	* elf32-arm.c: Likewise.
+	* elf32-avr.c: Likewise.
+	* elf32-bfin.c: Likewise.
+	* elf32-cr16.c: Likewise.
+	* elf32-cr16c.c: Likewise.
+	* elf32-cris.c: Likewise.
+	* elf32-crx.c: Likewise.
+	* elf32-d10v.c: Likewise.
+	* elf32-epiphany.c: Likewise.
+	* elf32-fr30.c: Likewise.
+	* elf32-frv.c: Likewise.
+	* elf32-ft32.c: Likewise.
+	* elf32-h8300.c: Likewise.
+	* elf32-hppa.c: Likewise.
+	* elf32-i370.c: Likewise.
+	* elf32-i386.c: Likewise.
+	* elf32-i860.c: Likewise.
+	* elf32-ip2k.c: Likewise.
+	* elf32-iq2000.c: Likewise.
+	* elf32-lm32.c: Likewise.
+	* elf32-m32c.c: Likewise.
+	* elf32-m32r.c: Likewise.
+	* elf32-m68hc1x.c: Likewise.
+	* elf32-m68k.c: Likewise.
+	* elf32-mep.c: Likewise.
+	* elf32-metag.c: Likewise.
+	* elf32-microblaze.c: Likewise.
+	* elf32-moxie.c: Likewise.
+	* elf32-msp430.c: Likewise.
+	* elf32-mt.c: Likewise.
+	* elf32-nds32.c: Likewise.
+	* elf32-nios2.c: Likewise.
+	* elf32-or1k.c: Likewise.
+	* elf32-ppc.c: Likewise.
+	* elf32-s390.c: Likewise.
+	* elf32-score.c: Likewise.
+	* elf32-score7.c: Likewise.
+	* elf32-sh.c: Likewise.
+	* elf32-sh64.c: Likewise.
+	* elf32-spu.c: Likewise.
+	* elf32-tic6x.c: Likewise.
+	* elf32-tilepro.c: Likewise.
+	* elf32-v850.c: Likewise.
+	* elf32-vax.c: Likewise.
+	* elf32-visium.c: Likewise.
+	* elf32-xstormy16.c: Likewise.
+	* elf32-xtensa.c: Likewise.
+	* elf64-alpha.c: Likewise.
+	* elf64-hppa.c: Likewise.
+	* elf64-ia64-vms.c: Likewise.
+	* elf64-mmix.c: Likewise.
+	* elf64-ppc.c: Likewise.
+	* elf64-s390.c: Likewise.
+	* elf64-sh64.c: Likewise.
+	* elf64-x86-64.c: Likewise.
+	* elflink.c: Likewise.
+	* elfnn-aarch64.c: Likewise.
+	* elfnn-ia64.c: Likewise.
+	* elfxx-mips.c: Likewise.
+	* elfxx-sparc.c: Likewise.
+	* elfxx-tilegx.c: Likewise.
+	* linker.c: Likewise.
+	* pdp11.c: Likewise.
+	* pe-mips.c: Likewise.
+	* reloc.c: Likewise.
+	* reloc16.c: Likewise.
+	* simple.c: Likewise.
+	* vms-alpha.c: Likewise.
+	* xcofflink.c: Likewise.
+	* elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete
+	status param.  Adjust calls to these and linker callbacks throughout.
+	* elf32-rx.c: (get_symbol_value, get_gp, get_romstart,
+	get_ramstart): Delete status param.  Adjust calls to these and
+	linker callbacks throughout.
+
+2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS16_26>
+	<R_MIPS_26, R_MICROMIPS_26_S1>: Include the addend in JALX's
+	target alignment verification.
+
+2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_calculate_relocation): Also use the
+	section name if `bfd_elf_string_from_elf_section' returns an
+	empty string.
+
+2016-05-26  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
+	<bfd_reloc_outofrange>: Use the `%X%H' rather than `%C' format
+	for message.  Continue processing rather than returning failure.
+
+2016-05-25  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
+	<bfd_reloc_outofrange>: Call `->einfo' rather than `->warning'.
+	Call `bfd_set_error'.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/14625
+	* archive.c (bfd_slurp_armap): Replace
+	bfd_elf64_archive_slurp_armap with
+	_bfd_archive_64_bit_slurp_armap.
+	(bsd_write_armap): Call _bfd_archive_64_bit_write_armap if
+	BFD64 is defined and the archive is too big.
+	(coff_write_armap): Likewise.
+	* archive64.c (bfd_elf64_archive_slurp_armap): Renamed to ...
+	(_bfd_archive_64_bit_slurp_armap): This.
+	(bfd_elf64_archive_write_armap): Renamed to ...
+	(_bfd_archive_64_bit_write_armap): This.
+	* configure.ac: Add --enable-64-bit-archive.
+	(want_64_bit_archive): New.  Set to true by default for 64-bit
+	MIPS and s390 ELF targets.
+	(USE_64_BIT_ARCHIVE): New AC_DEFINE.
+	* config.in: Regenerated.
+	* configure: Likewise.
+	* elf64-mips.c (bfd_elf64_archive_functions): Removed.
+	(bfd_elf64_archive_slurp_armap): Likewise.
+	(bfd_elf64_archive_write_armap): Likewise.
+	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
+	(bfd_elf64_archive_construct_extended_name_table): Likewise.
+	(bfd_elf64_archive_truncate_arname): Likewise.
+	(bfd_elf64_archive_read_ar_hdr): Likewise.
+	(bfd_elf64_archive_write_ar_hdr): Likewise.
+	(bfd_elf64_archive_openr_next_archived_file): Likewise.
+	(bfd_elf64_archive_get_elt_at_index): Likewise.
+	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
+	(bfd_elf64_archive_update_armap_timestamp): Likewise.
+	* elf64-s390.c (bfd_elf64_archive_functions): Removed.
+	(bfd_elf64_archive_slurp_armap): Likewise.
+	(bfd_elf64_archive_write_armap): Likewise.
+	(bfd_elf64_archive_slurp_extended_name_table): Likewise.
+	(bfd_elf64_archive_construct_extended_name_table): Likewise.
+	(bfd_elf64_archive_truncate_arname): Likewise.
+	(bfd_elf64_archive_read_ar_hdr): Likewise.
+	(bfd_elf64_archive_write_ar_hdr): Likewise.
+	(bfd_elf64_archive_openr_next_archived_file): Likewise.
+	(bfd_elf64_archive_get_elt_at_index): Likewise.
+	(bfd_elf64_archive_generic_stat_arch_elt): Likewise.
+	(bfd_elf64_archive_update_armap_timestamp): Likewise.
+	* elfxx-target.h (TARGET_BIG_SYM): Use _bfd_archive_64_bit on
+	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined and
+	bfd_elfNN_archive_functions isn't defined.
+	(TARGET_LITTLE_SYM): Likewise.
+	* libbfd-in.h (_bfd_archive_64_bit_slurp_armap): New prototype.
+	(_bfd_archive_64_bit_write_armap): Likewise.
+	(_bfd_archive_64_bit_slurp_extended_name_table): New macro.
+	(_bfd_archive_64_bit_construct_extended_name_table): Likewise.
+	(_bfd_archive_64_bit_truncate_arname): Likewise.
+	(_bfd_archive_64_bit_read_ar_hdr): Likewise.
+	(_bfd_archive_64_bit_write_ar_hdr): Likewise.
+	(_bfd_archive_64_bit_openr_next_archived_file): Likewise.
+	(_bfd_archive_64_bit_get_elt_at_index): Likewise.
+	(_bfd_archive_64_bit_generic_stat_arch_elt): Likewise.
+	(_bfd_archive_64_bit_update_armap_timestamp): Likewise.
+	* libbfd.h: Regenerated.
+	* plugin.c (plugin_vec): Use _bfd_archive_64_bit on
+	BFD_JUMP_TABLE_ARCHIVE if USE_64_BIT_ARCHIVE is defined.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20103
+	* cofflink.c (coff_link_check_archive_element): Return TRUE if
+	linker add_archive_element callback returns FALSE.
+	* ecoff.c (ecoff_link_check_archive_element): Likewise.
+	* elf64-ia64-vms.c (elf64_vms_link_add_archive_symbols): Skip
+	archive element if linker add_archive_element callback returns
+	FALSE.
+	* elflink.c (elf_link_add_archive_symbols): Likewise.
+	* pdp11.c (aout_link_check_ar_symbols): Likewise.
+	* vms-alpha.c (alpha_vms_link_add_archive_symbols): Likewise.
+	* xcofflink.c (xcoff_link_check_dynamic_ar_symbols): Likewise.
+	(xcoff_link_check_ar_symbols): Likewise.
+
+2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_relocate_section)
+	<bfd_reloc_outofrange>: Unify error reporting code.
+
+2016-05-23  Jim Wilson  <jim.wilson@linaro.org>
+
+	* elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and
+	R_AARCH64_NONE.  Use HOWTO64 for R_AARCH64_NULL.
+	* relocs.c: Add BFD_RELOC_AARCH64_NULL.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Likewise.
+
+2016-05-23  Kuba Sejdak  <jakub.sejdak@phoesys.com>
+
+	* config.bfd: Add entry for arm-phoenix.
+
+2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (arm_dedicated_stub_section_padding): New function.
+	(elf32_arm_size_stubs): Declare stub_type in a more outer scope and
+	account for padding for stub section requiring one.
+	(elf32_arm_build_stubs): Add comment to stress the importance of
+	zeroing veneer section content.
+
+2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* bfd-in.h (bfd_elf32_arm_keep_private_stub_output_sections): Declare
+	bfd hook.
+	* bfd-in2.h: Regenerate.
+	* elf32-arm.c (arm_dedicated_stub_output_section_required): New
+	function.
+	(arm_dedicated_stub_output_section_required_alignment): Likewise.
+	(arm_dedicated_stub_output_section_name): Likewise.
+	(arm_dedicated_stub_input_section_ptr): Likewise.
+	(elf32_arm_create_or_find_stub_sec): Add stub type parameter and
+	function description comment. Add support for dedicated output stub
+	section to given stub types.
+	(elf32_arm_add_stub): Add a stub type parameter and pass it down to
+	elf32_arm_create_or_find_stub_sec.
+	(elf32_arm_create_stub): Pass stub type down to elf32_arm_add_stub.
+	(elf32_arm_size_stubs): Pass stub type when calling
+	elf32_arm_create_or_find_stub_sec for Cortex-A8 erratum veneers.
+	(bfd_elf32_arm_keep_private_stub_output_sections): New function.
+
+2016-05-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_check_relocs): Don't check R_386_GOT32
+	when setting need_convert_load.
+
+2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_read_rel_addend): Adjust the addend for
+	microMIPS JALX.
+
+2016-05-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20117
+	* elf32-i386.c (elf_i386_convert_load_reloc): Don't check
+	R_386_GOT32X.
+	(elf_i386_convert_load): Don't convert R_386_GOT32.
+
+2016-05-20  Alan Modra  <amodra@gmail.com>
+
+	PR gas/20118
+	* elf.c (elf_fake_sections): Set sh_entsize for SHT_INIT_ARRAY,
+	SHT_FINI_ARRAY, and SHT_PREINIT_ARRAY.
+
+2016-05-19  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c (arc_elf_final_write_processing): Changed.
+	(debug_arc_reloc): Likewise.
+	(elf_arc_relocate_section): Likewise.
+	(elf_arc_check_relocs): Likewise.
+	(elf_arc_adjust_dynamic_symbol): Likewise.
+	(elf_arc_add_symbol_hook): Likewise.
+
+2016-05-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config.bfd: Remove `am34-*-linux*' support.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (allocate_dynrelocs): Allocate got and other dynamic
+	relocs before plt relocs.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_branch_reloc): Check for NULL owner
+	before dereferencing.
+
+2016-05-18  Nick Clifton  <nickc@redhat.com>
+
+	* po/sv.po: Updated Swedish translation.
+
+2016-05-18  Alan Modra  <amodra@gmail.com>
+
+	* elf32-arm.c (elf32_arm_size_stubs): Free or cache local syms
+	for each BFD.  Don't goto error_ret_free_local from outside loop.
+
+2016-05-17  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf-s390-common.c (elf_s390_add_symbol_hook): Remove
+	STB_GNU_UNIQUE handling.
+	* elf32-arc.c (elf_arc_add_symbol_hook): Likewise.
+	* elf32-arm.c (elf32_arm_add_symbol_hook): Likewise.
+	* elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise.
+	* elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise.
+	* elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise.
+	* elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise.
+	* elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise.
+	* elf64-x86-64.c (elf_x86_64_add_symbol_hook): Likewise.
+	* elfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise.
+	* elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Likewise.
+	* elf32-i386.c (elf_i386_add_symbol_hook): Remove function.
+	(elf_backend_add_symbol_hook): Remove macro.
+	* elflink.c (elf_link_add_object_symbols): Set `has_gnu_symbols'
+	for STB_GNU_UNIQUE symbols.
+
+2016-05-16  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf32-v850.c (v850_elf_copy_notes): New function, factored out
+	from...
+	(v850_elf_copy_private_bfd_data): ... here.  Call the new
+	function and `_bfd_elf_copy_private_bfd_data'.
+
+2016-05-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20093
+	* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't convert
+	GOTPCREL relocation against large section.
+
+2016-05-13  Alan Modra  <amodra@gmail.com>
+
+	* elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Use
+	linker dynamic sections in calculating size and address of
+	dynamic tags rather than using output sections.  Remove asserts.
+	* elf32-arm.c (elf32_arm_finish_dynamic_sections): Likewise.
+	* elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Likewise.
+	* elf32-cris.c (elf_cris_finish_dynamic_sections): Likewise.
+	* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
+	* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise.
+	* elf32-m32r.c (m32r_elf_finish_dynamic_sections): Likewise.
+	* elf32-m68k.c (elf_m68k_finish_dynamic_sections): Likewise.
+	* elf32-metag.c (elf_metag_finish_dynamic_sections): Likewise.
+	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Likewise.
+	* elf32-nds32.c (nds32_elf_finish_dynamic_sections): Likewise.
+	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Likewise.
+	* elf32-or1k.c (or1k_elf_finish_dynamic_sections): Likewise.
+	* elf32-s390.c (elf_s390_finish_dynamic_sections): Likewise.
+	* elf32-score.c (s3_bfd_score_elf_finish_dynamic_sections): Likewise.
+	* elf32-score7.c (s7_bfd_score_elf_finish_dynamic_sections): Likewise.
+	* elf32-vax.c (elf_vax_finish_dynamic_sections): Likewise.
+	* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Likewise.
+	* elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Likewise.
+	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise.
+	* elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Likewise.
+	* elflink.c (bfd_elf_final_link): Likewise.
+	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
+	* elfxx-sparc.c (sparc_finish_dyn): Likewise.  Adjust error message.
+	* elf32-arc.c (GET_SYMBOL_OR_SECTION): Remove ASSERT arg and
+	don't set doit.  Look up dynobj section.
+	(elf_arc_finish_dynamic_sections): Adjust GET_SYMBOL_OR_SECTION
+	invocation and dynamic tag vma calculation.  Don't test
+	boolean var == TRUE.
+	* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Fix
+	DT_JMPREL calc.
+
+2016-05-13  Alan Modra  <amodra@gmail.com>
+
+	* elflink.c (elf_link_sort_relocs): Wrap overlong lines.  Fix
+	octets_per_byte.  Put dynamic .rela.plt last in link orders.
+	Assign output_offset for reloc sections rather than writing
+	sorted relocs from block corresponding to output_offset.
+
+2016-05-12  Alan Modra  <amodra@gmail.com>
+
+	* elf-bfd.h (elf_reloc_type_class): Put reloc_class_plt last.
+
+2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* elfxx-mips.c (print_mips_ases): Add DSPR3.
+
+2016-05-11  Alan Modra  <amodra@gmail.com>
+
+	* elf32-hppa.c (elf32_hppa_init_stub_bfd): New function.
+	(elf32_hppa_check_relocs): Don't set dynobj.
+	(elf32_hppa_size_stubs): Test !SEC_LINKER_CREATED for stub sections.
+	(elf32_hppa_build_stubs): Likewise.
+	* elf32-hppa.h (elf32_hppa_init_stub_bfd): Declare.
+
+2016-05-11  Alan Modra  <amodra@gmail.com>
+
+	PR 20060
+	* elf64-ppc.c (ppc64_elf_tls_setup): Clear forced_local.
+	* elf32-ppc.c (ppc_elf_tls_setup): Likewise.
+
+2016-05-10  Jiong Wang  <jiong.wang@arm.com>
+
+	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Remove redundant
+	aarch64_tls_transition check.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (enum elf32_arm_stub_type): New max_stub_type
+	enumerator.
+	(arm_stub_sym_claimed): New function.
+	(elf32_arm_create_stub): Use veneered symbol name and section if
+	veneer needs to claim its symbol, and keep logic unchanged otherwise.
+	(arm_stub_claim_sym): New function.
+	(arm_map_one_stub): Call arm_stub_claim_sym if veneer needs to claim
+	veneered symbol, otherwise create local symbol as before.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (elf32_arm_size_stubs): Use new macros
+	ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
+	and set branch type of a symbol.
+	(bfd_elf32_arm_process_before_allocation): Likewise.
+	(elf32_arm_relocate_section): Likewise and fix identation along the
+	way.
+	(allocate_dynrelocs_for_symbol): Likewise.
+	(elf32_arm_finish_dynamic_symbol): Likewise.
+	(elf32_arm_swap_symbol_in): Likewise.
+	(elf32_arm_swap_symbol_out): Likewise.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* bfd-in.h (elf32_arm_size_stubs): Add an output section parameter.
+	* bfd-in2.h: Regenerated.
+	* elf32-arm.c (struct elf32_arm_link_hash_table): Add an output section
+	parameter to add_stub_section callback.
+	(elf32_arm_create_or_find_stub_sec): Get output section from link_sec
+	and pass it down to add_stub_section.
+	(elf32_arm_add_stub): Set section to stub_sec if NULL before using it
+	for error message.
+	(elf32_arm_size_stubs): Add output section parameter to
+	add_stub_section function pointer parameter.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (elf32_arm_create_stub): New function.
+	(elf32_arm_size_stubs): Use elf32_arm_create_stub for stub creation.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (enum elf32_arm_stub_type): Delete
+	arm_stub_a8_veneer_lwm enumerator.
+	(arm_stub_a8_veneer_lwm): New unsigned constant to replace
+	aforementioned enumerator.
+	(struct elf32_arm_stub_hash_entry): Delete target_addend
+	field and add source_value.
+	(struct a8_erratum_fix): Delete addend field and add target_offset.
+	(stub_hash_newfunc): Initialize source_value field amd remove
+	initialization for target_addend.
+	(arm_build_one_stub): Stop special casing Thumb relocations: promote
+	the else to being always executed, moving the
+	arm_stub_a8_veneer_b_cond specific code in it.  Remove
+	stub_entry->target_addend from points_to computation.
+	(cortex_a8_erratum_scan): Store in a8_erratum_fix structure the offset
+	to target symbol from start of section rather than the offset from the
+	stub address.
+	(elf32_arm_size_stubs): Set stub_entry's source_value and target_value
+	fields from struct a8_erratum_fix's offset and target_offset
+	respectively.
+	(make_branch_to_a8_stub): Rename target variable to loc.  Compute
+	veneered_insn_loc and loc using stub_entry's source_value.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	(elf32_arm_merge_eabi_attributes): Add merging logic for
+	Tag_DSP_extension.
+
+2016-05-10  Pip Cet  <pipcet@gmail.com>
+
+	PR ld/20059
+	* elfxx-target.h (bfd_elfNN_bfd_copy_link_hash_symbol_type):
+	Define as _bfd_generic_copy_link_hash_symbol_type when using
+	generic hash table.
+
+2016-05-09  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20063
+	* elf.c (bfd_elf_get_elf_syms): Check for out of range sh_link
+	field before accessing sections array.
+
+2016-05-09  Christophe Monat  <christophe.monat@st.com>
+
+	PR ld/20030
+	* elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding.
+	(stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs
+	to nb_words.
+	(create_instruction_vldmia): Add is_dp to disambiguate SP/DP
+	encoding.
+	(create_instruction_vldmdb): Likewise.
+	(stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding,
+	uses it to re-encode.
+
+2016-05-09  Nick Clifton  <nickc@redhat.com>
+
+	PR 19938
+	* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Revert accidental
+	commit.
+
+2016-05-09  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_init_stub_bfd): Remove redundant NULL check.
+
+2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/17550
+	* elf-bfd.h (elf_link_hash_entry): Update comments for indx,
+	documenting that indx == -3 if symbol is defined in a discarded
+	section.
+	* elflink.c (elf_link_add_object_symbols): Set indx to -3 if
+	symbol is defined in a discarded section.
+	(elf_link_output_extsym): Strip a global symbol defined in a
+	discarded section.
+
+2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_backend_add_symbol_hook): Defined for Intel
+	MCU.
+
+2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_convert_load): Extract the GOT load
+	conversion to ...
+	(elf_i386_convert_load_reloc): This.  New function.
+	* elf64-x86-64.c (elf_x86_64_convert_load): Extract the GOT load
+	conversion to ...
+	(elf_x86_64_convert_load_reloc): This.  New function.
+
+2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_check_tls_transition): Remove abfd.
+	Don't check if contents == NULL.
+	(elf_i386_tls_transition): Add from_relocate_section.  Check
+	from_relocate_section instead of contents != NULL.  Update
+	elf_i386_check_tls_transition call.
+	(elf_i386_check_relocs): Cache the section contents if
+	keep_memory is FALSE.  Pass FALSE as from_relocate_section to
+	elf_i386_tls_transition.
+	(elf_i386_relocate_section): Pass TRUE as from_relocate_section
+	to elf_i386_tls_transition.
+	(elf_backend_caches_rawsize): New.
+	* elf64-x86-64.c (elf_x86_64_check_tls_transition): Don't check
+	if contents == NULL.
+	(elf_x86_64_tls_transition): Add from_relocate_section.  Check
+	from_relocate_section instead of contents != NULL.
+	(elf_x86_64_check_relocs): Cache the section contents if
+	keep_memory is FALSE.  Pass FALSE as from_relocate_section to
+	elf_x86_64_tls_transition.
+	(elf_x86_64_relocate_section): Pass TRUE as from_relocate_section
+	to elf_x86_64_tls_transition.
+	(elf_backend_caches_rawsize): New.
+
+2016-05-03  Maciej W. Rozycki  <macro@imgtec.com>
+
+	PR 10549
+	* elfxx-mips.c (_bfd_mips_elf_add_symbol_hook): Handle
+	STB_GNU_UNIQUE.
+
+2016-05-03  Jiong Wang  <jiong.wang@arm.com>
+
+	* bfd-in.h (bfd_elf64_aarch64_set_options): Update prototype.
+	* bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise.
+	* elfnn-aarch64.c (bfd_elfNN_aarch64_set_options): Initialize
+	no_apply_dynamic_relocs.
+	(elfNN_aarch64_final_link_relocate): Apply absolute relocations even though
+	dynamic relocations generated.
+
+2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_size_dynamic_sections): Move interp
+	setting to ...
+	(elf_i386_create_dynamic_sections): Here.
+	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Move
+	interp setting to ...
+	(elf_x86_64_create_dynamic_sections): Here.
+
+2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Take GOT_RELOC
+	and replace (EH)->has_got_reloc with GOT_RELOC.
+	(elf_i386_fixup_symbol): Pass has_got_reloc to
+	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
+	(elf_i386_allocate_dynrelocs): Likewise.
+	(elf_i386_relocate_section): Likewise.
+	(elf_i386_finish_dynamic_symbol): Likewise.
+	(elf_i386_convert_load): Pass TRUE to
+	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
+	* elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Take
+	GOT_RELOC and replace (EH)->has_got_reloc with GOT_RELOC.
+	(elf_x86_64_fixup_symbol): Pass has_got_reloc to
+	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
+	(elf_x86_64_allocate_dynrelocs): Likewise.
+	(elf_x86_64_relocate_section): Likewise.
+	(elf_x86_64_finish_dynamic_symbol): Likewise.
+	(elf_x86_64_convert_load): Pass TRUE to
+	UNDEFINED_WEAK_RESOLVED_TO_ZERO.
+
+2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (check_relocs_failed): New.
+	(elf_i386_check_relocs): Set check_relocs_failed on error.
+	(elf_i386_relocate_section): Skip if check_relocs failed.
+
+2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_x86_64_check_relocs): Set
+	check_relocs_failed on error.
+
+2016-04-29  Nick Clifton  <nickc@redhat.com>
+
+	PR 19938
+	* elf-bfd.h (struct elf_backend_data): Rename
+	elf_backend_set_special_section_info_and_link to
+	elf_backend_copy_special_section_fields.
+	* elfxx-target.h: Likewise.
+	* elf.c (section_match): Ignore the SHF_INFO_LINK flag when
+	comparing section flags.
+	(copy_special_section_fields): New function.
+	(_bfd_elf_copy_private_bfd_data): Copy the EI_ABIVERSION field.
+	Perform two scans over special sections.  The first one looks for
+	a direct mapping between the output section and an input section.
+	The second scan looks for a possible match based upon section
+	characteristics.
+	* elf32-arm.c (elf32_arm_copy_special_section_fields): New
+	function.  Handle setting the sh_link field of SHT_ARM_EXIDX
+	sections.
+	* elf32-i386.c (elf32_i386_set_special_info_link): Rename to
+	elf32_i386_copy_solaris_special_section_fields.
+	* elf32-sparc.c (elf32_sparc_set_special_section_info_link):
+	Rename to elf32_sparc_copy_solaris_special_section_fields.
+	* elf64-x86-64.c (elf64_x86_64_set_special_info_link): Rename to
+	elf64_x86_64_copy_solaris_special_section_fields.
+
+2016-04-28  Nick Clifton  <nickc@redhat.com>
+
+	* po/zh_CN.po: Updated Chinese (simplified) translation.
+
+2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20006
+	* elf64-x86-64.c (elf_x86_64_convert_load): Skip debug sections
+	when estimating distances between output sections.
+
+2016-04-27  Alan Modra  <amodra@gmail.com>
+
+	* elflink.c (_bfd_elf_is_start_stop): New function.
+	(_bfd_elf_gc_mark_rsec): Use it.
+	* elf-bfd.h (_bfd_elf_is_start_stop): Declare.
+
+2016-04-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf32-rx.c (rx_set_section_contents): Avoid arithmetic on void *.
+	* mmo.c (mmo_get_section_contents): Likewise.
+	(mmo_set_section_contents): Likewise.
+
+2016-04-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf-bfd.h (elf_link_hash_table): Update comments for
+	dynsymcount.
+	* elflink.c (_bfd_elf_link_renumber_dynsyms): Always count for
+	the unused NULL entry at the head of dynamic symbol table.
+	(bfd_elf_size_dynsym_hash_dynstr): Remove dynsymcount != 0
+	checks.
+
+2016-04-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elflink.c (_bfd_elf_link_create_dynstrtab): Exclude linker
+	created file from dynobj.
+
+2016-04-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elflink.c (_bfd_elf_link_create_dynstrtab): Set dynobj to a
+	normal input file if possible.
+
+2016-04-21  Nick Clifton  <nickc@redhat.com>
+
+	* aout-adobe.c: Use _bfd_generic_link_check_relocs.
+	* aout-target.h: Likewise.
+	* aout-tic30.c: Likewise.
+	* binary.c: Likewise.
+	* bout.c: Likewise.
+	* coff-alpha.c: Likewise.
+	* coff-rs6000.c: Likewise.
+	* coff64-rs6000.c: Likewise.
+	* coffcode.h: Likewise.
+	* i386msdos.c: Likewise.
+	* i386os9k.c: Likewise.
+	* ieee.c: Likewise.
+	* ihex.c: Likewise.
+	* libbfd-in.h: Likewise.
+	* libecoff.h: Likewise.
+	* mach-o-target.c: Likewise.
+	* mmo.c: Likewise.
+	* nlm-target.h: Likewise.
+	* oasys.c: Likewise.
+	* pef.c: Likewise.
+	* plugin.c: Likewise.
+	* ppcboot.c: Likewise.
+	* som.c: Likewise.
+	* srec.c: Likewise.
+	* tekhex.c: Likewise.
+	* versados.c: Likewise.
+	* vms-alpha.c: Likewise.
+	* xsym.c: Likewise.
+	* elfxx-target.h: Use _bfd_elf_link_check_relocs.
+	* linker.c (bfd_link_check_relocs): New function.
+	(_bfd_generic_link_check_relocs): New function.
+	* targets.c (BFD_JUMP_TABLE_LINK): Add initialization of
+	_bfd_link_check_relocs field.
+	(struct bfd_target)L Add _bfd_link_check_relocs field.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_gc_sweep_hook): Removed.
+	(elf_backend_gc_sweep_hook): Likewise.
+	* elf64-x86-64.c (elf_x86_64_gc_sweep_hook): Likewise.
+	(elf_backend_gc_sweep_hook): Likewise.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elflink.c (_bfd_elf_link_check_relocs): Don't check relocations
+	in excluded sections
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19969
+	* elf64-x86-64.c (check_relocs_failed): New.
+	(elf_x86_64_need_pic): Moved before elf_x86_64_check_relocs.
+	Support relocation agaist local symbol.  Set check_relocs_failed.
+	(elf_x86_64_check_relocs): Use elf_x86_64_need_pic.  Check
+	R_X86_64_32 relocation overflow.
+	(elf_x86_64_relocate_section): Skip if check_relocs failed.
+	Update one elf_x86_64_need_pic and remove one elf_x86_64_need_pic.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_check_relocs): Call
+	_bfd_elf_create_ifunc_sections only for STT_GNU_IFUNC symbol.
+	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf-bfd.h (_bfd_elf_link_check_relocs): New.
+	* elflink.c (_bfd_elf_link_check_relocs): New function.
+	(elf_link_add_object_symbols): Call _bfd_elf_link_check_relocs
+	if check_relocs_after_open_input is FALSE.
+
+2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* cache.c: Update old style function definitions.
+	* elf32-m68k.c: Likewise.
+	* elf64-mmix.c: Likewise.
+	* stab-syms.c: Likewise.
+
+2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf32-arm.c (put_thumb2_insn): Change argument type to bfd_byte *.
+
+2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated with automake 1.11.6.
+	* aclocal.m4: Likewise.
+	* doc/Makefile.in: Likewise.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+	* elf32-arc.c: Add 'opcode/arc.h' include.
+	(struct arc_relocation_data): Add symbol_name.
+	(arc_special_overflow_checks): New function.
+	(arc_do_relocation): Use arc_special_overflow_checks, reindent as
+	required, add an extra comment.
+	(elf_arc_relocate_section): Setup symbol_name in reloc_data.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf32-arc.c (tls_got_entries): Add 'TLS_GOT_' prefix to all
+	entries.
+	(elf_arc_relocate_section): Update enum uses.
+	(elf_arc_check_relocs): Likewise.
+	(elf_arc_finish_dynamic_symbol): Likewise.
+
+2016-04-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf.c (_bfd_elf_copy_private_bfd_data): Replace "link" with
+	"sh_link".
+
+2016-04-14  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19938
+	* elf-bbfd.h (struct elf_backend_data): New field:
+	elf_strtab_flags.
+	New field: elf_backend_set_special_section_info_and_link
+	* elfxx-target.h (elf_backend_strtab_flags): Define if not already
+	defined.
+	(elf_backend_set_special_section_info_and_link): Define if not
+	already defined.
+	(elfNN_bed): Use elf_backend_set_special_section_info_and_link and
+	elf_backend_strtab_flags macros to initialise fields in structure.
+	* elf.c (_bfd_elf_make_section_from_shdr): Check for SHF_STRINGS
+	being set even if SHF_MERGE is not set.
+	(elf_fake_sections): Likewise.
+	(section_match): New function.  Matches two ELF sections based
+	upon fixed characteristics.
+	(find_link): New function.  Locates a section in a BFD that
+	matches a section in a different BFD.
+	(_bfd_elf_copy_private_bfd_data): Copy the sh_info and sh_link
+	fields of reserved sections.
+	(bfd_elf_compute_section_file_positions): Set the flags for the
+	.shstrtab section based upon the elf_strtab_flags field in the
+	elf_backend_data structure.
+	(swap_out_syms): Likewise for the .strtab section.
+	* elflink.c (bfd_elf_final_link): Set the flags for the
+	.strtab section based upon the elf_strtab_flags field in the
+	elf_backend_data structure.
+	* elf32-i386.c (elf32_i386_set_special_info_link): New function.
+	(elf_backend_strtab_flags): Set to SHF_STRINGS for Solaris
+	targets.
+	(elf_backend_set_special_section_info_and_link): Define for
+	Solaris targets.
+	* elf32-sparc.c: Likewise.
+	* elf64-x86-64.c: Likewise.
+
+2016-04-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19939
+	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add a pointer
+	to bfd_boolean.
+	* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Updated.
+	Set *readonly_dynrelocs_against_ifunc_p to TRUE if dynamic reloc
+	applies to read-only section.
+	* elf32-i386.c (elf_i386_link_hash_table): Add
+	readonly_dynrelocs_against_ifunc.
+	(elf_i386_allocate_dynrelocs): Updated.
+	(elf_i386_size_dynamic_sections): Issue an error for read-only
+	segment with dynamic IFUNC relocations only if
+	readonly_dynrelocs_against_ifunc is TRUE.
+	* elf64-x86-64.c (elf_x86_64_link_hash_table): Add
+	readonly_dynrelocs_against_ifunc.
+	(elf_x86_64_allocate_dynrelocs): Updated.
+	(elf_x86_64_size_dynamic_sections): Issue an error for read-only
+	segment with dynamic IFUNC relocations only if
+	readonly_dynrelocs_against_ifunc is TRUE.
+	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
+	Updated.
+
+2016-04-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf32-arm.c (elf32_arm_size_stubs): Move error_ret_free_local to be
+	a fall through from error_ret_free_internal.  Free local_syms in
+	error_ret_free_local if allocated from bfd_elf_get_elf_syms ().
+
+2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c (plt_do_relocs_for_symbol): Changed.
+	(relocate_plt_for_entry): Likewise.
+
+2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c (elf_arc_check_relocs): Changed
+
+2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c (name_for_global_symbol): Changed assert.
+	(get_replace_function): Created.:
+	(struct arc_relocation_data): Changed to signed types.
+	(defines S, L, P, PDATA): Casted to signed type.
+	(defines SECTSTART, _SDA_BASE_, TLS_REL): Likewise.
+	(PRINT_DEBUG_RELOC_INFO_BEFORE): Changed.
+	(arc_do_relocation): Changed.
+
+2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c (name_for_global_symbol): Added assert to check for
+	symbol index.
+	(elf_arc_relocate_section): Added and changed asserts, validating
+	the synamic symbol index.
+	(elf_arc_finish_dynamic_symbol): Do not fill the dynamic
+	relocation if symbol has dynindx set to -1.
+
+2016-04-05  Maciej W. Rozycki  <macro@imgtec.com>
+
+	PR ld/19908
+	* elflink.c (elf_link_add_object_symbols): Always turn hidden
+	and internal symbols which have a dynamic index into local
+	ones.
+
+2016-04-04  Nick Clifton  <nickc@redhat.com>
+
+	PR 19872
+	* dwarf2.c (parse_comp_unit): Skip warning about unrecognised
+	version number if the version is zero.
+
+2016-04-01  Alan Modra  <amodra@gmail.com>
+
+	PR 19886
+	* elflink.c (on_needed_list): Recursively check needed status.
+	(elf_link_add_object_symbols): Adjust.
+
+2016-03-30  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* elf32-avr.c (avr_elf32_load_records_from_section): Free
+	internal_relocs only if they aren't cached.
+
+2016-03-29  Nick Clifton  <nickc@redhat.com>
+
+	PR 17334
+	* elf32-bfin.c (elf32_bfinfdpic_finish_dynamic_sections): Relax
+	assertion on the size of the got section to allow it to be bigger
+	than the number of relocs.
+
+2016-03-29  Toni Spets  <toni.spets@iki.fi>
+
+	PR 19878
+	* coffcode.h (coff_write_object_contents): Revert accidental
+	2014-11-10 change.
+
+2016-03-22  Alan Modra  <amodra@gmail.com>
+
+	PR 19850
+	* dwarf2.c (read_attribute_value): Skip info_ptr check for
+	DW_FORM_flag_present.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	* cpu-v850_rh850.c (arch_info_struct): Restore v850-rh850 as an
+	architecture name for backwards compatibility.
+
+	* peXXigen.c (_bfd_XXi_write_codeview_record): Fix possible
+	unbounded stack use.
+
+	* warning.m4 (GCC_WARN_CFLAGS): Only add -Wstack-usage if using a
+	sufficiently recent version of GCC.
+	* configure: Regenerate.
+
+2016-03-22  Alan Modra  <amodra@gmail.com>
+
+	PR 19851
+	* plugin.c (try_load_plugin): Avoid -Wstack-usage warning.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* archures.c (bfd_mach_arc_nps400): Define.
+	* bfd-in2.h: Regenerate.
+	* cpu-arc.c (arch_info_struct): New entry for nps400, renumber
+	some existing entries to make space.
+	* elf32-arc.c (arc_elf_object_p): Add nps400 case.
+	(arc_elf_final_write_processing): Likewise.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf32-arc.c (arc_elf_print_private_bfd_data): Remove use of
+	EF_ARC_CPU_GENERIC.
+	(arc_elf_final_write_processing): Don't bother setting cpu field
+	in e_flags, this will have been set elsewhere.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf32-arc.c (arc_elf_final_write_processing): Switch to using
+	EF_ARC_MACH_MSK.
+
+2016-03-21  Nick Clifton  <nickc@redhat.com>
+
+	* warning.m4 (GCC_WARN_CFLAGS): Add -Wstack-usage=262144
+	* configure: Regenerate.
+	* elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Replace use of
+	alloca with call to xmalloc.
+	* elf32-nds32.c: Likewise.
+	* elf64-hppa.c: Likewise.
+	* elfxx-mips.c: Likewise.
+	* pef.c: Likewise.
+	* pei-x86_64.c: Likewise.
+	* som.c: Likewise.
+	* xsym.c: Likewise.
+
+2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19827
+	* elf32-i386.c (elf_i386_check_relocs): Bind defined symbol
+	locally in PIE.
+	(elf_i386_relocate_section): Likewise.
+	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
+	(elf_x86_64_relocate_section): Likewise.
+
+2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19807
+	* elf64-x86-64.c (elf_x86_64_relocate_section): Check
+	no_reloc_overflow_check to diable R_X86_64_32/R_X86_64_32S
+	relocation overflow check.
+
+2016-03-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* bfd-in2.h: Regenerated.
+
+2016-03-11  Dan Gissel  <dgisselq@ieee.org>
+
+	PR 19713
+	* elf.c (_bfd_elf_section_offset): Ensure that the returned offset
+	uses bytes not octets.
+	* elflink.c (resolve_section): Likewise.
+	Add a bfd parameter.
+	(eval_section): Pass the input_bfd to resolve_section.
+	(bfd_elf_perform_complex_relocation): Convert byte offset to
+	octets before read and writing values.
+	(elf_link_input_bfd): Add byte to octet conversions.
+	(elf_reloc_link_order): Likewise.
+	(elf_fixup_link_order): Likewise.
+	(bfd_elf_final_link): Likewise.
+	* reloc.c (_bfd_final_link_relocate): Likewise.
+	* syms.c (_bfd_stab_section_find_nearest_line): Likewise.
+
+2016-03-10  Nick Clifton  <nickc@redhat.com>
+
+	* config.bfd: Mark the i370 target as obsolete.
+
+2016-03-09  Pedro Alves  <palves@redhat.com>
+
+	* cpu-v850.c (N): Append ":old-gcc-abi" instead of " (using old
+	gcc ABI)" to printable name.
+	* cpu-v850_rh850.c (bfd_v850_rh850_arch): Use "v850:rh850" instead
+	of "v850-rh850" as printable name.
+
+2016-03-09  Leon Winter  <winter-gcc@bfw-online.de>
+
+	PR ld/19623
+	* cofflink.c (_bfd_coff_generic_relocate_section): Do not apply
+	relocations against absolute symbols.
+
+2016-03-09  Alan Modra  <amodra@gmail.com>
+
+	PR binutils/19775
+	* coff-alpha.c (alpha_ecoff_openr_next_archived_file): Allow zero
+	length elements in the archive.
+
+2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19789
+	* elflink.c (elf_link_add_object_symbols): Create dynamic sections
+	for -E/--dynamic-list only when not relocatable.
+
+2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19784
+	* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
+	count for locally defined local IFUNC symbols in shared object.
+	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
+
+2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19579
+	* elflink.c (_bfd_elf_merge_symbol): Group common symbol checking
+	together.
+
+2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
+	    Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf32-arc.c (arc_bfd_get_32): Becomes an alias for bfd_get_32.
+	(arc_bfd_put_32): Becomes an alias for bfd_put_32.
+	(arc_elf_howto_init): Added assert to validate relocations.
+	(get_middle_endian_relocation): Delete.
+	(middle_endian_convert): New function.
+	(ME): Redefine, now does nothing.
+	(IS_ME): New define.
+	(arc_do_relocation): Extend the attached 'ARC_RELOC_HOWTO'
+	definition to call middle_endian_convert.  Add a new local
+	variable and make use of this throughout. Added call to
+	arc_bfd_get_8 and arc_bfd_put_8 for 8 bit relocations.
+
+2016-03-07  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/19775
+	* archive.c (bfd_generic_openr_next_archived_file): Allow zero
+	length elements in the archive.
+
+2016-03-07  Jiong Wang  <jiong.wang@arm.com>
+
+	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Always create .got
+	section if the symbol "_GLOBAL_OFFSET_TABLE_" is referenced.
+
+2016-03-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19579
+	* elflink.c (_bfd_elf_merge_symbol): Treat common symbol in
+	executable as definition if the new definition comes from a
+	shared library.
+
+2016-03-02  Alan Modra  <amodra@gmail.com>
+
+	* Makefile.in: Regenerate.
+	* po/SRC-POTFILES.in: Regenerate.
+
+2016-02-29  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* elf32-arc.c (elf_arc_relocate_section): Added rules to fix the
+	relocation addend when sections get merged.
+
+2016-02-29  Cupertino Miranda <Cupertino.Miranda@synopsys.com>
+
+	* elf32-arc.c (arc_elf_final_write_processing): Add condition to
+	the flag change.
+        (elf_arc_relocate_section): Fixes and conditions to support PIE.
+	Assert for code sections dynamic relocs.
+
+2016-02-26  Renlin Li  <renlin.li@arm.com>
+
+	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow
+	check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19609
+	* elf32-i386.c (elf_i386_convert_load): Convert to R_386_32 for
+	load with locally bound symbols if PIC is false or there is no
+	base register.  Optimize branch to 0 if PIC is false.
+	(elf_i386_relocate_section): Don't generate dynamic relocations
+	against undefined weak symbols if PIC is false.
+	* elf64-x86-64.c (elf_x86_64_convert_load): Disable optimization
+	if we can't estimate relocation overflow with --no-relax.
+	Convert to R_X86_64_32S/R_X86_64_32 for load with locally bound
+	symbols if PIC is false.  Optimize branch to 0 if PIC is false.
+	(elf_x86_64_relocate_section): Don't generate dynamic relocations
+	against undefined weak symbols if PIC is false.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19645
+	* bfd.c (bfd): Change flags to 20 bits.
+	(BFD_CONVERT_ELF_COMMON): New.
+	(BFD_USE_ELF_STT_COMMON): Likewise.
+	(BFD_FLAGS_SAVED): Add BFD_CONVERT_ELF_COMMON and
+	BFD_USE_ELF_STT_COMMON.
+	(BFD_FLAGS_FOR_BFD_USE_MASK): Likewise.
+	* configure.ac: Remove --enable-elf-stt-common.
+	* elf.c (swap_out_syms): Choose STT_COMMON or STT_OBJECT for
+	common symbol depending on BFD_CONVERT_ELF_COMMON and
+	BFD_USE_ELF_STT_COMMON.
+	* elfcode.h (elf_slurp_symbol_table): Set BSF_ELF_COMMON for
+	STT_COMMON.
+	* elflink.c (bfd_elf_link_mark_dynamic_symbol): Also check
+	STT_COMMON.
+	(elf_link_convert_common_type): New function.
+	(elf_link_output_extsym): Choose STT_COMMON or STT_OBJECT for
+	common symbol depending on BFD_CONVERT_ELF_COMMON and
+	BFD_USE_ELF_STT_COMMON.  Set sym.st_info after sym.st_shndx.
+	* elfxx-target.h (TARGET_BIG_SYM): Add BFD_CONVERT_ELF_COMMON
+	and BFD_USE_ELF_STT_COMMON to object_flags.
+	(TARGET_LITTLE_SYM): Likewise.
+	* syms.c (BSF_KEEP_G): Renamed to ...
+	(BSF_ELF_COMMON): This.
+	* bfd-in2.h: Regenerated.
+	* config.in: Likewise.
+	* configure: Likewise.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19636
+	PR ld/19704
+	PR ld/19719
+	* elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): New.
+	(elf_i386_link_hash_entry): Add has_got_reloc and
+	has_non_got_reloc.
+	(elf_i386_link_hash_table): Add interp.
+	(elf_i386_link_hash_newfunc): Initialize has_got_reloc and
+	has_non_got_reloc.
+	(elf_i386_copy_indirect_symbol): Copy has_got_reloc and
+	has_non_got_reloc.
+	(elf_i386_check_relocs): Set has_got_reloc and has_non_got_reloc.
+	(elf_i386_fixup_symbol): New function.
+	(elf_i386_pie_finish_undefweak_symbol): Likewise.
+	(elf_i386_allocate_dynrelocs): Don't allocate space for dynamic
+	relocations and discard relocations against resolved undefined
+	weak symbols in executable.  Don't make resolved undefined weak
+	symbols in executable dynamic.  Keep dynamic non-GOT/non-PLT
+	relocation against undefined weak symbols in PIE.
+	(elf_i386_size_dynamic_sections): Set interp to .interp section.
+	(elf_i386_relocate_section): Don't generate dynamic relocations
+	against resolved undefined weak symbols in PIE, except for
+	R_386_PC32.
+	(elf_i386_finish_dynamic_symbol): Keep PLT/GOT entries without
+	dynamic PLT/GOT relocations for resolved undefined weak symbols.
+	Don't generate dynamic relocation against resolved undefined weak
+	symbol in executable.
+	(elf_i386_finish_dynamic_sections): Call
+	elf_i386_pie_finish_undefweak_symbol on all symbols in PIE.
+	(elf_backend_fixup_symbol): New.
+	* elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): New.
+	(elf_x86_64_link_hash_entry): Add has_got_reloc and
+	has_non_got_reloc.
+	(elf_x86_64_link_hash_table): Add interp.
+	(elf_x86_64_link_hash_newfunc): Initialize has_got_reloc and
+	has_non_got_reloc.
+	(elf_x86_64_copy_indirect_symbol): Copy has_got_reloc and
+	has_non_got_reloc.
+	(elf_x86_64_check_relocs): Set has_got_reloc and
+	has_non_got_reloc.
+	(elf_x86_64_fixup_symbol): New function.
+	(elf_x86_64_pie_finish_undefweak_symbol): Likewise.
+	(elf_x86_64_allocate_dynrelocs): Don't allocate space for dynamic
+	relocations and discard relocations against resolved undefined
+	weak symbols in executable.  Don't make resolved undefined weak
+	symbols in executable dynamic.
+	(elf_x86_64_size_dynamic_sections): Set interp to .interp section.
+	(elf_x86_64_relocate_section): Check relocation overflow for
+	dynamic relocations against unresolved weak undefined symbols.
+	Don't generate dynamic relocations against resolved weak
+	undefined symbols in PIE.
+	(elf_x86_64_finish_dynamic_symbol): Keep PLT/GOT entries without
+	dynamic PLT/GOT relocations for resolved undefined weak symbols.
+	Don't generate dynamic relocation against resolved undefined weak
+	symbol in executable.
+	(elf_x86_64_finish_dynamic_sections): Call
+	elf_x86_64_pie_finish_undefweak_symbol on all symbols in PIE.
+	(elf_backend_fixup_symbol): New.
+
+2016-02-26  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (create_linkage_sections): Create sfpr when
+	save_restore_funcs, rest of sections when not relocatable.
+	(ppc64_elf_init_stub_bfd): Always call create_linkage_sections.
+	(sfpr_define): Define all symbols on emitted code.
+	(ppc64_elf_func_desc_adjust): Adjust for sfpr now being created
+	when relocatable.  Move sfpr_define loop earlier.
+
+2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_x86_64_need_pic): New function.
+	(elf_x86_64_relocate_section): Use it.  Replace
+	x86_64_elf_howto_table[r_type] with howto.
+
+2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19698
+	* elflink.c (bfd_elf_record_link_assignment): Set versioned if
+	symbol version is unknown.
+
+2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf32-i386.c (elf_i386_allocate_dynrelocs): Set plt_got.offset
+	to (bfd_vma) -1 when setting needs_plt to 0.
+	* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise.
+
+2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elflink.c (bfd_elf_record_link_assignment): Check for shared
+	library, instead of PIC, and don't check PDE when making linker
+	assigned symbol dynamic.
+
+2016-02-23  Faraz Shahbazker  <faraz.shahbazker@imgtec.com>
+
+	* bfd/elfxx-mips.c (_bfd_mips_post_process_headers): Increment
+	ABIVERSION for non-executable stack.
+
+2016-02-23  Rich Felker  <bugdal@aerifal.cx>
+
+	PR target/19516
+	* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol):
+	Always produce a RELATIVE reloc for a local symbol.
+
+2016-02-23  Hans-Peter Nilsson  <hp@axis.com>
+
+	Fix test-case ld-elf/pr19617b
+	* elf32-cris.c (elf_cris_discard_excess_program_dynamics): Don't
+	discard unused non-function symbols when --dynamic-list-data.
+
+2016-02-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elflink.c (_bfd_elf_link_renumber_dynsyms): Always create the
+	dynsym section, even if it is empty, with dynamic sections.
+
+2016-02-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* syms.c: Remove BSF_COMMON from comments.
+	* bfd-in2.h: Regenerated.
+
+2016-02-22  Jiong Wang  <jiong.wang@arm.com>
+
+	* elfnn-aarch64. (aarch64_type_of_stub): Remove redundation calcuation
+	for destination.  Remove useless function parameters.
+	(elfNN_aarch64_size_stubs): Update parameters for aarch64_type_of_stub.
+
+2016-02-19  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/19629
+	* aoutx.h (aout_link_add_symbols): Check for out of range string
+	table offsets.
+
+	PR ld/19628
+	* reloc.c (bfd_generic_get_relocated_section_contents): Stop
+	processing if we encounter a reloc without an associated symbol.
+
+2016-02-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19617
+	* elflink.c (elf_link_add_object_symbols): Always create dynamic
+	sections for -E/--dynamic-list.
+
+2016-02-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_backend_omit_section_dynsym): New.  Defined
+	to bfd_true.
+
+2016-02-16  Joseph Myers  <joseph@codesourcery.com>
+
+	* plugin.c (plugin_vec): Set match priority to 255.
+	* format.c (bfd_check_format_matches) [BFD_SUPPORTS_PLUGINS]: When
+	matching against the plugin vector, take priority from there not
+	from TEMP.
+
+2016-02-15  Nick Clifton  <nickc@redhat.com>
+
+	* elf-bfd.h (struct bfd_elf_special_section): Use unsigned values
+	for length and type fields.  Use a signed value for the
+	suffix_length field.
+
+2016-02-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19601
+	* elf32-i386.c (elf_i386_relocate_section): Mask off the least
+	significant bit in GOT offset for R_386_GOT32X.
+
+2016-02-10  Nick Clifton  <nickc@redhat.com>
+
+	PR 19405
+	* elf32-nios2.c (nios2_elf32_install_imm16): Allow for signed
+	immediate values.
+	* elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Limit the
+	number of messages about FDE encoding preventing .eh_frame_hdr
+	generation.
+
+2016-02-09  Nick Clifton  <nickc@redhat.com>
+
+	* oasys.c (oasys_archive_p): Fix indentation.
+	* elf32-nds32.c (nds32_elf_relax_section): Use an unsigned
+	constant for left shifting.
+
+	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more
+	helpful warning message to explain why certain AArch64 relocs
+	might overflow.
+
+2016-02-05  Simon Marchi  <simon.marchi@ericsson.com>
+
+	* pe-mips.c (coff_mips_reloc): Fix formatting.
+
+2016-02-05  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
+
+	* cpu-arc.c: Change default archure from bfd_mach_arc_arcv2
+	to bfd_mach_arc_arc600.
+
+2016-02-04  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_relocate_section): Adjust last patch
+	for big-endian.
+
+2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19542
+	* elf64-x86-64.c (elf_x86_64_convert_load): Store the estimated
+	distances in the compressed_size field of the output section.
+
+2016-02-02  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_relocate_section): Further restrict
+	ELFv2 entry optimization.
+
+2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/19547
+	* elf.c (assign_section_numbers): Clear HAS_RELOC if there are
+	no relocations in relocatable files.
+
+2016-02-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19553
+	* elflink.c (elf_link_add_object_symbols): Don't add DT_NEEDED
+	if a symbol from a library loaded via DT_NEEDED doesn't match
+	the symbol referenced by regular object.
+
+2016-02-01  Nathaniel Smith  <njs@pobox.com>
+
+	* peicode.h (pe_ILF_build_a_bfd): Create an import symbol for both
+	CODE and DATA.
+
+2016-02-01  Alan Modra  <amodra@gmail.com>
+
+	* elf64-x86-64.c (elf_x86_64_get_plt_sym_val): Don't abort on
+	an out of range reloc_index.
+	* elf32-i386.c (elf_i386_get_plt_sym_val): Likewise.
+
+2016-02-01  Kamil Rytarowski  <n54@gmx.com>
+
+	* Makefile.am (OPTIONAL_BACKENDS): Add netbsd-core.lo.
+	(OPTIONAL_BACKENDS_CFILES): Add netbsd-core.c.
+	* Makefile.in: Regenerated.
+
+2016-02-01  Jan Kratochvil  <jan.kratochvil@redhat.com>
+
+	* elf64-s390.c (elf_s390_reloc_name_lookup): Fix indentation.
+
+2016-01-31  John David Anglin  <danglin@gcc.gnu.org>
+
+	PR ld/19526
+	* elf32-hppa.c (elf32_hppa_final_link): Don't sort non-regular output
+	files.
+	* elf64-hppa.c (elf32_hppa_final_link): Likewise.  Remove retval.
+
+2016-01-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19539
+	* elf32-i386.c (elf_i386_reloc_type_class): Check relocation
+	against STT_GNU_IFUNC symbol only with dynamic symbols.
+	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.
+
+2016-01-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/19523
+	* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to
+	decompress debug sections.
+
+2016-01-25  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf32-arc.c (elf_arc_finish_dynamic_symbol): Rename `index' to
+	`dynindx'.
+
+2016-01-25  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19435
+	* mach-o.c (bfd_mach_o_close_and_cleanup): Suppress code to free
+	dsym filename buffer.
+
+2016-01-24  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (BZ16_REG_FIELD): Simplify calculation.
+
+2016-01-24  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (BZ16_REG): Correct calculation.
+
+2016-01-21  Nick Clifton  <nickc@redhat.com>
+
+	* elf32-arc.c (ADD_RELA): Fix compile time warning errors by
+	changing the type of _loc to be bfd_byte *.
+	(elf_arc_finish_dynamic_symbol): Likewise.
+
+2016-01-21  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/19455
+	* elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF
+	class of the linker stub bfd.
+	(elf32_arm_check_relocs): Skip check for pic format after
+	processing a vxWorks R_ARM_ABS12 reloc.
+	* elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when
+	reporting a class mismatch.
+
+2016-01-21  Jiong Wang  <jiong.wang@arm.com>
+
+	* elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
+	veneer for sym_sec != input_sec.
+	(elfNN_aarch64_size_stub): Support STT_SECTION symbol.
+	(elfNN_aarch64_final_link_relocate): Take rela addend into account when
+	calculation destination.
+
+2016-01-21  Alan Modra  <amodra@gmail.com>
+
+	* elf-linux-core.h (swap_linux_prpsinfo32_out): New function.
+	(swap_linux_prpsinfo64_out): New function.
+	(LINUX_PRPSINFO32_SWAP_FIELDS): Delete.
+	(LINUX_PRPSINFO64_SWAP_FIELDS): Delete.
+	* elf.c (elfcore_write_linux_prpsinfo32): Adjust.  Don't memset.
+	(elfcore_write_linux_prpsinfo64): Likewise.
+	* elf32-ppc.c (swap_ppc_linux_prpsinfo32_out): New function.
+	(PPC_LINUX_PRPSINFO32_SWAP_FIELDS): Delete.
+	(elfcore_write_ppc_linux_prpsinfo32): Adjust.  Don't memset.
+
+2016-01-21  Alan Modra  <amodra@gmail.com>
+
+	* elf-linux-core.h: Rename from elf-linux-psinfo.h.
+	* elf.c: Adjust #include.
+	* elf32-ppc.c: Don't #include elf-linux-psinfo.h
+	* Makefile.am (SOURCE_HFILES): Update.
+	* Makefile.in: Regenerate.
+	* po/SRC-PORFILES.in: Regenerate.
+
+2016-01-21  Alan Modra  <amodra@gmail.com>
+
+	* configure.ac: Move corefile selection later in file.  Move
+	tdefaults code immediately after other target vector code.
+	* configure: Regenerate.
+
+2016-01-20  Mickael Guene  <mickael.guene@st.com>
+
+	* elf32-arm.c (elf32_arm_special_sections): Remove catch of noread
+	section using '.text.noread' pattern.
+
+2016-01-19  John Baldwin  <jhb@FreeBSD.org>
+
+	* elf.c (elfcore_grok_note): Recognize NT_FREEBSD_THRMISC notes.
+
+2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
+	    Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
+
+	* arc-plt.def: New file.
+	* arc-plt.h: Likewise.
+	* elf32-arc.c (elf_arc_abs_plt0_entry, elf_arc_abs_pltn_entry,
+		       elf_arcV2_abs_plt0_entry, elf_arcV2_abs_pltn_entry,
+		       elf_arc_pic_plt0_entry, elf_arc_pic_pltn_entry,
+		       elf_arcV2_pic_plt0_entry, elf_arcV2_pic_pltn_entry): Remove.
+	(name_for_global_symbol): Added.
+	(ADD_RELA): Helper to create dynamic relocs.
+	(new_got_entry_to_list): Create a new got entry in linked list.
+	(symbol_has_entry_of_type): Search for specific type of entry in
+	list.
+	(is_reloc_for_GOT): return FALSE for any TLS related relocs.
+	(is_reloc_for_TLS, arc_elf_set_private_flags)
+	(arc_elf_print_private_bfd_data, arc_elf_copy_private_bfd_data)
+	(arc_elf_merge_private_bfd_data): New functions.
+	(debug_arc_reloc): Cleaned debug info printing.
+	(PDATA reloc): Changed not to perform address alignment.
+	(reverse_me): Added. Fix for ARC_32 relocs.
+	(arc_do_relocation): Return bfd_reloc_of when no relocation should
+	occur.
+	(arc_get_local_got_ents): Renamed from arc_get_local_got_offsets.
+	Changed function to access an array of list of GOT entries instead
+	of just an array of offsets.
+	(elf_arc_relocate_section): Added support for PIC and TLS related relocations.
+	(elf_arc_check_relocs): Likewise.
+	(elf_arc_adjust_dynamic_symbol, elf_arc_finish_dynamic_symbol,
+	(elf_arc_finish_dynamic_sections): Likewise
+	(arc_create_dynamic_sections): Modified conditions to create
+	dynamic sections.
+	(ADD_SYMBOL_REF_SEC_AND_RELOC): New macro.
+	(plt_do_relocs_for_symbol, relocate_plt_for_symbol)
+	(relocate_plt_for_entry): Changed to support new way to define PLT
+	related code.
+	(add_symbol_to_plt): Likewise.
+	(arc_elf_link_hash_table_create): New function.
+
+2016-01-18  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/19440
+	* coff-rs6000.c (_bfd_xcoff_swap_sym_in): Sign extend external
+	section number into internal section number.
+	* coff64-rs6000.c (_bfd_xcoff64_swap_sym_in): Likewise.
+	* coffswap.h (coff_swap_sym_in): Likewise.
+	* peXXigen.c (_bfd_XXi_swap_sym_in): Likewise.
+	* coffcode.h (_coff_bigobj_swap_sym_in): Make sure that internal
+	section number field is big enough to hold the external value.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-12  Yury Usishchev  <y.usishchev@samsung.com>
+
+	* elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind
+	when address in first unwind entry does not match start of
+	section.
+
+2016-01-08  Richard Sandiford  <richard.sandiford@arm.com>
+	    Jiong Wang  <jiong.wang@arm.com>
+
+	PR ld/19368
+	* elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to
+	reloc_class_ifunc.
+
+2016-01-06  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf32-arc.c (reloc_type_to_name): Change ARC_RELOC_HOWTO to
+	place 'R_' before the reloc name returned.
+	(elf_arc_howto_table): Change ARC_RELOC_HOWTO to place 'R_' before
+	the relocation string.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_merge_obj_abiflags): New function,
+	factored out from...
+	(_bfd_mips_elf_merge_private_bfd_data): ... here.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move
+	attribute check after ELF file header flag check.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_merge_obj_attributes): Propagate the
+	return status from `_bfd_elf_merge_object_attributes'.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (mips_elf_merge_obj_e_flags): New function,
+	factored out from...
+	(_bfd_mips_elf_merge_private_bfd_data): ... here.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Fold the
+	handling of input MIPS ABI flags together.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Suppress
+	attribute checks for null input.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Use local
+	pointers to target data.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Correct
+	an FP ABI warning.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-2015 and doc/ChangeLog-0415
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 423a902..e33ce1b 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,977 +1,6 @@
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* readelf.c (guess_is_rela): Add EM_TI_PRU.
-	(dump_relocations): Invoke elf_pru_reloc_type.
-	(get_machine_name): Handle EM_TI_PRU.
-	(is_32bit_abs_reloc): Handle R_PRU_BFD_RELOC_32.
-	(is_16bit_abs_reloc): Handle R_PRU_BFD_RELOC_16.
-	(is_none_reloc): Handle PRU_NONE and PRU_DIFF variants.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips16-extend-insn.d: Update for
-	ASMACRO support.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips16-extend-insn.d: New test.
-	* testsuite/binutils-all/mips/mips16-extend-insn.s: New test
-	source.
-	* testsuite/binutils-all/mips/mips.exp: Run the new tests.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* configure: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* NEWS: Add marker for 2.28.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* po/binutils.pot: Regenerate.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips16-undecoded.s: Use `.module'
-	rather than `.set' to set the ISA level.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips16-extend-noinsn.d: Adjust
-	test for separate EXTEND prefix disassembly.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* readelf.c (get_machine_flags): Use
-	EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
-	EF_RISCV_{SOFT,HARD}_FLOAT.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips-ase-1.d: New test.
-	* testsuite/binutils-all/mips/mips-ase-2.d: New test.
-	* testsuite/binutils-all/mips/mips-ase-3.d: New test.
-	* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
-	* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
-	* testsuite/binutils-all/mips/mips.exp: Run the new tests.
-
-2016-12-13  Jiong Wang  <jiong.wang@arm.com>
-
-	* readelf.c (is_32bit_abs_reloc): Recognize R_AARCH64_P32_ABS32.
-
-2016-12-13  Nick Clifton  <nickc@redhat.com>
-
-	* MAINTAINERS (Past Maintainers): New section.  Move Mark
-	Mitchell's name here.
-
-2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips16-extend-noinsn.d: New test.
-	* testsuite/binutils-all/mips/mips16-extend-noinsn.s: New test
-	source.
-	* testsuite/binutils-all/mips/mips.exp: Run the new test.
-
-2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips16-pcrel.d: New test.
-	* testsuite/binutils-all/mips/mips16-pcrel.s: New test source.
-	* testsuite/binutils-all/mips/mips.exp: Run the new test.
-
-2016-12-08  Étienne Buira  <etienne.buira@gmail.com>
-
-	* readelf.c (process_program_headers): Always use hex prefix when
-	displaying the segment alignment.
-
-2016-12-06  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20930
-	* objcopy.c (mark_symbols_used_in_relocations): Check for a null
-	symbol pointer pointer before attempting to mark the symbol as
-	kept.
-
-2016-12-05  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* MAINTAINERS: Add myself as maintainer for the SPARC targets.
-
-2016-12-05  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20923
-	* objcopy.c (mark_symbols_used_in_relocations): Check for a null
-	symbol pointer before attempting to mark the symbol as kept.
-
-2016-12-01  Luis Machado  <lgustavo@codesourcery.com>
-
-	* nm.c (sort_symbols_by_size): Don't read symbol size if symbol
-	is synthetic.
-
-2016-11-30  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20815
-	* readelf.c (process_program_headers): Do not warn about out of
-	order PT_LOAD segments.
-
-2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/binutils-all/arc/objdump.exp (Warning test): Update
-	test.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* dwarf.c: Fix spelling in comments.
-	* dwarf.h: Fix spelling in comments.
-	* objcopy.c: Fix spelling in comments.
-	* od-macho.c: Fix spelling in comments.
-	* rclex.c: Fix spelling in comments.
-	* readelf.c: Fix spelling in comments.
-	* stabs.c: Fix spelling in comments.
-
-2016-11-23  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20815
-	* readelf.c (process_program_headers): Check PT_LOAD and PT_PHDR
-	segments for validity.
-
-2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-        * configure: Regenerate.
-
-2016-11-22  Alan Modra  <amodra@gmail.com>
-
-	PR 20744
-	* NEWS: Mention PowerPC VLE relocation error.
-
-2016-11-16  Mark Wielaard  <mark@klomp.org>
-
-	* cxxfilt.c (main): Recognize rust_demangling.
-
-2016-11-14  Rudy  <jacky.chouchou@yandex.ru>
-
-	PR binutils/20814
-	* dlltool.c (struct export): Remove hint field.
-	(make_one_lib_file): Store the ordinal value for IDATA6 not the
-	hint.
-	(gen_lib_file): Delete reference to hint field.
-	(mangle_defs): Delete computation of hint field.
-
-2016-11-11  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20751
-	* nm.c (with_symbol_versions): New local variable.
-	(long_options): Add --with-symbol-versions.
-	(usage): Mention --with-symbol-versions.
-	(print_symbol): If with_symbol_versions is set then display the
-	version information associated with the symbol.
-	* NEWS: Mention the new feature.
-	* doc/binutils.texi (nm): Document the new option.
-	(objdump): Describe how symbol version information is displayed
-	for dynamic symbol dumps.
-	(readelf): Describe how symbol version information is displayed.
-	* testsuite/binutils-all/nm.exp: Add a test of the new feature.
-
-2016-11-08  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20794
-	* readelf.c (process_section_headers): Fix off-by-one error when
-	checking for invalid sh_link and sh_info fields.
-
-2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* objcopy.c (copy_section): Add extra calls to free for error
-	paths.
-
-2016-11-04  Tom Tromey  <tom@tromey.com>
-
-	* dwarf-mode.el (dwarf-browse): Set default-directory.  Bump
-	version number.
-
-2016-11-04  Palmer Dabbelt <palmer@dabbelt.com>
-
-	* MAINTAINERS: Add myself and Andrew Waterman as maintainers for
-	the RISC-V target.
-
-2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
-	    Andrew Waterman <andrew@sifive.com>
-
-	Add support for RISC-V architecture.
-	* readelf.c (guess_is_rela): Add EM_RISCV.
-	(get_machine_name): Likewise.
-	(dump_relocations): Add support for riscv relocations.
-	(get_machine_flags): Add support for riscv flags.
-	(is_32bit_abs_reloc): Add R_RISCV_32.
-	(is_64bit_abs_reloc): Add R_RISCV_64.
-	(is_none_reloc): Add R_RISCV_NONE.
-	* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
-	Expect the debug_ranges test to fail.
-
-2016-10-17  Nick Clifton  <nickc@redhat.com>
-
-	* readelf.c (apply_relocations): Fail if the symbol table section
-	linked to by the reloc section does not have either the SHT_SYMTAB
-	or SHT_DYNSYM type.
-	(print_gnu_note): Decode the contents of NT_GNU_HWCAP notes.
-	Print the contents of unknown note types.
-	(process_note): Add the file and section to the parameter list.
-	Use print_symbol to display the note name.
-	Display the contents of unknown note types.
-	(process_corefile_note_segment): Rename to process_notes_at.
-	Add section parameter.  Apply relocations to the notes when
-	loading from a section.  Display section name when processing
-	notes in a section.
-	* testsuite/binutils-all/readelf.n: Update expected output.
-
-2016-10-17  Nick Clifton  <nickc@redhat.com>
-
-	* readelf.c (get_dynamic_type): Add DT_SYMTAB_SHNDX.
-	(get_machine_type): Add EM_CLOUDSHIELD, EM_COREA_1ST,
-	EM_COREA_2ND, EM_OPEN8, EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2,
-	EM_XCORE, EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8,
-	EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC, EM_CSR_KALIMBA,
-	EM_Z80, EM_AMDGPU, EM_RISCV.
-	(get_osabi_name): Add ELFOSABI_CLOUDABI and ELFOSABI_OPENVS.
-	(get_group_flags): Update to handle flags in the
-	GRP_MASKOS and GRP_MASKPROC ranges.
-
-2016-10-14  Luis Machado  <lgustavo@codesourcery.com>
-
-	* testsuite/lib/utils-lib.exp (run_dump_test): Call remote_download
-	to copy file to remote host.
-
-2016-10-11  Nick Clifton  <nickc@redhat.com>
-
-	* objdump.c (is_significant_symbol_name): New function.
-	(remove_useless_symbols): Do not remove significanr symbols.
-	(find_symbol_for_address): If an exact match for the specified
-	address has not been found, try scanning the dynamic relocs to see
-	if one of these matches the address.  If so, use the symbol
-	associated with the reloc.
-	(objdump_print_addr_with_symbol): Do not print offsets to symbols
-	with no value.
-	(disassemble_section): Only use dynamic relocs if the user
-	requested this.
-	(disassemble_data): Always load dynamic relocs if they are
-	available.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* dlltool.c: Spell fall through comments consistently.
-	* objcopy.c: Likewise.
-	* readelf.c: Likewise.
-	* dwarf.c: Add missing fall through comments.
-	* elfcomm.c: Likewise.
-	* sysinfo.y: Likewise.
-	* readelf.c: Likewise.  Also remove extraneous comments.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* cxxfilt.c (usage): Add ATTRIBUTE_NORETURN.
-	* elfedit.c (usage): Likewise.
-	* nm.c (usage): Likewise.
-	* objcopy.c (copy_usage, strip_usage): Likewise.
-	* srconv.c (show_usage): Likewise.
-	* strings.c (usage): Likewise.
-	* sysdump.c (show_usage): Likewise.
-	* srconv.c: Remove unneeded forward function declarations.
-	* strings.c: Likewise.
-	* sysdump.c: Likewise.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* coffdump.c (dump_coff_where): Add missing break.
-	* stabs.c (stab_xcoff_builtin_type): Likewise.
-
-2016-09-29  Alan Modra  <amodra@gmail.com>
-
-	* readelf.c (process_arch_specific): Call process_power_specific
-	for EM_PPC64.
-
-2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
-
-	* Makefile.am: Replace AM_CLFAGS with AM_CFLAGS_FOR_BUILD
-	when building with CC_FOR_BUILD compiler.
-	* Makefile.in: Regenerate.
-	* configure: Likewise.
-	* doc/Makefile.in: Likewise.
-
-2016-09-26  Alan Modra  <amodra@gmail.com>
-
-	* readelf.c (display_power_gnu_attribute): Catch truncated section
-	for all powerpc attributes.  Display long double ABI.  Don't
-	capitalize words, except for names.  Show known bits of tag values
-	when some unknown bits are present.  Whitespace fixes.
-
-2016-09-26  Alan Modra  <amodra@gmail.com>
-
-	* nm.c (get_elf_symbol_type): Don't use sprintf with translated
-	strings, use asprintf instead.
-	(get_coff_symbol_type): Likewise.
-
-2016-09-19  Alan Modra  <amodra@gmail.com>
-
-	* nm.c (print_symbol): Remove is_synthetic param.  Test sym->flags
-	instead.
-	(print_size_symbols, print_symbols): Adjust to suit, deleting
-	now unused synth_count param and fromsynth var.
-	(display_rel_file): Adjust, localizing synth_count.
-
-2016-09-14  Ed Maste  <emaste@freebsd.org>
-
-	* readelf.c (process_mips_specific): Fix typo in error message.
-
-2016-09-06  Nick Clifton  <nickc@redhat.com>
-
-	* readelf.c (request_dump_bynumber): Only call memcpy if
-	dump_sects is not NULL.
-
-2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* readelf.c (load_specific_debug_section): Check the external
-	compression header size.
-
-2016-08-19  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/binutils-all/readelf.s: Adjust expected ordering of
-	sections.
-	* testsuite/binutils-all/readelf.s-64: Likewise.
-
-2016-08-12  Nick Clifton  <nickc@redhat.com>
-
-	* readelf.c (process_symbol_table): Generate a warning if a local
-	symbol is found at and offste greater than or equal to the sh_info
-	field of it's section header.
-
-2016-08-08  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20440
-	* dwarf.c (display_debug_lines_decoded): Add checks for running
-	off the end of the section when populating the directory table and
-	file table.
-	(frame_display_row): Set max_regs equal to ncols.
-	* readelf.c (load_specific_debug_section): If the section is
-	compressed, but it is not big enough to hold a compression
-	header then warn and return 0.
-
-	PR binutils/20439
-	* dwarf.c (display_debug_lines_decoded): Check directory and file
-	indicies before using them to access directory and file tables.
-
-2016-08-02  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/17512
-	* resbin.c (bin_to_res_version): Cast variables to correct type
-	for printing in error message.
-
-2016-07-28  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/17512
-	* rescoff.c (read_coff_res_dir): Fix detection of buffer overrun.
-	* resbin.c (bin_to_res_version): Allow for the padded length of a
-	version block to be longer than the recorded length.  Skip padding
-	bytes.
-
-2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* configure: Regenerated.
-
-2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* doc/binutils.texi (objdump): Add ARC disassembler options.
-	* testsuite/binutils-all/arc/dsp.s: New file.
-	* testsuite/binutils-all/arc/objdump.exp: Likewise.
-	* NEWS: Mention the new feature.
-
-2016-07-20  Nick Clifton  <nickc@redhat.com>
-
-	* doc/binutils.texi (objcopy): Note that the localize symbol
-	options do not affect unique symbols.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* ar.c: Include plugin-api.h.
-	* nm.c: Likewise.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* bucomm.c: Don't include libbfd.h.
-	(endian_string, display_target_list): Delete forward declaration.
-	(display_info_table, display_target_tables): Likewise.
-	(LONGEST_ARCH): Delete.
-	(struct display_target): New.
-	(do_display_target): New function.
-	(display_target_list, display_info): Rewrite functions.
-	(display_info_table): Delete.
-	(do_info_size, do_info_header, do_info_row): New functions.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* elfcomm.h (HOST_WIDEST_INT): Move to..
-	* sysdep.h: ..here.
-	* od-macho.c: Don't include libbfd.h.  Do include dwarf.h
-	(dump_dyld_info_rebase): Use read_leb128 rather than
-	read_unsigned_leb128.
-	(dump_dyld_info_bind, dump_dyld_info_export_1): Likewise.
-	(dump_segment_split_info): Likewise.
-	(dump_dyld_info): Rename vars to avoid shadowing dwarf.h enums.
-	(dump_load_command): Likewise.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* ar.c: Don't include libbfd.h.
-	* objcopy.c: Likewise.
-	* bucomm.c (bfd_get_archive_filename): Use xmalloc rather than
-	bfd_malloc.
-
-2016-07-15  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/binutils-all/remove-relocs-01.s: Use .dc.a, not .word.
-
-2016-07-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* doc/binutils.texi (objcopy): Document 'remove-relocations'.
-	(strip): Likewise.
-	* objcopy.c (SECTION_CONTEXT_REMOVE_RELOCS): Define.
-	(enum command_line_switch): Add 'OPTION_REMOVE_RELOCS'.
-	(struct option strip_options): Add 'remove-relocations'.
-	(struct option copy_options): Likewise.
-	(copy_usage): Likewise.
-	(strip_usage): Likewise.
-	(handle_remove_relocations_option): New function.
-	(discard_relocations): New function.
-	(handle_remove_section_option): New function.
-	(copy_relocations_in_section): Use discard_relocations.
-	(strip_main): Use handle_remove_section_option for
-	'remove-section', and handle 'remove-relocations' option.
-	(copy_main): Likewise.
-	* testsuite/binutils-all/objcopy.exp: Run new tests.
-	* testsuite/binutils-all/remove-relocs-01.d: New file.
-	* testsuite/binutils-all/remove-relocs-01.s: New file.
-	* testsuite/binutils-all/remove-relocs-02.d: New file.
-	* testsuite/binutils-all/remove-relocs-03.d: New file.
-	* testsuite/binutils-all/remove-relocs-04.d: New file.
-	* testsuite/binutils-all/remove-relocs-05.d: New file.
-	* testsuite/binutils-all/remove-relocs-06.d: New file.
-	* NEWS: Mention new option.
-
-2016-07-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* objcopy.c (find_section_list): Handle section patterns starting
-	with '!' being a non-matching pattern.
-	* doc/binutils.texi (objcopy): Give example of using '!' with
-	--remove-section and --only-section.
-	(strip): Give example of using '!' with --remove-section.
-	* testsuite/binutils-all/data-sections.s: New file.
-	* testsuite/binutils-all/only-section-01.d: New file.
-	* testsuite/binutils-all/remove-section-01.d: New file.
-	* testsuite/binutils-all/objcopy.exp: Run new tests.
-	* NEWS: Mention new feature.
-
-2016-07-09  Alan Modra  <amodra@gmail.com>
-
-	PR binutils/20337
-	* objdump.c (compare_symbols): For ELF, sort same value/type
-	symbols according to size.
-
-2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
-
-	* objdump.c (dump_section_header): Rename SEC_ELF_NOREAD
-	to SEC_ELF_NOREAD.
-	* readelf.c (get_elf_section_flags): Rename ARM_NOREAD to
-	ARM_PURECODE and SHF_ARM_NOREAD to SHF_ARM_PURECODE.
-	(process_section_headers): Rename noread to purecode.
-
-	* section.c (SEC_ELF_NOREAD): Rename to ...
-	(SEC_ELF_PURECODE): ... this.
-
-2016-07-01  Nick Clifton  <nickc@redhat.com>
-
-	* prdbg.c (pr_enum_type): Use a buffer big enough to hold an
-	extremely large decimal value.
-	(pr_range_type): Likewise.
-	(pr_array_type): Likewise.
-	(pr_struct_field): Likewise.
-	(pr_class_baseclass): Likewise.
-	(pr_class_method_variant): Likewise.
-	(pr_tag_type): Likewise.
-	(pr_int_constant): Likewise.
-	(pr_typed_constant): Likewise.
-	(pr_variable): Likewise.
-	(pr_function_parameter): Likewise.
-	(pr_start_block): Likewise.
-	(pr_lineno): Likewise.
-	(pr_end_block): Likewise.
-	(tg_enum_type): Likewise.
-	(tg_int_constant): Likewise.
-	(tg_typed_constant): Likewise.
-	(tg_start_block): Likewise.
-
-2016-07-01  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/binutils-all/objcopy.exp
-	(objcopy_test_without_global_symbol): Expect this test to fail on
-	the AArch64 and ARM targets, since they preserve their mapping
-	symbols.
-
-2016-07-01  Tristan Gingold  <gingold@adacore.com>
-
-	* NEWS: Add marker for 2.27.
-
-2016-07-30  Tristan Gingold  <gingold@adacore.com>
-
-	* doc/binutils.texi (objdump): Fix mis-placement.
-
-2016-06-28  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/binutils-all/ar.exp: Relax previous restriction on
-	Alpha targets.  Allow ELF based Alpha targets.
-
-2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/ar.exp: Use `supports_gnu_unique' with
-	the `unique_symbol' test.
-
-2016-06-28  Alan Modra  <amodra@gmail.com>
-
-	PR 20304
-	* objdump.c (objdump_print_symname): Don't attempt to retrieve
-	version info from synthetic symbols.
-
-2016-06-24  Alan Modra  <amodra@gmail.com>
-
-	* objcopy.c (find_section_rename): Forward declare.  Remove
-	ibfd and sec_ptr param.  Add old_name param.  Allow for NULL
-	returned_flags.  Move read of section name and flags to..
-	(setup_section): ..here.  Update find_section_rename call.
-	(filter_symbols): Rename section symbols for renamed sections.
-	(copy_object): Call filter_symbols when renamed sections.
-	* testsuite/lib/binutils-common.exp (is_bad_symtab): New.
-	* testsuite/binutils-all/update-section.exp: Revert 96037eb0
-	mips xfail.
-	* testsuite/binutils-all/objcopy.exp (copy_executable): Use
-	is_bad_symtab.
-	(localize-hidden-1): xfail if is_bad_symtab.
-	* testsuite/binutils-all/readelf.exp: Use is_bad_symtab to select
-	between mips/tmips.
-
-2016-06-24  Alan Modra  <amodra@gmail.com>
-
-	* objdump.c (struct print_file_list): Add "max_printed".
-	(try_print_file_open): Init new field.
-	(show_line): Don't show 5 context lines when redisplaying source.
-
-2016-06-22  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/binutils-all/ar.exp: Skip tests for Alpha target.
-	Skip bfdtest1 tests for tic30 target.
-	* testsuite/binutils-all/arm/objdump.exp: Skip for aout arm
-	target.
-	* testsuite/binutils-all/compress.exp: Expect some tests to fail
-	on the nds32.
-	* testsuite/binutils-all/copy-3.d: Skip for go32 targets.
-	* testsuite/binutils-all/copy-4.d: Skip for AIX and linuxecoff
-	targets.
-	* testsuite/binutils-all/nm.exp: Treat beos based targets as ELF
-	targets.
-	* testsuite/binutils-all/objcopy.exp: Only run reverse bytes tests
-	if the bintest.o file was created.  Use the
-	get_standard_section_names proc to get the name of the data
-	section.
-	* testsuite/binutils-all/objdump.exp: Update regexps to allow for
-	RX section names.
-	* testsuite/binutils-all/readelf.exp: Use
-	get_standard_section_names proc to get the name of the data
-	section.
-	* testsuite/binutils-all/readelf.r: Allow for non standard text
-	section names.
-	* testsuite/binutils-all/readelf.s: Update regexps for tilepro.
-	* testsuite/binutils-all/size.exp: Allow for non standard section
-	names.
-	* testsuite/binutils-all/update-section.exp: Expect comapre 1vs4
-	to fail on mips targets.
-	* testsuite/lib/utils-lib.exp (default_binutils_run): Use
-	get_standard_section_names proc.
-	(run_dump_test): Likewise.
-	(proc get_standard_section_names): New proc.
-
-2016-06-22  Nick Clifton  <nickc@redhat.com>
-
-	* readelf.c (dynamic_section_mips_val): Increase size of timebuf.
-	(process_mips_specific): Likewise.
-	(process_gnu_liblist): Likewise.
-
-2016-06-21  Graham Markall  <graham.markall@embecosm.com>
-
-	* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400
-	case.
-
-2016-06-15  Nick Clifton  <nickc@redhat.com>
-
-	* readelf.c (is_24bit_abs_reloc): Add support for R_FT32_20
-	reloc.
-
-2016-06-14  John Baldwin  <jhb@FreeBSD.org>
-
-	* objcopy.c (do_elf_stt_common): Use correct type.
-
-2016-06-14  Alan Modra  <amodra@gmail.com>
-
-	* ar.c: Expand uses of bfd_my_archive.
-	* size.c: Likewise.
-
-2016-06-14  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20241
-	* bucomm.c (bfd_get_archive_filename): Return file name within thin
-	archive.
-
-2016-06-02  Nick Clifton  <nickc@redhat.com>
-
-	PR 20089
-	* objcopy.c (group_signature): Fail if the input symbol table has
-	not been loaded, or if the sh_info field of the group header is 0.
-
-	* dwarf.c (display_debug_frames): Do not display any
-	interpretation if the block consists solely of DW__CFA_NOPs.
-
-2016-05-31  Alan Modra  <amodra@gmail.com>
-
-	* objcopy.c: Formatting, whitespace throughout.
-	(copy_main): Init newsym->othersym.
-	(parse_symflags): Make len a size_t.  Adjust uses.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/14625
-	* NEWS: Mention --enable-64-bit-archive.
-
-2016-05-18  Nick Clifton  <nickc@redhat.com>
-
-	PR 20096
-	* objcopy.c (copy_relocations_in_section): Also check for the
-	symbol pointed to by sym_ptr_ptr being NULL.
-
-2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mixed-mips16-micromips.d: New test.
-	* testsuite/binutils-all/mips/mixed-mips16-micromips.s: New test
-	source.
-	* testsuite/binutils-all/mips/mips.exp: Run the new test.
-
-2016-05-18  Nick Clifton  <nickc@redhat.com>
-
-	* po/sv.po: Updated Swedish translation.
-
-2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* readelf.c (dynamic_section_mips_val) <DT_MIPS_RLD_VERSION>
-	<DT_MIPS_LOCAL_GOTNO, DT_MIPS_CONFLICTNO, DT_MIPS_LIBLISTNO>
-	<DT_MIPS_SYMTABNO, DT_MIPS_UNREFEXTNO, DT_MIPS_HIPAGENO>
-	<DT_MIPS_DELTA_CLASS_NO, DT_MIPS_DELTA_INSTANCE_NO>
-	<DT_MIPS_DELTA_RELOC_NO, DT_MIPS_DELTA_SYM_NO>
-	<DT_MIPS_DELTA_CLASSSYM_NO, DT_MIPS_COMPACT_SIZE>: Use the
-	`d_val' rather than `d_ptr' member of the dynamic entry.
-
-2016-05-17  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/lib/binutils-common.exp (supports_gnu_unique): New
-	procedure.
-	* testsuite/binutils-all/objcopy.exp: Use `supports_gnu_unique'
-	with the `strip-10' test.
-
-2016-05-16  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/objcopy.exp: Don't skip the `strip-10'
-	test for the V850.
-
-2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
-
-	* readelf.c (print_mips_ases): Add DSPR3.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* readelf.c (display_arm_attribute): Add output for Tag_DSP_extension.
-	(arm_attr_public_tags): Define DSP_extension attribute.
-
-2016-05-10  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* doc/binutils.texi (nm): Update description of --size-sort.
-
-2016-05-09  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20063
-	* readelf.c (get_32bit_section_headers): Warn if an out of range
-	sh_link or sh_info field is encountered.
-	(get_64bit_section_headers): Likewise.
-
-2016-05-04  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* testsuite/lib/binutils-common.exp (is_elf_format): Add avr-*-*.
-
-2016-05-03  Nick Clifton  <nickc@redhat.com>
-
-	* po/sv.po: Updated Swedish translation.
-
-2016-04-29  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
-
-	* readelf.c (is_32bit_pcrel_reloc): Return true if reloc is 32-bit
-	PC relocation for AVR target.
-	(is_none_reloc): Return true if reloc is any of AVR diff
-	relocations.
-
-2016-04-29  Nick Clifton  <nickc@redhat.com>
-
-	PR 19938
-	* readelf.c (get_solaris_segment_type): New function.
-	(get_segment_type): Call it.
-
-2016-04-28  Nick Clifton  <nickc@redhat.com>
-
-	* po/zh_CN.po: Updated Chinese (simplified) translation.
-
-2016-04-28  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19722
-	* testsuite/binutils-all/aarch64/illegal.s: New test.
-	* testsuite/binutils-all/aarch64/illegal.d: New test driver.
-
-2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* resres.c: Likewise.
-
-2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.in: Regenerated with automake 1.11.6.
-	* aclocal.m4: Likewise.
-	* doc/Makefile.in: Likewise.
-
-2016-04-14  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19938
-	* testsuite/binutils-all/i386/compressed-1b.d: Allow for the
-	string sections possibly having the SHF_STRINGS flag bit set.
-	* testsuite/binutils-all/i386/compressed-1c.d: Likewise.
-	* testsuite/binutils-all/readelf.s: Likewise.
-	* testsuite/binutils-all/readelf.s-64: Likewise.
-	* testsuite/binutils-all/x86-64/compressed-1b.d: Likewise.
-	* testsuite/binutils-all/x86-64/compressed-1c.d: Likewise.
-
-2016-04-13  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19938
-	* readelf.c (get_solaris_section_type): New function: Returns the
-	name of Solaris specific section types.
-	(get_solaris_dynamic_type): New function: Return the name of
-	Solaris specific dynamic types.
-	(get_dynamic_type): Use get_solaris_dynamic_type.
-	(get_section_type_name): Use get_solaris_section_type.
-	(get_solaris_symbol_visibility): New function: Returns Solaris
-	specific symbol visibilities.
-	(print_dynamic_symbol): Use get_solaris_symbol_visibility.
-	(process_symbol_table): Likewise.
-
-2016-04-13  Andreas Arnez  <arnez@linux.vnet.ibm.com>
-
-	* dwarf.h (init_dwarf_regnames_s390): Declare.
-	* dwarf.c (dwarf_regnames_s390): New.
-	(init_dwarf_regnames_s390): New.
-	(init_dwarf_regnames): Call it.
-	* objdump.c (dump_dwarf): Likewise.
-
-2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/binutils-all/mips/mips16-undecoded.d: New test.
-	* testsuite/binutils-all/mips/mips16-undecoded.s: New test
-	source.
-	* testsuite/binutils-all/mips/mips.exp: Run the new test.
-
-2016-04-04  Nick Clifton  <nickc@redhat.com>
-
-	PR 19872
-	* dwarf.c (display_debug_aranges): Skip warning about unrecognised
-	version number if the version is zero.
-
-2016-03-29  Alan Modra  <amodra@gmail.com>
-
-	* readelf.c (get_data): Use BFD_VMA_FMT to print bfd_size_type vars.
-	(get_dynamic_data): Likewise.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	PR 19851
-	* dwarf.c (SAFE_BYTE_GET): Replace local dynamic array allocation
-	with run time size check.
-
-	* configure: Regenerate.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* readelf.c (decode_ARC_machine_flags): Handle nps400.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* readelf.c (get_machine_flags): Move arc processing into...
-	(decode_ARC_machine_flags): ... new function.  Remove use of
-	EF_ARC_CPU_GENERIC, change default case from "generic arc" to
-	"unknown arc".  Merged ABI printing between two machine types.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/binutils-all/objdump.exp (cpus_expected): Add ARC700
-	to the architecture list.
-
-2016-03-21  Nick Clifton  <nickc@redhat.com>
-
-	* dlltool.c: Replace use of alloca with call to xmalloc.
-	* dllwrap.c: Likewise.
-	* nlmconv.c: Likewise.
-	* objdump.c: Likewise.
-	* resrc.c: Likewise.
-	* winduni.c: Likewise.
-	* configure: Regenerate.
-
-2016-03-07  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/19775
-	* testsuite/binutils-all/ar.exp (proc empty_archive): New proc.
-	Run the new proc.
-	* testsuite/binutils-all/empty: New, empty, file.
-
-2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* readelf.c (arm_attry_tag_FP_arch): Add "NEON for ARMv8.1".
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19645
-	* NEWS: Mention --elf-stt-common= for objcopy.
-	* doc/binutils.texi: Document --elf-stt-common= for objcopy.
-	* objcopy.c (do_elf_stt_common): New.
-	(command_line_switch): Add OPTION_ELF_STT_COMMON.
-	(copy_options): Add --elf-stt-common=.
-	(copy_usage): Add --elf-stt-common=.
-	(copy_object): Also check do_elf_stt_common for ELF targets.
-	(copy_file): Handle do_elf_stt_common.
-	(copy_main): Handle OPTION_ELF_STT_COMMON.
-	* readelf.c (apply_relocations): Support STT_COMMON.
-	* testsuite/binutils-all/common-1.s: New file.
-	* testsuite/binutils-all/common-1a.d: Likewise.
-	* testsuite/binutils-all/common-1b.d: Likewise.
-	* testsuite/binutils-all/common-1c.d: Likewise.
-	* testsuite/binutils-all/common-1d.d: Likewise.
-	* testsuite/binutils-all/common-1e.d: Likewise.
-	* testsuite/binutils-all/common-1f.d: Likewise.
-	* testsuite/binutils-all/common-2.s: Likewise.
-	* testsuite/binutils-all/common-2a.d: Likewise.
-	* testsuite/binutils-all/common-2b.d: Likewise.
-	* testsuite/binutils-all/common-2c.d: Likewise.
-	* testsuite/binutils-all/common-2d.d: Likewise.
-	* testsuite/binutils-all/common-2e.d: Likewise.
-	* testsuite/binutils-all/common-2f.d: Likewise.
-	* testsuite/binutils-all/objcopy.exp
-	(objcopy_test_elf_common_symbols): New proc.
-	Run objcopy_test_elf_common_symbols for ELF targets
-
-2016-02-16  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/19647
-	* readelf.c (get_section_type_name): Add a missing break.
-
-2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* readelf.c (is_32bit_pcrel_reloc): Add R_ARC_32_PCREL.
-
-2016-02-15  Nick Clifton  <nickc@redhat.com>
-
-	* readelf.c (get_section_type_name): Add hex prefix to offsets
-	printed for LOPROC and LOOS values.  Ensure that a result is
-	always returned for the V850 target, even when an unrecognised
-	processor specific value is encountered.
-	(process_section_headers): Display key values in the order in
-	which they appear to the user.  Add the "C (compressed)" value to
-	the list.
-
-2016-02-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* doc/binutils.texi: Fix a typo.
-
-2016-02-05  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
-
-	* testsuite/binutils-all/objdump.exp: Update expected default
-	architecture value for ARC binaries.
-
-2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/19547
-	* testsuite/binutils-all/objcopy.exp
-	(objcopy_test_without_global_symbol): New proc.
-	Run objcopy_test_without_global_symbol.
-	* testsuite/binutils-all/pr19547.c: New file.
-
-2016-01-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/19523
-	* Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to
-	runtest.
-	* Makefile.in: Regenerated.
-	* testsuite/binutils-all/compress.exp (test_gnu_debuglink): New
-	proc.
-	Run test_gnu_debuglink for native ELF build.
-
-2016-01-20  Nick Clifton  <nickc@redhat.com>
-
-	PR 19495
-	* testsuite/binutils-all/dlltool.exp: Fix tests for targets which
-	do not support inserting leading underscores.
-
-2016-01-20  Mickael Guene  <mickael.guene@st.com>
-
-	* readelf.c (get_elf_section_flags): Display y letter for section
-	with SHF_ARM_NOREAD section flag in readelf section output.
-	(process_section_headers): Add y letter in readelf section output
-	key mapping for ARM architecture.
-	* objdump.c (dump_section_header): Display NOREAD attributes as
-	well.
-	* doc/binutils.texi (objdump): Note that it is correct for
-	sections to have both the READONLY and NOREAD attributes.
-
-2016-01-19  John Baldwin  <jhb@FreeBSD.org>
-
-	* readelf.c (get_freebsd_elfcore_note_type): Remove unused variable.
-
-2016-01-19  John Baldwin  <jhb@FreeBSD.org>
-
-	* readelf.c (get_freebsd_elfcore_note_type): New
-	(process_note): Add support for FreeBSD core notes.
-
-2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
-	    Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
-
-	* readelf.c (get_machine_flags): Add support for newer ARC ELF
-	header flags.
-
-2016-01-18  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/lib/binutils-common.exp (is_elf_format): Return true
-	for m68hc11/12 and xgate triples.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* readelf.c (is_32bit_abs_reloc): Add R_M68HC11_32.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-2015 and testsuite/ChangeLog-1215
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/binutils/ChangeLog-2016 b/binutils/ChangeLog-2016
new file mode 100644
index 0000000..423a902
--- /dev/null
+++ b/binutils/ChangeLog-2016
@@ -0,0 +1,985 @@
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* readelf.c (guess_is_rela): Add EM_TI_PRU.
+	(dump_relocations): Invoke elf_pru_reloc_type.
+	(get_machine_name): Handle EM_TI_PRU.
+	(is_32bit_abs_reloc): Handle R_PRU_BFD_RELOC_32.
+	(is_16bit_abs_reloc): Handle R_PRU_BFD_RELOC_16.
+	(is_none_reloc): Handle PRU_NONE and PRU_DIFF variants.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips16-extend-insn.d: Update for
+	ASMACRO support.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips16-extend-insn.d: New test.
+	* testsuite/binutils-all/mips/mips16-extend-insn.s: New test
+	source.
+	* testsuite/binutils-all/mips/mips.exp: Run the new tests.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* configure: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* NEWS: Add marker for 2.28.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* po/binutils.pot: Regenerate.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips16-undecoded.s: Use `.module'
+	rather than `.set' to set the ISA level.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips16-extend-noinsn.d: Adjust
+	test for separate EXTEND prefix disassembly.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* readelf.c (get_machine_flags): Use
+	EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
+	EF_RISCV_{SOFT,HARD}_FLOAT.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips-ase-1.d: New test.
+	* testsuite/binutils-all/mips/mips-ase-2.d: New test.
+	* testsuite/binutils-all/mips/mips-ase-3.d: New test.
+	* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
+	* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
+	* testsuite/binutils-all/mips/mips.exp: Run the new tests.
+
+2016-12-13  Jiong Wang  <jiong.wang@arm.com>
+
+	* readelf.c (is_32bit_abs_reloc): Recognize R_AARCH64_P32_ABS32.
+
+2016-12-13  Nick Clifton  <nickc@redhat.com>
+
+	* MAINTAINERS (Past Maintainers): New section.  Move Mark
+	Mitchell's name here.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips16-extend-noinsn.d: New test.
+	* testsuite/binutils-all/mips/mips16-extend-noinsn.s: New test
+	source.
+	* testsuite/binutils-all/mips/mips.exp: Run the new test.
+
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips16-pcrel.d: New test.
+	* testsuite/binutils-all/mips/mips16-pcrel.s: New test source.
+	* testsuite/binutils-all/mips/mips.exp: Run the new test.
+
+2016-12-08  Étienne Buira  <etienne.buira@gmail.com>
+
+	* readelf.c (process_program_headers): Always use hex prefix when
+	displaying the segment alignment.
+
+2016-12-06  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20930
+	* objcopy.c (mark_symbols_used_in_relocations): Check for a null
+	symbol pointer pointer before attempting to mark the symbol as
+	kept.
+
+2016-12-05  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* MAINTAINERS: Add myself as maintainer for the SPARC targets.
+
+2016-12-05  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20923
+	* objcopy.c (mark_symbols_used_in_relocations): Check for a null
+	symbol pointer before attempting to mark the symbol as kept.
+
+2016-12-01  Luis Machado  <lgustavo@codesourcery.com>
+
+	* nm.c (sort_symbols_by_size): Don't read symbol size if symbol
+	is synthetic.
+
+2016-11-30  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20815
+	* readelf.c (process_program_headers): Do not warn about out of
+	order PT_LOAD segments.
+
+2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/binutils-all/arc/objdump.exp (Warning test): Update
+	test.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* dwarf.c: Fix spelling in comments.
+	* dwarf.h: Fix spelling in comments.
+	* objcopy.c: Fix spelling in comments.
+	* od-macho.c: Fix spelling in comments.
+	* rclex.c: Fix spelling in comments.
+	* readelf.c: Fix spelling in comments.
+	* stabs.c: Fix spelling in comments.
+
+2016-11-23  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20815
+	* readelf.c (process_program_headers): Check PT_LOAD and PT_PHDR
+	segments for validity.
+
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+        * configure: Regenerate.
+
+2016-11-22  Alan Modra  <amodra@gmail.com>
+
+	PR 20744
+	* NEWS: Mention PowerPC VLE relocation error.
+
+2016-11-16  Mark Wielaard  <mark@klomp.org>
+
+	* cxxfilt.c (main): Recognize rust_demangling.
+
+2016-11-14  Rudy  <jacky.chouchou@yandex.ru>
+
+	PR binutils/20814
+	* dlltool.c (struct export): Remove hint field.
+	(make_one_lib_file): Store the ordinal value for IDATA6 not the
+	hint.
+	(gen_lib_file): Delete reference to hint field.
+	(mangle_defs): Delete computation of hint field.
+
+2016-11-11  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20751
+	* nm.c (with_symbol_versions): New local variable.
+	(long_options): Add --with-symbol-versions.
+	(usage): Mention --with-symbol-versions.
+	(print_symbol): If with_symbol_versions is set then display the
+	version information associated with the symbol.
+	* NEWS: Mention the new feature.
+	* doc/binutils.texi (nm): Document the new option.
+	(objdump): Describe how symbol version information is displayed
+	for dynamic symbol dumps.
+	(readelf): Describe how symbol version information is displayed.
+	* testsuite/binutils-all/nm.exp: Add a test of the new feature.
+
+2016-11-08  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20794
+	* readelf.c (process_section_headers): Fix off-by-one error when
+	checking for invalid sh_link and sh_info fields.
+
+2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* objcopy.c (copy_section): Add extra calls to free for error
+	paths.
+
+2016-11-04  Tom Tromey  <tom@tromey.com>
+
+	* dwarf-mode.el (dwarf-browse): Set default-directory.  Bump
+	version number.
+
+2016-11-04  Palmer Dabbelt <palmer@dabbelt.com>
+
+	* MAINTAINERS: Add myself and Andrew Waterman as maintainers for
+	the RISC-V target.
+
+2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
+	    Andrew Waterman <andrew@sifive.com>
+
+	Add support for RISC-V architecture.
+	* readelf.c (guess_is_rela): Add EM_RISCV.
+	(get_machine_name): Likewise.
+	(dump_relocations): Add support for riscv relocations.
+	(get_machine_flags): Add support for riscv flags.
+	(is_32bit_abs_reloc): Add R_RISCV_32.
+	(is_64bit_abs_reloc): Add R_RISCV_64.
+	(is_none_reloc): Add R_RISCV_NONE.
+	* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
+	Expect the debug_ranges test to fail.
+
+2016-10-17  Nick Clifton  <nickc@redhat.com>
+
+	* readelf.c (apply_relocations): Fail if the symbol table section
+	linked to by the reloc section does not have either the SHT_SYMTAB
+	or SHT_DYNSYM type.
+	(print_gnu_note): Decode the contents of NT_GNU_HWCAP notes.
+	Print the contents of unknown note types.
+	(process_note): Add the file and section to the parameter list.
+	Use print_symbol to display the note name.
+	Display the contents of unknown note types.
+	(process_corefile_note_segment): Rename to process_notes_at.
+	Add section parameter.  Apply relocations to the notes when
+	loading from a section.  Display section name when processing
+	notes in a section.
+	* testsuite/binutils-all/readelf.n: Update expected output.
+
+2016-10-17  Nick Clifton  <nickc@redhat.com>
+
+	* readelf.c (get_dynamic_type): Add DT_SYMTAB_SHNDX.
+	(get_machine_type): Add EM_CLOUDSHIELD, EM_COREA_1ST,
+	EM_COREA_2ND, EM_OPEN8, EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2,
+	EM_XCORE, EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8,
+	EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC, EM_CSR_KALIMBA,
+	EM_Z80, EM_AMDGPU, EM_RISCV.
+	(get_osabi_name): Add ELFOSABI_CLOUDABI and ELFOSABI_OPENVS.
+	(get_group_flags): Update to handle flags in the
+	GRP_MASKOS and GRP_MASKPROC ranges.
+
+2016-10-14  Luis Machado  <lgustavo@codesourcery.com>
+
+	* testsuite/lib/utils-lib.exp (run_dump_test): Call remote_download
+	to copy file to remote host.
+
+2016-10-11  Nick Clifton  <nickc@redhat.com>
+
+	* objdump.c (is_significant_symbol_name): New function.
+	(remove_useless_symbols): Do not remove significanr symbols.
+	(find_symbol_for_address): If an exact match for the specified
+	address has not been found, try scanning the dynamic relocs to see
+	if one of these matches the address.  If so, use the symbol
+	associated with the reloc.
+	(objdump_print_addr_with_symbol): Do not print offsets to symbols
+	with no value.
+	(disassemble_section): Only use dynamic relocs if the user
+	requested this.
+	(disassemble_data): Always load dynamic relocs if they are
+	available.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* dlltool.c: Spell fall through comments consistently.
+	* objcopy.c: Likewise.
+	* readelf.c: Likewise.
+	* dwarf.c: Add missing fall through comments.
+	* elfcomm.c: Likewise.
+	* sysinfo.y: Likewise.
+	* readelf.c: Likewise.  Also remove extraneous comments.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* cxxfilt.c (usage): Add ATTRIBUTE_NORETURN.
+	* elfedit.c (usage): Likewise.
+	* nm.c (usage): Likewise.
+	* objcopy.c (copy_usage, strip_usage): Likewise.
+	* srconv.c (show_usage): Likewise.
+	* strings.c (usage): Likewise.
+	* sysdump.c (show_usage): Likewise.
+	* srconv.c: Remove unneeded forward function declarations.
+	* strings.c: Likewise.
+	* sysdump.c: Likewise.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* coffdump.c (dump_coff_where): Add missing break.
+	* stabs.c (stab_xcoff_builtin_type): Likewise.
+
+2016-09-29  Alan Modra  <amodra@gmail.com>
+
+	* readelf.c (process_arch_specific): Call process_power_specific
+	for EM_PPC64.
+
+2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
+
+	* Makefile.am: Replace AM_CLFAGS with AM_CFLAGS_FOR_BUILD
+	when building with CC_FOR_BUILD compiler.
+	* Makefile.in: Regenerate.
+	* configure: Likewise.
+	* doc/Makefile.in: Likewise.
+
+2016-09-26  Alan Modra  <amodra@gmail.com>
+
+	* readelf.c (display_power_gnu_attribute): Catch truncated section
+	for all powerpc attributes.  Display long double ABI.  Don't
+	capitalize words, except for names.  Show known bits of tag values
+	when some unknown bits are present.  Whitespace fixes.
+
+2016-09-26  Alan Modra  <amodra@gmail.com>
+
+	* nm.c (get_elf_symbol_type): Don't use sprintf with translated
+	strings, use asprintf instead.
+	(get_coff_symbol_type): Likewise.
+
+2016-09-19  Alan Modra  <amodra@gmail.com>
+
+	* nm.c (print_symbol): Remove is_synthetic param.  Test sym->flags
+	instead.
+	(print_size_symbols, print_symbols): Adjust to suit, deleting
+	now unused synth_count param and fromsynth var.
+	(display_rel_file): Adjust, localizing synth_count.
+
+2016-09-14  Ed Maste  <emaste@freebsd.org>
+
+	* readelf.c (process_mips_specific): Fix typo in error message.
+
+2016-09-06  Nick Clifton  <nickc@redhat.com>
+
+	* readelf.c (request_dump_bynumber): Only call memcpy if
+	dump_sects is not NULL.
+
+2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* readelf.c (load_specific_debug_section): Check the external
+	compression header size.
+
+2016-08-19  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/binutils-all/readelf.s: Adjust expected ordering of
+	sections.
+	* testsuite/binutils-all/readelf.s-64: Likewise.
+
+2016-08-12  Nick Clifton  <nickc@redhat.com>
+
+	* readelf.c (process_symbol_table): Generate a warning if a local
+	symbol is found at and offste greater than or equal to the sh_info
+	field of it's section header.
+
+2016-08-08  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20440
+	* dwarf.c (display_debug_lines_decoded): Add checks for running
+	off the end of the section when populating the directory table and
+	file table.
+	(frame_display_row): Set max_regs equal to ncols.
+	* readelf.c (load_specific_debug_section): If the section is
+	compressed, but it is not big enough to hold a compression
+	header then warn and return 0.
+
+	PR binutils/20439
+	* dwarf.c (display_debug_lines_decoded): Check directory and file
+	indicies before using them to access directory and file tables.
+
+2016-08-02  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/17512
+	* resbin.c (bin_to_res_version): Cast variables to correct type
+	for printing in error message.
+
+2016-07-28  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/17512
+	* rescoff.c (read_coff_res_dir): Fix detection of buffer overrun.
+	* resbin.c (bin_to_res_version): Allow for the padded length of a
+	version block to be longer than the recorded length.  Skip padding
+	bytes.
+
+2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* configure: Regenerated.
+
+2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* doc/binutils.texi (objdump): Add ARC disassembler options.
+	* testsuite/binutils-all/arc/dsp.s: New file.
+	* testsuite/binutils-all/arc/objdump.exp: Likewise.
+	* NEWS: Mention the new feature.
+
+2016-07-20  Nick Clifton  <nickc@redhat.com>
+
+	* doc/binutils.texi (objcopy): Note that the localize symbol
+	options do not affect unique symbols.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* ar.c: Include plugin-api.h.
+	* nm.c: Likewise.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* bucomm.c: Don't include libbfd.h.
+	(endian_string, display_target_list): Delete forward declaration.
+	(display_info_table, display_target_tables): Likewise.
+	(LONGEST_ARCH): Delete.
+	(struct display_target): New.
+	(do_display_target): New function.
+	(display_target_list, display_info): Rewrite functions.
+	(display_info_table): Delete.
+	(do_info_size, do_info_header, do_info_row): New functions.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* elfcomm.h (HOST_WIDEST_INT): Move to..
+	* sysdep.h: ..here.
+	* od-macho.c: Don't include libbfd.h.  Do include dwarf.h
+	(dump_dyld_info_rebase): Use read_leb128 rather than
+	read_unsigned_leb128.
+	(dump_dyld_info_bind, dump_dyld_info_export_1): Likewise.
+	(dump_segment_split_info): Likewise.
+	(dump_dyld_info): Rename vars to avoid shadowing dwarf.h enums.
+	(dump_load_command): Likewise.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* ar.c: Don't include libbfd.h.
+	* objcopy.c: Likewise.
+	* bucomm.c (bfd_get_archive_filename): Use xmalloc rather than
+	bfd_malloc.
+
+2016-07-15  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/binutils-all/remove-relocs-01.s: Use .dc.a, not .word.
+
+2016-07-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* doc/binutils.texi (objcopy): Document 'remove-relocations'.
+	(strip): Likewise.
+	* objcopy.c (SECTION_CONTEXT_REMOVE_RELOCS): Define.
+	(enum command_line_switch): Add 'OPTION_REMOVE_RELOCS'.
+	(struct option strip_options): Add 'remove-relocations'.
+	(struct option copy_options): Likewise.
+	(copy_usage): Likewise.
+	(strip_usage): Likewise.
+	(handle_remove_relocations_option): New function.
+	(discard_relocations): New function.
+	(handle_remove_section_option): New function.
+	(copy_relocations_in_section): Use discard_relocations.
+	(strip_main): Use handle_remove_section_option for
+	'remove-section', and handle 'remove-relocations' option.
+	(copy_main): Likewise.
+	* testsuite/binutils-all/objcopy.exp: Run new tests.
+	* testsuite/binutils-all/remove-relocs-01.d: New file.
+	* testsuite/binutils-all/remove-relocs-01.s: New file.
+	* testsuite/binutils-all/remove-relocs-02.d: New file.
+	* testsuite/binutils-all/remove-relocs-03.d: New file.
+	* testsuite/binutils-all/remove-relocs-04.d: New file.
+	* testsuite/binutils-all/remove-relocs-05.d: New file.
+	* testsuite/binutils-all/remove-relocs-06.d: New file.
+	* NEWS: Mention new option.
+
+2016-07-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* objcopy.c (find_section_list): Handle section patterns starting
+	with '!' being a non-matching pattern.
+	* doc/binutils.texi (objcopy): Give example of using '!' with
+	--remove-section and --only-section.
+	(strip): Give example of using '!' with --remove-section.
+	* testsuite/binutils-all/data-sections.s: New file.
+	* testsuite/binutils-all/only-section-01.d: New file.
+	* testsuite/binutils-all/remove-section-01.d: New file.
+	* testsuite/binutils-all/objcopy.exp: Run new tests.
+	* NEWS: Mention new feature.
+
+2016-07-09  Alan Modra  <amodra@gmail.com>
+
+	PR binutils/20337
+	* objdump.c (compare_symbols): For ELF, sort same value/type
+	symbols according to size.
+
+2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
+
+	* objdump.c (dump_section_header): Rename SEC_ELF_NOREAD
+	to SEC_ELF_NOREAD.
+	* readelf.c (get_elf_section_flags): Rename ARM_NOREAD to
+	ARM_PURECODE and SHF_ARM_NOREAD to SHF_ARM_PURECODE.
+	(process_section_headers): Rename noread to purecode.
+
+	* section.c (SEC_ELF_NOREAD): Rename to ...
+	(SEC_ELF_PURECODE): ... this.
+
+2016-07-01  Nick Clifton  <nickc@redhat.com>
+
+	* prdbg.c (pr_enum_type): Use a buffer big enough to hold an
+	extremely large decimal value.
+	(pr_range_type): Likewise.
+	(pr_array_type): Likewise.
+	(pr_struct_field): Likewise.
+	(pr_class_baseclass): Likewise.
+	(pr_class_method_variant): Likewise.
+	(pr_tag_type): Likewise.
+	(pr_int_constant): Likewise.
+	(pr_typed_constant): Likewise.
+	(pr_variable): Likewise.
+	(pr_function_parameter): Likewise.
+	(pr_start_block): Likewise.
+	(pr_lineno): Likewise.
+	(pr_end_block): Likewise.
+	(tg_enum_type): Likewise.
+	(tg_int_constant): Likewise.
+	(tg_typed_constant): Likewise.
+	(tg_start_block): Likewise.
+
+2016-07-01  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/binutils-all/objcopy.exp
+	(objcopy_test_without_global_symbol): Expect this test to fail on
+	the AArch64 and ARM targets, since they preserve their mapping
+	symbols.
+
+2016-07-01  Tristan Gingold  <gingold@adacore.com>
+
+	* NEWS: Add marker for 2.27.
+
+2016-07-30  Tristan Gingold  <gingold@adacore.com>
+
+	* doc/binutils.texi (objdump): Fix mis-placement.
+
+2016-06-28  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/binutils-all/ar.exp: Relax previous restriction on
+	Alpha targets.  Allow ELF based Alpha targets.
+
+2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/ar.exp: Use `supports_gnu_unique' with
+	the `unique_symbol' test.
+
+2016-06-28  Alan Modra  <amodra@gmail.com>
+
+	PR 20304
+	* objdump.c (objdump_print_symname): Don't attempt to retrieve
+	version info from synthetic symbols.
+
+2016-06-24  Alan Modra  <amodra@gmail.com>
+
+	* objcopy.c (find_section_rename): Forward declare.  Remove
+	ibfd and sec_ptr param.  Add old_name param.  Allow for NULL
+	returned_flags.  Move read of section name and flags to..
+	(setup_section): ..here.  Update find_section_rename call.
+	(filter_symbols): Rename section symbols for renamed sections.
+	(copy_object): Call filter_symbols when renamed sections.
+	* testsuite/lib/binutils-common.exp (is_bad_symtab): New.
+	* testsuite/binutils-all/update-section.exp: Revert 96037eb0
+	mips xfail.
+	* testsuite/binutils-all/objcopy.exp (copy_executable): Use
+	is_bad_symtab.
+	(localize-hidden-1): xfail if is_bad_symtab.
+	* testsuite/binutils-all/readelf.exp: Use is_bad_symtab to select
+	between mips/tmips.
+
+2016-06-24  Alan Modra  <amodra@gmail.com>
+
+	* objdump.c (struct print_file_list): Add "max_printed".
+	(try_print_file_open): Init new field.
+	(show_line): Don't show 5 context lines when redisplaying source.
+
+2016-06-22  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/binutils-all/ar.exp: Skip tests for Alpha target.
+	Skip bfdtest1 tests for tic30 target.
+	* testsuite/binutils-all/arm/objdump.exp: Skip for aout arm
+	target.
+	* testsuite/binutils-all/compress.exp: Expect some tests to fail
+	on the nds32.
+	* testsuite/binutils-all/copy-3.d: Skip for go32 targets.
+	* testsuite/binutils-all/copy-4.d: Skip for AIX and linuxecoff
+	targets.
+	* testsuite/binutils-all/nm.exp: Treat beos based targets as ELF
+	targets.
+	* testsuite/binutils-all/objcopy.exp: Only run reverse bytes tests
+	if the bintest.o file was created.  Use the
+	get_standard_section_names proc to get the name of the data
+	section.
+	* testsuite/binutils-all/objdump.exp: Update regexps to allow for
+	RX section names.
+	* testsuite/binutils-all/readelf.exp: Use
+	get_standard_section_names proc to get the name of the data
+	section.
+	* testsuite/binutils-all/readelf.r: Allow for non standard text
+	section names.
+	* testsuite/binutils-all/readelf.s: Update regexps for tilepro.
+	* testsuite/binutils-all/size.exp: Allow for non standard section
+	names.
+	* testsuite/binutils-all/update-section.exp: Expect comapre 1vs4
+	to fail on mips targets.
+	* testsuite/lib/utils-lib.exp (default_binutils_run): Use
+	get_standard_section_names proc.
+	(run_dump_test): Likewise.
+	(proc get_standard_section_names): New proc.
+
+2016-06-22  Nick Clifton  <nickc@redhat.com>
+
+	* readelf.c (dynamic_section_mips_val): Increase size of timebuf.
+	(process_mips_specific): Likewise.
+	(process_gnu_liblist): Likewise.
+
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+	* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400
+	case.
+
+2016-06-15  Nick Clifton  <nickc@redhat.com>
+
+	* readelf.c (is_24bit_abs_reloc): Add support for R_FT32_20
+	reloc.
+
+2016-06-14  John Baldwin  <jhb@FreeBSD.org>
+
+	* objcopy.c (do_elf_stt_common): Use correct type.
+
+2016-06-14  Alan Modra  <amodra@gmail.com>
+
+	* ar.c: Expand uses of bfd_my_archive.
+	* size.c: Likewise.
+
+2016-06-14  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20241
+	* bucomm.c (bfd_get_archive_filename): Return file name within thin
+	archive.
+
+2016-06-02  Nick Clifton  <nickc@redhat.com>
+
+	PR 20089
+	* objcopy.c (group_signature): Fail if the input symbol table has
+	not been loaded, or if the sh_info field of the group header is 0.
+
+	* dwarf.c (display_debug_frames): Do not display any
+	interpretation if the block consists solely of DW__CFA_NOPs.
+
+2016-05-31  Alan Modra  <amodra@gmail.com>
+
+	* objcopy.c: Formatting, whitespace throughout.
+	(copy_main): Init newsym->othersym.
+	(parse_symflags): Make len a size_t.  Adjust uses.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/14625
+	* NEWS: Mention --enable-64-bit-archive.
+
+2016-05-18  Nick Clifton  <nickc@redhat.com>
+
+	PR 20096
+	* objcopy.c (copy_relocations_in_section): Also check for the
+	symbol pointed to by sym_ptr_ptr being NULL.
+
+2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mixed-mips16-micromips.d: New test.
+	* testsuite/binutils-all/mips/mixed-mips16-micromips.s: New test
+	source.
+	* testsuite/binutils-all/mips/mips.exp: Run the new test.
+
+2016-05-18  Nick Clifton  <nickc@redhat.com>
+
+	* po/sv.po: Updated Swedish translation.
+
+2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* readelf.c (dynamic_section_mips_val) <DT_MIPS_RLD_VERSION>
+	<DT_MIPS_LOCAL_GOTNO, DT_MIPS_CONFLICTNO, DT_MIPS_LIBLISTNO>
+	<DT_MIPS_SYMTABNO, DT_MIPS_UNREFEXTNO, DT_MIPS_HIPAGENO>
+	<DT_MIPS_DELTA_CLASS_NO, DT_MIPS_DELTA_INSTANCE_NO>
+	<DT_MIPS_DELTA_RELOC_NO, DT_MIPS_DELTA_SYM_NO>
+	<DT_MIPS_DELTA_CLASSSYM_NO, DT_MIPS_COMPACT_SIZE>: Use the
+	`d_val' rather than `d_ptr' member of the dynamic entry.
+
+2016-05-17  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/lib/binutils-common.exp (supports_gnu_unique): New
+	procedure.
+	* testsuite/binutils-all/objcopy.exp: Use `supports_gnu_unique'
+	with the `strip-10' test.
+
+2016-05-16  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/objcopy.exp: Don't skip the `strip-10'
+	test for the V850.
+
+2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* readelf.c (print_mips_ases): Add DSPR3.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* readelf.c (display_arm_attribute): Add output for Tag_DSP_extension.
+	(arm_attr_public_tags): Define DSP_extension attribute.
+
+2016-05-10  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* doc/binutils.texi (nm): Update description of --size-sort.
+
+2016-05-09  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20063
+	* readelf.c (get_32bit_section_headers): Warn if an out of range
+	sh_link or sh_info field is encountered.
+	(get_64bit_section_headers): Likewise.
+
+2016-05-04  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* testsuite/lib/binutils-common.exp (is_elf_format): Add avr-*-*.
+
+2016-05-03  Nick Clifton  <nickc@redhat.com>
+
+	* po/sv.po: Updated Swedish translation.
+
+2016-04-29  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	* readelf.c (is_32bit_pcrel_reloc): Return true if reloc is 32-bit
+	PC relocation for AVR target.
+	(is_none_reloc): Return true if reloc is any of AVR diff
+	relocations.
+
+2016-04-29  Nick Clifton  <nickc@redhat.com>
+
+	PR 19938
+	* readelf.c (get_solaris_segment_type): New function.
+	(get_segment_type): Call it.
+
+2016-04-28  Nick Clifton  <nickc@redhat.com>
+
+	* po/zh_CN.po: Updated Chinese (simplified) translation.
+
+2016-04-28  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19722
+	* testsuite/binutils-all/aarch64/illegal.s: New test.
+	* testsuite/binutils-all/aarch64/illegal.d: New test driver.
+
+2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* resres.c: Likewise.
+
+2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated with automake 1.11.6.
+	* aclocal.m4: Likewise.
+	* doc/Makefile.in: Likewise.
+
+2016-04-14  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19938
+	* testsuite/binutils-all/i386/compressed-1b.d: Allow for the
+	string sections possibly having the SHF_STRINGS flag bit set.
+	* testsuite/binutils-all/i386/compressed-1c.d: Likewise.
+	* testsuite/binutils-all/readelf.s: Likewise.
+	* testsuite/binutils-all/readelf.s-64: Likewise.
+	* testsuite/binutils-all/x86-64/compressed-1b.d: Likewise.
+	* testsuite/binutils-all/x86-64/compressed-1c.d: Likewise.
+
+2016-04-13  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19938
+	* readelf.c (get_solaris_section_type): New function: Returns the
+	name of Solaris specific section types.
+	(get_solaris_dynamic_type): New function: Return the name of
+	Solaris specific dynamic types.
+	(get_dynamic_type): Use get_solaris_dynamic_type.
+	(get_section_type_name): Use get_solaris_section_type.
+	(get_solaris_symbol_visibility): New function: Returns Solaris
+	specific symbol visibilities.
+	(print_dynamic_symbol): Use get_solaris_symbol_visibility.
+	(process_symbol_table): Likewise.
+
+2016-04-13  Andreas Arnez  <arnez@linux.vnet.ibm.com>
+
+	* dwarf.h (init_dwarf_regnames_s390): Declare.
+	* dwarf.c (dwarf_regnames_s390): New.
+	(init_dwarf_regnames_s390): New.
+	(init_dwarf_regnames): Call it.
+	* objdump.c (dump_dwarf): Likewise.
+
+2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/binutils-all/mips/mips16-undecoded.d: New test.
+	* testsuite/binutils-all/mips/mips16-undecoded.s: New test
+	source.
+	* testsuite/binutils-all/mips/mips.exp: Run the new test.
+
+2016-04-04  Nick Clifton  <nickc@redhat.com>
+
+	PR 19872
+	* dwarf.c (display_debug_aranges): Skip warning about unrecognised
+	version number if the version is zero.
+
+2016-03-29  Alan Modra  <amodra@gmail.com>
+
+	* readelf.c (get_data): Use BFD_VMA_FMT to print bfd_size_type vars.
+	(get_dynamic_data): Likewise.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	PR 19851
+	* dwarf.c (SAFE_BYTE_GET): Replace local dynamic array allocation
+	with run time size check.
+
+	* configure: Regenerate.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* readelf.c (decode_ARC_machine_flags): Handle nps400.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* readelf.c (get_machine_flags): Move arc processing into...
+	(decode_ARC_machine_flags): ... new function.  Remove use of
+	EF_ARC_CPU_GENERIC, change default case from "generic arc" to
+	"unknown arc".  Merged ABI printing between two machine types.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/binutils-all/objdump.exp (cpus_expected): Add ARC700
+	to the architecture list.
+
+2016-03-21  Nick Clifton  <nickc@redhat.com>
+
+	* dlltool.c: Replace use of alloca with call to xmalloc.
+	* dllwrap.c: Likewise.
+	* nlmconv.c: Likewise.
+	* objdump.c: Likewise.
+	* resrc.c: Likewise.
+	* winduni.c: Likewise.
+	* configure: Regenerate.
+
+2016-03-07  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/19775
+	* testsuite/binutils-all/ar.exp (proc empty_archive): New proc.
+	Run the new proc.
+	* testsuite/binutils-all/empty: New, empty, file.
+
+2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* readelf.c (arm_attry_tag_FP_arch): Add "NEON for ARMv8.1".
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19645
+	* NEWS: Mention --elf-stt-common= for objcopy.
+	* doc/binutils.texi: Document --elf-stt-common= for objcopy.
+	* objcopy.c (do_elf_stt_common): New.
+	(command_line_switch): Add OPTION_ELF_STT_COMMON.
+	(copy_options): Add --elf-stt-common=.
+	(copy_usage): Add --elf-stt-common=.
+	(copy_object): Also check do_elf_stt_common for ELF targets.
+	(copy_file): Handle do_elf_stt_common.
+	(copy_main): Handle OPTION_ELF_STT_COMMON.
+	* readelf.c (apply_relocations): Support STT_COMMON.
+	* testsuite/binutils-all/common-1.s: New file.
+	* testsuite/binutils-all/common-1a.d: Likewise.
+	* testsuite/binutils-all/common-1b.d: Likewise.
+	* testsuite/binutils-all/common-1c.d: Likewise.
+	* testsuite/binutils-all/common-1d.d: Likewise.
+	* testsuite/binutils-all/common-1e.d: Likewise.
+	* testsuite/binutils-all/common-1f.d: Likewise.
+	* testsuite/binutils-all/common-2.s: Likewise.
+	* testsuite/binutils-all/common-2a.d: Likewise.
+	* testsuite/binutils-all/common-2b.d: Likewise.
+	* testsuite/binutils-all/common-2c.d: Likewise.
+	* testsuite/binutils-all/common-2d.d: Likewise.
+	* testsuite/binutils-all/common-2e.d: Likewise.
+	* testsuite/binutils-all/common-2f.d: Likewise.
+	* testsuite/binutils-all/objcopy.exp
+	(objcopy_test_elf_common_symbols): New proc.
+	Run objcopy_test_elf_common_symbols for ELF targets
+
+2016-02-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/19647
+	* readelf.c (get_section_type_name): Add a missing break.
+
+2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* readelf.c (is_32bit_pcrel_reloc): Add R_ARC_32_PCREL.
+
+2016-02-15  Nick Clifton  <nickc@redhat.com>
+
+	* readelf.c (get_section_type_name): Add hex prefix to offsets
+	printed for LOPROC and LOOS values.  Ensure that a result is
+	always returned for the V850 target, even when an unrecognised
+	processor specific value is encountered.
+	(process_section_headers): Display key values in the order in
+	which they appear to the user.  Add the "C (compressed)" value to
+	the list.
+
+2016-02-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* doc/binutils.texi: Fix a typo.
+
+2016-02-05  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
+
+	* testsuite/binutils-all/objdump.exp: Update expected default
+	architecture value for ARC binaries.
+
+2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/19547
+	* testsuite/binutils-all/objcopy.exp
+	(objcopy_test_without_global_symbol): New proc.
+	Run objcopy_test_without_global_symbol.
+	* testsuite/binutils-all/pr19547.c: New file.
+
+2016-01-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/19523
+	* Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to
+	runtest.
+	* Makefile.in: Regenerated.
+	* testsuite/binutils-all/compress.exp (test_gnu_debuglink): New
+	proc.
+	Run test_gnu_debuglink for native ELF build.
+
+2016-01-20  Nick Clifton  <nickc@redhat.com>
+
+	PR 19495
+	* testsuite/binutils-all/dlltool.exp: Fix tests for targets which
+	do not support inserting leading underscores.
+
+2016-01-20  Mickael Guene  <mickael.guene@st.com>
+
+	* readelf.c (get_elf_section_flags): Display y letter for section
+	with SHF_ARM_NOREAD section flag in readelf section output.
+	(process_section_headers): Add y letter in readelf section output
+	key mapping for ARM architecture.
+	* objdump.c (dump_section_header): Display NOREAD attributes as
+	well.
+	* doc/binutils.texi (objdump): Note that it is correct for
+	sections to have both the READONLY and NOREAD attributes.
+
+2016-01-19  John Baldwin  <jhb@FreeBSD.org>
+
+	* readelf.c (get_freebsd_elfcore_note_type): Remove unused variable.
+
+2016-01-19  John Baldwin  <jhb@FreeBSD.org>
+
+	* readelf.c (get_freebsd_elfcore_note_type): New
+	(process_note): Add support for FreeBSD core notes.
+
+2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
+	    Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
+
+	* readelf.c (get_machine_flags): Add support for newer ARC ELF
+	header flags.
+
+2016-01-18  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/lib/binutils-common.exp (is_elf_format): Return true
+	for m68hc11/12 and xgate triples.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* readelf.c (is_32bit_abs_reloc): Add R_M68HC11_32.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-2015 and testsuite/ChangeLog-1215
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/elfcpp/ChangeLog b/elfcpp/ChangeLog
index eae9eef..e33ce1b 100644
--- a/elfcpp/ChangeLog
+++ b/elfcpp/ChangeLog
@@ -1,67 +1,6 @@
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* elfcpp.h (enum EM): Add EM_TI_PRU.
-
-2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-        * elfcpp.h (DT_MIPS_RLD_MAP_REL): New enum constant.
-
-2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-	* mips.h (R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
-	R_MIPS_PC19_S2, R_MIPS_PCHI16, R_MIPS_PCLO16): New enums for
-	Mips32r6 and Mips64r6 relocations.
-	(r6_isa): New function.
-
-2016-06-10  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-	* elfcpp.h (SHT_MIPS_ABIFLAGS): New enum constant.
-	* mips.h (EF_MIPS_FP64, EF_MIPS_NAN2008): New enum constants for
-	processor-specific flags.
-	(E_MIPS_MACH_5900): New enum constant for machine variant.
-	(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): New enum
-	constants.
-	(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU,
-	AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS,
-	AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16, AFL_ASE_MICROMIPS,
-	AFL_ASE_XPA): Likewise.
-	(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP,
-	AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900, AFL_EXT_4650,
-	AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900, AFL_EXT_10000,
-	AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120, AFL_EXT_5400,
-	AFL_EXT_5500, AFL_EXT_LOONGSON_2E, AFL_EXT_LOONGSON_2F,
-	AFL_EXT_OCTEON3): Likewise.
-	(Tag_GNU_MIPS_ABI_FP, Tag_GNU_MIPS_ABI_MSA): Likewise.
-	(Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE,
-	Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT,
-	Val_GNU_MIPS_ABI_FP_OLD_64,Val_GNU_MIPS_ABI_FP_XX,
-	Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A,
-	Val_GNU_MIPS_ABI_FP_NAN2008, Val_GNU_MIPS_ABI_MSA_ANY,
-	Val_GNU_MIPS_ABI_MSA_128): Likewise.
-	(AFL_FLAGS1_ODDSPREG): New enum constant.
-
-2016-03-18  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
-
-	* mips.h (abi_64): Remove.
-
-2016-01-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): Remove
-	'typename'.
-
-2016-01-11  Cary Coutant  <ccoutant@gmail.com>
-
-	* elfcpp.h (Mips64_rel, Mips64_rel_write): New classes.
-	(Mips64_rela, Mips64_rela_write): New classes.
-	* elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-0815
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/elfcpp/ChangeLog-2016 b/elfcpp/ChangeLog-2016
new file mode 100644
index 0000000..eae9eef
--- /dev/null
+++ b/elfcpp/ChangeLog-2016
@@ -0,0 +1,75 @@
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* elfcpp.h (enum EM): Add EM_TI_PRU.
+
+2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+        * elfcpp.h (DT_MIPS_RLD_MAP_REL): New enum constant.
+
+2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+	* mips.h (R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
+	R_MIPS_PC19_S2, R_MIPS_PCHI16, R_MIPS_PCLO16): New enums for
+	Mips32r6 and Mips64r6 relocations.
+	(r6_isa): New function.
+
+2016-06-10  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+	* elfcpp.h (SHT_MIPS_ABIFLAGS): New enum constant.
+	* mips.h (EF_MIPS_FP64, EF_MIPS_NAN2008): New enum constants for
+	processor-specific flags.
+	(E_MIPS_MACH_5900): New enum constant for machine variant.
+	(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): New enum
+	constants.
+	(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU,
+	AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS,
+	AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16, AFL_ASE_MICROMIPS,
+	AFL_ASE_XPA): Likewise.
+	(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP,
+	AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900, AFL_EXT_4650,
+	AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900, AFL_EXT_10000,
+	AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120, AFL_EXT_5400,
+	AFL_EXT_5500, AFL_EXT_LOONGSON_2E, AFL_EXT_LOONGSON_2F,
+	AFL_EXT_OCTEON3): Likewise.
+	(Tag_GNU_MIPS_ABI_FP, Tag_GNU_MIPS_ABI_MSA): Likewise.
+	(Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE,
+	Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT,
+	Val_GNU_MIPS_ABI_FP_OLD_64,Val_GNU_MIPS_ABI_FP_XX,
+	Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A,
+	Val_GNU_MIPS_ABI_FP_NAN2008, Val_GNU_MIPS_ABI_MSA_ANY,
+	Val_GNU_MIPS_ABI_MSA_128): Likewise.
+	(AFL_FLAGS1_ODDSPREG): New enum constant.
+
+2016-03-18  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
+
+	* mips.h (abi_64): Remove.
+
+2016-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): Remove
+	'typename'.
+
+2016-01-11  Cary Coutant  <ccoutant@gmail.com>
+
+	* elfcpp.h (Mips64_rel, Mips64_rel_write): New classes.
+	(Mips64_rela, Mips64_rela_write): New classes.
+	* elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-0815
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1b6fd9d..e33ce1b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,6016 +1,6 @@
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* NEWS: Mention new PRU target.
-	* Makefile.am: Add PRU target.
-	* config/obj-elf.c: Ditto.
-	* configure.tgt: Ditto.
-	* config/tc-pru.c: New file.
-	* config/tc-pru.h: New file.
-	* doc/Makefile.am: Add documentation for PRU GAS port.
-	* doc/all.texi, Ditto.
-	* doc/as.texinfo: Ditto.
-	* doc/c-pru.texi: Document PRU GAS options.
-	* Makefile.in: Regenerate.
-	* doc/Makefile.in: Regenerate.
-	* po/POTFILES.in: Regenerate.
-	* testsuite/gas/pru/alu.d: New file for PRU GAS testsuite.
-	* testsuite/gas/pru/alu.s: Ditto.
-	* testsuite/gas/pru/branch.d: Ditto.
-	* testsuite/gas/pru/branch.s: Ditto.
-	* testsuite/gas/pru/illegal.l: Ditto.
-	* testsuite/gas/pru/illegal.s: Ditto.
-	* testsuite/gas/pru/ldi.d: Ditto.
-	* testsuite/gas/pru/ldi.s: Ditto.
-	* testsuite/gas/pru/ldst.d: Ditto.
-	* testsuite/gas/pru/ldst.s: Ditto.
-	* testsuite/gas/pru/loop.d: Ditto.
-	* testsuite/gas/pru/loop.s: Ditto.
-	* testsuite/gas/pru/misc.d: Ditto.
-	* testsuite/gas/pru/misc.s: Ditto.
-	* testsuite/gas/pru/pru.exp: Ditto.
-	* testsuite/gas/pru/pseudo.d: Ditto.
-	* testsuite/gas/pru/pseudo.s: Ditto.
-	* testsuite/gas/pru/warn_reglabel.l: Ditto.
-	* testsuite/gas/pru/warn_reglabel.s: Ditto.
-	* testsuite/gas/pru/xfr.d: Ditto.
-	* testsuite/gas/pru/xfr.s: Ditto.
-	* testsuite/gas/lns/lns.exp: Mark lns-common-1-alt variant for PRU.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-asmacro.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16-asmacro.d: New test.
-	* testsuite/gas/mips/mips16-64@mips16-asmacro.d: New test.
-	* testsuite/gas/mips/mips16-asmacro.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips16_immed): Limit `mips16_immed_extend'
-	use to operands whose LSB position is zero.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (match_mips16_insn): Don't update
-	`forced_insn_length' or the instruction opcode if an operand
-	requires an extended instruction form, but an unextended one
-	has been requested.
-	* testsuite/gas/mips/mips16-relax-unextended-1.d: New test.
-	* testsuite/gas/mips/mips16-relax-unextended-2.d: New test.
-	* testsuite/gas/mips/mips16-relax-unextended-1.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-relax-unextended-2.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-relax-unextended-1.s: New test
-	source.
-	* testsuite/gas/mips/mips16-relax-unextended-2.s: New test
-	source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips16_macro_build): Replace `0' and `4'
-	operand codes with `.' and `F' respectively.
-	(mips16_macro): Likewise.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (is_size_valid_16): Disallow a `.e' suffix
-	instruction size override for INSN2_SHORT_ONLY opcode table
-	entries.
-	* testsuite/gas/mips/mips16-extend-swap.d: Adjust output.
-	* testsuite/gas/mips/mips16-macro-e.l: Adjust error messages.
-	* testsuite/gas/mips/mips16-32@mips16-macro-e.l: Adjust error
-	messages.
-	* testsuite/gas/mips/mips16e-32@mips16-macro-e.l: Adjust error
-	messages.
-	* testsuite/gas/mips/mips16-insn-e.d: New test.
-	* testsuite/gas/mips/mips16-insn-t.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16-insn-e.d: New test.
-	* testsuite/gas/mips/mips16-64@mips16-insn-e.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16-insn-e.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16-insn-t.d: New test.
-	* testsuite/gas/mips/mips16-64@mips16-insn-t.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16-insn-t.d: New test.
-	* testsuite/gas/mips/mips16-insn-e.l: New stderr output.
-	* testsuite/gas/mips/mips16-insn-t.l: New stderr output.
-	* testsuite/gas/mips/mips16-32@mips16-insn-e.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-64@mips16-insn-e.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-32@mips16-insn-t.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-64@mips16-insn-t.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16e-32@mips16-insn-t.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-insn-e.s: New test source.
-	* testsuite/gas/mips/mips16-insn-t.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (match_mips16_insn): Remove the `6' operand
-	code special case and its associated comment.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips16_ip): Handle `.e' and `.t' instruction
-	suffixes followed by a null character rather than a space too.
-	* testsuite/gas/mips/mips16-insn-length-noargs.d: New test.
-	* testsuite/gas/mips/mips16-insn-length-noargs.s: New test
-	source.
-	* testsuite/gas/mips/mips.exp: Run the new test.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-extend-swap.d: New test.
-	* testsuite/gas/mips/mips16-extend-swap.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new test.
-
-2016-12-23  Joe Seymour  <joe.s@somniumtech.com>
-
-	* config/tc-msp430.c (msp430_mcu_data): Sync with data from TI's
-	devices.csv file as of September 2016.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* configure: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* NEWS: Add marker for 2.28.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* po/gas.pot: Regenerate.
-
-2016-12-21  Andrew Waterman  <andrew@sifive.com>
-
-	* config/tc-riscv.c (riscv_make_nops): Emit 2-byte NOPs.
-	(riscv_frag_align_code): Correct frag_align_code arg.
-
-2016-12-21  Tim Newsome  <tim@sifive.com>
-
-	* config/tc-riscv.c (riscv_pre_output_hook): Remove const from
-	loc4_frag.
-
-2016-12-21  Alan Modra  <amodra@gmail.com>
-
-	* doc/c-lm32.texi: Fix chars with high bit set.
-	* testsuite/gas/bfin/vector2.s: Likewise.
-
-2016-12-21  Alan Modra  <amodra@gmail.com>
-
-	PR gas/10946
-	* doc/as.texinfo (Chars): Document escape sequences.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-sub.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16-sub.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16-sub.d: New test.
-	* testsuite/gas/mips/mips16e-sub.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16e-sub.d: New test.
-	* testsuite/gas/mips/mips16-64@mips16e-sub.d: New test.
-	* testsuite/gas/mips/mips16e-64-sub.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16e-64-sub.d: New test.
-	* testsuite/gas/mips/mips16-64@mips16e-64-sub.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: New test.
-	* testsuite/gas/mips/mips16-sub.s: New test source.
-	* testsuite/gas/mips/mips16e-sub.s: New test source.
-	* testsuite/gas/mips/mips16e-64-sub.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16e.s: Add a RESTORE instruction.
-	* testsuite/gas/mips/mips16e.d: Adjust accordingly.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16.d: Adjust test for multiple MIPS16
-	ISA testing.
-	* testsuite/gas/mips/mips16-64.d: Adjust test for multiple
-	MIPS16 ISA testing.
-	* testsuite/gas/mips/mips16e-64.d: Adjust test for multiple
-	MIPS16 ISA testing.
-	* testsuite/gas/mips/mips16-macro.d: Adjust test for multiple
-	MIPS16 ISA testing.
-	* testsuite/gas/mips/mips16e-64.s: Ensure MIPS16 ISA annotation.
-	* testsuite/gas/mips/mips16e-64.l: Rename to...
-	* testsuite/gas/mips/mips16e-32@mips16e-64.l: ... this.
-	* testsuite/gas/mips/mips16-64@mips16.d: New test.
-	* testsuite/gas/mips/mips16-64@mips16-64.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16e-64.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16-macro.d: New test.
-	* testsuite/gas/mips/mips16-64@mips16-macro.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16-macro.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16-macro-e.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16-macro-e.d: New test.
-	* testsuite/gas/mips/mips16-32@mips16-macro-t.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16-macro-t.d: New test.
-	* testsuite/gas/mips/mips16e-32@mips16e-64.l: New stderr output.
-	* testsuite/gas/mips/mips16-32@mips16-macro.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16e-32@mips16-macro.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-32@mips16-macro-e.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16e-32@mips16-macro-e.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16-32@mips16-macro-t.l: New stderr
-	output.
-	* testsuite/gas/mips/mips16e-32@mips16-macro-t.l: New stderr
-	output.
-	* testsuite/gas/mips/mips.exp: Run `mips16', `mips16-64',
-	`mips16-macro', `mips16-macro-t', `mips16-macro-e' and
-	`mips16e-64' testing across multiple MIPS16 ISAs.  Fold
-	`mips16-macro' and `mips16e-64' list test invocations into
-	corresponding dump tests.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
-	`mips16e' and `mips16' prefixes.
-	(run_list_test_arch): Likewise.
-	Rename `mips16' architecture to `mips16-32'.  Add `mips16-64',
-	`mips16e-32' and `mips16e-64' architectures.  Update `rol64',
-	`mips16e', `elf${el}-rel2' and `elf-rel4' test invocations
-	accordingly.
-	* testsuite/gas/mips/mips16e@branch-swap-3.d: New test.
-	* testsuite/gas/mips/mips16e@branch-swap-4.d: New test.
-	* testsuite/gas/mips/mips16e@loc-swap-dis.d: New test.
-	* testsuite/gas/mips/mips16e@loc-swap.d: New test.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/loc-swap.s: Use zeros rather than NOPs for
-	trailing alignment padding.
-	* testsuite/gas/mips/loc-swap.d: Adjust accordingly.
-	* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
-	* testsuite/gas/mips/mips16@loc-swap-dis.d: Likewise.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (micromips_insn_length): Use
-	`mips_opcode_32bit_p'.
-	(is_size_valid): Adjust description.
-	(is_size_valid_16): New function.
-	(validate_mips_insn): Use `mips_opcode_32bit_p' in MIPS16
-	operand decoding.
-	(validate_mips16_insn): Remove `a' and `i' operand code special
-	casing, use `mips_opcode_32bit_p' to determine instruction
-	width.
-	(append_insn): Adjust forced MIPS16 instruction size
-	determination.
-	(match_mips16_insn): Likewise.  Don't shift the instruction's
-	opcode with the `a' and `i' operand codes.  Use
-	`mips_opcode_32bit_p' in operand decoding.
-	(match_mips16_insns): Check for forced instruction size's
-	validity.
-	(mips16_ip): Don't force instruction size in the `noautoextend'
-	mode.
-	* testsuite/gas/mips/mips16-jal-e.d: New test.
-	* testsuite/gas/mips/mips16-jal-t.d: New test.
-	* testsuite/gas/mips/mips16-macro-e.d: New test.
-	* testsuite/gas/mips/mips16-macro-t.d: New test.
-	* testsuite/gas/mips/mips16-jal-t.l: New stderr output.
-	* testsuite/gas/mips/mips16-macro-e.l: New stderr output.
-	* testsuite/gas/mips/mips16-macro-t.l: New stderr output.
-	* testsuite/gas/mips/mips16-jal-e.s: New test source.
-	* testsuite/gas/mips/mips16-jal-t.s: New test source.
-	* testsuite/gas/mips/mips16-macro-e.s: New test source.
-	* testsuite/gas/mips/mips16-macro-t.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-macro.l: New list test.
-	* testsuite/gas/mips/mips.exp: Run the new test.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-sdrasp.d: New test.
-	* testsuite/gas/mips/mips16-sdrasp.l: New stderr output.
-	* testsuite/gas/mips/mips16-sdrasp.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new test.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips.exp: Limit remaining tests that
-	require NewABI support to `has_newabi' targets.
-
-2015-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* config/tc-riscv.c (riscv_pseudo_table): Remove "align",
-	"p2align", and "balign".
-	(s_align): Remove.
-	(riscv_handle_align): New function.
-	(riscv_frag_align_code): Likewise.
-	(riscv_make_nops): Likewise.
-	* config/tc-riscv.h (MAX_MEM_FOR_RS_ALIGN_CODE): Change to 7.
-	(HANDLE_ALIGN): Define.
-	(md_do_align): Define.
-	(riscv_handle_align): Declare.
-	(riscv_frag_align_code): Likewise.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* config/tc-riscv.h (xlen): Delete.
-	* config/tc-riscv.c (xlen): Make static.
-	(abi_xlen): New variable.
-	(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
-	with OPTION_MABI.
-	(md_longopts): Likewise.
-	(md_parse_option): Likewise.
-	(riscv_elf_final_processing): Likewise.
-	* doc/as.texinfo (Target RISC-V options): Likewise.
-	* doc/c-riscv.texi (OPTIONS): Likewise.
-	* config/tc-riscv.c (float_mode): Removed.
-	(float_abi): New type, specifies the floating-point ABI.
-	(riscv_set_abi): New function.
-	(riscv_add_subset): Only allow lower-case ISA names and require
-	them to start with "rv".
-	(riscv_after_parse_args): Likewise.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-	    Kuan-Lin Chen  <kuanlinchentw@gmail.com>
-
-	* config/tc-riscv.c (riscv_set_options): Add relax.
-	(riscv_opts): Likewise.
-	(s_riscv_option): Add relax and norelax.
-	(riscv_apply_const_reloc): New function.
-	(append_insn): Move constant relocation handling to
-	riscv_apply_const_reloc.
-	(md_pcrel_from): Likewise.
-	(parse_relocation): Skip BFD_RELOC_UNUSED.
-	(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
-	BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
-	(md_apply_fix): Likewise.
-	(riscv_pre_output_hook): New function.
-	* config/tc-riscv.h (md_pre_output_hook): Define.
-	(riscv_pre_output_hook): Declare.
-	(DWARF_CIE_DATA_ALIGNMENT): Always -4.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* config/tc-riscv.c: Formatting and comment fixes throughout.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (md_convert_frag): Report an error instead of
-	asserting on `ext'.
-	* testsuite/gas/mips/mips16-branch-unextended-1.d: New test.
-	* testsuite/gas/mips/mips16-branch-unextended-2.d: New test.
-	* testsuite/gas/mips/mips16-branch-unextended-1.s: New test
-	source.
-	* testsuite/gas/mips/mips16-branch-unextended-2.s: New test.
-	* testsuite/gas/mips/mips16-branch-unextended.l: New stderr
-	output.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-sprel-swap.d: New test.
-	* testsuite/gas/mips/mips16-sprel-swap.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new test.
-
-2016-12-13 Renlin Li <renlin.li@arm.com>
-
-	* config/tc-aarch64.c (AARCH64_REG_TYPES): Remove CN register.
-	(get_reg_expected_msg): Remove CN register case.
-	(parse_operands): rewrite parser for CRn, CRm operand.
-	(reg_names): Remove CN register.
-	* testsuite/gas/aarch64/diagnostic.s: Add a new test case.
-	* testsuite/gas/aarch64/diagnostic.l: Adjust error message.
-
-2016-12-13  Jiong Wang  <jiong.wang@arm.com>
-
-	* gas/testsuite/gas/aarch64/addsub.d: Support ILP32 mode.
-	* gas/testsuite/gas/aarch64/advsimd-across.d: Likewise.
-	* gas/testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise.
-	* gas/testsuite/gas/aarch64/advsimd-fp16.d: Likewise.
-	* gas/testsuite/gas/aarch64/advsimd-misc.d: Likewise.
-	* gas/testsuite/gas/aarch64/advsisd-copy.d: Likewise.
-	* gas/testsuite/gas/aarch64/advsisd-misc.d: Likewise.
-	* gas/testsuite/gas/aarch64/alias.d: Likewise.
-	* gas/testsuite/gas/aarch64/armv8-ras-1.d: Likewise.
-	* gas/testsuite/gas/aarch64/b_1.d: Likewise.
-	* gas/testsuite/gas/aarch64/beq_1.d: Likewise.
-	* gas/testsuite/gas/aarch64/bitfield-dump: Likewise.
-	* gas/testsuite/gas/aarch64/bitfield-no-aliases.d: Likewise.
-	* gas/testsuite/gas/aarch64/codealign.d: Likewise.
-	* gas/testsuite/gas/aarch64/codealign_1.d: Likewise.
-	* gas/testsuite/gas/aarch64/crc32-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/crc32.d: Likewise.
-	* gas/testsuite/gas/aarch64/crypto-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/crypto.d: Likewise.
-	* gas/testsuite/gas/aarch64/dwarf.d: Likewise.
-	* gas/testsuite/gas/aarch64/float-fp16.d: Likewise.
-	* gas/testsuite/gas/aarch64/floatdp2.d: Likewise.
-	* gas/testsuite/gas/aarch64/fp-armv8_3.d: Likewise.
-	* gas/testsuite/gas/aarch64/fp-const0-parse.d: Likewise.
-	* gas/testsuite/gas/aarch64/fp_cvt_int.d: Likewise.
-	* gas/testsuite/gas/aarch64/fpmov.d: Likewise.
-	* gas/testsuite/gas/aarch64/inst-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldr_1.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-exclusive.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-reg-pair.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise.
-	* gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
-	* gas/testsuite/gas/aarch64/lor-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/lor.d: Likewise.
-	* gas/testsuite/gas/aarch64/lse-atomic.d: Likewise.
-	* gas/testsuite/gas/aarch64/mapmisc.d: Likewise.
-	* gas/testsuite/gas/aarch64/mov-no-aliases.d: Likewise.
-	* gas/testsuite/gas/aarch64/mov.d: Likewise.
-	* gas/testsuite/gas/aarch64/movi.d: Likewise.
-	* gas/testsuite/gas/aarch64/movw_label.d: Likewise.
-	* gas/testsuite/gas/aarch64/msr.d: Likewise.
-	* gas/testsuite/gas/aarch64/neon-fp-cvt-int.d: Likewise.
-	* gas/testsuite/gas/aarch64/neon-frint.d: Likewise.
-	* gas/testsuite/gas/aarch64/neon-ins.d: Likewise.
-	* gas/testsuite/gas/aarch64/neon-not.d: Likewise.
-	* gas/testsuite/gas/aarch64/neon-vfp-reglist-post.d: Likewise.
-	* gas/testsuite/gas/aarch64/neon-vfp-reglist.d: Likewise.
-	* gas/testsuite/gas/aarch64/no-aliases.d: Likewise.
-	* gas/testsuite/gas/aarch64/optional.d: Likewise.
-	* gas/testsuite/gas/aarch64/pac.d: Likewise.
-	* gas/testsuite/gas/aarch64/pan-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/pan.d: Likewise.
-	* gas/testsuite/gas/aarch64/rdma-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/rdma.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_g0.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_g1.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-tlsldm-1.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d: Likewise.
-	* gas/testsuite/gas/aarch64/shifted.d: Likewise.
-	* gas/testsuite/gas/aarch64/sve.d: Likewise.
-	* gas/testsuite/gas/aarch64/symbol.d: Likewise.
-	* gas/testsuite/gas/aarch64/sysreg-1.d: Likewise.
-	* gas/testsuite/gas/aarch64/sysreg-2.d: Likewise.
-	* gas/testsuite/gas/aarch64/sysreg-3.d: Likewise.
-	* gas/testsuite/gas/aarch64/sysreg.d: Likewise.
-	* gas/testsuite/gas/aarch64/system-2.d: Likewise.
-	* gas/testsuite/gas/aarch64/system-3.d: Likewise.
-	* gas/testsuite/gas/aarch64/system.d: Likewise.
-	* gas/testsuite/gas/aarch64/tbz_1.d: Likewise.
-	* gas/testsuite/gas/aarch64/tlbi_op.d: Likewise.
-	* gas/testsuite/gas/aarch64/tls.d: Likewise.
-	* gas/testsuite/gas/aarch64/uao-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/uao.d: Likewise.
-	* gas/testsuite/gas/aarch64/virthostext-directive.d: Likewise.
-	* gas/testsuite/gas/aarch64/virthostext.d: Likewise.
-	* gas/testsuite/gas/aarch64/adr_1.d: Restrict test under -mabi=lp64.
-	* gas/testsuite/gas/aarch64/int-insns.d: Likewise.
-	* gas/testsuite/gas/aarch64/programmer-friendly.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-data.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_g2.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-gotoff_g1.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-gottprel_g1.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-insn.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d: Likewise.
-	* gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d: Likewise.
-	* gas/testsuite/gas/aarch64/tail_padding.d: Likewise.
-	* gas/testsuite/gas/aarch64/tls-desc.d: Likewise.
-
-2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips16_macro_build) <'>'>: Remove case.
-
-2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-extend.d: New test.
-	* testsuite/gas/mips/mips16-extend.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new test.
-
-2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-arc.c (arc_show_cpu_list): Rename `spaces' local
-	variable to `space_buf'.
-
-2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-arm.c (encode_arm_shift): Rename `index' local
-	variable to `op_index'.
-
-2016-12-08  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (is_opcode_valid): Use local `isa'
-	consistently.
-
-2016-12-06  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/20901
-	* read.c (s_space): Place an upper limit on the number of spaces
-	generated.
-
-	PR gas/20896
-	* testsuite/gas/mmix/err-byte1.s: Adjust expected warning messages
-	to account for patch to next_char_of_string.
-
-2016-12-05  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/20902
-	* read.c (next_char_of_string): Do end advance past the end of the
-	buffer.
-
-	PR gas/20904
-	* as.h (SKIP_ALL_WHITESPACE): New macro.
-	* expr.c (operand): Use it.
-
-2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-arm.c (do_vcmla, do_vcadd): Define.
-	(neon_scalar_for_vcmla): Define.
-	(enum operand_parse_code): Add OP_IROT1 and OP_IROT2.
-	(NEON_ENC_TAB): Add DDSI and QQSI variants.
-	(insns): Add vcmla and vcadd.
-	* testsuite/gas/arm/armv8_3-a-simd.d: New.
-	* testsuite/gas/arm/armv8_3-a-simd.s: New.
-	* testsuite/gas/arm/armv8_3-a-simd-bad.d: New.
-	* testsuite/gas/arm/armv8_3-a-simd-bad.l: New.
-	* testsuite/gas/arm/armv8_3-a-simd-bad.s: New.
-
-2016-12-05  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/textauxregister-1.d: New file.
-	* testsuite/gas/arc/textauxregister-1.s: Likewise.
-	* testsuite/gas/arc/textcondcode-err.s: Likewise.
-	* testsuite/gas/arc/textcoreregister-err.s: Likewise.
-	* config/tc-arc.c (tokenize_extregister): Return bfd_boolean,
-	don't check second argument of extension auxiliary register for
-	signess.
-	(arc_extcorereg): Consider the return of tokenize_extregister
-	function call.
-
-2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-arm.c (arm_ext_v8_3, do_vjcvt): Define.
-	(insns): Add vjcvt.
-	* testsuite/gas/aarch64/armv8_3-a-fp.s: New.
-	* testsuite/gas/aarch64/armv8_3-a-fp.d: New.
-	* testsuite/gas/aarch64/armv8_3-a-fp-bad.s: New.
-	* testsuite/gas/aarch64/armv8_3-a-fp-bad.d: New.
-	* testsuite/gas/aarch64/armv8_3-a-fp-bad.l: New.
-
-2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-arm.c (arm_archs): Add "armv8.3-a".
-	* doc/c-arm.texi (-march): Add "armv8.3-a".
-
-2016-12-02  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/cpu-em-err.s: New file.
-	* testsuite/gas/arc/cpu-em4-err.s: Likewise.
-	* testsuite/gas/arc/cpu-fpuda-err.s: Likewise.
-	* testsuite/gas/arc/cpu-hs-err.s: Likewise.
-	* testsuite/gas/arc/cpu-quarkse-err.s: Likewise.
-	* testsuite/gas/arc/noargs_a7.s: Add .cpu.
-	* config/tc-arc.c (ARC_CPU_TYPE_A6xx): Define.
-	(ARC_CPU_TYPE_A7xx): Likewise.
-	(ARC_CPU_TYPE_AV2EM): Likewise.
-	(ARC_CPU_TYPE_AV2HS): Likewise.
-	(cpu_types): Update list of known CPU names.
-	(arc_show_cpu_list): New function.
-	(md_show_usage): Print accepted CPU names.
-	(cl_features): New variable.
-	(arc_select_cpu): Use cl_features.
-	(arc_option): Allow various .cpu names.
-	(md_parse_option): Set cl_features.
-	* doc/c-arc.texi: Update -mcpu and .cpu documentation.
-
-2016-12-02  Josh Conner  <joshconner@google.com>
-
-	* configure.tgt: Add support for fuchsia (OS).
-
-2016-12-01  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/20898
-	* app.c (do_scrub_chars): Do not attempt to unget EOF.
-
-	PR gas/20897
-	* subsegs.c (subsegs_print_statistics): Do nothing if no output
-	file was created.
-
-	PR gas/20895
-	* symbols.c (resolve_symbol_value): Gracefully handle erroneous
-	symbolic expressions.
-
-2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (find_opcode_match): New function argument
-	errmsg.
-	(assemble_tokens): Collect and report the eventual error message
-	found during opcode matching process.
-	* testsuite/gas/arc/lpcount-err.s: New file.
-	* testsuite/gas/arc/add_s-err.s: Update error message.
-
-2016-11-28  Ramiro Polla  <ramiro@hex-rays.com>
-	    Amit Pawar  <amit.pawar@amd.com>
-
-	PR binutils/20637
-	* testsuite/gas/i386/xop32reg.d: New file.
-	* testsuite/gas/i386/xop32reg.s: New file.
-	* testsuite/gas/i386/i386.exp: Run new test.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* arparse.y: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* config/bfin-lex.l: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* testsuite/gas/all/gas.exp: Fix spelling in comments.
-	* testsuite/gas/cris/cris.exp: Fix spelling in comments.
-	* testsuite/gas/hppa/basic/basic.exp: Fix spelling in comments.
-	* testsuite/gas/hppa/parse/parse.exp: Fix spelling in comments.
-	* testsuite/gas/hppa/reloc/reloc.exp: Fix spelling in comments.
-	* testsuite/gas/sh/arch/arch.exp: Fix spelling in comments.
-	* testsuite/gas/tic4x/tic4x.exp: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* testsuite/gas/arm/local_function.d: Fix spelling in comments.
-	* testsuite/gas/arm/req.s: Fix spelling in comments.
-	* testsuite/gas/arm/vfp1.s: Fix spelling in comments.
-	* testsuite/gas/arm/vfp1_t2.s: Fix spelling in comments.
-	* testsuite/gas/arm/vfp1xD.s: Fix spelling in comments.
-	* testsuite/gas/arm/vfp1xD_t2.s: Fix spelling in comments.
-	* testsuite/gas/mcore/allinsn.s: Fix spelling in comments.
-	* testsuite/gas/mips/24k-triple-stores-5.s: Fix spelling in comments.
-	* testsuite/gas/mips/delay.d: Fix spelling in comments.
-	* testsuite/gas/mips/nodelay.d: Fix spelling in comments.
-	* testsuite/gas/mips/r5900-full.s: Fix spelling in comments.
-	* testsuite/gas/mips/r5900.s: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* as.h: Fix spelling in comments.
-	* config/obj-ecoff.c: Fix spelling in comments.
-	* config/obj-macho.c: Fix spelling in comments.
-	* config/tc-aarch64.c: Fix spelling in comments.
-	* config/tc-arc.c: Fix spelling in comments.
-	* config/tc-arm.c: Fix spelling in comments.
-	* config/tc-avr.c: Fix spelling in comments.
-	* config/tc-cr16.c: Fix spelling in comments.
-	* config/tc-epiphany.c: Fix spelling in comments.
-	* config/tc-frv.c: Fix spelling in comments.
-	* config/tc-hppa.c: Fix spelling in comments.
-	* config/tc-hppa.h: Fix spelling in comments.
-	* config/tc-i370.c: Fix spelling in comments.
-	* config/tc-m68hc11.c: Fix spelling in comments.
-	* config/tc-m68k.c: Fix spelling in comments.
-	* config/tc-mcore.c: Fix spelling in comments.
-	* config/tc-mep.c: Fix spelling in comments.
-	* config/tc-metag.c: Fix spelling in comments.
-	* config/tc-mips.c: Fix spelling in comments.
-	* config/tc-mn10200.c: Fix spelling in comments.
-	* config/tc-mn10300.c: Fix spelling in comments.
-	* config/tc-nds32.c: Fix spelling in comments.
-	* config/tc-nios2.c: Fix spelling in comments.
-	* config/tc-ns32k.c: Fix spelling in comments.
-	* config/tc-pdp11.c: Fix spelling in comments.
-	* config/tc-ppc.c: Fix spelling in comments.
-	* config/tc-riscv.c: Fix spelling in comments.
-	* config/tc-rx.c: Fix spelling in comments.
-	* config/tc-score.c: Fix spelling in comments.
-	* config/tc-score7.c: Fix spelling in comments.
-	* config/tc-sparc.c: Fix spelling in comments.
-	* config/tc-tic54x.c: Fix spelling in comments.
-	* config/tc-vax.c: Fix spelling in comments.
-	* config/tc-xgate.h: Fix spelling in comments.
-	* config/tc-xtensa.c: Fix spelling in comments.
-	* config/tc-z80.c: Fix spelling in comments.
-	* dwarf2dbg.c: Fix spelling in comments.
-	* input-file.h: Fix spelling in comments.
-	* itbl-ops.c: Fix spelling in comments.
-	* read.c: Fix spelling in comments.
-	* stabs.c: Fix spelling in comments.
-	* symbols.c: Fix spelling in comments.
-	* write.c: Fix spelling in comments.
-	* testsuite/gas/all/itbl-test.c: Fix spelling in comments.
-	* testsuite/gas/tic4x/opclasses.h: Fix spelling in comments.
-
-2016-11-25  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c (sparc_ip): Avoid emitting a cbcond error
-	messages for non-cbcond instructions.
-	* testsuite/gas/sparc/cbcond-diag.s: New file.
-	* testsuite/gas/sparc/cbcond-diag.l: Likewise.
-	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run cbcond-diag tests.
-
-2016-11-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* testsuite/gas/sparc/sparc.exp (gas_64_check): Make sure the
-	hwcaps-bump test is run with 64-bit objects.
-
-2016-11-23  Kuan-Lin Chen  <kuanlinchentw@gmail.com>
-
-	* config/tc-riscv.c: Add missing break.
-
-2016-11-23  Alan Modra  <amodra@gmail.com>
-
-	* po/POTFILES.in: Regenerate.
-
-2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-        * configure: Regenerate.
-
-2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c: Move HWS_* and HWS2_* definitions to
-	opcodes/sparc-opc.c.
-	(sparc_arch): Clarify the new role of the hwcap_allowed and
-	hwcap2_allowed fields.
-	(sparc_arch_table): Remove HWS_* and HWS2_* instances from
-	hwcap_allowed and hwcap2_allowed respectively.
-	(md_parse_option): Include the opcode arch hwcaps when processing
-	-A.
-	(sparc_ip): Use the current opcode arch hwcaps to update
-	hwcap_allowed, as well as the hwcaps of the instruction triggering
-	the bump.
-	* testsuite/gas/sparc/hwcaps-bump.s: New file.
-	* testsuite/gas/sparc/hwcaps-bump.l: Likewise.
-	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run tests in
-	hwcaps-bump.
-
-2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/b.d: Update test result.
-
-2016-11-22  Alan Modra  <amodra@gmail.com>
-
-	PR 20744
-	* config/tc-ppc.c: Delete VLE insn defines.
-	(md_assemble): Swap use_a_reloc and use_d_reloc.
-	* testsuite/gas/ppc/vle-reloc.d: Update.
-
-2016-11-21  Renlin Li  <renlin.li@arm.com>
-
-	PR gas/20827
-	* config/tc-arm.c (encode_arm_shift): Don't assert for operands not
-	presented.
-	* testsuite/gas/arm/add-shift-two.d: New.
-	* testsuite/gas/arm/add-shift-two.s: New.
-
-2016-11-21  Alan Modra  <amodra@gmail.com>
-
-	* configure.ac: Invoke ACX_PROG_CMP_IGNORE_INITIAL.
-	* Makefile.am (comparison): Rewrite using do_compare.
-	* configure: Regenerate.
-	* Makefile.in: Regenerate.
-	* doc/Makefile.in: Regenerate.
-
-2016-11-18  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/cl-warn.s: New file.
-	* testsuite/gas/arc/cpu-pseudop-1.d: Likewise.
-	* testsuite/gas/arc/cpu-pseudop-1.s: Likewise.
-	* testsuite/gas/arc/cpu-pseudop-2.d: Likewise.
-	* testsuite/gas/arc/cpu-pseudop-2.s: Likewise.
-	* testsuite/gas/arc/cpu-warn2.s: Likewise.
-	* config/tc-arc.c (selected_cpu): Initialize.
-	(feature_type): New struct.
-	(feature_list): New variable.
-	(arc_check_feature): New function.
-	(arc_select_cpu): Check for .cpu duplicates. Don't overwrite the
-	current cpu features. Check if a feature is available for a given
-	cpu.
-	(md_parse_option): Test if features are available for a given cpu.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_IMM_ROT*.
-	* testsuite/gas/aarch64/advsimd-armv8_3.d: New.
-	* testsuite/gas/aarch64/advsimd-armv8_3.s: New.
-	* testsuite/gas/aarch64/illegal-fcmla.s: New.
-	* testsuite/gas/aarch64/illegal-fcmla.l: New.
-	* testsuite/gas/aarch64/illegal-fcmla.d: New.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Add ldaprb, ldaprh, ldapr tests.
-	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise.
-	* testsuite/gas/aarch64/illegal-ldapr.s: Likewise.
-	* testsuite/gas/aarch64/illegal-ldapr.d: Likewise.
-	* testsuite/gas/aarch64/illegal-ldapr.l: Likewise.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* testsuite/gas/aarch64/fp-armv8_3.s: Add fjcvtzs test.
-	* testsuite/gas/aarch64/fp-armv8_3.d: Likewise.
-	* testsuite/gas/aarch64/illegal-fjcvtzs.s: Likewise.
-	* testsuite/gas/aarch64/illegal-fjcvtzs.d: Likewise.
-	* testsuite/gas/aarch64/illegal-fjcvtzs.l: Likewise.
-	* testsuite/gas/aarch64/illegal-nofp-armv8_3.s: Likewise.
-	* testsuite/gas/aarch64/illegal-nofp-armv8_3.d: Likewise.
-	* testsuite/gas/aarch64/illegal-nofp-armv8_3.l: Likewise.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_ADDR_SIMM10.
-	(fix_insn): Likewise.
-	(warn_unpredictable_ldst): Handle ldst_imm10.
-	* testsuite/gas/aarch64/pac.s: Add ldraa and ldrab tests.
-	* testsuite/gas/aarch64/pac.d: Likewise.
-	* testsuite/gas/aarch64/illegal-ldraa.s: New.
-	* testsuite/gas/aarch64/illegal-ldraa.l: New.
-	* testsuite/gas/aarch64/illegal-ldraa.d: New.
-
-2016-11-15  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/20803
-	* config/tc-sparc.c (cons_fix_new_sparc): Use unaligned relocs in
-	the .eh_frame section.
-
-2016-11-13  Anthony Green  <green@moxielogic.org>
-
-	* config/tc-moxie.c (md_assemble): Assemble 'bad' opcode.
-
-2016-11-11  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/20732
-	* expr.c (integer_constant): If tc_allow_L_suffix is defined and
-	non-zero then accept a L or LL suffix.
-	* testsuite/gas/sparc/pr20732.d: New test source file.
-	* testsuite/gas/sparc/pr20732.d: New test output file.
-	* testsuite/gas/sparc/sparc.exp: Run new test.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* testsuite/gas/aarch64/pac.s: Add ARMv8.3 branch instruction tests.
-	* testsuite/gas/aarch64/pac.d: Likewise.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-aarch64.c (process_omitted_operand): Handle AARCH64_OPND_Rm_SP.
-	(parse_operands): Likewise.
-	* testsuite/gas/aarch64/pac.s: Add pacga.
-	* testsuite/gas/aarch64/pac.d: Add pacga.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* testsuite/gas/aarch64/pac.s: New.
-	* testsuite/gas/aarch64/pac.d: New.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* testsuite/gas/aarch64/sysreg-3.s: New.
-	* testsuite/gas/aarch64/sysreg-3.d: New.
-	* testsuite/gas/aarch64/illegal-sysreg-3.l: New.
-	* testsuite/gas/aarch64/illegal-sysreg-3.d: New.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* testsuite/gas/aarch64/system-3.s: New.
-	* testsuite/gas/aarch64/system-3.d: New.
-	* testsuite/gas/aarch64/system.d: Update expected output.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-aarch64.c (aarch64_archs): Add "armv8.3-a".
-	* doc/c-aarch64.texi (-march): Likewise.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-aarch64.c (aarch64_features): Fix "simd" and "crypto".
-	* testsuite/gas/aarch64/illegal-crypto-nofp.d: New.
-	* testsuite/gas/aarch64/illegal-crypto-nofp.l: New.
-	* testsuite/gas/aarch64/illegal-fp16-nofp.d: New.
-	* testsuite/gas/aarch64/illegal-fp16-nofp.l: New.
-	* testsuite/gas/aarch64/illegal-fp16-nofp.s: New.
-
-2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20799
-	* testsuite/gas/i386/opcode.s: Add a test for EVEX vpextrw.
-	* testsuite/gas/i386/opcode-intel.d: Updated.
-	* testsuite/gas/i386/opcode-suffix.d: Likewise.
-	* testsuite/gas/i386/opcode.d: Likewise.
-	* testsuite/gas/i386/x86-64-avx512bw-opts.s: Remove vpextrw
-	tests.
-	* testsuite/gas/i386/x86-64-avx512bw-opts-intel.d: Updated.
-	* testsuite/gas/i386/x86-64-avx512bw-opts.d: Likewise.
-
-2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20754
-	* testsuite/gas/i386/opcode-suffix.d: Updated.
-
-2016-11-07  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20775
-	* testsuite/gas/i386/i386.exp: Run fpu-bad.
-	* testsuite/gas/i386/fpu-bad.d: New file.
-	* testsuite/gas/i386/fpu-bad.s: Likewise.
-
-2016-11-04  Nathan Sidwell  <nathan@acm.org>
-
-	gas/
-	* input-scrub.c (partial_size): Make size_t.
-	(buffer_length): Likewise.  Adjust meaning.
-	(struct input_save): Adjust partial_size type.
-	(input_scrub_reinit): New.
-	(input_scrub_push, input_scrub_begin): Use it.
-	(input_scrub_next_buffer): Fix buffer extension logic. Only scan
-	newly read buffer for newline.
-
-2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (find_opcode_match): Use insert function to
-	validate matching address type operands.
-	* testsuite/gas/arc/nps400-10.d: New file.
-	* testsuite/gas/arc/nps400-10.s: New file.
-
-2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (cortex-m33): Declare new processor.
-	* doc/c-arm.texi (-mcpu ARM command line option): Document new
-	Cortex-M33 processor.
-	* NEWS: Mention ARM Cortex-M33 support.
-
-2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (cortex-m23): Declare new processor.
-	* doc/c-arm.texi (-mcpu ARM command line option): Document new
-	Cortex-M23 processor.
-	* NEWS: Mention ARM Cortex-M23 support.
-
-2016-11-04  Palmer Dabbelt  <palmer@dabbelt.com>
-	    Andrew Waterman <andrew@sifive.com>
-
-	* Makefile.am (CPU_DOCS): Add c-riscv.texi.
-	* Makefile.in: Regenerate.
-	* doc/all.texi: Set RISCV.
-	* doc/as.texinfo: Add RISCV options.
-	Add RISC-V-Dependent node.
-	Include c-riscv.texi.
-	* doc/c-riscv.texi: Rename RISC-V Options to RISC-V-Opts.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* testsuite/gas/arc/nps400-6.s: Change ldbit tests so that limm
-	operands are out of the range of an s9, in order to fix the test.
-	* testsuite/gas/arc/nps400-6.d: Updated to match new expected output.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* testsuite/gas/arc/nps-400-9.d: Added.
-	* testsuite/gas/arc/nps-400-9.s: Added.
-
-2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (struct arc_insn): Change type of insn field.
-	(md_number_to_chars_midend): Support 6- and 8-byte values.
-	(emit_insn0): Update debug output.
-	(find_opcode_match): Likewise.
-	(build_fake_opcode_hash_entry): Delete.
-	(find_special_case_long_opcode): Delete.
-	(find_special_case): Remove long format special case handling.
-	(insert_operand): Change instruction type and update debug print
-	format.
-	(assemble_insn): Change instruction type, update debug print
-	formats, and remove unneeded assert.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* config/tc-arc.c (assemble_insn): Replace use of ARC_SHORT with
-	arc_opcode_len.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* config/tc-arc.c (struct arc_insn): Replace short_insn flag with
-	len field.
-	(apply_fixups): Update to use len field.
-	(emit_insn0): Simplify code, making use of len field.
-	(md_convert_frag): Update to use len field.
-	(assemble_insn): Update to use len field.
-
-2016-11-03  Siddhesh Poyarekar  <siddhesh.poyarekar@linaro.org>
-
-	* config/tc-aarch64.c (aarch64_cpus): Add falkor.
-	* config/tc-arm.c (arm_cpus): Likewise.
-	* doc/c-aarch64.texi: Likewise.
-	* doc/c-arm.texi: Likewise.
-
-2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20754
-	* testsuite/gas/i386/opcode.s: Add tests for opcode 0x82.
-	* testsuite/gas/i386/opcode-intel.d: Updated.
-	* testsuite/gas/i386/opcode.d: Likewise.
-
-2016-11-02  Jiong Wang  <jiong.wang@arm.com>
-
-	* config/tc-arm.c (SBIT_SHIFT): New.
-	(T2_SBIT_SHIFT): Likewise.
-	(t32_insn_ok): Return TRUE for MOV in ARMv8-M Baseline.
-	(md_apply_fix): Try UINT16 encoding when ARM/Thumb modified immediate
-	encoding failed.
-	* testsuite/gas/arm/archv6t2-bad.s: New error case.
-	* testsuite/gas/arm/archv6t2-bad.l: New error match.
-	* testsuite/gas/arm/archv6t2.s: New testcase.
-	* testsuite/gas/arm/archv6t2.d: New expected result.
-	* testsuite/gas/arm/archv8m.s: New testcase.
-	* testsuite/gas/arm/archv8m-base.d: New expected result.
-	* testsuite/gas/arm/archv8m-main.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
-
-2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
-
-	* config/tc-i386.c: (cpu_arch) Add .avx512_4vnniw.
-	(cpu_noarch): Add noavx512_4vnniw.
-	* doc/c-i386.texi: Document avx512_4vnniw, noavx512_4vnniw.
-	* testsuite/gas/i386/i386.exp: Run AVX512_4VNNIW tests.
-	* testsuite/gas/i386/avx512_4vnniwd_vl-intel.d: New test.
-	* testsuite/gas/i386/avx512_4vnniwd_vl.d: Ditto.
-	* testsuite/gas/i386/avx512_4vnniwd_vl.s: Ditto.
-	* testsuite/gas/i386/avx512_4vnniwd-intel.d: Ditto.
-	* testsuite/gas/i386/avx512_4vnniwd.d: Ditto.
-	* testsuite/gas/i386/avx512_4vnniwd.s: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl-intel.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.s: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4vnniwd-intel.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4vnniwd.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4vnniwd.s: Ditto.
-
-2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
-
-	* config/tc-i386.c (cpu_arch): Add .avx512_4fmaps.
-	(cpu_noarch): Add noavx512_4fmaps.
-	(process_operands): Handle implicit quad group.
-	* doc/c-i386.texi: Document avx512_4fmaps, noavx512_4fmaps.
-	* testsuite/gas/i386/i386.exp: Add AVX512_4FMAPS tests.
-	* testsuite/gas/i386/avx512_4fmaps_vl-intel.d: New test.
-	* testsuite/gas/i386/avx512_4fmaps_vl.d: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps_vl.s: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps-intel.d: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps.d: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps.s: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps-warn.l: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps-warn.s: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps_vl-warn.l: Ditto.
-	* testsuite/gas/i386/avx512_4fmaps_vl-warn.s: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps.d: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l: Ditto.
-	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s: Ditto.
-
-2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
-	    Andrew Waterman <andrew@sifive.com>
-
-	Add support for RISC-V architecture.
-	* Makefile.am: Add riscv files.
-	* Makefile.in: Regenerate.
-	* NEWS: Mention the support for this architecture.
-	* configure.in: Define a default architecture.
-	* configure: Regenerate.
-	* configure.tgt: Add entries for riscv.
-	* doc/as.texinfo: Likewise.
-	* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
-	* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
-	* config/tc-riscv.c: New file.
-	* config/tc-riscv.h: New file.
-	* doc/c-riscv.texi: New file.
-	* testsuite/gas/riscv: New directory.
-	* testsuite/gas/riscv/riscv.exp: New file.
-	* testsuite/gas/riscv/t_insns.d: New file.
-	* testsuite/gas/riscv/t_insns.s: New file.
-
-2016-10-27  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (arc_target): Delete.
-	(arc_target_name): Delete.
-	(arc_features): Delete.
-	(arc_mach_type): Delete.
-	(mach_type_specified_p): Delete.
-	(enum mach_selection_type): New enum.
-	(mach_selection_mode): New static global.
-	(selected_cpu): New static global.
-	(arc_eflag): Rename to ...
-	(arc_initial_eflag): ...this, and make const.
-	(arc_select_cpu): Update comment, new parameter, check how
-	previous machine type selection was made, and record this
-	selection.  Use selected_cpu instead of old globals.
-	(arc_option): Remove use of arc_get_mach, instead use
-	arc_select_cpu to validate machine type selection.  Use
-	selected_cpu over old globals.
-	(allocate_tok): Use selected_cpu over old globals.
-	(find_opcode_match): Likewise.
-	(assemble_tokens): Likewise.
-	(arc_cons_fix_new): Likewise.
-	(arc_extinsn): Likewise.
-	(arc_extcorereg): Likewise.
-	(md_begin): Update default machine type selection, use
-	selected_cpu over old globals.
-	(md_parse_option): Update machine type selection option handling,
-	use selected_cpu over old globals.
-	* testsuite/gas/arc/nps400-0.s: Add .cpu directive.
-
-2016-10-26  Alan Modra  <amodra@gmail.com>
-
-	Revert 2016-10-06  Alan Modra  <amodra@gmail.com>
-	* config/rl78-parse.y: Do use old %name-prefix syntax.
-	* config/rx-parse.y: Likewise.
-
-2016-10-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (cpu_arch): Remove .pcommit.
-	* doc/c-i386.texi: Likewise.
-	* testsuite/gas/i386/i386.exp: Remove pcommit tests.
-	* testsuite/gas/i386/pcommit-intel.d: Removed.
-	* testsuite/gas/i386/pcommit.d: Likewise.
-	* testsuite/gas/i386/pcommit.s: Likewise.
-	* testsuite/gas/i386/x86-64-pcommit-intel.d: Likewise.
-	* testsuite/gas/i386/x86-64-pcommit.d: Likewise.
-	* testsuite/gas/i386/x86-64-pcommit.s: Likewise.
-
-2016-10-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutis/20705
-	* testsuite/gas/i386/i386.exp: Run x86-64-opcode-bad.
-	* testsuite/gas/i386/x86-64-opcode-bad.d: New file.
-	* testsuite/gas/i386/x86-64-opcode-bad.s: Likewise.
-
-2016-10-19  Renlin Li  <renlin.li@arm.com>
-
-	* config/tc-arm.c (encode_arm_shift): Generate unpredictable warning
-	for register-shifted register instructions.
-	* testsuite/gas/arm/shift-bad-pc.d: New.
-	* testsuite/gas/arm/shift-bad-pc.l: New.
-	* testsuite/gas/arm/shift-bad-pc.s: New.
-
-2016-10-17  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/arc/dis-inv.d: Fixed matching.
-
-2016-10-17  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/arc/dis-inv.s: Test to validate patch.
-	* testsuite/arc/dis-inv.d: Likewise.
-
-2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/shortlimm_a7.d: New file.
-	* testsuite/gas/arc/shortlimm_a7.s: Likewise.
-	* testsuite/gas/arc/shortlimm_hs.d: Likewise.
-	* testsuite/gas/arc/shortlimm_hs.s: Likewise.
-
-2016-10-11  Nick Clifton  <nickc@redhat.com>
-
-	* gas/arm/tls.d: Adjust output to match change in objdump.
-
-2016-10-11  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20666
-	* testsuite/gas/aarch64/alias-2.d: Update expected results.
-
-2016-10-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* testsuite/gas/cfi/cfi-common-1.d: Adjust regexps for mips64.
-	* testsuite/gas/cfi/cfi-common-2.d: Likewise.
-	* testsuite/gas/cfi/cfi-common-3.d: Likewise.
-	* testsuite/gas/cfi/cfi-common-4.d: Likewise.
-	* testsuite/gas/cfi/cfi-common-5.d: Likewise.
-	* testsuite/gas/cfi/cfi-common-7.d: Likewise.
-	* testsuite/gas/cfi/cfi-common-8.d: Likewise.
-	* testsuite/gas/cfi/cfi-common-9.d: Likewise.
-	* testsuite/gas/cfi/cfi-mips-1.d: Likewise.
-
-2016-10-08  Alan Modra  <amodra@gmail.com>
-
-	* Makefile.am (EXTRA_as_new_SOURCES): Add config/rl78-parse.y and
-	config/rx-parse.y.  Move config/bfin-parse.y.
-	(bfin-parse.@OBJEXT@, rl78-parse.@OBJEXT@, rx-parse.@OBJEXT@): Delete.
-	($(srcdir)/config/rl78-defs.h): New rule.
-	* Makefile.in: Regenerate.
-
-2016-10-07  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20667
-	* testsuite/gas/aarch64/sys-rt-reg.s: Test source for instructions using
-	SYS_Rt reg.
-	* testsuite/gas/aarch64/sys-rt-reg.d: New testcase.
-
-2016-10-06  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/leave_enter.d: New file.
-	* testsuite/gas/arc/leave_enter.s: Likewise.
-	* testsuite/gas/arc/regnames.d: Likewise.
-	* testsuite/gas/arc/regnames.s: Likewise.
-	* config/tc-arc.c (arc_parse_name): Don't match reg names against
-	confirmed symbol names.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* app.c (do_scrub_chars): Move fall through comment.
-	* expr.c (operand): Likewise.
-
-2016-10-06  Matthew Fortune  <matthew.fortune@imgtec.com>
-
-	PR gas/20648
-	* dw2gencfi.c (dot_cfi_sections): Refine the check for
-	inconsistent .cfi_sections to only consider compact vs non
-	compact forms.
-	* testsuite/gas/cfi/cfi-common-9.d: New file.
-	* testsuite/gas/cfi/cfi-common-9.s: New file.
-	* testsuite/gas/cfi/cfi.exp: Run new test.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* app.c: Add missing fall through comments.
-	* dw2gencfi.c: Likewise.
-	* expr.c: Likewise.
-	* config/tc-alpha.c: Likewise.
-	* config/tc-arc.c: Likewise.
-	* config/tc-arm.c: Likewise.
-	* config/tc-cr16.c: Likewise.
-	* config/tc-crx.c: Likewise.
-	* config/tc-dlx.c: Likewise.
-	* config/tc-h8300.c: Likewise.
-	* config/tc-hppa.c: Likewise.
-	* config/tc-i370.c: Likewise.
-	* config/tc-i386.c: Likewise.
-	* config/tc-i960.c: Likewise.
-	* config/tc-ia64.c: Likewise.
-	* config/tc-m68hc11.c: Likewise.
-	* config/tc-m68k.c: Likewise.
-	* config/tc-mep.c: Likewise.
-	* config/tc-metag.c: Likewise.
-	* config/tc-microblaze.c: Likewise.
-	* config/tc-mips.c: Likewise.
-	* config/tc-ns32k.c: Likewise.
-	* config/tc-rx.c: Likewise.
-	* config/tc-score.c: Likewise.
-	* config/tc-score7.c: Likewise.
-	* config/tc-sh.c: Likewise.
-	* config/tc-tic4x.c: Likewise.
-	* config/tc-vax.c: Likewise.
-	* config/tc-xstormy16.c: Likewise.
-	* config/tc-z80.c: Likewise.
-	* config/tc-z8k.c: Likewise.
-	* config/obj-elf.c: Likewise.
-	* config/tc-i386.c: Likewise.
-	* depend.c: Spell fall through comments consistently.
-	* config/tc-arm.c: Likewise.
-	* config/tc-d10v.c: Likewise.
-	* config/tc-i960.c: Likewise.
-	* config/tc-ia64.c: Likewise.
-	* config/tc-m68k.c: Likewise.
-	* config/tc-mcore.c: Likewise.
-	* config/tc-mep.c: Likewise.
-	* config/tc-ns32k.c: Likewise.
-	* config/tc-visium.c: Likewise.
-	* config/tc-xstormy16.c: Likewise.
-	* config/tc-z8k.c: Likewise.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* as.h (as_assert): Add ATTRIBUTE_NORETURN.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-arc.c (find_opcode_match): Add missing break.
-	* config/tc-i960.c (get_cdisp): Likewise.
-	* config/tc-metag.c (parse_swap, md_apply_fix): Likewise.
-	* config/tc-mt.c (md_parse_option): Likewise.
-	* config/tc-nds32.c (nds32_apply_fix): Likewise.
-	* config/tc-hppa.c (pa_ip): Assert rather than testing last
-	condition of multiple if statements.
-	* config/tc-s390.c (s390_exp_compare): Return 0 on error.
-	* config/tc-tic4x.c (tic4x_operand_parse): Add as_bad and break
-	out of case rather than falling into next case.  Formatting.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* config/rl78-parse.y: Don't use deprecated %name-prefix.
-	* config/rx-parse.y: Likewise.
-
-2016-09-29  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20553
-	* testsuite/gas/aarch64/advsimd-fp16.s (indexed_elem): New high index
-	testcases for H and S variants.  New low index testcases for D variant.
-	* testsuite/gas/aarch64/advsimd-fp16.d: Update expected results.
-
-2016-09-29  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-ppc.c (md_assemble): Handle PPC_OPERAND_OPTIONAL32.
-	* testsuite/gas/ppc/power8.s: Provide tbegin. operand.
-	* testsuite/gas/ppc/power9.d: Update cmprb disassembly.
-
-2016-09-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-xtensa.c (xg_reverse_shift_count): Pass cnt_arg instead of
-	cnt_argp to concat.
-
-2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
-
-	* Makefile.in: Regenerate.
-	* configure: Likewise.
-	* doc/Makefile.in: Likewise.
-
-2016-09-26  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-ppc.c (ppc_elf_gnu_attribute): New function.
-	(md_pseudo_table <ELF>): Handle "gnu_attribute".
-
-2016-09-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (v7m_psrs): Remove BASEPRI_MASK MRS/MSR special
-	register and redundant basepri_max.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (print_operands): Print spaces between
-	operands.
-	* testsuite/gas/aarch64/ilp32-basic.d: Expect spaces after ","
-	in addresses.
-	* testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise.
-	* testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise.
-	* testsuite/gas/aarch64/ldst-reg-pair.d: Likewise.
-	* testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise.
-	* testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise.
-	* testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
-	* testsuite/gas/aarch64/reloc-insn.d: Likewise.
-	* testsuite/gas/aarch64/sve.d: Likewise.
-	* testsuite/gas/aarch64/symbol.d: Likewise.
-	* testsuite/gas/aarch64/system.d: Likewise.
-	* testsuite/gas/aarch64/tls-desc.d: Likewise.
-	* testsuite/gas/aarch64/sve-invalid.l: Expect spaces after ","
-	in suggested alternatives.
-	* testsuite/gas/aarch64/verbose-error.l: Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (output_operand_error_record): Use "must be"
-	rather than "should be" or "expected to be" in error messages.
-	(parse_operands): Likewise.
-	* testsuite/gas/aarch64/diagnostic.l: Likewise.
-	* testsuite/gas/aarch64/legacy_reg_names.l: Likewise.
-	* testsuite/gas/aarch64/sve-invalid.l: Likewise.
-	* testsuite/gas/aarch64/sve-reg-diagnostic.l: Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (opcode_lookup): Search for the end of
-	a condition name, rather than assuming that it will have exactly
-	2 characters.
-	(parse_operands): Likewise.
-	* testsuite/gas/aarch64/alias.d: Add new condition-code comments
-	to the expected output.
-	* testsuite/gas/aarch64/beq_1.d: Likewise.
-	* testsuite/gas/aarch64/float-fp16.d: Likewise.
-	* testsuite/gas/aarch64/int-insns.d: Likewise.
-	* testsuite/gas/aarch64/no-aliases.d: Likewise.
-	* testsuite/gas/aarch64/programmer-friendly.d: Likewise.
-	* testsuite/gas/aarch64/reloc-insn.d: Likewise.
-	* testsuite/gas/aarch64/b_c_1.d, testsuite/gas/aarch64/b_c_1.s:
-	New test.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* testsuite/gas/aarch64/diagnostic.s,
-	testsuite/gas/aarch64/diagnostic.l: Add tests for
-	invalid uses of MUL VL and MUL in base AArch64 instructions.
-	* testsuite/gas/aarch64/sve-add.s, testsuite/gas/aarch64/sve-add.d,
-	testsuite/gas/aarch64/sve-dup.s, testsuite/gas/aarch64/sve-dup.d,
-	testsuite/gas/aarch64/sve-invalid.s,
-	testsuite/gas/aarch64/sve-invalid.d,
-	testsuite/gas/aarch64/sve-invalid.l,
-	testsuite/gas/aarch64/sve-reg-diagnostic.s,
-	testsuite/gas/aarch64/sve-reg-diagnostic.d,
-	testsuite/gas/aarch64/sve-reg-diagnostic.l,
-	testsuite/gas/aarch64/sve.s, testsuite/gas/aarch64/sve.d: New tests.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* doc/c-aarch64.texi: Document the "sve" feature.
-	* config/tc-aarch64.c (REG_TYPE_R_Z_BHSDQ_VZP): New register type.
-	(get_reg_expected_msg): Handle it.
-	(parse_operands): When parsing operands of an SVE instruction,
-	disallow immediates that match REG_TYPE_R_Z_BHSDQ_VZP.
-	(aarch64_features): Add an entry for SVE.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_operands): Handle the new SVE core
-	and FP register operands.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (double_precision_operand_p): New function.
-	(parse_operands): Use it to calculate the dp_p input to
-	parse_aarch64_imm_float.  Handle the new SVE FP immediate operands.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_operands): Handle the new SVE integer
-	immediate operands.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (SHIFTED_NONE, SHIFTED_MUL_VL): New
-	parse_shift_modes.
-	(parse_shift): Handle SHIFTED_MUL_VL.
-	(parse_address_main): Add an imm_shift_mode parameter.
-	(parse_address, parse_sve_address): Update accordingly.
-	(parse_operands): Handle MUL VL addressing modes.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (REG_TYPE_SVE_BASE, REG_TYPE_SVE_OFFSET): New
-	register types.
-	(get_reg_expected_msg): Handle them.
-	(aarch64_addr_reg_parse): New function, split out from
-	aarch64_reg_parse_32_64.  Handle Z registers too.
-	(aarch64_reg_parse_32_64): Call it.
-	(parse_address_main): Add base_qualifier, offset_qualifier,
-	base_type and offset_type parameters.  Handle SVE base and offset
-	registers.
-	(parse_address): Update call to parse_address_main.
-	(parse_sve_address): New function.
-	(parse_operands): Parse the new SVE address operands.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (SHIFTED_MUL): New parse_shift_mode.
-	(parse_shift): Handle it.  Reject AARCH64_MOD_MUL for all other
-	shift modes.  Skip range tests for AARCH64_MOD_MUL.
-	(process_omitted_operand): Handle AARCH64_OPND_SVE_PATTERN_SCALED.
-	(parse_operands): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_enum_string): New function.
-	(po_enum_or_fail): New macro.
-	(parse_operands): Handle AARCH64_OPND_SVE_PATTERN and
-	AARCH64_OPND_SVE_PRFOP.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (vector_el_type): Add NT_zero and NT_merge.
-	(parse_vector_type_for_operand): Assert that the skipped character
-	is a '.'.
-	(parse_predication_for_operand): New function.
-	(parse_typed_reg): Parse /z and /m suffixes for predicate registers.
-	(vectype_to_qualifier): Handle NT_zero and NT_merge.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (NTA_HASVARWIDTH): New macro.
-	(AARCH64_REG_TYPES): Add ZN and PN.
-	(get_reg_expected_msg): Handle them.
-	(parse_vector_type_for_operand): Add a reg_type parameter.
-	Skip the width for Zn and Pn registers.
-	(parse_typed_reg): Extend vector handling to Zn and Pn.  Update the
-	call to parse_vector_type_for_operand.  Set HASVARTYPE for Zn and Pn,
-	expecting the width to be 0.
-	(parse_vector_reg_list): Restrict error about [BHSD]nn operands to
-	REG_TYPE_VN.
-	(vectype_to_qualifier): Use S_[BHSD] qualifiers for NTA_HASVARWIDTH.
-	(parse_operands): Handle the new Zn and Pn operands.
-	(REGSET16): New macro, split out from...
-	(REGSET31): ...here.
-	(reg_names): Add Zn and Pn entries.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (output_operand_error_record): Handle
-	AARCH64_OPDE_UNTIED_OPERAND.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (find_best_match): Simplify, allowing an
-	instruction with all-NIL qualifiers to fail to match.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_address_main): Remove reloc and
-	accept_reg_post_index parameters.  Parse relocations and register
-	post indexes unconditionally.
-	(parse_address): Remove accept_reg_post_index parameter.
-	Update call to parse_address_main.
-	(parse_address_reloc): Delete.
-	(parse_operands): Call parse_address instead of parse_address_main.
-	Update existing callers of parse_address and make them check
-	inst.reloc.type where appropriate.
-	* testsuite/gas/aarch64/diagnostic.s: Add tests for relocations
-	in ADDR_SIMPLE, SIMD_ADDR_SIMPLE, ADDR_SIMM7 and ADDR_SIMM9 addresses.
-	Also test for invalid uses of post-index register addressing.
-	* testsuite/gas/aarch64/diagnostic.l: Update accordingly.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (REG_TYPE_R_Z, REG_TYPE_R_SP): New register
-	types.
-	(get_reg_expected_msg): Handle them and REG_TYPE_R64_SP.
-	(aarch64_check_reg_type): Simplify.
-	(aarch64_reg_parse_32_64): Return the reg_entry instead of the
-	register number.  Return the type as a qualifier rather than an
-	"isreg32" boolean.  Remove reject_sp, reject_rz and isregzero
-	parameters.
-	(parse_shifter_operand): Update call to aarch64_parse_32_64_reg.
-	Use get_reg_expected_msg.
-	(parse_address_main): Likewise.  Use aarch64_check_reg_type.
-	(po_int_reg_or_fail): Replace reject_sp and reject_rz parameters
-	with a reg_type parameter.  Update call to aarch64_parse_32_64_reg.
-	Use aarch64_check_reg_type to test the result.
-	(parse_operands): Update after the above changes.  Parse ADDR_SIMPLE
-	addresses normally before enforcing the syntax restrictions.
-	* testsuite/gas/aarch64/diagnostic.s: Add tests for a post-index
-	zero register and for a stack pointer index.
-	* testsuite/gas/aarch64/diagnostic.l: Update accordingly.
-	Also update existing diagnostic messages after the above changes.
-	* testsuite/gas/aarch64/illegal-lse.l: Update the error message
-	for 32-bit register bases.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_aarch64_imm_float): Remove range check.
-	(parse_operands): Check the range of 8-bit FP immediates here instead.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_aarch64_imm_float): Report a specific
-	low-severity error for registers.
-	(parse_operands): Report an invalid floating point constant for
-	if parsing an FPIMM8 fails, and if no better error has been
-	recorded.
-	* testsuite/gas/aarch64/diagnostic.s,
-	testsuite/gas/aarch64/diagnostic.l: Add tests for integer operands
-	to FMOV.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (aarch64_double_precision_fmovable): Rename
-	to...
-	(can_convert_double_to_float): ...this.  Accept any double-precision
-	value that converts to single precision without loss of precision.
-	(parse_aarch64_imm_float): Update accordingly.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_immediate_expression): Add a
-	reg_type parameter.
-	(parse_constant_immediate): Likewise, and update calls.
-	(parse_aarch64_imm_float): Likewise.
-	(parse_big_immediate): Likewise.
-	(po_imm_nc_or_fail): Update accordingly, passing down a new
-	imm_reg_type variable.
-	(po_imm_of_fail): Likewise.
-	(parse_operands): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_neon_reg_list): Rename to...
-	(parse_vector_reg_list): ...this and take a register type
-	as input.
-	(parse_operands): Update accordingly.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_neon_type_for_operand): Rename to...
-	(parse_vector_type_for_operand): ...this.
-	(parse_typed_reg): Update accordingly.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (neon_type_el): Rename to...
-	(vector_type_el): ...this.
-	(parse_neon_type_for_operand): Update accordingly.
-	(parse_typed_reg): Likewise.
-	(aarch64_reg_parse): Likewise.
-	(vectype_to_qualifier): Likewise.
-	(parse_operands): Likewise.
-	(eq_neon_type_el): Likewise.  Rename to...
-	(eq_vector_type_el): ...this.
-	(parse_neon_reg_list): Update accordingly.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (neon_el_type: Rename to...
-	(vector_el_type): ...this.
-	(neon_type_el): Update accordingly.
-	(parse_neon_type_for_operand): Likewise.
-	(vectype_to_qualifier): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_neon_operand_type): Delete.
-	(parse_typed_reg): Call parse_neon_type_for_operand directly.
-
-2016-09-15  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/textinsnxop.d: New file.
-	* testsuite/gas/arc/textinsnxop.s: Likewise.
-
-2016-09-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run
-	dcti-couples-v9 only in ELF targets to avoid spurious failures in
-	sparc-aout and sparc-coff targets.
-
-2016-09-14  Peter Bergner <bergner@vnet.ibm.com>
-
-	* testsuite/gas/ppc/power9.d <slbiag, cpabort> New tests.
-	<addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
-	xor3, cp_abort, copy_first, paste, paste_last, sync>: Remove tests.
-	<copy, paste.>: Update tests.
-	* testsuite/gas/ppc/power9.s: Likewise.
-
-2016-09-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c (sparc_ip): Print the instruction arguments
-	in "architecture mismatch" error messages.
-
-2016-09-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c (md_assemble): Detect and warning on
-	unpredictable DCTI couples in certain arches.
-	(dcti_couples_detect): New global.
-	(md_longopts): Add command line option -dcti-couples-detect.
-	(md_show_usage): Document -dcti-couples-detect.
-	(md_parse_option): Handle OPTION_DCTI_COUPLES_DETECT.
-	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run
-	dcti-couples-v8, dcti-couples-v9 and dcti-couples-v9c tests.
-	* testsuite/gas/sparc/dcti-couples.s: New file.
-	* testsuite/gas/sparc/dcti-couples-v9c.d: Likewise.
-	* testsuite/gas/sparc/dcti-couples-v8.d: Likewise.
-	* testsuite/gas/sparc/dcti-couples-v9.d: Likewise.
-	* testsuite/gas/sparc/dcti-couples-v9c.l: Likewise.
-	* testsuite/gas/sparc/dcti-couples-v8.l: Likewise.
-	* doc/as.texinfo (Overview): Document --dcti-couples-detect.
-	* doc/c-sparc.texi (Sparc-Opts): Likewise.
-
-2016-09-14  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/tls-relocs2.d: New file.
-	* testsuite/gas/arc/tls-relocs2.s: Likewise.
-	* config/tc-arc.c (tokenize_arguments): Accept offsets when base
-	is used.
-
-2016-09-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* config/tc-s390.c (s390_parse_cpu): Support alternate arch
-	strings.
-	* doc/as.texinfo: Document new arch strings.
-	* doc/c-s390.texi: Likewise.
-
-2016-09-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* config/tc-s390.c: Set all facitily bits by default
-
-2016-09-12  Patrick Steuer  <steuer@linux.vnet.ibm.com>
-
-	* testsuite/gas/s390/zarch-z196.d: Adjust testcase.
-
-2016-09-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (i386_target_format): Allow PROCESSOR_IAMCU
-	for Intel MCU.
-
-2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (valid_iamcu_cpu_flags): Removed.
-	(set_cpu_arch): Updated.
-	(md_parse_option): Likewise.
-	* testsuite/gas/i386/i386.exp: Run iamcu-4 and iamcu-5.  Remove
-	iamcu-inval-2 and iamcu-inval-3.
-	* testsuite/gas/i386/iamcu-4.d: New file.
-	* testsuite/gas/i386/iamcu-4.s: Likewise.
-	* testsuite/gas/i386/iamcu-5.d: Likewise.
-	* testsuite/gas/i386/iamcu-5.s: Likewise.
-	* testsuite/gas/i386/iamcu-inval-2.l: Removed.
-	* testsuite/gas/i386/iamcu-inval-2.s: Likewise.
-	* testsuite/gas/i386/iamcu-inval-3.l: Likewise.
-	* testsuite/gas/i386/iamcu-inval-3.s: Likewise.
-
-2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
-
-	* config/tc-arm.c ((arm_cpus): Use ARM_ARCH_V8A_CRC for all
-	ARMv8-A CPUs except xgene1.
-
-2016-08-31  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-ppc.c (md_assemble): Set sh_flags for VLE.  Test
-	ppc_cpu rather than calling ppc_mach to determine VLE mode.
-	(ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
-
-2016-08-26  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* testsuite/gas/sparc/crypto.d: Rename invalid opcode camellia_fi
-	to camellia_fl.
-	* testsuite/gas/sparc/crypto.s: Likewise.
-
-2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (v7m_psrs): Add MSPLIM, PSPLIM, MSPLIM_NS,
-	PSPLIM_NS, PRIMASK_NS, BASEPRI_NS, FAULTMASK_NS, CONTROL_NS, SP_NS and
-	their lowecase counterpart special registers.  Write register
-	identifier in hex.
-	* testsuite/gas/arm/archv8m-cmse-msr.s: Reorganize tests per
-	operation, special register and then case.  Use different register for
-	each operation.  Add tests for new special registers.
-	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Adapt expected result
-	accordingly.
-	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
-
-2016-08-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
-	special registers.
-	* testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
-	registers.
-	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
-
-2016-08-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (cpu_arch): Add .ptwrite.
-	* doc/c-i386.texi: Document ptwrite and .ptwrite.
-	* testsuite/gas/i386/i386.exp: Run ptwrite, ptwrite-intel,
-	x86-64-ptwrite and x86-64-ptwrite-intel.
-	* testsuite/gas/i386/ptwrite-intel.d: New file.
-	* testsuite/gas/i386/ptwrite.d: Likewise.
-	* testsuite/gas/i386/ptwrite.s: Likewise.
-	* testsuite/gas/i386/x86-64-ptwrite-intel.d: Likewise.
-	* testsuite/gas/i386/x86-64-ptwrite.d: Likewise.
-	* testsuite/gas/i386/x86-64-ptwrite.s: Likewise.
-
-2016-08-19  Tamar Christina  <tamar.christina@arm.com>
-
-	* config/tc-arm.c (do_co_reg2c): Added constraint.
-	* testsuite/gas/arm/dest-unpredictable.s: New.
-	* testsuite/gas/arm/dest-unpredictable.l: New.
-	* testsuite/gas/arm/dest-unpredictable.d: New.
-
-2016-08-19  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Adjust expected
-	ordering of sections.
-	* testsuite/gas/i386/x86-64-unwind.d: Likewise.
-	* testsuite/gas/ia64/alias-ilp32.d: Likewise.
-	* testsuite/gas/ia64/alias.d: Likewise.
-	* testsuite/gas/ia64/group-1.d: Likewise.
-	* testsuite/gas/ia64/group-2.d: Likewise.
-	* testsuite/gas/ia64/secname-ilp32.d: Likewise.
-	* testsuite/gas/ia64/secname.d: Likewise.
-	* testsuite/gas/ia64/unwind-ilp32.d: Likewise.
-	* testsuite/gas/ia64/unwind.d: Likewise.
-	* testsuite/gas/ia64/xdata-ilp32.d: Likewise.
-	* testsuite/gas/ia64/xdata.d: Likewise.
-	* testsuite/gas/mmix/bspec-1.d: Likewise.
-	* testsuite/gas/mmix/bspec-2.d: Likewise.
-	* testsuite/gas/mmix/byte-1.d: Likewise.
-	* testsuite/gas/mmix/loc-1.d: Likewise.
-	* testsuite/gas/mmix/loc-2.d: Likewise.
-	* testsuite/gas/mmix/loc-3.d: Likewise.
-	* testsuite/gas/mmix/loc-4.d: Likewise.
-	* testsuite/gas/mmix/loc-5.d: Likewise.
-	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
-
-2016-08-11  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* config/tc-aarch64.c (parse_aarch64_imm_float): Reject -0.0.
-	* testsuite/gas/aarch64/illegal.s, testsuite/gas/aarch64/illegal.l:
-	Add tests for -0.0.  Add an end-of-file comment.
-
-2016-08-05  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/20429
-	* config/tc-arm.c (do_vfp_nsyn_push): Check that no more than 16
-	registers are pushed.
-	(do_vfp_nsyn_pop): Check that no more than 16 registers are
-	popped.
-	* testsuite/gas/arm/pr20429.s: New test.
-	* testsuite/gas/arm/pr20429.d: New test driver.
-	* testsuite/gas/arm/pr20429.1: Expected error output.
-
-	PR gas/20364
-	* config/tc-aarch64.c (s_ltorg): Change the mapping state after
-	aligning the frag.
-	(aarch64_init): Treat rs_align frags in code sections as
-	containing code, not data.
-	* testsuite/gas/aarch64/pr20364.s: New test.
-	* testsuite/gas/aarch64/pr20364.d: New test driver.
-
-2016-08-04  Stefan Trleman  <stefan.teleman@oracle.com>
-
-	PR gas/20427
-	* config/tc-sparc.c (cons_fix_new_sparc): Prevent the generation
-	of 64-bit relocation types when assembling for a 32-bit Solaris
-	target.
-
-2016-07-27  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* testsuite/gas/sparc/sparc.exp: Use is_elf_format to discriminate
-	ELF targets.
-	Run natural, natural-32, pr4587, ticc-imm-reg, v8-movwr-imm,
-	pause, save-args, cbcond, cfr, crypto edge, flush, hpcvis3, ima,
-	ld_st_fsr, ldtw_sttw, ldd_std, ldx_stx, ldx_efsr, mwait, mcdper,
-	sparc5vis4, xcrypto, v9branch1 and imm-plus-rreg only in ELF
-	targets.
-	(sparc_elf_setup): Delete.
-	* testsuite/gas/sparc/save-args.d: Fix a copy-paste typo in the
-	test's #name entry.
-
-2016-07-27  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag.
-	(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16)
-	(RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16)
-	(RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32)
-	(RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits.
-	(get_append_method): Also return APPEND_ADD_COMPACT for
-	microMIPS instructions.
-	(find_altered_mips16_opcode): Exclude macros from matching.
-	Factor code out...
-	(find_altered_opcode): ... to this new function.
-	(find_altered_micromips_opcode): New function.
-	(frag_branch_delay_slot_size): Likewise.
-	(append_insn): Handle microMIPS branch/jump compaction.
-	(macro_start): Likewise.
-	(relaxed_micromips_32bit_branch_length): Likewise.
-	(md_convert_frag): Likewise.
-	* testsuite/gas/mips/micromips.s: Add conditional explicit NOPs
-	for delay slot filling.
-	* testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for
-	delay slot filling.
-	* testsuite/gas/mips/micromips-size-1.s: Likewise.
-	* testsuite/gas/mips/micromips.l: Adjust line numbers.
-	* testsuite/gas/mips/micromips-warn.l: Likewise.
-	* testsuite/gas/mips/micromips-size-1.l: Likewise.
-	* testsuite/gas/mips/micromips.d: Adjust padding.
-	* testsuite/gas/mips/micromips-trap.d: Likewise.
-	* testsuite/gas/mips/micromips-insn32.d: Likewise.
-	* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
-	* testsuite/gas/mips/micromips@beq.d: Update patterns for
-	branch/jump compaction.
-	* testsuite/gas/mips/micromips@bge.d: Likewise.
-	* testsuite/gas/mips/micromips@bgeu.d: Likewise.
-	* testsuite/gas/mips/micromips@blt.d: Likewise.
-	* testsuite/gas/mips/micromips@bltu.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-4.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-5.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
-	* testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise.
-	* testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d:
-	Likewise.
-	* testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d:
-	Likewise.
-	* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
-	* testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise.
-	* testsuite/gas/mips/micromips@relax.d: Likewise.
-	* testsuite/gas/mips/micromips@relax-at.d: Likewise.
-	* testsuite/gas/mips/micromips@relax-swap3.d: Likewise.
-	* testsuite/gas/mips/branch-extern-2.d: Likewise.
-	* testsuite/gas/mips/branch-extern-4.d: Likewise.
-	* testsuite/gas/mips/branch-section-2.d: Likewise.
-	* testsuite/gas/mips/branch-section-4.d: Likewise.
-	* testsuite/gas/mips/branch-weak-2.d: Likewise.
-	* testsuite/gas/mips/branch-weak-5.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-addend.d:
-	Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
-	Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
-	Likewise.
-	* testsuite/gas/mips/micromips-compact.d: New test.
-	* testsuite/gas/mips/mips.exp: Run the new test.
-
-2016-07-27  Graham Markall  <graham.markall@embecosm.com>
-
-        * config/tc-arc.c: Add new global arc_addrtype_hash.
-        Define O_colon and O_addrtype.
-        (debug_exp): Add O_colon and O_addrtype.
-        (tokenize_arguments): Handle colon and address type
-        tokens.
-        (declare_addrtype): New function.
-        (md_begin): Initialise arc_addrtype_hash.
-        (arc_parse_name): Add lookup of address types.
-	(assemble_insn): Handle colons and address types by
-        ignoring them.
-        * testsuite/gas/arc/nps400-8.s: New file.
-        * testsuite/gas/arc/nps400-8.d: New file.
-        * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests.
-        * testsuite/gas/arc/nps400-8.d: Add expected PMU
-        instruction output.
-
-2016-07-26  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `insn32' flag.
-	(RELAX_MICROMIPS_INSN32): New macro.
-	(RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
-	(RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_RELAX32)
-	(RELAX_MICROMIPS_TOOFAR16, RELAX_MICROMIPS_MARK_TOOFAR16)
-	(RELAX_MICROMIPS_CLEAR_TOOFAR16, RELAX_MICROMIPS_TOOFAR32)
-	(RELAX_MICROMIPS_MARK_TOOFAR32, RELAX_MICROMIPS_CLEAR_TOOFAR32):
-	Shift bits.
-	(append_insn): Record `mips_opts.insn32' with relaxed microMIPS
-	branches.
-	(relaxed_micromips_32bit_branch_length): Handle the `insn32'
-	mode.
-	(md_convert_frag): Likewise.
-	* testsuite/gas/mips/micromips-branch-relax.s: Add `insn32'
-	conditionals.
-	* testsuite/gas/mips/micromips-branch-relax.l: Update line
-	numbers accordingly.
-	* testsuite/gas/mips/micromips-branch-relax-pic.l: Likewise.
-	* testsuite/gas/mips/micromips-branch-relax-insn32.d: New test.
-	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.d: New
-	test.
-	* testsuite/gas/mips/micromips-branch-relax-insn32.l: New
-	stderr output.
-	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.l: New
-	stderr output.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* configure: Regenerated.
-
-2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/dsp.d: New file.
-	* testsuite/gas/arc/dsp.s: Likewise.
-	* testsuite/gas/arc/fpu.d: Likewise.
-	* testsuite/gas/arc/fpu.s: Likewise.
-	* testsuite/gas/arc/ext2op.d: Add specific disassembler option.
-	* testsuite/gas/arc/ext3op.d: Likewise.
-	* testsuite/gas/arc/tdpfp.d: Likewise.
-	* testsuite/gas/arc/tfpuda.d: Likewise.
-
-2016-07-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_force_relocation): Remove
-	R_MIPS_PC26_S2 and R_MIPS_PC21_S2.
-
-2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
-	Adjust comments for BAL to JALX linker conversion.
-	(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
-	* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
-	expected.
-	* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
-	* testsuite/gas/mips/branch-local-4.d: New test.
-	* testsuite/gas/mips/branch-local-n32-4.d: New test.
-	* testsuite/gas/mips/branch-local-n64-4.d: New test.
-	* testsuite/gas/mips/branch-addend.d: New test.
-	* testsuite/gas/mips/branch-addend-n32.d: New test.
-	* testsuite/gas/mips/branch-addend-n64.d: New test.
-	* testsuite/gas/mips/branch-local-4.s: New test source.
-	* testsuite/gas/mips/branch-addend.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_force_relocation): Also retain branch
-	relocations against MIPS16 and microMIPS symbols.
-	(fix_bad_cross_mode_jump_p): New function.
-	(fix_bad_same_mode_jalx_p): Likewise.
-	(fix_bad_misaligned_jump_p): Likewise.
-	(fix_bad_cross_mode_branch_p): Likewise.
-	(fix_bad_misaligned_branch_p): Likewise.
-	(fix_validate_branch): Likewise.
-	(md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP>
-	<BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5,
-	etc.  Verify the ISA mode and alignment of the jump target.
-	<BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check
-	with a call to `fix_validate_branch'.
-	<BFD_RELOC_MIPS_26_PCREL_S2>: Likewise.
-	<BFD_RELOC_16_PCREL_S2>: Likewise.
-	<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
-	<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend.
-	Verify the ISA mode and alignment of the branch target.
-	(md_convert_frag): Verify the ISA mode and alignment of resolved
-	MIPS16 branch targets.
-	* testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction
-	branch targets with `.insn'.
-	* testsuite/gas/mips/branch-misc-5.s: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-5-64.d: Update
-	accordingly.
-	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-relax.s: Annotate
-	non-instruction branch target with `.insn'.
-	* testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets
-	with external symbols.
-	* testsuite/gas/mips/micromips-insn32.d: Update accordingly.
-	* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
-	* testsuite/gas/mips/micromips-trap.d: Likewise.
-	* testsuite/gas/mips/micromips.d: Likewise.
-	* testsuite/gas/mips/mips16.s: Annotate non-instruction branch
-	targets with `.insn'.
-	* testsuite/gas/mips/mips16.d: Update accordingly.
-	* testsuite/gas/mips/mips16-64.d: Likewise.
-	* testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction
-	branch target with `.insn'.
-	* testsuite/gas/mips/relax-swap3.s: Likewise.
-	* testsuite/gas/mips/branch-local-2.l: New list test.
-	* testsuite/gas/mips/branch-local-3.l: New list test.
-	* testsuite/gas/mips/branch-local-n32-2.l: New list test.
-	* testsuite/gas/mips/branch-local-n32-3.l: New list test.
-	* testsuite/gas/mips/branch-local-n64-2.l: New list test.
-	* testsuite/gas/mips/branch-local-n64-3.l: New list test.
-	* testsuite/gas/mips/unaligned-jump-1.l: New list test.
-	* testsuite/gas/mips/unaligned-jump-2.l: New list test.
-	* testsuite/gas/mips/unaligned-jump-3.d: New test.
-	* testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test.
-	* testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test.
-	* testsuite/gas/mips/unaligned-jump-mips16-3.d: New test.
-	* testsuite/gas/mips/unaligned-jump-micromips-1.l: New list
-	test.
-	* testsuite/gas/mips/unaligned-jump-micromips-2.l: New list
-	test.
-	* testsuite/gas/mips/unaligned-jump-micromips-3.d: New test.
-	* testsuite/gas/mips/unaligned-branch-1.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-2.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-3.d: New test.
-	* testsuite/gas/mips/unaligned-branch-r6-1.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-r6-2.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-r6-3.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-r6-4.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-r6-5.d: New test.
-	* testsuite/gas/mips/unaligned-branch-r6-6.d: New test.
-	* testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test.
-	* testsuite/gas/mips/unaligned-branch-mips16-3.d: New test.
-	* testsuite/gas/mips/unaligned-branch-micromips-1.l: New list
-	test.
-	* testsuite/gas/mips/unaligned-branch-micromips-2.l: New list
-	test.
-	* testsuite/gas/mips/unaligned-branch-micromips-3.d: New test.
-	* testsuite/gas/mips/branch-local-2.s: New test source.
-	* testsuite/gas/mips/branch-local-3.s: New test source.
-	* testsuite/gas/mips/branch-local-n32-2.s: New test source.
-	* testsuite/gas/mips/branch-local-n32-3.s: New test source.
-	* testsuite/gas/mips/branch-local-n64-2.s: New test source.
-	* testsuite/gas/mips/branch-local-n64-3.s: New test source.
-	* testsuite/gas/mips/unaligned-jump-1.s: New test source.
-	* testsuite/gas/mips/unaligned-jump-2.s: New test source.
-	* testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source.
-	* testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source.
-	* testsuite/gas/mips/unaligned-jump-micromips-1.s: New test
-	source.
-	* testsuite/gas/mips/unaligned-jump-micromips-2.s: New test
-	source.
-	* testsuite/gas/mips/unaligned-branch-1.s: New test source.
-	* testsuite/gas/mips/unaligned-branch-2.s: New test source.
-	* testsuite/gas/mips/unaligned-branch-r6-1.s: New test source.
-	* testsuite/gas/mips/unaligned-branch-r6-2.s: New test source.
-	* testsuite/gas/mips/unaligned-branch-r6-3.s: New test source.
-	* testsuite/gas/mips/unaligned-branch-r6-4.s: New test source.
-	* testsuite/gas/mips/unaligned-branch-mips16-1.s: New test
-	source.
-	* testsuite/gas/mips/unaligned-branch-mips16-2.s: New test
-	source.
-	* testsuite/gas/mips/unaligned-branch-micromips-1.s: New test
-	source.
-	* testsuite/gas/mips/unaligned-branch-micromips-2.s: New test
-	source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-nds32.c (struct nds32_pseudo_opcode): Make pseudo_val
-	unsigned int.
-	(do_pseudo_b): Adjust.
-	(do_pseudo_bal): Likewise.
-	(do_pseudo_bge): Likewise.
-	(do_pseudo_bges): Likewise.
-	(do_pseudo_bgt): Likewise.
-	(do_pseudo_bgts): Likewise.
-	(do_pseudo_ble): Likewise.
-	(do_pseudo_bles): Likewise.
-	(do_pseudo_blt): Likewise.
-	(do_pseudo_blts): Likewise.
-	(do_pseudo_br): Likewise.
-	(do_pseudo_bral): Likewise.
-	(do_pseudo_la): Likewise.
-	(do_pseudo_li): Likewise.
-	(do_pseudo_ls_bhw): Likewise.
-	(do_pseudo_ls_bhwp): Likewise.
-	(do_pseudo_ls_bhwpc): Likewise.
-	(do_pseudo_ls_bhwi): Likewise.
-	(do_pseudo_move): Likewise.
-	(do_pseudo_neg): Likewise.
-	(do_pseudo_not): Likewise.
-	(do_pseudo_pushpopm): Likewise.
-	(do_pseudo_pushpop): Likewise.
-	(do_pseudo_v3push): Likewise.
-	(do_pseudo_v3pop): Likewise.
-	(do_pseudo_pushpop_stack): Likewise.
-	(do_pseudo_push_bhwd): Likewise.
-	(do_pseudo_pop_bhwd): Likewise.
-	(do_pseudo_pusha): Likewise.
-	(do_pseudo_pushi): Likewise.
-
-2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-sparc.c (struct pop_entry): Make the type of reloc
-	bfd_reloc_code_real_type.
-
-2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-sparc.c (pop_table): Remove sentinel.
-	(NUM_PERC_ENTRIES): Use ARRAY_SIZE on pop_table.
-	(md_begin): Adjust.
-
-2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-z8k.c (newfix): Make type of type argument
-	bfd_reloc_code_real_type.
-	(apply_fix): Likewise.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-epiphany.c: Don't include libbfd.h.
-	* config/tc-frv.c: Likewise.
-	* config/tc-ip2k.c: Likewise.
-	* config/tc-iq2000.c: Likewise.
-	* config/tc-m32c.c: Likewise.
-	* config/tc-mep.c: Likewise.
-	* config/tc-mt.c: Likewise.
-	* config/tc-nios2.c: Likewise.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* config/bfin-parse.y: Don't include libbfd.h.
-	* config/tc-bfin.c: Likewise.
-	* config/tc-rl78.c: Likewise.
-	* config/tc-rx.c: Likewise.
-	* config/tc-metag.c: Likewise.
-	(create_dspreg_htabs, create_scond_htab): Use gas_assert not BFD_ASSERT.
-	* Makefile.am: Update dependencies.
-	* Makefile.in: Regenerate.
-
-2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro.
-	(mips_force_relocation_abs): New prototype.
-	* config/tc-mips.c (mips_force_relocation_abs): New function.
-	* testsuite/gas/mips/branch-absolute.d: Adjust dump patterns.
-	* testsuite/gas/mips/mips16-branch-absolute.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
-	Likewise.
-	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
-	Likewise.
-	* testsuite/gas/mips/branch-absolute-addend.d: New test.
-	* testsuite/gas/mips/mips16-branch-absolute-addend.d: New test.
-	* testsuite/gas/mips/micromips-branch-absolute-addend.d: New
-	test.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1>
-	<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
-	<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the
-	addend calculated.
-	* testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit
-	in `bar', export `foo'.
-	* testsuite/gas/mips/mips16-branch-absolute.d: Adjust
-	accordingly.
-	* testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise.
-	* testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise.
-	* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d:
-	Likewise.
-	* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d:
-	Likewise.
-
-2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips16-branch-absolute.d: Update patterns.
-	* testsuite/gas/mips/branch-absolute.d: New test.
-	* testsuite/gas/mips/branch-absolute-n32.d: New test.
-	* testsuite/gas/mips/branch-absolute-n64.d: New test.
-	* testsuite/gas/mips/branch-absolute-addend-n32.d: New test.
-	* testsuite/gas/mips/branch-absolute-addend-n64.d: New test.
-	* testsuite/gas/mips/mips16-branch-absolute-n32.d: New test.
-	* testsuite/gas/mips/mips16-branch-absolute-n64.d: New test.
-	* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New
-	test.
-	* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New
-	test.
-	* testsuite/gas/mips/micromips-branch-absolute.d: New test.
-	* testsuite/gas/mips/micromips-branch-absolute-n32.d: New test.
-	* testsuite/gas/mips/micromips-branch-absolute-n64.d: New test.
-	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New
-	test.
-	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New
-	test.
-	* testsuite/gas/mips/branch-absolute.s: New test source.
-	* testsuite/gas/mips/branch-absolute-addend.s: New test source.
-	* testsuite/gas/mips/mips16-branch-absolute-addend.s: New test
-	source.
-	* testsuite/gas/mips/micromips-branch-absolute.s: New test
-	source.
-	* testsuite/gas/mips/micromips-branch-absolute-addend.s: New
-	test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-07-13  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/nal-1.d: New test.
-	* testsuite/gas/mips/mipsr6@nal-1.d: New test.
-	* testsuite/gas/mips/nal-2.d: New test.
-	* testsuite/gas/mips/mipsr6@nal-2.d: New test.
-	* testsuite/gas/mips/nal.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-07-12  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* testsuite/gas/sparc/ldtxa.s: New file.
-	* testsuite/gas/sparc/ldtxa.d: Likewise.
-	* testsuite/gas/sparc/sparc.exp: Execute the ldtxa test.
-
-2016-07-11  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (arc_reloc_op_tag): Allow complex ops for dtpoff.
-	(tc_gen_reloc): Remove passing DTPOFF base info into reloc addendum
-	as it is no longer needed.
-
-2016-07-08  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (append_insn): Remove extraneous
-	`install_insn' call.
-
-2016-07-04  Jan Beulich  <jbeulich@suse.com>
-
-	* config/tc-i386.c (check_qword_reg): Correct register kind
-	checked.
-	* testsuite/gas/i386/x86-64-suffix-bad.s: Add q-suffix with
-	16-bit register cases.
-	* testsuite/gas/i386/x86-64-suffix-bad.l: Adjust expectations.
-
-
-2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/ecoff@ld.d: Remove test.
-	* testsuite/gas/mips/ecoff@ld-forward.d: Remove test.
-	* testsuite/gas/mips/ecoff@ld-zero-3.d: Remove test.
-	* testsuite/gas/mips/ecoff@sd.d: Remove test.
-	* testsuite/gas/mips/ecoff@sd-forward.d: Remove test.
-	* testsuite/gas/mips/beq.d: Remove a.out and ECOFF support from
-	reloc patterns.
-	* testsuite/gas/mips/mipsr6@beq.d: Likewise.
-	* testsuite/gas/mips/bge.d: Likewise.
-	* testsuite/gas/mips/mipsr6@bge.d: Likewise.
-	* testsuite/gas/mips/bgeu.d: Likewise.
-	* testsuite/gas/mips/mipsr6@bgeu.d: Likewise.
-	* testsuite/gas/mips/blt.d: Likewise.
-	* testsuite/gas/mips/mipsr6@blt.d: Likewise.
-	* testsuite/gas/mips/bltu.d: Likewise.
-	* testsuite/gas/mips/mipsr6@bltu.d: Likewise.
-	* testsuite/gas/mips/branch-likely.d: Likewise.
-	* testsuite/gas/mips/la.d: Likewise.
-	* testsuite/gas/mips/lb.d: Likewise.
-	* testsuite/gas/mips/lifloat.d: Likewise.
-	* testsuite/gas/mips/sb.d: Likewise.
-	* testsuite/gas/mips/uld.d: Likewise.
-	* testsuite/gas/mips/ulh.d: Likewise.
-	* testsuite/gas/mips/ulw.d: Likewise.
-	* testsuite/gas/mips/usd.d: Likewise.
-	* testsuite/gas/mips/ush.d: Likewise.
-	* testsuite/gas/mips/usw.d: Likewise.
-
-2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/branch-misc-2.s: Move non
-	locally-defined-global symbol tests...
-	* testsuite/gas/mips/branch-misc-5.s: ... to this new test.
-	* testsuite/gas/mips/branch-misc-2.d: Update accordingly.
-	* testsuite/gas/mips/branch-misc-2-64.d: Likewise.
-	* testsuite/gas/mips/branch-misc-2pic.d: Likewise.
-	* testsuite/gas/mips/branch-misc-2pic-64.d: Likewise.
-	* testsuite/gas/mips/mipsr6@branch-misc-2-64.d: Likewise.
-	* testsuite/gas/mips/mipsr6@branch-misc-2pic-64.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-2.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-2-64.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-2pic.d: Likewise.
-	* testsuite/gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
-	* testsuite/gas/mips/branch-misc-5.d: New test.
-	* testsuite/gas/mips/branch-misc-5pic.d: New test.
-	* testsuite/gas/mips/branch-misc-5-64.d: New test.
-	* testsuite/gas/mips/branch-misc-5pic-64.d: New test.
-	* testsuite/gas/mips/mipsr6@branch-misc-5-64.d: New test.
-	* testsuite/gas/mips/mipsr6@branch-misc-5pic-64.d: New test.
-	* testsuite/gas/mips/micromips@branch-misc-5.d: New test.
-	* testsuite/gas/mips/micromips@branch-misc-5pic.d: New test.
-	* testsuite/gas/mips/micromips@branch-misc-5-64.d: New test.
-	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: New test.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/beq.s: Uncomment branches to undefined
-	symbols.
-	* testsuite/gas/mips/beq.d: Update accordingly.
-	* testsuite/gas/mips/mipsr6@beq.d: Likewise.
-	* testsuite/gas/mips/micromips@beq.d: Likewise.
-
-2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips.exp: Restrict 64-bit `branch-mips'
-	tests to NewABI targets.
-
-2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/mips.exp: Group `branch-misc' tests
-	together.
-
-2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* config/tc-aarch64.c (struct aarch64_option_cpu_value_table): Add
-	require field.
-	(aarch64_features): Initialize require fields.
-	(aarch64_parse_features): Handle dependencies.
-	(aarch64_feature_enable_set, aarch64_feature_disable_set): New.
-	(md_assemble): Use AARCH64_CPU_HAS_ALL_FEATURES.
-	* testsuite/gas/aarch64/illegal-nofp16.s: New.
-	* testsuite/gas/aarch64/illegal-nofp16.l: New.
-	* testsuite/gas/aarch64/illegal-nofp16.d: New.
-
-2016-07-01  Nick Clifton  <nickc@redhat.com>
-
-	* macro.c (macro_expand_body): Use a buffer big enough to hold an
-	extremely large integer.
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* testsuite/gas/i386/mpx-inval-2.l: Relax for COFF targets.
-
-2016-07-01  Tristan Gingold  <gingold@adacore.com>
-
-	* NEWS: Add marker for 2.27.
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* tc-i386.c (i386_index_check): Add special checks for bndmk,
-	bndldx, and bndstx.
-	* testsuite/gas/i386/mpx-inval-2.s: Add %rip and %eip relative
-	as well as scaling by other than 1 tests.
-	* testsuite/gas/i386/mpx-inval-2.l: Adjust accordingly.
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* tc-i386.c (md_assemble): Alter address size checking for MPX
-	instructions.
-	* testsuite/gas/i386/mpx-inval-2.s: New.
-	* testsuite/gas/i386/mpx-inval-2.l: New.
-	* testsuite/gas/i386/i386.exp: Run new test.
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	PR gas/20318
-	* config/tc-i386.c (match_template): Add char parameter,
-	consumed in Intel mode for an extra suffix check.
-	(md_assemble): New local variable mnem_suffix.
-	* testsuite/gas/i386/suffix-bad.s: New.
-	* testsuite/gas/i386/suffix-bad.l: New.
-	* testsuite/gas/i386/i386.exp: Run new test (twice).
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* testsuite/gas/i386/movz.s: New.
-	* testsuite/gas/i386/movz32.d: New.
-	* testsuite/gas/i386/movz64.d: New.
-	* testsuite/gas/i386/i386.exp: Run new tests.
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* config/tc-i386.c (struct _i386_insn): New field memop1_string.
-	(md_assemble): Free first memory operand string.
-	(i386_index_check): Use repprefixok to distingush xlat from
-	other (real) string ops.
-	(maybe_adjust_templates): New.
-	(i386_att_operand). Call it. Store first memory operand string.
-	* config/tc-i386-intel.c (i386_intel_operand): Likewise.
-	* testsuite/gas/i386/intel-movs.s: New.
-	* testsuite/gas/i386/intel-movs32.d: New.
-	* testsuite/gas/i386/intel-movs64.d: New.
-	* testsuite/gas/i386/i386.exp: Run new tests. Invoke as for
-	64-bits tests with "--defsym x86_64=1 --strip-local-absolute".
-
-2016-06-30  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (get_append_method): Fix a comment typo.
-
-2016-06-30  Matthew Fortune <Matthew.Fortune@imgtec.com>
-	    Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special
-	case MIPS16 handling.
-	* testsuite/gas/mips/branch-swap-3.d: New test.
-	* testsuite/gas/mips/branch-swap-4.d: New test.
-	* testsuite/gas/mips/mips16@branch-swap-3.d: New test.
-	* testsuite/gas/mips/mips16@branch-swap-4.d: New test.
-	* testsuite/gas/mips/micromips@branch-swap-3.d: New test.
-	* testsuite/gas/mips/micromips@branch-swap-4.d: New test.
-	* testsuite/gas/mips/branch-swap-3.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-06-30  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (append_insn): Simplify non-MIPS16 branch
-	swapping sequence.
-
-2016-06-30  Maciej W. Rozycki  <macro@imgtec.com>
-
-	PR gas/20312
-	* write.c (subsegs_finish_section): Force no section padding to
-	alignment on failed assembly, always set last frag's alignment
-	from section.
-	* testsuite/gas/all/pr20312.l: New list test.
-	* testsuite/gas/all/pr20312.s: New test source.
-	* testsuite/gas/all/gas.exp: Run the new test
-
-2016-06-30  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config.in (TARGET_WITH_CPU): Undefine.
-	* configure.ac: Add --with-cpu support, and define in config.h.
-	* configure: Regenerate.
-	* config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU.
-	* NEWS: Mention new configure option.
-
-2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* testsuite/gas/arm/armv8_2+rdma.d: New.
-
-2016-06-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* NEWS: Mention --enable-compressed-debug-sections=gas is the
-	default for Linux/x86 targets.
-	* configure.tgt (ac_default_compressed_debug_sections): Default
-	to yes for Linux/x86 targets.
-
-2016-06-29  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* write.c: Remove "libbfd.h" inclusion.
-
-2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/elf/elf.exp: Use `supports_gnu_unique' with the
-	`type' test.
-
-2016-06-28  Alan Modra  <amodra@gmail.com>
-
-	PR gas/20247
-	* testsuite/gas/elf/section11.s: Don't start directives in first column.
-
-2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* testsuite/gas/aarch64/diagnostic.s,
-	testsuite/gas/aarch64/diagnostic.l: Add tests for out-of-range indices.
-
-2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips16_reloc_p): Handle
-	BFD_RELOC_MIPS16_16_PCREL_S1.
-	(b_reloc_p): Likewise.
-	(limited_pcrel_reloc_p): Likewise.
-	(md_pcrel_from): Likewise.
-	(md_apply_fix): Likewise.
-	(tc_gen_reloc): Likewise.
-	(md_convert_frag): Likewise.
-	(mips_fix_adjustable): Update comment.
-	* testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
-	output, add dump patterns.
-	* testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
-	output, add dump patterns.
-	* testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
-	output, add dump patterns.
-	* testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
-	output, add dump patterns.
-	* testsuite/gas/mips/mips16-branch-absolute.d: Remove error
-	output, add dump patterns.
-	* testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
-	* testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
-	* testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
-	* testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
-	* testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
-	* testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
-	* testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
-	implicit instruction padding, avoid MIPS16 JR->JRC conversion.
-	* testsuite/gas/mips/branch-weak-6.d: New test.
-	* testsuite/gas/mips/branch-weak-7.d: New test.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-06-27  Vineet Gupta  <vgupta@synopsys.com>
-
-	* config//tc-arc.c (tc_arc_frame_initial_instructions): Use
-	cfi_add_CFA_def_cfa to generate default CFA with offset
-	* testsuite/gas/cfi/cfi-arc-1.d: Update expected output.
-
-2016-06-27  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/20247
-	* as.h (do_not_pad_sections_to_alignment): New global variable.
-	* as.c (show_usage): Add --no-pad-sections.
-	(parse_args): Likewise.
-	* write.c (size_seg): Skip padding the end of the section if
-	requested from the command line.
-	(SUB_SEGMENT_ALIGN): Likewise.
-	* doc/as.texinfo: Document the new option.
-	* NEWS: Mention the new feature.
-	* testsuite/gas/elf/section11.s: New test.
-	* testsuite/gas/elf/section11.d: New test driver.
-	* testsuite/gas/elf/elf.exp: Run the new test.
-
-2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-dlx.c: Include bfd/elf32-dlx.h.
-	* config/tc-dlx.h: Remove prototype of dlx_set_skip_hi16.
-
-2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-xtensa.c (xtensa_elf_suffix): Use ARRAY_SIZE instead of a
-	sentinal element.
-	(map_suffix_reloc_to_operator): Likewise.
-	(map_operator_to_reloc): Likewise.
-
-2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-nds32.c (md_begin): Use ARRAY_SIZE instead of a sentinal
-	element in relax_table.
-
-2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-aarch64.c: Make the type of reg_entry::type
-	aarch_reg_type.
-
-2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-bfin.c (bfin_cpus): Remove sentinal.
-	(md_parse_option): Adjust.
-	* config/tc-aarch64.c (aarch64_parse_abi): Replace use of a sentinal
-	with iteration from 0 to ARRAY_SIZE.
-	* config/tc-mcore.c (md_begin): Likewise.
-	* config/tc-visium.c (visium_parse_arch): Likewise.
-
-2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-tic54x.c (tic54x_set_default_include): remove argument
-							   and simplify accordingly.
-	(tic54x_include): Adjust.
-	(tic54x_mlib): Likewise.
-
-2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-xtensa.c (xtensa_make_property_section): Remove prototype.
-
-2016-06-24  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (append_insn): Use any `O_symbol' expression
-	unchanged with relaxed MIPS16 instructions.
-	(mips16_extended_frag): Adjust accordingly.  Return 1 right
-	away if a relocation will be required for the symbol requested.
-	Remove dead first relaxation pass code.
-	(mips_relax_frag): Pass `sec' down to `mips16_extended_frag'.
-	(md_convert_frag): Adjust symbol value calculation.  Raise an
-	error if a relocation is required for the symbol requested.
-	* testsuite/gas/mips/mips16@relax-swap3.d: Remove dump patterns,
-	add error output.
-	* testsuite/gas/mips/mips16@relax-swap3.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-relax-0.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-relax-1.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-relax-2.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-relax-3.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-0.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-1.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-2.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-3.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-4.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-5.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-6.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-7.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-addend-0.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-addend-1.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-addend-2.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-addend-3.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-absolute.d: New test.
-	* testsuite/gas/mips/mips16-branch-reloc-0.d: New test.
-	* testsuite/gas/mips/mips16-branch-reloc-1.d: New test.
-	* testsuite/gas/mips/mips16-branch-reloc-2.d: New test.
-	* testsuite/gas/mips/mips16-branch-reloc-3.d: New test.
-	* testsuite/gas/mips/mips16-branch-addend-0.d: New test.
-	* testsuite/gas/mips/mips16-branch-addend-1.d: New test.
-	* testsuite/gas/mips/mips16-branch-addend-2.d: New test.
-	* testsuite/gas/mips/mips16-branch-addend-3.d: New test.
-	* testsuite/gas/mips/mips16-branch-absolute.d: New test.
-	* testsuite/gas/mips/mips16-absolute-reloc-0.d: New test.
-	* testsuite/gas/mips/mips16-absolute-reloc-1.d: New test.
-	* testsuite/gas/mips/mips16-absolute-reloc-2.d: New test.
-	* testsuite/gas/mips/mips16-absolute-reloc-3.d: New test.
-	* testsuite/gas/mips/mips16-pcrel-reloc-2.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-reloc-3.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-reloc-6.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-reloc-7.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-addend-2.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-addend-3.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-absolute.l: New error output.
-	* testsuite/gas/mips/mips16-branch-reloc-2.l: New error output.
-	* testsuite/gas/mips/mips16-branch-reloc-3.l: New error output.
-	* testsuite/gas/mips/mips16-branch-addend-2.l: New error output.
-	* testsuite/gas/mips/mips16-branch-addend-3.l: New error output.
-	* testsuite/gas/mips/mips16-branch-absolute.l: New error output.
-	* testsuite/gas/mips/mips16-absolute-reloc-2.l: New error output.
-	* testsuite/gas/mips/mips16-absolute-reloc-3.l: New error output.
-	* testsuite/gas/mips/mips16-pcrel-relax-0.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-relax-2.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-0.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-1.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-2.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-3.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-4.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-5.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-6.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-reloc-7.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-addend-0.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-addend-1.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-addend-2.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-addend-3.s: New test source.
-	* testsuite/gas/mips/mips16-pcrel-absolute.s: New test source.
-	* testsuite/gas/mips/mips16-branch-reloc-0.s: New test source.
-	* testsuite/gas/mips/mips16-branch-reloc-1.s: New test source.
-	* testsuite/gas/mips/mips16-branch-reloc-2.s: New test source.
-	* testsuite/gas/mips/mips16-branch-reloc-3.s: New test source.
-	* testsuite/gas/mips/mips16-branch-addend-0.s: New test source.
-	* testsuite/gas/mips/mips16-branch-addend-1.s: New test source.
-	* testsuite/gas/mips/mips16-branch-addend-2.s: New test source.
-	* testsuite/gas/mips/mips16-branch-addend-3.s: New test source.
-	* testsuite/gas/mips/mips16-branch-absolute.s: New test source.
-	* testsuite/gas/mips/mips16-absolute-reloc-0.s: New test source.
-	* testsuite/gas/mips/mips16-absolute-reloc-1.s: New test source.
-	* testsuite/gas/mips/mips16-absolute-reloc-2.s: New test source.
-	* testsuite/gas/mips/mips16-absolute-reloc-3.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-06-24  Alan Modra  <amodra@gmail.com>
-
-	* configure.tgt (alpha-*-openbsd*): Use em=nbsd.
-
-2016-06-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (b_reloc_p): New function.
-	(mips_fix_adjustable): Also keep the original microMIPS symbol
-	referred from branch relocations.
-	* testsuite/gas/mips/branch-local-1.d: New test.
-	* testsuite/gas/mips/branch-local-n32-1.d: New test.
-	* testsuite/gas/mips/branch-local-n64-1.d: New test.
-	* testsuite/gas/mips/micromips@branch-misc-4-64.d: Update
-	relocations.
-	* testsuite/gas/mips/branch-local-1.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new cases.
-
-2016-06-23  Graham Markall  <graham.markall@embecosm.com>
-
-	* config/tc-arc.c (options, md_longopts, md_parse_option): Move
-	-mspfp, -mdpfp and -mfpuda out of the sections for dummy
-	options. Correct erroneous enabling of SPFP instructions when
-	using -mnps400.
-
-2016-06-22  Peter Bergner <bergner@vnet.ibm.com>
-
-	* testsuite/gas/ppc/power9.d <brd, brh, brw, mffs, mffs., mffsce,
-	mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl, nandxor, rldixor,
-	setbool, xor3>: New tests.
-	* testsuite/gas/ppc/power9.s: Likewise.
-
-2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-xtensa.c: Include elf/xtensa.h.
-
-2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (calculate_reloc) <BFD_RELOC_HI16_S_PCREL>
-	<BFD_RELOC_LO16_PCREL>: New switch cases.
-	(md_apply_fix) <BFD_RELOC_HI16_S_PCREL, BFD_RELOC_LO16_PCREL>:
-	Move switch cases along `BFD_RELOC_MIPS_JMP'.
-	<BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2>
-	<BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2>: Handle
-	the resolved case.
-	* testsuite/gas/mips/pcrel-reloc-4.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-4-r6.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-5.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-5-r6.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-6.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-6.l: New list test.
-	* testsuite/gas/mips/pcrel-reloc-4.s: New test source.
-	* testsuite/gas/mips/pcrel-reloc-6.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS_18_PCREL_S3>
-	<BFD_RELOC_MIPS_19_PCREL_S2>: Avoid null pointer dereferences
-	via `fixP->fx_addsy'.
-
-2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (md_pcrel_from) <BFD_RELOC_MIPS_18_PCREL_S3>:
-	Calculate relocation from the containing aligned doubleword.
-	(tc_gen_reloc) <BFD_RELOC_MIPS_18_PCREL_S3>: Calculate the
-	addend from the containing aligned doubleword.
-
-2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_force_relocation): Use `file_mips_opts'
-	rather than `mips_opts' for the R6 ISA check.
-	(mips_fix_adjustable): Likewise.
-	* testsuite/gas/mips/pcrel-reloc-1.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-1-r6.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-2.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-2-r6.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-3.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-3-r6.d: New test.
-	* testsuite/gas/mips/pcrel-reloc-1.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-06-21  Graham Markall  <graham.markall@embecosm.com>
-
-	* config/tc-arc.c (check_cpu_feature, md_parse_option):
-	Add nps400 option and feature. Add check for nps400
-	feature. Refactor existing checks to check subclass before
-	feature enablement.
-	(md_show_usage): Document flags for NPS-400 and add some other
-	undocumented flags.
-	(cpu_type): Remove nps400 CPU type entry
-	(check_zol): Remove bfd_mach_arc_nps400 case.
-	(md_show_usage): Add help on -mcpu=nps400.
-	(cpu_types): Add entry for nps400 as arc700 plus nps400 extension
-	set.
-	* doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
-	-fpuda flags.  Document -mcpu=nps400.
-	* testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
-	expected flags to match ARC700 instead of NPS400.
-	* testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
-	* testsuite/gas/arc/nps-400-2.d: Likewise.
-	* testsuite/gas/arc/nps-400-3.d: Likewise.
-	* testsuite/gas/arc/nps-400-4.d: Likewise.
-	* testsuite/gas/arc/nps-400-5.d: Likewise.
-	* testsuite/gas/arc/nps-400-6.d: Likewise.
-	* testsuite/gas/arc/nps-400-7.d: Likewise.
-	* testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
-	avoid clash with cbba instruction.
-	* testsuite/gas/arc/textinsn2op01.d: Likewise.
-	* testsuite/gas/arc/textinsn3op.d: Likewise.
-	* testsuite/gas/arc/textinsn3op.s: Likewise.
-	* testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
-	-mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.
-
-2016-06-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/gas/mips/r6-64-n32.d: Change the `name' tag.
-	* testsuite/gas/mips/r6-64-n64.d: Likewise.
-
-2016-06-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_fix_adjustable): Update comment on jump
-	reloc conversion.
-
-2016-06-20  Virendra Pathak  <virendra.pathak@broadcom.com>
-
-	* config/tc-aarch64.c (aarch64_cpus): Update vulcan feature set.
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper,
-	%hmcddfr and %hva_mask_nz.
-	(sparc_ip): New handling of asr/privileged/hyperprivileged
-	registers, adapted to the new form of the sparc opcodes table.
-	* testsuite/gas/sparc/rdasr.s: New file.
-	* testsuite/gas/sparc/rdasr.d: Likewise.
-	* testsuite/gas/sparc/wrasr.s: Likewise.
-	* testsuite/gas/sparc/wrasr.d: Likewise.
-	* testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and
-	wrasr tests.
-	* testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged
-	registers require it.
-	* testsuite/gas/sparc/wrpr.s: Complete to cover all privileged
-	registers and write instruction modalities.
-	* testsuite/gas/sparc/wrpr.d: Likewise.
-	* testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged
-	registers.
-	* testsuite/gas/sparc/rdhpr.d: Likewise.
-	* testsuite/gas/sparc/wrhpr.s: Likewise.
-	* testsuite/gas/sparc/wrhpr.d: Likewise.
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c (sparc_arch_table): adjust the GAS
-	architectures to use the right opcode architecture.
-	(sparc_md_end): Handle v9{c,d,e,v,m}.
-	(sparc_ip): Fix some comments.
-	* testsuite/gas/sparc/ldx_efsr.d: Fix the architecture of this
-	instruction, which is v9d.
-	* testsuite/gas/sparc/mwait.s: Remove the `rd %mwait,%g1'
-	instruction from the test, as %mwait is not readable.
-	* testsuite/gas/sparc/mwait.d: Likewise.
-	* testsuite/gas/sparc/mism-1.s: Expand to check v9b and v9e
-	mismatch architecture errors.
-	* testsuite/gas/sparc/mism-2.s: New file.
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c (priv_reg_table): Use NULL instead of the
-	empty string to mark the end of the array.
-	(hpriv_reg_table): Likewise.
-	(v9a_asr_table): Likewise.
-	(cmp_reg_entry): Handle entries with NULL names.
-	(F_POP_V9): Define.
-	(F_POP_PCREL): Likewise.
-	(F_POP_TLS_CALL): Likewise.
-	(F_POP_POSTFIX): Likewise.
-	(struct pop_entry): New type.
-	(pop_table): New variable.
-	(enum pop_entry_type): New type.
-	(struct perc_entry): Likewise.
-	(NUM_PERC_ENTRIES): Define.
-	(perc_table): New variable.
-	(cmp_perc_entry): New function.
-	(md_begin): Sort hpriv_reg_table and v9a_asr_table, and initialize
-	perc_table.
-	(sparc_ip): Handle entries with NULL names in priv_reg_table,
-	hpriv_reg_table and v9a_asr_table.  Use perc_table to handle
-	%-pseudo-ops.
-
-2016-06-15  Nick Clifton  <nickc@redhat.com>
-
-	* config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the
-	instruction size.
-	* config/tc-mcore.c (md_assemble): Likewise.
-	* config/tc-mn10200.c (md_assemble): Likewise.
-	* config/tc-moxie.c (md_assemble): Likewise.
-	* config/tc-pj.c (md_apply_fix): Handle BFD_RELOC_PJ_CODE_REL32.
-	* testsuite/gas/all/gas.exp (diff1 test): Alpha sort list of
-	exception targets.  Add alpha, hppa, microblaze and rl78 to list
-	of exceptions.
-	(forward): Add microblaze to list of exceptions.
-	(fwdexp): Add alpha to list of exceptions.
-	(redef2): Add arm-epoc-pe and rl78 to list of exceptions.
-	(redef3): Add rl78 and x86_64 cygwin to list of exceptions.
-	(do_930509a): Alpha sort list of exception targets.  Add h8300 and
-	mn10200 to list of exceptions.
-	(align2): Expect to fail for nds32.
-	(cond): Add alpha and rl78 to list of exceptions.
-	* testsuite/gas/all/none.d: Skip for ft32 and hppa.
-	* testsuite/gas/all/string.d: Skip for tic4x.
-	* testsuite/gas/alpha/alpha.exp: Note that the alpha-linuxecoff
-	target does not support ELF.
-	* testsuite/gas/arm/blx-bl-convert.dL Skip for the nto target.
-	* testsuite/gas/cfi/cfi-alpha-2.d: All extended format names.
-	* testsuite/gas/cfi/cfi.exp: Alpha sort list of targets.  Skip SH
-	tests for sh-pe and sh-rtemscoff targets.
-	* testsuite/gas/elf/elf.exp (redef): Add rl78, xgate and vax to
-	list of exceptions.
-	(type): Run the noifunc version for alpha-freebsd and visium.
-	* testsuite/gas/elf/warn-2.s: Do not expect to fail on the mcore,
-	mn10200 or moxie targets.
-	* testsuite/gas/ft32/insn.d: Update expected disassembly.
-	* testsuite/gas/i386/i386.exp (x86-64-pcrel): Skip for cygwin
-	targets.
-	* testsuite/gas/lns/lns.exp (lns-common-1): No longer skip for
-	mcore and rx targets.
-	* testsuite/gas/macros/macros.exp (dot): Add exceptions for ns32k,
-	rl78 and vax.
-	(purge): Expect to fail on the ns32k and vax.
-	* testsuite/gas/nds32/alu-2.d: Update expected disassembly.
-	* testsuite/gas/nds32/ls.d: Likewise.
-	* testsuite/gas/nds32/sys-reg.d: Likewise.
-	* testsuite/gas/nds32/usr-spe-reg.d: Likewise.
-	* testsuite/gas/pe/aligncomm-d.d: Skip for the sh.
-	* testsuite/gas/pe/section-align-3.d: Likewise.
-	* testsuite/gas/pe/section-exclude.d: Likewise.
-	* testsuite/gas/ppc/test2xcoff32.d: Pass once all the required
-	data has been seen.
-	* testsuite/gas/ppc/textalign-xcoff-001.d: Fix up regexp to allow
-	for variations in whitespace.
-	* testsuite/gas/tilepro/t_constants.d: Pass once all the required
-	data has been seen.
-	* testsuite/gas/tilepro/t_constants.s (.safe_word): New macro.
-	Installs a 32-bit value without generating warnings on 64-bit
-	hosts.
-	Use the new macro to replace the .word directives.
-
-2016-06-15  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/add_s.d: New file.
-	* testsuite/gas/arc/add_s.s: New file.
-
-2016-06-14  Graham Markall <graham.markall@embecosm.com>
-
-	* testsuite/gas/arc/nps400-6.s: Add tests of ldbit.
-	* testsuite/gas/arc/nps400-6.d: Likewise.
-
-2016-06-14  Graham Markall <graham.markall@embecosm.com>
-
-	* testsuite/gas/arc/nps400-6.s: Add tests of hash, tr, utf8, e4by, and
-	addf.
-	* testsuite/gas/arc/nps400-6.d: Likewise.
-
-2016-06-14  Graham Markall <graham.markall@embecosm.com>
-
-	* testsuite/gas/arc/nps400-6.s: Add tests of calcbsd, calcbxd,
-	calckey, calcxkey, mxb, imxb, addl, subl, andl, orl, xorl, andab, orab,
-	lbdsize, bdlen, csms, csma, cbba, zncv, and hofs.
-	* testsuite/gas/arc/nps400-6.d: Likewise.
-
-2016-06-14  Nick Clifton  <nickc@redhat.com>
-
-	* config/tc-nds32.c (nds32_get_align): Avoid left shifting a
-	signed constant.
-
-2016-06-13  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_fix_adjustable): Don't convert RELA
-	JALR relocations on R6.
-	* testsuite/gas/mips/jal-svr4pic-local.d: New test.
-	* testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test.
-	* testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test.
-	* testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test.
-	* testsuite/gas/mips/jal-svr4pic-local-n32.d: New test.
-	* testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New
-	test.
-	* testsuite/gas/mips/jal-svr4pic-local-n64.d: New test.
-	* testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New
-	test.
-	* testsuite/gas/mips/jal-svr4pic-local.s: New test source.
-	* testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test
-	source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-06-13  Virendra Pathak  <virendra.pathak@broadcom.com>
-
-        * config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
-        * doc/c-aarch64.texi: Document that vulcan is a valid processor
-	name.
-
-2016-06-13  Nick Clifton  <nickc@redhat.com>
-
-	* config/tc-arm.c: For non-ELF based targets skip ARM feature sets
-	that are not supported.
-
-	* config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
-	constant.
-	* config/tc-cr16.c (check_range): Likewise.
-	* config/tc-nios2.c (nios2_check_overflow): Likewise.
-
-2016-06-08  Renlin Li  <renlin.li@arm.com>
-
-	* config/tc-aarch64.c (print_operands): Substitute size.
-	(output_operand_error_record): Likewise.
-
-2016-06-07  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
-	PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
-	PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
-	(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
-	by vle_opcodes, and that vle flag doesn't enable opcodes.  Don't
-	add vle_opcodes twice.
-	(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
-
-2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
-	(arm_ext_ras): Renamed from arm_ext_v8_2.
-	(insns): Update for arm_ext_v8_2 renaming.
-	(arm_extensions): Add "ras".
-	* doc/c-arm.texi (ARM Options): Add an entry for "ras".
-	* testsuite/gas/arm/armv8-a+ras.d: New.
-	* testsuite/gas/arm/armv8_2-a.d: Add explicit command line
-	options.
-
-2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* itbl-parse.y (yyerror): Use modern argument declaration style.
-
-2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-sh.c (parse_reg): Change type of mode argument to
-	sh_arg_type.
-	(get_operand): Adjust.
-	(insert): Change type of how to bfd_reloc_code_real_type.
-	(insert4): Likewise.
-	* config/tc-sh64.c (shmedia_get_operand): Adjust.
-	(shmedia_parse_reg): Change type of mode to shmedia_arg_type.
-
-2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
-	const char *.
-
-2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
-
-	PR binutils/20196
-	* gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
-	stbcx., sthcx., stwcx., stdcx.>: Add tests.
-	* gas/testsuite/gas/ppc/e6500.d: Likewise.
-	* gas/testsuite/gas/ppc/power8.s: Likewise.
-	* gas/testsuite/gas/ppc/power8.d: Likewise.
-	* gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
-	stdcx.>: Add tests.
-	* gas/testsuite/gas/ppc/power4.d: Likewise.
-
-2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutis/18386
-	* testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
-	* testsuite/gas/i386/x86-64-branch.d: Updated.
-	* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
-	* testsuite/gas/i386/x86-64-branch-4.l: New file.
-	* testsuite/gas/i386/x86-64-branch-4.s: Likewise.
-
-2016-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
-
-	* config/tc-aarch64.c (aarch64_cpus): Add cortex-a73 entry.
-	* doc/c-aarch64.texi (-mcpu): Document cortex-a73 value.
-
-2016-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
-
-	* config/tc-arm.c (arm_cpus): Add cortex-a73 entry.
-	* doc/c-arm.texi (-mcpu=): Document cortex-a73 value.
-
-2016-06-02  Vineet Gupta  <Vineet.Gupta1@synopsys.com>
-
-	* configure.tgt: Replace -uclibc with *.
-
-2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (parse_opcode_flags): New function.
-	(find_opcode_match): Move flag parsing code out to new function.
-	Ignore operands marked IGNORE.
-	(build_fake_opcode_hash_entry): New function.
-	(find_special_case_long_opcode): New function.
-	(find_special_case): Lookup long opcodes.
-	* testsuite/gas/arc/nps400-7.d: New file.
-	* testsuite/gas/arc/nps400-7.s: New file.
-
-2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-ns32k.c: Remove definition of input_line_pointer.
-
-2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-avr.c (avr_parse_cons_expression): Replace iteration to
-	sentinal with iteration to array size.
-
-2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/xtensa-relax.h: Move typedefs of enums to the enums
-	definition.
-
-2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-ns32k.c (bit_fix_new): Replace obstack-alloc with XOBNEW
-	macro.
-
-2016-06-01  Graham Markall  <graham.markall@embecosm.com>
-
-	* testsuite/gas/arc/nps-400-1.s: Add rflt variants with
-	operands of types a,b,u6, 0,b,u6, and 0,b,limm.
-	* testsuite/gas/arc/nps-400-1.d: Likewise.
-
-2016-05-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20145
-	* config/tc-i386.c (cpu_noarch): Add noavx512f, noavx512cd,
-	noavx512er, noavx512pf, noavx512dq, noavx512bw, noavx512vl,
-	noavx512ifma and noavx512vbmi.
-	* doc/c-i386.texi: Mention noavx512f, noavx512cd, noavx512er,
-	noavx512pf, noavx512dq, noavx512bw, noavx512vl, noavx512ifma
-	and noavx512vbmi.
-	* testsuite/gas/i386/i386.exp: Run noavx512-1 and noavx512-2.
-	* testsuite/gas/i386/noavx512-1.l: New file.
-	* testsuite/gas/i386/noavx512-1.s: Likewise.
-	* testsuite/gas/i386/noavx512-2.l: Likewise.
-	* testsuite/gas/i386/noavx512-2.s: Likewise.
-
-2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20145
-	* config/tc-i386.c (cpu_arch): Add 687.
-	(cpu_noarch): Add no287, no387, no687, nosse2, nosse3, nossse3,
-	nosse4.1, nosse4.2, nosse4 and noavx2.
-	(parse_real_register): Check cpuregmmx instead of cpummx for MMX
-	register.  Check cpuregxmm instead of cpusse for XMM register.
-	Check cpuregymm instead of cpuavx for YMM register.  Check
-	cpuregzmm/cpuregmask instead of cpuavx512f for ZMMM/mask register.
-	* doc/c-i386.texi: Mention 687, no287, no387, no687, nosse2,
-	nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2.
-	* testsuite/gas/i386/arch-10-prefetchw.d (as): Add mmx.
-	* testsuite/gas/i386/arch-10.d (as): Likewise.
-	* testsuite/gas/i386/arch-11.s: Add ".arch .mmx".
-	* testsuite/gas/i386/i386.exp: Pass mmx to assembler for
-	arch-10-3 and arch-10-4.  Run no87-3, nosse-4, nosse-5, noavx-3
-	and noavx-4.
-	* testsuite/gas/i386/no87-3.l: New file.
-	* testsuite/gas/i386/no87-3.s: Likewise.
-	* testsuite/gas/i386/noavx-3.l: Likewise.
-	* testsuite/gas/i386/noavx-3.s: Likewise.
-	* testsuite/gas/i386/noavx-4.d: Likewise.
-	* testsuite/gas/i386/noavx-4.s: Likewise.
-	* testsuite/gas/i386/nosse-4.l: Likewise.
-	* testsuite/gas/i386/nosse-4.s: Likewise.
-	* testsuite/gas/i386/nosse-5.d: Likewise.
-	* testsuite/gas/i386/nosse-5.s: Likewise.
-
-2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20154
-	* config/tc-i386.c (cpu_flags_match): Don't set cpuamd64 nor
-	cpuintel64.
-	(match_template): Check Intel64/AMD64 ISA.
-
-2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20154
-	* config/tc-i386.c (intel64): New.
-	(cpu_flags_match): Set cpuamd64 and cpuintel64.
-	(md_parse_option): Set intel64 instead of cpuamd64 and
-	cpuintel64.
-
-2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (cpu_flags_match): Don't clear cpu64 nor
-	cpuno64.
-
-2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
-
-	* testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
-	* testsuite/gas/ppc/altivec3.s: Likewise.
-	* testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
-	* testsuite/gas/ppc/power9.s: Likewise.
-
-2016-05-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/gas/i386/avx512vl-2.l: Append "#pass".
-	* testsuite/gas/i386/noavx-1.l: Likewise.
-	* testsuite/gas/i386/nommx-1.l: Likewise.
-	* testsuite/gas/i386/nosse-1.l: Likewise.
-	* testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
-	* testsuite/gas/i386/avx512vl-2.s: Append ".p2align 4".
-	* testsuite/gas/i386/noavx-1.s: Likewise.
-	* testsuite/gas/i386/nommx-1.s: Likewise.
-	* testsuite/gas/i386/nosse-1.s: Likewise.
-	* testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
-
-2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-metag.c (metag_handle_align): Make the type of noop
-	unsigned char.
-
-2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-rx.c (md_convert_frag): Make the type of reloc_type
-	bfd_reloc_code_real_type.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20140
-	* config/tc-i386.c (cpu_flags_match): Require another match
-	for AVX512VL.
-	* testsuite/gas/i386/i386.exp: Run avx512vl-1, avx512vl-2,
-	x86-64-avx512vl-1 and x86-64-avx512vl-2.
-	* testsuite/gas/i386/avx512vl-1.l: New file.
-	* testsuite/gas/i386/avx512vl-1.s: Likewise.
-	* testsuite/gas/i386/avx512vl-2.l: Likewise.
-	* testsuite/gas/i386/avx512vl-2.s: Likewise.
-	* testsuite/gas/i386/x86-64-avx512vl-1.l: Likewise.
-	* testsuite/gas/i386/x86-64-avx512vl-1.s: Likewise.
-	* testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
-	* testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20141
-	* testsuite/gas/i386/i386.exp: Run x86-64-pr20141.
-	* testsuite/gas/i386/x86-64-pr20141.d: New file.
-	* testsuite/gas/i386/x86-64-pr20141.s: Likewise.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (arch_entry): Remove negated.
-	(noarch_entry): New struct.
-	(cpu_arch): Updated.  Remove .no87, .nommx, .nosse and .noavx.
-	(cpu_noarch): New.
-	(set_cpu_arch): Check cpu_noarch after cpu_arch.
-	(md_parse_option): Allow -march=+nosse.  Check cpu_noarch after
-	cpu_arch.
-	(output_message): New function.
-	(show_arch): Use it.  Handle cpu_noarch.
-	* testsuite/gas/i386/i386.exp: Run nommx-1, nommx-2, nommx-3,
-	nosse-1, nosse-2, nosse-3, noavx-1 and noavx-2.
-	* testsuite/gas/i386/noavx-1.l: New file.
-	* testsuite/gas/i386/noavx-1.s: Likewise.
-	* testsuite/gas/i386/noavx-2.s: Likewise.
-	* testsuite/gas/i386/noavx-2.l: Likewise.
-	* testsuite/gas/i386/nommx-1.s: Likewise.
-	* testsuite/gas/i386/nommx-1.l: Likewise.
-	* testsuite/gas/i386/nommx-2.s: Likewise.
-	* testsuite/gas/i386/nommx-2.l: Likewise.
-	* testsuite/gas/i386/nommx-3.s: Likewise.
-	* testsuite/gas/i386/nommx-3.l: Likewise.
-	* testsuite/gas/i386/nosse-1.s: Likewise.
-	* testsuite/gas/i386/nosse-1.l: Likewise.
-	* testsuite/gas/i386/nosse-2.s: Likewise.
-	* testsuite/gas/i386/nosse-2.l: Likewise.
-	* testsuite/gas/i386/nosse-3.s: Likewise.
-	* testsuite/gas/i386/nosse-3.l: Likewise.
-
-2016-05-25  Chua Zheng Leong  <chuazl@comp.nus.edu.sg>
-
-	PR target/20067
-	* config/tc-arm.c (move_or_literal_pool): Only generate a VMOV.I64
-	instruction if supported by the currently selected fpu variant.
-	* testsuite/gas/arm/vfpv3-ldr_immediate.s: Add test of this PR.
-	* testsuite/gas/arm/vfpv3-ldr_immediate.d: Update expected disassembly.
-
-2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_fix_adjustable): Also return 0 for
-	jump relocations against MIPS16 or microMIPS symbols on RELA
-	targets.
-	* testsuite/gas/mips/jalx-local.d: New test.
-	* testsuite/gas/mips/jalx-local-n32.d: New test.
-	* testsuite/gas/mips/jalx-local-n64.d: New test.
-	* testsuite/gas/mips/jalx-local.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (md_apply_fix)
-	<BFD_RELOC_MIPS16_TLS_TPREL_LO16>: Remove fall-through, adjust
-	code accordingly.
-
-2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-xtensa.c (struct suffix_reloc_map): Change type of field
-	operator to operatorT.
-	(map_suffix_reloc_to_operator): Change return type to operatorT.
-
-2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-d30v.c (find_format): Change type of X_op to operatorT.
-
-2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-mmix.c (mmix_parse_predefined_name): Change type of
-	handler_charp to const char *.
-
-2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-ft32.h (DEFAULT_TARGET_FORMAT): Remove.
-	(ft32_target_format): Likewise.
-	(TARGET_FORMAT): Adjust.
-
-2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-ia64.c (dot_rot): simplify allocations from obstacks.
-	(ia64_frob_label): Likewise.
-
-2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-cr16.c (check_range): Make type of retval op_err.
-	* config/tc-crx.c: Likewise.
-
-2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (md_begin): Add XY registers.
-	(cpu_types): Code density is default off for ARC EM.
-
-2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* config/tc-arc.c (attributes_t): Renamed attribute class to
-	attr_class.
-	(find_opcode_match, assemble_insn, tokenize_extinsn): Changed.
-
-2016-05-23  Kuba Sejdak  <jakub.sejdak@phoesys.com>
-
-	* configuse.tgt: Add entry for arm-phoenix.
-
-2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-tic54x.c (tic54x_sect): simplify string creation.
-
-2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-spu.c (APUOP): Use OPCODE as an unsigned constant.
-
-2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-tic54x.c (tic54x_mmregs): Adjust.
-	(md_begin): Likewise.
-	(encode_condition): Likewise.
-	(encode_cc3): Likewise.
-	(encode_cc2): Likewise.
-	(encode_operand): Likewise.
-	(tic54x_undefined_symbol): Likewise.
-
-2016-05-20  Matthew Fortune  <matthew.fortune@imgtec.com>
-
-	* config/tc-mips.c (mips_cpu_info_table): Update comment.  Add
-	p6600 entry.
-	* doc/c-mips.texi: Document p6600 -march option.
-
-2016-05-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/19600
-	* config/tc-i386.c (md_apply_fix): Preserve addend for
-	BFD_RELOC_386_GOT32 and BFD_RELOC_X86_64_GOT32.
-	* testsuite/gas/i386/addend.d: New file.
-	* testsuite/gas/i386/addend.s: Likewise.
-	* testsuite/gas/i386/x86-64-addend.d: Likewise.
-	* testsuite/gas/i386/x86-64-addend.s: Likewise.
-	* testsuite/gas/i386/i386.exp: Run addend and x86-64-addend.
-	* testsuite/gas/i386/reloc32.d: Updated.
-
-2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (append_insn): Correct the encoding of a
-	constant argument for microMIPS JALX.
-	(tc_gen_reloc): Correct the encoding of an in-place addend for
-	microMIPS JALX.
-	* testsuite/gas/mips/jalx-addend.d: New test.
-	* testsuite/gas/mips/jalx-addend-n32.d: New test.
-	* testsuite/gas/mips/jalx-addend-n64.d: New test.
-	* testsuite/gas/mips/jalx-imm.d: New test.
-	* testsuite/gas/mips/jalx-imm-n32.d: New test.
-	* testsuite/gas/mips/jalx-imm-n64.d: New test.
-	* testsuite/gas/mips/jalx-addend.s: New test source.
-	* testsuite/gas/mips/jalx-imm.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c: Correct tab-after-space formatting mistakes
-	throughout.
-
-2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (find_opcode_match): Remove casting away of
-	const.
-	* config/tc-arc.h (struct arc_flags): Make flgp field const.
-
-2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (md_pcrel_from_section): Use BFD_VMA_FMT where
-	appropriate.
-	(md_convert_frag): Likewise.
-
-2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (arc_opcode_hash_entry_iterator_next): Set
-	cached opcode to NULL when we reach a non-matching opcode.
-	* testsuite/gas/arc/asm-errors-2.d: New file.
-	* testsuite/gas/arc/asm-errors-2.err: New file.
-	* testsuite/gas/arc/asm-errors-2.s: New file.
-
-2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (tokenize_arguments): Add checks for array
-	overflow.
-	* testsuite/gas/arc/asm-errors.s: Addition test line added.
-	* testsuite/gas/arc/asm-errors.err: Update expected results.
-
-2016-05-18  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-rx.c (struct cpu_type): Change the type of a field from
-	int to enum rx_cpu_types.
-
-2016-05-18  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-dlx.c (struct machine_it): change the type of a field from
-	int to bfd_reloc_code_real_type.
-	* config/tc-tic4x.c: Likewise.
-
-2016-05-18  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-v850.c (v850_target_arch): change type to enum
-	bfd_architecture.
-	* config/tc-v850.h (v850_target_arch): Likewise.
-
-2016-05-18  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-ppc.c (ppc_insert_operand): Trim PPC_OPERAND_SIGNOPT
-	allowed negative range.
-	* testsuite/gas/ppc/power9.s: Test xxspltib of -128, not -256.
-	* testsuite/gas/ppc/power9.d: Update.
-
-2016-05-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
-	disassembling and stop skipping targets.
-	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
-	* testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
-	instruction for targets that have stronger alignment requirement.
-	* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
-	* testsuite/gas/arm/archv8m-main.d: Likewise.
-	* testsuite/gas/arm/archv8m.s: Add label.
-	* testsuite/gas/arm/archv8m-cmse.s: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
-
-2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-m32r.c (mach_table): Make static and const.
-
-2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-vax.c (flonum_gen2vax): Adjust prototype to match
-	definition.
-
-2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-mn10300.c (md_begin): set linkrelax here instead of
-	defining it.
-	* config/tc-msp430.c (md_begin): Likewise.
-
-2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-m68hc11.c (fixup8): Change variables type from int to
-	bfd_reloc_code_real_type where appropriate.
-	(fixup16): Likewise.
-	(fixup8_xg): Likewise.
-
-2016-05-15  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-sh64.c (shmedia_check_limits): Constify `msg'.
-
-2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
-
-	* testsuite/gas/ppc/power9.d <xxspltib>: Add additional operand tests.
-	* testsuite/gas/ppc/power9.s: Likewise.
-
-2016-05-13  Alan Modra  <amodra@gmail.com>
-
-	* config/obj-coff.c (weak_uniquify): Delete unused var.
-
-2016-05-13  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* app.c (app_push): Use XNEW and related macros.
-	* as.c (parse_args): Likewise.
-	* cgen.c (make_right_shifted_expr): Likewise.
-	(gas_cgen_tc_gen_reloc): Likewise.
-	* config/bfin-defs.h: Likewise.
-	* config/bfin-parse.y: Likewise.
-	* config/obj-coff.c (stack_init): Likewise.
-	(stack_push): Likewise.
-	(coff_obj_symbol_new_hook): Likewise.
-	(coff_obj_symbol_clone_hook): Likewise.
-	(add_lineno): Likewise.
-	(coff_frob_symbol): Likewise.
-	* config/obj-elf.c (obj_elf_section_name): Likewise.
-	(build_group_lists): Likewise.
-	* config/obj-evax.c (evax_symbol_new_hook): Likewise.
-	* config/obj-macho.c (obj_mach_o_indirect_symbol): Likewise.
-	* config/tc-aarch64.c (insert_reg_alias): Likewise.
-	(find_or_make_literal_pool): Likewise.
-	(add_to_lit_pool): Likewise.
-	(fill_instruction_hash_table): Likewise.
-	* config/tc-alpha.c (load_expression): Likewise.
-	(emit_jsrjmp): Likewise.
-	(s_alpha_ent): Likewise.
-	(s_alpha_end): Likewise.
-	(s_alpha_linkage): Likewise.
-	(md_begin): Likewise.
-	(tc_gen_reloc): Likewise.
-	* config/tc-arc.c (arc_insert_opcode): Likewise.
-	(arc_extcorereg): Likewise.
-	* config/tc-bfin.c: Likewise.
-	* config/tc-cr16.c: Likewise.
-	* config/tc-cris.c: Likewise.
-	* config/tc-crx.c (preprocess_reglist): Likewise.
-	* config/tc-d10v.c: Likewise.
-	* config/tc-frv.c (frv_insert_vliw_insn): Likewise.
-	(frv_tomcat_shuffle): Likewise.
-	* config/tc-h8300.c: Likewise.
-	* config/tc-i370.c (i370_macro): Likewise.
-	* config/tc-i386.c (lex_got): Likewise.
-	(md_parse_option): Likewise.
-	* config/tc-ia64.c (alloc_record): Likewise.
-	(set_imask): Likewise.
-	(save_prologue_count): Likewise.
-	(dot_proc): Likewise.
-	(dot_endp): Likewise.
-	(ia64_frob_label): Likewise.
-	(add_qp_imply): Likewise.
-	(add_qp_mutex): Likewise.
-	(mark_resource): Likewise.
-	(dot_alias): Likewise.
-	* config/tc-m68hc11.c: Likewise.
-	* config/tc-m68k.c (m68k_frob_label): Likewise.
-	(s_save): Likewise.
-	(mri_control_label): Likewise.
-	(push_mri_control): Likewise.
-	(build_mri_control_operand): Likewise.
-	(s_mri_else): Likewise.
-	(s_mri_break): Likewise.
-	(s_mri_next): Likewise.
-	(s_mri_for): Likewise.
-	(s_mri_endw): Likewise.
-	* config/tc-metag.c (create_mnemonic_htab): Likewise.
-	* config/tc-microblaze.c: Likewise.
-	* config/tc-mmix.c (s_loc): Likewise.
-	* config/tc-nds32.c (nds32_relax_hint): Likewise.
-	* config/tc-nios2.c (nios2_insn_reloc_new): Likewise.
-	* config/tc-rl78.c: Likewise.
-	* config/tc-rx.c (rx_include): Likewise.
-	* config/tc-sh.c: Likewise.
-	* config/tc-sh64.c (shmedia_frob_section_type): Likewise.
-	* config/tc-sparc.c: Likewise.
-	* config/tc-spu.c: Likewise.
-	* config/tc-tic6x.c (static tic6x_unwind_info *tic6x_get_unwind): Likewise.
-	(tic6x_start_unwind_section): Likewise.
-	* config/tc-tilegx.c: Likewise.
-	* config/tc-tilepro.c: Likewise.
-	* config/tc-v850.c: Likewise.
-	* config/tc-visium.c: Likewise.
-	* config/tc-xgate.c: Likewise.
-	* config/tc-xtensa.c (xtensa_translate_old_userreg_ops): Likewise.
-	(new_resource_table): Likewise.
-	(resize_resource_table): Likewise.
-	(xtensa_create_trampoline_frag): Likewise.
-	(xtensa_maybe_create_literal_pool_frag): Likewise.
-	(cache_literal_section): Likewise.
-	* config/xtensa-relax.c (append_transition): Likewise.
-	(append_condition): Likewise.
-	(append_value_condition): Likewise.
-	(append_constant_value_condition): Likewise.
-	(append_literal_op): Likewise.
-	(append_label_op): Likewise.
-	(append_constant_op): Likewise.
-	(append_field_op): Likewise.
-	(append_user_fn_field_op): Likewise.
-	(enter_opname_n): Likewise.
-	(enter_opname): Likewise.
-	(split_string): Likewise.
-	(parse_insn_templ): Likewise.
-	(clone_req_or_option_list): Likewise.
-	(clone_req_option_list): Likewise.
-	(parse_option_cond): Likewise.
-	(parse_insn_pattern): Likewise.
-	(parse_insn_repl): Likewise.
-	(build_transition): Likewise.
-	(build_transition_table): Likewise.
-	* dw2gencfi.c (alloc_fde_entry): Likewise.
-	(alloc_cfi_insn_data): Likewise.
-	(cfi_add_CFA_remember_state): Likewise.
-	(dot_cfi_escape): Likewise.
-	(dot_cfi_fde_data): Likewise.
-	(select_cie_for_fde): Likewise.
-	* dwarf2dbg.c (dwarf2_directive_loc): Likewise.
-	* ecoff.c (ecoff_add_bytes): Likewise.
-	(ecoff_build_debug): Likewise.
-	* input-scrub.c (input_scrub_push): Likewise.
-	(input_scrub_begin): Likewise.
-	(input_scrub_next_buffer): Likewise.
-	* itbl-ops.c (append_insns_as_macros): Likewise.
-	(alloc_entry): Likewise.
-	(alloc_field): Likewise.
-	* listing.c (listing_newline): Likewise.
-	(listing_listing): Likewise.
-	* macro.c (get_any_string): Likewise.
-	(delete_macro): Likewise.
-	* stabs.c (generate_asm_file): Likewise.
-	(stabs_generate_asm_lineno): Likewise.
-	* subsegs.c (subseg_change): Likewise.
-	(subseg_get): Likewise.
-	* symbols.c (define_dollar_label): Likewise.
-	(symbol_relc_make_sym): Likewise.
-	* write.c (write_relocs): Likewise.
-
-2016-05-13  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/obj-coff.c (obj_coff_def): Simplify string copying.
-	(weak_name2altname): Likewise.
-	(weak_uniquify): Likewise.
-	(obj_coff_section): Likewise.
-	(obj_coff_init_stab_section): Likewise.
-	* config/obj-elf.c (obj_elf_section_name): Likewise.
-	(obj_elf_init_stab_section): Likewise.
-	* config/obj-evax.c (evax_shorten_name): Likewise.
-	* config/obj-macho.c (obj_mach_o_make_or_get_sect): Likewise.
-	* config/tc-aarch64.c (create_register_alias): Likewise.
-	* config/tc-alpha.c (load_expression): Likewise.
-	(s_alpha_file): Likewise.
-	(s_alpha_section_name): Likewise.
-	(tc_gen_reloc): Likewise.
-	* config/tc-arc.c (md_assemble): Likewise.
-	* config/tc-arm.c (create_neon_reg_alias): Likewise.
-	(start_unwind_section): Likewise.
-	* config/tc-hppa.c (pa_build_unwind_subspace): Likewise.
-	(hppa_elf_mark_end_of_function): Likewise.
-	* config/tc-nios2.c (nios2_modify_arg): Likewise.
-	(nios2_negate_arg): Likewise.
-	* config/tc-rx.c (rx_section): Likewise.
-	* config/tc-sh64.c (sh64_consume_datalabel): Likewise.
-	* config/tc-tic30.c (tic30_find_parallel_insn): Likewise.
-	* config/tc-tic54x.c (tic54x_include): Likewise.
-	(tic54x_macro_info): Likewise.
-	(subsym_get_arg): Likewise.
-	(subsym_substitute): Likewise.
-	(tic54x_start_line_hook): Likewise.
-	* config/tc-xtensa.c (xtensa_literal_prefix): Likewise.
-	(xg_reverse_shift_count): Likewise.
-	* config/xtensa-relax.c (enter_opname_n): Likewise.
-	(split_string): Likewise.
-	* dwarf2dbg.c (get_filenum): Likewise.
-	(process_entries): Likewise.
-	* expr.c (operand): Likewise.
-	* itbl-ops.c (alloc_entry): Likewise.
-	* listing.c (listing_message): Likewise.
-	(listing_title): Likewise.
-	* macro.c (check_macro): Likewise.
-	* stabs.c (s_xstab): Likewise.
-	* symbols.c (symbol_relc_make_expr): Likewise.
-	* write.c (compress_debug): Likewise.
-
-2016-05-12  Nick Clifton  <nickc@redhat.com>
-
-	PR target/20068
-	* testsuite/gas/arm/pr20068.d: Use correct regexp syntax.
-
-2016-05-11  Nick Clifton  <nickc@redhat.com>
-
-	PR target/20068
-	* testsuite/gas/arm/pr20068.d: Adjust expected output to allow for
-	big endian ARM configurations.
-
-2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
-	    Matthew Fortune  <matthew.fortune@imgtec.com>
-
-	* config/tc-mips.c (options): Add OPTION_DSPR3 and
-	OPTION_NO_DSPR3.
-	(md_longopts): Likewise.
-	(md_show_usage): Add help for -mdspr3 and -mno-dspr3.
-	(mips_ases): Define availability for DSPr3.
-	(mips_ase_groups): Add ASE_DSPR3 to the DSP group.
-	(mips_convert_ase_flags): Map ASE_DSPR3 to AFL_ASE_DSPR3.
-	* doc/as.texinfo: Document -mdspr3, -mno-dspr3.  Fix -mdspr2
-	formatting.
-	* doc/c-mips.texi: Document -mdspr3, -mno-dspr3, .set dspr3 and
-	.set nodspr3.  Fix -mdspr2 formatting.
-	* testsuite/gas/mips/mips32-dspr3.d: New file.
-	* testsuite/gas/mips/mips32-dspr3.s: Likewise.
-	* testsuite/gas/mips/mips.exp: Run mips32-dspr3 test.
-
-2016-05-11  Nick Clifton  <nickc@redhat.com>
-
-	PR target/20068
-	* config/tc-arm.c (add_to_lit_pool): Ensure that the padding added
-	to the pool uses O_constant.
-	* testsuite/gas/arm/pr20068.s: New test.
-	* testsuite/gas/arm/pr20068.d: Test driver.
-
-2016-05-11  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/gas/arm/archv8m-cmse-base.d: Skip for non-ELF ARM targets.
-	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
-
-2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
-
-	* testsuite/gas/i386/i386.exp: Run RDPID tests.
-	* testsuite/gas/i386/prefix.d: Adjust.
-	* testsuite/gas/i386/rdpid.s: New test.
-	* testsuite/gas/i386/rdpid.d: Ditto.
-	* testsuite/gas/i386/rdpid-intel.d: Ditto.
-	* testsuite/gas/i386/x86-64-rdpid.s: Ditto.
-	* testsuite/gas/i386/x86-64-rdpid.d: Ditto.
-	* testsuite/gas/i386/x86-64-rdpid-intel.d: Ditto.
-
-2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
-
-	* config/tc-i386.c (cpu_arch): Add RDPID.
-	* doc/c-i386.texi: Document RDPID.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
-	set branch type of a symbol.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions.
-	* config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP
-	instructions.
-	(arm_extensions): Add dsp extension for ARMv8-M Mainline.
-	(aeabi_set_public_attributes): Memorize the feature bits of the
-	architecture selected for Tag_CPU_arch.  Use it to set
-	Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension.
-	(arm_convert_symbolic_attribute): Define Tag_DSP_extension.
-	* testsuite/gas/arm/arch7em-bad.d: Rename to ...
-	* testsuite/gas/arm/arch7em-bad-1.d: This.
-	* testsuite/gas/arm/arch7em-bad-2.d: New file.
-	* testsuite/gas/arm/arch7em-bad-3.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
-	* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
-	* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (struct arm_option_extension_value_table): Make
-	allowed_archs an array with 2 entries.
-	(ARM_EXT_OPT): Adapt to only fill the first entry of allowed_archs.
-	(ARM_EXT_OPT2): New macro filling the two entries of allowed_archs.
-	(arm_extensions): Use separate entries in allowed_archs when several
-	archs are allowed to use an extension and change ARCH_ANY in
-	ARM_ARCH_NONE in allowed_archs.
-	(arm_parse_extension): Check that, for each allowed_archs entry, all
-	bits are set in the current architecture, ignoring ARM_ANY entries.
-	(s_arm_arch_extension): Likewise.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* config/tc-arm.c (arm_ext_m): Add feature bit ARM_EXT2_V8M_MAIN.
-	(arm_ext_v8m_main): New feature set for bit ARM_EXT2_V8M_MAIN.
-	(arm_ext_v8m_m_only): New feature set for instructions in ARMv8-M not
-	shared with a non M profile architecture.
-	(do_rn): New function.
-	(known_t32_only_insn): Check opcode against arm_ext_v8m_m_only rather
-	than arm_ext_v8m.
-	(v7m_psrs): Add ARMv8-M security extensions new special registers.
-	(insns): Add ARMv8-M Security Extensions instructions.
-	(aeabi_set_public_attributes): Use arm_ext_v8m_m_only instead of
-	arm_ext_v8m_m to decide the profile and the Thumb ISA.
-	* testsuite/gas/arm/archv8m-cmse.s: New file.
-	* testsuite/gas/arm/archv8m-cmse-main.s: Likewise..
-	* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
-	* testsuite/gas/arm/any-cmse.d: Likewise.
-	* testsuite/gas/arm/any-cmse-main.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
-	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
-
-2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* testsuite/gas/sparc/sparc5vis4.s: Fix mnemonic of faligndatai.
-	* testsuite/gas/sparc/sparc5vis4.d: Likewise.
-
-2016-05-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
-
-	* config/tc-arm.c (fpu_arch_vfp_v1): Mark with ATTRIBUTE_UNUSED.
-	(fpu_arch_vfp_v3): Likewise.
-	(fpu_arch_neon_v1): Likewise.
-	(arm_arch_full): Likewise.
-	(parse_neon_el_struct_list): Initialize fields of firsttype.
-
-2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP.
-	(arc_extinsn): Handle new introduced syntax.
-	* testsuite/gas/arc/textinsn1op.d: New file.
-	* testsuite/gas/arc/textinsn1op.s: Likewise.
-	* doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP.
-
-2016-05-03  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
-
-	* testsuite/gas/lns/lns.exp: Add avr to list of targets using
-	DW_LNS_fixed_advance_pc.
-
-2016-04-27  Alan Modra  <amodra@gmail.com>
-
-	* as.h (inline, __PTR_TO_INT, __INT_TO_PTR): Don't define.
-	(xmemdup0): New inline function.
-
-2016-04-22  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (code_option_type): New enum.
-	(parse_code_option): Return status indicating option type.
-	(s_mipsset): Update `parse_code_option' call site accordingly.
-	Always set register sizes from the ISA with ISA overrides.
-	(s_module): Update `parse_code_option' call site.
-	* testsuite/gas/mips/isa-override-1.d: New test.
-	* testsuite/gas/mips/micromips@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips1@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips2@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips32@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
-	* testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
-	* testsuite/gas/mips/r3000@isa-override-1.d: New test.
-	* testsuite/gas/mips/r3900@isa-override-1.d: New test.
-	* testsuite/gas/mips/r5900@isa-override-1.d: New test.
-	* testsuite/gas/mips/octeon@isa-override-1.d: New test.
-	* testsuite/gas/mips/octeon3@isa-override-1.d: New test.
-	* testsuite/gas/mips/isa-override-2.l: New list test.
-	* testsuite/gas/mips/mips1@isa-override-2.l: New list test.
-	* testsuite/gas/mips/mips2@isa-override-2.l: New list test.
-	* testsuite/gas/mips/mips32@isa-override-2.l: New list test.
-	* testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
-	* testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
-	* testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
-	* testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
-	* testsuite/gas/mips/r3000@isa-override-2.l: New list test.
-	* testsuite/gas/mips/r3900@isa-override-2.l: New list test.
-	* testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
-	* testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
-	output.
-	* testsuite/gas/mips/isa-override-1.s: New test source.
-	* testsuite/gas/mips/r5900@isa-override-1.s: New test source.
-	* testsuite/gas/mips/isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips1@isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips2@isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips32@isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
-	* testsuite/gas/mips/r3000@isa-override-2.s: New test source.
-	* testsuite/gas/mips/r3900@isa-override-2.s: New test source.
-	* testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* cgen.c: Likewise.
-	* config/tc-bfin.c: Likewise.
-	* config/tc-ia64.c: Likewise.
-	* config/tc-mep.c: Likewise.
-	* config/tc-metag.c: Likewise.
-	* config/tc-nios2.c: Likewise.
-	* config/tc-rl78.c: Likewise.
-
-2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* doc/c-arc.texi (ARC Options): Add nps400 to list of valus for
-	-mcpu.  Add cross reference to .cpu directive from -mcpu option.
-	(ARC Directives): Add NPS400 to .cpu directive list.
-
-2016-04-20  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* config/tc-aarch64.c (aarch64_features): Add "ras".
-	* doc/c-aarch64.texi (AArch64 Extensions): Add "ras".
-	* testsuite/gas/aarch64/armv8-ras-1.d: New.
-	* testsuite/gas/aarch64/armv8-ras-1.s: New.
-	* testsuite/gas/aarch64/illegal-ras-1.d: New.
-	* testsuite/gas/aarch64/illegal-ras-1.s: New.
-
-2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/nps400-6.d: New file.
-	* testsuite/gas/arc/nps400-6.s: New file.
-
-2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/nps400-4.d: New file.
-	* testsuite/gas/arc/nps400-4.s: New file.
-	* testsuite/gas/arc/nps400-5.d: New file.
-	* testsuite/gas/arc/nps400-5.s: New file.
-
-2016-04-19  Martin Galvan  <martin.galvan@tallertechnologies.com>
-
-	* doc/as.texinfo (.cfi_remember_state, .cfi_restore_state): Improve
-	documentation.
-
-2016-04-17  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	Revert prevous change.
-	* config/tc-arc.c (arc_option): Make .cpu directive
-	case-sensitive again.
-
-2016-04-16  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (arc_option): Make .cpu directive
-	case-insensitive.
-
-2016-04-16  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (arc_option): Allow NPS400 in .cpu directive.
-
-2016-04-15  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-mips.c (md_begin): Remove useless assignment.
-
-2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.in: Regenerated with automake 1.11.6.
-	* aclocal.m4: Likewise.
-	* doc/Makefile.in: Likewise.
-
-2016-04-15  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-ppc.c (toc_reloc_types): Wrap in #ifdef OBJ_ELF
-
-2016-04-14  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-nios2.c (nios2_as_options): Make file static.
-	* config/tc-ppc.c (toc_reloc_ypes): Likewise.
-	* config/tc-sparc.c (native_op_table): Likewise.
-
-2016-04-14  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-m32c.c (M32C_Macros): Remove.
-	* config/tc-msp430.c (option_numbers): Likewise.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/nps400-3.d: New file.
-	* testsuite/gas/arc/nps400-3.s: New file.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/add_s-err.s: Update target pattern.
-	* testsuite/gas/arc/warn.s: Likewise.
-	* testsuite/gas/elf/elf.exp: Run test for arc.
-
-2016-04-14  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19938
-	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Allow for the string
-	sections possibly having the SHF_STRINGS flag bit set.
-	* testsuite/gas/i386/x86-64-unwind.d: Likewise.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (mach_type_specified_p): Change type to
-	bfd_boolean.
-	(arc_option): Set private flags when parsing cpu pseudo-op.
-	(md_parse_option): Set mach_type_specified_p to TRUE.
-
-2016-04-13  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19937
-	* testsuite/gas/v850/pr19937.s: New test.
-	* testsuite/gas/v850/pr19937.d: New test control file.
-	* testsuite/gas/v850/basic.exp: Run the new test.
-
-2016-04-13  Maciej W. Rozycki  <macro@imgtec.com>
-	    Andrew Bennett  <andrew.bennett@imgtec.com>
-
-	* config/tc-mips.c (relaxed_branch_length): Use the long
-	sequence where the target is a weak symbol.
-	(relaxed_micromips_32bit_branch_length): Likewise.
-	(relaxed_micromips_16bit_branch_length): Likewise.
-	* testsuite/gas/mips/branch-weak-1.d: New test.
-	* testsuite/gas/mips/branch-weak-2.d: New test.
-	* testsuite/gas/mips/branch-weak-3.d: New test.
-	* testsuite/gas/mips/branch-weak-4.d: New test.
-	* testsuite/gas/mips/branch-weak-5.d: New test.
-	* testsuite/gas/mips/branch-weak.l: New stderr output.
-	* testsuite/gas/mips/branch-weak.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-04-13  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (relaxed_branch_length): Use the long
-	sequence where the distance cannot be determined.
-	(relaxed_micromips_32bit_branch_length): Likewise.
-	* testsuite/gas/mips/branch-extern-1.d: New test.
-	* testsuite/gas/mips/branch-extern-2.d: New test.
-	* testsuite/gas/mips/branch-extern-3.d: New test.
-	* testsuite/gas/mips/branch-extern-4.d: New test.
-	* testsuite/gas/mips/branch-extern.l: New stderr output.
-	* testsuite/gas/mips/branch-extern.s: New test source.
-	* testsuite/gas/mips/branch-section-1.d: New test.
-	* testsuite/gas/mips/branch-section-2.d: New test.
-	* testsuite/gas/mips/branch-section-3.d: New test.
-	* testsuite/gas/mips/branch-section-4.d: New test.
-	* testsuite/gas/mips/branch-section.l: New stderr output.
-	* testsuite/gas/mips/branch-section.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/textauxregister.d: New file.
-	* testsuite/gas/arc/textauxregister.s: Likewise.
-	* testsuite/gas/arc/textcondcode.d: Likewise.
-	* testsuite/gas/arc/textcondcode.s: Likewise.
-	* testsuite/gas/arc/textcoreregister.d: Likewise.
-	* testsuite/gas/arc/textcoreregister.s: Likewise.
-	* testsuite/gas/arc/textpseudoop.d: Likewise.
-	* testsuite/gas/arc/textpseudoop.s: Likewise.
-	* testsuite/gas/arc/ld2.d: Update test.
-	* testsuite/gas/arc/st.d: Likewise.
-	* testsuite/gas/arc/taux.d: Likewise.
-	* doc/c-arc.texi (ARC Directives): Add .extCondCode,
-	.extCoreRegister and .extAuxRegister documentation.
-	* config/tc-arc.c (arc_extcorereg): New function.
-	(md_pseudo_table): Add .extCondCode, .extCoreRegister and
-	.extAuxRegister pseudo-ops.
-	(extRegister_t): New type.
-	(ext_condcode, arc_aux_hash): New global variable.
-	(find_opcode_match): Check for extensions.
-	(preprocess_operands): Likewise.
-	(md_begin): Add aux registers in a hash.
-	(assemble_insn): Update use arc_flags member.
-	(tokenize_extregister): New function.
-	(create_extcore_section): Likewise.
-	* config/tc-arc.h (arc_flags): Delete code, add flgp.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/noargs_a7.d: New file.
-	* testsuite/gas/arc/noargs_a7.s: Likewise.
-	* testsuite/gas/arc/noargs_hs.d: Likewise.
-	* testsuite/gas/arc/noargs_hs.s: Likewise.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/textinsn-errors.d: New File.
-	* testsuite/gas/arc/textinsn-errors.err: Likewise.
-	* testsuite/gas/arc/textinsn-errors.s: Likewise.
-	* testsuite/gas/arc/textinsn2op.d: Likewise.
-	* testsuite/gas/arc/textinsn2op.s: Likewise.
-	* testsuite/gas/arc/textinsn2op01.d: Likewise.
-	* testsuite/gas/arc/textinsn2op01.s: Likewise.
-	* testsuite/gas/arc/textinsn3op.d: Likewise.
-	* testsuite/gas/arc/textinsn3op.s: Likewise.
-	* doc/c-arc.texi (ARC Directives): Add .extInstruction
-	documentation.
-	* config/tc-arc.c (arcext_section): New variable.
-	(arc_extinsn): New function.
-	(md_pseudo_table): Add .extInstruction pseudo op.
-	(attributes_t): New type.
-	(suffixclass, syntaxclass, syntaxclassmod): New constant
-	structures.
-	(find_opcode_match): Remove arc_num_opcodes.
-	(md_begin): Likewise.
-	(tokenize_extinsn): New function.
-	(arc_set_ext_seg): Likewise.
-	(create_extinst_section): Likewise.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (preprocess_operands): Mark AUX symbol.
-	(arc_adjust_symtab): New function.
-	* config/tc-arc.h (ARC_FLAG_AUX): Define.
-	(obj_adjust_symtab): Likewise.
-	* testsuite/gas/arc/taux.d: New file.
-	* testsuite/gas/arc/taux.s: Likewise.
-
-2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (s_option): Sanitize `.option picX'
-	pseudo-op.
-	* testsuite/gas/mips/option-pic-1.d: New test.
-	* testsuite/gas/mips/option-pic-2.l: New list test.
-	* testsuite/gas/mips/option-pic-1.s: New test source.
-	* testsuite/gas/mips/option-pic-2.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (s_option): Reject `.option picX' if VxWorks
-	PIC.
-	* testsuite/gas/mips/option-pic-vxworks-1.l: New list test.
-	* testsuite/gas/mips/option-pic-vxworks-2.l: New list test.
-	* testsuite/gas/mips/option-pic-vxworks-1.s: New test source.
-	* testsuite/gas/mips/option-pic-vxworks-2.s: New test source.
-	* testsuite/gas/mips/mips.exp: Run the new tests.
-
-2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (can_swap_branch_p): Correct call formatting.
-
-2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* messages.c (as_bad): Fix a typo in description.
-
-2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_check_options): Unify messages.
-
-2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (mips_check_options): Use `opts->isa'
-	consistently.
-
-2016-04-08  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19910
-	* testsuite/gas/sparc/pr19910-1.d: Adjust regexps to work with
-	COFF and AOUT sparc targets.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
-	* testsuite/gas/arc/nps400-2.d: New file.
-	* testsuite/gas/arc/nps400-2.s: New file.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (struct arc_opcode_hash_entry_iterator): New
-	structure.
-	(arc_opcode_hash_entry_iterator_init): New function.
-	(arc_opcode_hash_entry_iterator_next): New function.
-	(find_opcode_match): Iterate over all arc_opcode entries
-	referenced by the arc_opcode_hash_entry passed in as a parameter.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (arc_find_opcode): Now returns
-	arc_opcode_hash_entry pointer.
-	(find_opcode_match): Update argument type, extract arc_opcode from
-	incoming arc_opcode_hash_entry.
-	(find_special_case_pseudo): Update return type.
-	(find_special_case_flag): Update return type.
-	(find_special_case): Update return type.
-	(assemble_tokens): Lookup arc_opcode_hash_entry based on
-	instruction mnemonic, then use find_opcode_match to identify
-	specific arc_opcode.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (struct arc_opcode_hash_entry): New structure.
-	(arc_find_opcode): New function.
-	(find_special_case_pseudo): Use arc_find_opcode.
-	(find_special_case_flag): Likewise.
-	(assemble_tokens): Likewise.
-	(md_begin): Build hash using struct arc_opcode_hash_entry.
-
-2016-04-07  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (arc_option): Prepare string for automatic
-	translation.
-	(declare_register): Likewise.
-
-2016-04-06  James Greenhalgh  <james.greenhalgh@arm.com>
-
-	* doc/c-aarch64.texi (Architecture Extensions): Add entry for LSE.
-	Correct entry for RDMA.  Alpha sort entries.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (tokenize_flags): Allow greater range of
-	characters into flag names.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (find_opcode_match): Handle O_symbol case, add
-	new de_fault label.
-	(preprocess_operands): Delete.
-	(assemble_tokens): Remove call to preprocess_operands.
-
-2016-04-07  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/19910
-	* config/tc-sparc.c (sparc_ip): Report an error if the expression
-	inside a %-macro could not be fully parsed.
-	* expr.c (integer_constant): Accept and ignore U suffixes to
-	integers.
-	(operand): When a missing closing parenthesis is encountered,
-	report the character that was found instead.
-	* testsuite/gas/mips/tls-ill.l: Update expected error message.
-	* testsuite/gas/sparc/pr19910-1.d: New test driver.
-	* testsuite/gas/sparc/pr19910-1.s: New test.
-	* testsuite/gas/sparc/pr19910-2.l: Expected error output.
-	* testsuite/gas/sparc/pr19910-2.s: New test.
-	* testsuite/gas/sparc/sparc.exp: Run the new tests.
-
-2016-04-06  Nick Clifton  <nickc@redhat.com>
-
-	* config/tc-msp430.c (msp430_operands): Check for a NOP preceding
-	an EINT instruction.  Warn/fix as necessary.
-	* testsuite/gas/msp430/bad.s: Add test of EINT without preceding NOP.
-	* testsuite/gas/msp430/bad.l: Update expected messages.
-
-2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/nps400-1.d: Update expected results.
-	* testsuite/gas/arc/nps400-1.s: Additional test cases.
-
-2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (is_code_density_p): Compare directly the
-	subclass field.
-	(is_spfp_p, is_dpfp_p, is_spfp_p): Define.
-	(check_cpu_feature): New function.
-	(find_opcode_match): Use check_cpu_feature function.
-	(preprocess_operands): Likewise.
-	(md_parse_option): Use mfpuda, mdpfp, mspfp options.
-	* testsuite/gas/arc/tdpfp.d: New file.
-	* testsuite/gas/arc/tfpuda.d: Likewise.
-	* testsuite/gas/arc/tfpx.s: Likewise.
-
-2016-04-05  Jiong Wang  <jiong.wang@arm.com>
-
-	* config/tc-arm.c (do_neon_mac_maybe_scalar): Allow F16.
-	* testsuite/gas/arm/armv8-2-fp16-simd.s: New tests.
-	* testsuite/gas/arm/armv8-2-fp16-simd.d: New expected results.
-	* testsuite/gas/arm/armv8-2-fp16-simd-thum.d: Likewise for Thumb.
-	* testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New warning results.
-	* testsuite/gas/arm/simd_by_scalar_low_regbank.s: New test source.
-	* testsuite/gas/arm/simd_by_scalar_low_regbank.d: New testcase.
-	* testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d: Likewise
-	for Thumb.
-	* testsuite/gas/arm/simd_by_scalar_low_regbank.l: New warning results.
-
-2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (assemble_insn): Prohibit pc-rel relocations for
-	JUMP instructions type.
-	* testsuite/gas/arc/relocs-errors.d: New file.
-	* testsuite/gas/arc/relocs-errors.err: Likewise.
-	* testsuite/gas/arc/relocs-errors.s: Likewise.
-
-2016-04-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/19909
-	* config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
-	only if i.disp_encoding != disp_encoding_32bit.
-	* gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
-	* gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
-	* gas/testsuite/gas/i386/disp32.d: Updated.
-	* gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
-
-2016-04-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/19498
-	* testsuite/gas/i386/i386.exp: Run pr19498.
-	* testsuite/gas/i386/pr19498.d: New file.
-	* testsuite/gas/i386/pr19498.s: Likewise.
-
-2016-04-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.h: Include 'opcode/arc.h'.
-	(MAX_INSN_ARGS): Delete.
-	(MAX_INSN_FLGS): Delete.
-
-2016-04-04  Alan Modra  <amodra@gmail.com>
-
-	PR 19498
-	* symbols.c (resolve_symbol_value): Clear sy_resolving on exit
-	from function on all paths that set sy_resolving.
-
-2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* app.c (app_push): use XNEW macro.
-	* as.c: Likewise.
-	* config/obj-elf.c (obj_elf_change_section): Likewise.
-	(elf_copy_symbol_attributes): Likewise.
-	(obj_elf_size): Likewise.
-	(build_group_lists): Likewise.
-	* config/tc-aarch64.c (add_operand_error_record): Likewise.
-	(md_assemble): Likewise.
-	(tc_gen_reloc): Likewise.
-	(get_upper_str): Likewise.
-	(aarch64_parse_features): Likewise.
-	* config/tc-arm.c (insert_reg_alias): Likewise.
-	(insert_neon_reg_alias): Likewise.
-	(find_or_make_literal_pool): Likewise.
-	(s_arm_elf_cons): Likewise.
-	(add_unwind_opcode): Likewise.
-	(arm_parse_extension): Likewise.
-	* config/tc-avr.c (create_record_for_frag): Likewise.
-	* config/tc-crx.c: Likewise.
-	* config/tc-d30v.c: Likewise.
-	* config/tc-dlx.c (s_proc): Likewise.
-	* config/tc-ft32.c: Likewise.
-	* config/tc-h8300.c: Likewise.
-	* config/tc-hppa.c (pa_proc): Likewise.
-	(create_new_space): Likewise.
-	(create_new_subspace): Likewise.
-	* config/tc-i860.c: Likewise.
-	* config/tc-i960.c: Likewise.
-	* config/tc-ia64.c: Likewise.
-	* config/tc-iq2000.c (iq2000_add_macro): Likewise.
-	(iq2000_record_hi16): Likewise.
-	* config/tc-m32c.c (m32c_indirect_operand): Likewise.
-	* config/tc-m32r.c (debug_sym): Likewise.
-	(m32r_record_hi16): Likewise.
-	* config/tc-m68k.c (m68k_ip): Likewise.
-	(md_begin): Likewise.
-	* config/tc-mcore.c: Likewise.
-	* config/tc-microblaze.c (check_got): Likewise.
-	* config/tc-mips.c (append_insn): Likewise.
-	(s_mipsset): Likewise.
-	(mips_record_label): Likewise.
-	(s_mips_end): Likewise.
-	* config/tc-mmix.c (mmix_frob_file): Likewise.
-	* config/tc-mn10200.c: Likewise.
-	* config/tc-mn10300.c: Likewise.
-	* config/tc-moxie.c: Likewise.
-	* config/tc-msp430.c: Likewise.
-	* config/tc-nds32.c (nds32_elf_save_pseudo_pattern): Likewise.
-	* config/tc-ns32k.c: Likewise.
-	* config/tc-or1k.c: Likewise.
-	* config/tc-pdp11.c: Likewise.
-	* config/tc-pj.c (fake_opcode): Likewise.
-	* config/tc-ppc.c (ppc_apuinfo_section_add): Likewise.
-	(ppc_macro): Likewise.
-	(ppc_dwsect): Likewise.
-	(ppc_machine): Likewise.
-	* config/tc-rl78.c (rl78_frag_init): Likewise.
-	* config/tc-rx.c (rx_frag_init): Likewise.
-	* config/tc-s390.c (s390_lit_suffix): Likewise.
-	(s390_machine): Likewise.
-	(s390_machinemode): Likewise.
-	* config/tc-score.c (s3_insert_reg): Likewise.
-	(s3_gen_reloc): Likewise.
-	* config/tc-score7.c (s7_insert_reg): Likewise.
-	(s7_gen_reloc): Likewise.
-	* config/tc-tic30.c (tic30_operand): Likewise.
-	* config/tc-tic4x.c (tic4x_inst_make): Likewise.
-	* config/tc-tic54x.c (stag_add_field): Likewise.
-	(tic54x_struct): Likewise.
-	(tic54x_space): Likewise.
-	(tic54x_field): Likewise.
-	(tic54x_mlib): Likewise.
-	(subsym_substitute): Likewise.
-	* config/tc-tic6x.c (tic6x_frob_label): Likewise.
-	* config/tc-vax.c: Likewise.
-	* config/tc-xc16x.c: Likewise.
-	* config/tc-xtensa.c (xtensa_add_insn_label): Likewise.
-	(directive_push): Likewise.
-	(xtensa_begin_directive): Likewise.
-	(tokenize_arguments): Likewise.
-	(xtensa_add_literal_sym): Likewise.
-	(new_resource_table): Likewise.
-	(resize_resource_table): Likewise.
-	(emit_single_op): Likewise.
-	(xtensa_create_trampoline_frag): Likewise.
-	(xtensa_maybe_create_literal_pool_frag): Likewise.
-	(xtensa_add_config_info): Likewise.
-	(xtensa_realloc_fixup_cache): Likewise.
-	(add_subseg_info): Likewise.
-	(cache_literal_section): Likewise.
-	(add_xt_block_frags): Likewise.
-	(add_xt_prop_frags): Likewise.
-	(init_op_placement_info_table): Likewise.
-	(build_section_rename): Likewise.
-	* config/tc-z80.c: Likewise.
-	* config/tc-z8k.c: Likewise.
-	* depend.c (register_dependency): Likewise.
-	* dwarf2dbg.c (get_line_subseg): Likewise.
-	(dwarf2_gen_line_info_1): Likewise.
-	(get_filenum): Likewise.
-	* ecoff.c (allocate_scope): Likewise.
-	(allocate_vlinks): Likewise.
-	(allocate_shash): Likewise.
-	(allocate_thash): Likewise.
-	(allocate_tag): Likewise.
-	(allocate_forward): Likewise.
-	(allocate_thead): Likewise.
-	(allocate_lineno_list): Likewise.
-	* expr.c (make_expr_symbol): Likewise.
-	* hash.c (hash_new_sized): Likewise.
-	* input-file.c (input_file_push): Likewise.
-	* listing.c (file_info): Likewise.
-	(listing_newline): Likewise.
-	* macro.c (new_formal): Likewise.
-	(define_macro): Likewise.
-	* remap.c (add_debug_prefix_map): Likewise.
-	* symbols.c (symbol_find_noref): Likewise.
-	(define_dollar_label): Likewise.
-	(fb_label_instance_inc): Likewise.
-	(symbol_relc_make_value): Likewise.
-
-2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/obj-elf.c (obj_elf_vendor_attribute): Use xstrdup.
-	* config/tc-ppc.c (ppc_frob_file_before_adjust): Likewise.
-	(ppc_znop): Likewise.
-	(ppc_pe_section): Likewise.
-	(ppc_frob_symbol): Likewise.
-	* config/tc-tic30.c (tic30_operand): Likewise.
-	* config/tc-tic4x.c (tic4x_sect): Likewise.
-	(tic4x_usect): Likewise.
-
-2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-alpha.c: Const qualify FLT_CHARS.
-	* config/atof-ieee.c: Remove declarations of FLT_CHARS and EXP_CHARS.
-	* config/tc-cris.h: Likewise.
-	* expr.c: Likewise.
-	* config/tc-mmix.c (md_atof): Adjust comment.
-	* config/tc-mmix.h: Stop defining FLT_CHARS and EXP_CHARS as macros.
-	* tc.h: Declare FLT_CHARS and EXP_CHARS.
-
-2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-score.c (s3_gen_reloc): Add const qualifiers.
-	* config/tc-score7.c (s7_gen_reloc): Likewise.
-
-2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-arm.c (do_t_branch): Change the type of reloc to
-	bfd_reloc_code_real_type.
-
-2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/bfin-parse.y (current_inputline): Remove definition.
-	* config/tc-bfin.c (md_assemble): Simplify use of current_inputline.
-
-2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-avr.c (md_parse_option): Use strcasecmp () to compare
-	strings.
-
-2016-04-02  Alan Modra  <amodra@gmail.com>
-
-	PR 19896
-	* read.c (assign_symbol): Consume rest of line after an error
-	rather than continuing to process the line.
-
-2016-04-01  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.h (MAX_FLAG_NAME_LENGHT): Rename to...
-	(MAX_FLAG_NAME_LENGTH): ...this.
-	(struct arc_flags): Update to use MAX_FLAG_NAME_LENGTH.
-	* config/tc-arc.c (tokenize_flags): Likewise.
-
-2016-04-01  Alan Modra  <amodra@gmail.com>
-
-	* cgen.c (weak_operand_overflow_check): Return const char*.
-	* messages.c (as_internal_value_out_of_range): Formatting.
-	(as_warn_value_out_of_range): Consify prefix param.
-	(as_bad_value_out_of_range): Likewise.
-	* read.c (s_errwarn): Constify msg..
-	(s_float_space, float_cons): ..and err.
-	* as.h (as_warn_value_out_of_range, as_bad_value_out_of_range,
-	ieee_md_atof, vax_md_atof): Update prototypes.
-	* tc.h (md_atof): Update prototype.
-	* config/atof-ieee.c (ieee_md_atof): Return const char*.
-	* config/atof-vax.c (vax_md_atof): Likewise.
-	* config/obj-elf.c (obj_elf_parse_section_letters): Constify bad_msg.
-	* config/tc-aarch64.c (md_atof): Return const char*.
-	* config/tc-alpha.c (s_alpha_section_name): Likewise.
-	(s_alpha_comm): Constify sec_name.
-	(section_name): Constify.
-	(s_alpha_section): Consify name..
-	(alpha_elf_section_letter): ..and ptr_msg param..
-	(md_atof): ..and return.
-	* config/tc-alpha.h (alpha_elf_section_letter): Update prototype.
-	* config/tc-arc.c (md_atof): Return const char*.
-	* config/tc-arm.c (md_atof): Likewise.
-	* config/tc-avr.c (md_atof): Likewise.
-	* config/tc-bfin.c (md_atof): Likewise.
-	* config/tc-cr16.c (md_atof): Likewise.
-	* config/tc-cris.c (md_atof): Likewise.
-	* config/tc-crx.c (md_atof): Likewise.
-	* config/tc-d10v.c (md_atof): Likewise.
-	* config/tc-d30v.c (md_atof): Likewise.
-	* config/tc-dlx.c (md_atof): Likewise.
-	* config/tc-epiphany.c (md_atof): Likewise.
-	* config/tc-fr30.c (md_atof): Likewise.
-	* config/tc-frv.c (md_atof): Likewise.
-	* config/tc-ft32.c (md_atof): Likewise.
-	* config/tc-h8300.c (md_atof): Likewise.
-	* config/tc-hppa.c (struct default_subspace_dict): Constify name.
-	(struct default_space_dict): Likewise.
-	(create_new_space): Constify name param.
-	(create_new_subspace): Likewise.
-	(is_defined_space, is_defined_subspace): Likewise.
-	(pa_parse_space_stmt): Constify space_name param.
-	(md_atof): Return const char*.
-	(pa_spaces_begin): Constify name.
-	* config/tc-i370.c (md_atof): Return const char*.
-	* config/tc-i386.c (md_atof): Likewise.
-	(x86_64_section_letter): Constify ptr_msg param.
-	* config/tc-i386.h (x86_64_section_letter): Update prototype.
-	* config/tc-i860.c (struct i860_it): Constify error.
-	(md_atof): Return const char*.
-	* config/tc-i960.c (md_atof): Likewise.
-	* config/tc-ia64.c (md_atof): Likewise.
-	(ia64_elf_section_letter): Constify ptr_msg param.
-	* config/tc-ia64.h (ia64_elf_section_letter): Update prototype.
-	* config/tc-ip2k.c (md_atof): Return const char*.
-	* config/tc-iq2000.c (md_atof): Likewise.
-	* config/tc-lm32.c (md_atof): Likewise.
-	* config/tc-m32c.c (md_atof): Likewise.
-	* config/tc-m32r.c (md_atof): Likewise.
-	* config/tc-m68hc11.c (md_atof): Likewise.
-	* config/tc-m68k.c (md_atof): Likewise.
-	* config/tc-mcore.c (md_atof): Likewise.
-	* config/tc-mep.c (md_atof): Likewise.
-	(mep_elf_section_letter): Constify ptr_msg param.
-	* config/tc-mep.h (mep_elf_section_letter): Update prototype.
-	* config/tc-metag.c (md_atof): Return const char*.
-	* config/tc-microblaze.c (md_atof): Likewise.
-	* config/tc-microblaze.h (md_atof): Delete prototype.
-	* config/tc-mips.c (mips_parse_argument_token): Constify err.
-	(md_atof): Return const char*.
-	* config/tc-mmix.c (md_atof): Likewise.
-	* config/tc-mn10200.c (md_atof): Likewise.
-	* config/tc-mn10300.c (md_atof): Likewise.
-	* config/tc-moxie.c (md_atof): Likewise.
-	* config/tc-msp430.c (md_atof): Likewise.
-	* config/tc-mt.c (md_atof): Likewise.
-	* config/tc-nds32.c (md_atof): Likewise.
-	* config/tc-nios2.c (md_atof): Likewise.
-	(nios2_elf_section_letter): Constify ptr_msg param.
-	* config/tc-nios2.h (nios2_elf_section_letter): Update prototype.
-	* config/tc-ns32k.c (md_atof): Return const char*.
-	* config/tc-or1k.c (md_atof): Likewise.
-	* config/tc-pdp11.c (struct pdp11_code): Constify error.
-	(md_atof): Return const char*.
-	* config/tc-pj.c (md_atof): Likewise.
-	* config/tc-ppc.c (md_atof): Likewise.
-	* config/tc-rl78.c (md_atof): Likewise.
-	* config/tc-rx.c (md_atof): Likewise.
-	* config/tc-s390.c (md_atof): Likewise.
-	* config/tc-score.c (s3_atof, md_atof): Likewise.
-	* config/tc-sh.c (md_atof): Likewise.
-	* config/tc-sparc.c (struct sparc_it): Constify error.
-	(md_atof): Return const char*.
-	* config/tc-spu.c (md_atof): Likewise.
-	* config/tc-tic30.c (md_atof): Likewise.
-	* config/tc-tic4x.c (md_atof): Likewise.
-	* config/tc-tic54x.c (md_atof): Likewise.
-	* config/tc-tic6x.c (md_atof): Likewise.
-	* config/tc-tilegx.c (md_atof): Likewise.
-	* config/tc-tilepro.c (md_atof): Likewise.
-	* config/tc-v850.c (parse_register_list, md_atof): Likewise.
-	* config/tc-vax.c (md_atof): Likewise.
-	* config/tc-visium.c (md_atof): Likewise.
-	* config/tc-xc16x.c (md_atof): Likewise.
-	* config/tc-xgate.c (md_atof): Likewise.
-	* config/tc-xstormy16.c (md_atof): Likewise.
-	* config/tc-xtensa.c (md_atof): Likewise.
-	* config/tc-z80.c (md_atof): Likewise.
-	* config/tc-z8k.c (md_atof): Likewise.
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-xtensa.c (struct rename_section_struct): Make old_name
-	const.
-	(xtensa_section_rename): Make argument type const char *.
-	* config/tc-xtensa.h (xtensa_section_rename): Adjust.
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-i960.c (parse_ldconst): Cast to char * when assigning to
-	args[0].
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-m32c.c (m32c_md_end): cast the argument to md_assemble to
-	char *.
-	(m32c_indirect_operand): Likewise.
-	* config/tc-nds32.c (do_pseudo_b): Likewise.
-	(do_pseudo_bal): Likewise.
-	(do_pseudo_ls_bhw): Likewise.
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* as.c (parse_args): Cast literal to char * when assigning to optarg.
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-ia64.c (md_assemble): Add temporary variable to pass to
-	get_symbol_name ().
-	* config/tc-sparc.c (s_register): Cast a literal to char * in
-	assignment.
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-i960.c (parse_expr): Cast to char * when assigning to
-	input_line_pointer.
-	* config/tc-m32r.c (expand_debug_syms): Likewise.
-	* config/tc-msp430.c (msp430_dstoperand): Likewise.
-	* config/tc-z80.c (md_begin): Likewise.
-	* stabs.c (stabs_generate_asm_func): Likewise.
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* cgen.c: Modernize the way functions declare arguments.
-	* config/tc-bfin.c: Likewise.
-	* config/tc-pdp11.c: Likewise.
-	* literal.c: Likewise.
-	* read.c: Likewise.
-	* stabs.c: Likewise.
-
-2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-aarch64.c (aarch64_handle_align): Make the type of some
-	variables unsigned char[].
-	* config/tc-alpha.c (alpha_handle_align): Likewise.
-	* config/tc-arm.c (arm_handle_align): Likewise.
-	* config/tc-z80.c: Likewise.
-
-2016-03-30  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19880
-	* config/tc-arm.c (do_t_push_pop): Cast bitmask to unsigned before
-	shifting.
-
-2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/all/gas.exp: Don't xfail on ARC.
-	* testsuite/gas/elf/elf.exp: Likewise.
-	* testsuite/gas/all/redef3.d: Allow execution for ARC.
-
-2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/warn.exp: Fix matching pattern.
-
-2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/gas/arc/ext2op.d: New file.
-	* testsuite/gas/arc/ext2op.s: Likewise.
-	* testsuite/gas/arc/ext3op.d: Likewise.
-	* testsuite/gas/arc/ext3op.s: Likewise.
-
-2016-03-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-aarch64.c (struct aarch64_long_option_table): Ad const
-	qualifier.
-	* config/tc-alpha.c (md_parse_option): Likewise.
-	* config/tc-arc.c (md_parse_option): Likewise.
-	* config/tc-arm.c (struct arm_long_option_table): Likewise.
-	(md_parse_option): Likewise.
-	* config/tc-avr.c (md_parse_option): Likewise.
-	* config/tc-bfin.c (md_parse_option): Likewise.
-	* config/tc-cr16.c (md_parse_option): Likewise.
-	* config/tc-cris.c (s_cris_arch): Likewise.
-	(md_parse_option): Likewise.
-	* config/tc-crx.c (md_parse_option): Likewise.
-	* config/tc-d10v.c (md_parse_option): Likewise.
-	* config/tc-d30v.c (md_parse_option): Likewise.
-	* config/tc-dlx.c (md_parse_option): Likewise.
-	* config/tc-epiphany.c (md_parse_option): Likewise.
-	* config/tc-fr30.c (md_parse_option): Likewise.
-	* config/tc-frv.c (md_parse_option): Likewise.
-	* config/tc-ft32.c (md_parse_option): Likewise.
-	* config/tc-h8300.c (md_parse_option): Likewise.
-	* config/tc-hppa.c (md_parse_option): Likewise.
-	* config/tc-i370.c (md_parse_option): Likewise.
-	* config/tc-i386.c (md_parse_option): Likewise.
-	* config/tc-i860.c (md_parse_option): Likewise.
-	* config/tc-i960.c (md_parse_option): Likewise.
-	* config/tc-ia64.c (md_parse_option): Likewise.
-	* config/tc-ip2k.c (md_parse_option): Likewise.
-	* config/tc-iq2000.c (md_parse_option): Likewise.
-	* config/tc-lm32.c (md_parse_option): Likewise.
-	* config/tc-m32c.c (md_parse_option): Likewise.
-	* config/tc-m32r.c (md_parse_option): Likewise.
-	* config/tc-m68hc11.c (md_parse_option): Likewise.
-	* config/tc-m68k.c (md_parse_option): Likewise.
-	* config/tc-mcore.c (md_parse_option): Likewise.
-	* config/tc-mep.c (md_parse_option): Likewise.
-	* config/tc-metag.c (struct metag_long_option): Likewise.
-	(md_parse_option): Likewise.
-	* config/tc-microblaze.c (md_parse_option): Likewise.
-	* config/tc-microblaze.h (md_parse_option): Remove prototype.
-	* config/tc-mips.c (md_parse_option): Adjust.
-	* config/tc-mmix.c (md_parse_option): Likewise.
-	* config/tc-mn10200.c (md_parse_option): Likewise.
-	* config/tc-mn10300.c (md_parse_option): Likewise.
-	* config/tc-moxie.c (md_parse_option): Likewise.
-	* config/tc-msp430.c (md_parse_option): Likewise.
-	* config/tc-mt.c (md_parse_option): Likewise.
-		* config/tc-nds32.c (md_parse_option): Likewise.
-		* config/tc-nds32.h (nds32_parse_option): Likewise.
-	* config/tc-nios2.c (md_parse_option): Likewise.
-	* config/tc-ns32k.c (md_parse_option): Likewise.
-	* config/tc-or1k.c (md_parse_option): Likewise.
-	* config/tc-pdp11.c (md_parse_option): Likewise.
-	* config/tc-pj.c (md_parse_option): Likewise.
-	* config/tc-ppc.c (md_parse_option): Likewise.
-	* config/tc-rl78.c (md_parse_option): Likewise.
-	* config/tc-rx.c (md_parse_option): Likewise.
-	* config/tc-s390.c (s390_parse_cpu): Likewise.
-	* config/tc-score.c (md_parse_option): Likewise.
-	* config/tc-sh.c (md_parse_option): Likewise.
-	* config/tc-sparc.c (md_parse_option): Likewise.
-	* config/tc-spu.c (md_parse_option): Likewise.
-	* config/tc-tic30.c (md_parse_option): Likewise.
-	* config/tc-tic4x.c (md_parse_option): Likewise.
-	* config/tc-tic54x.c (md_parse_option): Likewise.
-	* config/tc-tic6x.c (md_parse_option): Likewise.
-	* config/tc-tilegx.c (md_parse_option): Likewise.
-	* config/tc-tilepro.c (md_parse_option): Likewise.
-	* config/tc-v850.c (md_parse_option): Likewise.
-	* config/tc-vax.c (md_parse_option): Likewise.
-	* config/tc-visium.c (struct visium_long_option_table): Likewise.
-	* config/tc-xc16x.c (md_parse_option): Likewise.
-	* config/tc-xgate.c (md_parse_option): Likewise.
-	* config/tc-xstormy16.c (md_parse_option): Likewise.
-	* config/tc-xtensa.c (md_parse_option): Likewise.
-	* config/tc-z80.c (md_parse_option): Likewise.
-	* config/tc-z8k.c (md_parse_option): Likewise.
-	* tc.h (md_parse_option): Likewise.
-
-2016-03-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-bfin.c (gencode): Use XOBNEW obstack_alloc () wrapper.
-	* config/tc-hppa.c (fix_new_hppa): Likewise.
-	(pa_vtable_entry): Likewise.
-	(pa_vtable_inherit): Likewise.
-	* config/tc-m68k.c (md_begin): Likewise.
-
-2016-03-28  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/obj-elf.c (obj_elf_section_name): Return const char *.
-	* config/obj-elf.h (obj_elf_section_name): Adjust.
-	* config/tc-aarch64.c (aarch64_parse_features): Likewise.
-	(aarch64_parse_cpu): Likewise.
-	(aarch64_parse_arch): Likewise.
-	* config/tc-arm.c (arm_parse_extension): Likewise.
-	(arm_parse_cpu): Likewise.
-	(arm_parse_arch): Likewise.
-	* config/tc-nds32.c: Likewise.
-	* config/xtensa-relax.c (parse_special_fn): Likewise.
-	* stabs.c (generate_asm_file): Likewise.
-
-2016-03-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-cr16.c (cr16_assemble): New function.
-	(md_assemble): Call cr16_assemble.
-
-2016-03-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* as.c (parse_args): Adjust.
-	* as.h (flag_size_check): Rename to flag_allow_nonconst_size.
-	* config/obj-elf.c (elf_frob_symbol): Adjust.
-
-2016-03-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* config/tc-sparc.c (sparc_ip): Remove the V9 restriction on ASR
-	registers to be in the 16..31 range.
-
-2016-03-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-microblaze.c (md_assemble): Cast opc to char * when calling
-	frag_var ().
-
-2016-03-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-visium.c (md_atof): Localize the string returned on
-	failure.
-
-2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-h8300.c (h8300_elf_section): Add const qualifiers.
-	* config/tc-ia64.c (obj_elf_vms_common): Likewise.
-	* config/tc-m68hc11.c (md_begin): Likewise.
-	(print_opcode_list): Likewise.
-	* config/tc-msp430.c (msp430_section): Likewise.
-	* config/tc-score.c (struct s3_insn_to_dependency): Likewise.
-	(s3_build_dependency_insn_hsh): Likewise.
-	* config/tc-score7.c (struct s7_insn_to_dependency): Likewise.
-	(s7_build_dependency_insn_hsh): Likewise.
-	* config/tc-tic4x.c: Likewise.
-	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
-	(subsym_get_arg): Likewise.
-	* config/tc-xtensa.c (struct suffix_reloc_map): Likewise.
-	(get_directive): Likewise.
-	(cache_literal_section): Likewise.
-	* config/xtensa-relax.c: Likewise.
-	* symbols.c (symbol_create): Likewise.
-	(local_symbol_make): Likewise.
-	(symbol_relc_make_expr): Likewise.
-
-2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-pdp11.c (md_assemble): Remove useless if and assignment to
-	str.
-
-2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-sparc.c (sparc_regname_to_dw2regnum): Replace strchr ()
-	call with a switch.
-
-2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-ia64.c (ia64_do_align): Remove.
-	(ia64_cons_align): Call do_align () directly.
-	(dot_proc): Likewise.
-	(stmt_float_cons): Likewise.
-
-2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* listing.c (listing_message): Use XNEW style allocation macros.
-	* read.c (read_a_source_file): Likewise.
-	(read_symbol_name): Likewise.
-	(s_mri_common): Likewise.
-	(assign_symbol): Likewise.
-	(s_reloc): Likewise.
-	(emit_expr_with_reloc): Likewise.
-	(s_incbin): Likewise.
-	(s_include): Likewise.
-	* sb.c (sb_build): Likewise.
-	(sb_check): Likewise.
-
-2016-03-22  Alan Modra  <amodra@gmail.com>
-
-	* write.c (record_alignment): Revert 2016-02-18 change.
-
-2016-03-22  Alan Modra  <amodra@gmail.com>
-
-	* config/tc-alpha.c (load_expression): Replace alloca with xmalloc.
-	(emit_jsrjmp, tc_gen_reloc): Likewise.
-	* config/tc-i370.c (i370_macro): Likewise.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	* configure: Regenerate.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/nps400-0.d: New file.
-	* testsuite/gas/arc/nps400-0.s: New file.
-	* testsuite/gas/arc/nps400-1.d: New file.
-	* testsuite/gas/arc/nps400-1.s: New file.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (find_opcode_match): Move lnflg, and i
-	declarations to start of block.  Reset code on all flags before
-	attempting to match them.  Handle multiple hits on the same flag.
-	Handle flag class.
-	* testsuite/gas/arc/asm-errors.d: New file.
-	* testsuite/gas/arc/asm-errors.err: New file.
-	* testsuite/gas/arc/asm-errors.s: New file.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (cpu_types): Add nps400 entry.
-	(check_zol): Handle nps400.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (arc_select_cpu): Remove use of
-	EF_ARC_CPU_GENERIC.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* config/tc-arc.c (arc_target): Delay initialisation until
-	arc_select_cpu.
-	(arc_target_name): Likewise.
-	(arc_features): Likewise.
-	(arc_mach_type): Likewise.
-	(cpu_types): Remove "all" entry.
-	(arc_select_cpu): New function, most of the content is from...
-	(md_parse_option): ... here.  Call new arc_select_cpu.
-	(md_begin): Call arc_select_cpu if needed, default is now arc700.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/inline-data-1.d: Add target restriction.
-	* testsuite/gas/arc/inline-data-2.d: New file.
-
-2016-03-21  Nick Clifton  <nickc@redhat.com>
-
-	* atof-generic.c: Replace use of alloca with call to xmalloc.
-	* cgen.c: Likewise.
-	* dwarf2dbg.c: Likewise.
-	* macro.c: Likewise.
-	* remap.c: Likewise.
-	* stabs.c: Likewise.
-	* symbols.c: Likewise.
-	* config/obj-elf.c: Likewise.
-	* config/tc-aarch64.c: Likewise.
-	* config/tc-arc.c: Likewise.
-	* config/tc-arm.c: Likewise.
-	* config/tc-avr.c: Likewise.
-	* config/tc-ia64.c: Likewise.
-	* config/tc-mips.c: Likewise.
-	* config/tc-msp430.c: Likewise.
-	* config/tc-nds32.c: Likewise.
-	* config/tc-ppc.c: Likewise.
-	* config/tc-sh.c: Likewise.
-	* config/tc-tic30.c: Likewise.
-	* config/tc-tic54x.c: Likewise.
-	* config/tc-xstormy16.c: Likewise.
-	* config/te-vms.c: Likewise.
-	* configure: Regenerate.
-
-2016-03-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* tc-i386.c (f32_1): Change type to unsigned char[].
-	(f32_2): Likewise.
-	(f32_3): Likewise.
-	(f32_4): Likewise.
-	(f32_5): Likewise.
-	(f32_6): Likewise.
-	(f32_7): Likewise.
-	(f32_8): Likewise.
-	(f32_9): Likewise.
-	(f32_10): Likewise.
-	(f32_11): Likewise.
-	(f32_12): Likewise.
-	(f32_13): Likewise.
-	(f32_14): Likewise.
-	(f16_3): Likewise.
-	(f16_4): Likewise.
-	(f16_5): Likewise.
-	(f16_6): Likewise.
-	(f16_7): Likewise.
-	(f16_8): Likewise.
-	(jump_31): Likewise.
-	(f32_patt): Likewise.
-	(f16_patt): Likewise.
-	(alt_3): Likewise.
-	(alt_4): Likewise.
-	(alt_5): Likewise.
-	(alt_6): Likewise.
-	(alt_7): Likewise.
-	(alt_8): Likewise.
-	(alt_9): Likewise.
-	(alt_10): Likewise.
-	(alt_patt): Likewise.
-
-2016-03-18  Nick Clifton  <nickc@redhat.com>
-
-	* doc/c-aarch64.texi (AArch64 Directives): Add descriptions of
-	.cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall,
-	.tlsdescldr and .xword directives.
-
-	PR target/19721
-	* testsuite/gas/aarch64/pr19721.s: New test source file.
-	* testsuite/gas/aarch64/pr19721.d: New test driver file.
-
-	* doc/as.texinfo: Place the target specific command line options
-	into their own man page section.
-
-2016-03-16  Jiong Wang  <jiong.wang@arm.com>
-
-	* config/tc-arm.c (N_S_32): New.
-	(N_F_16_32): Likewise.
-	(N_SUF_32): Support N_F16.
-	(N_IF_32): Likewise.
-	(neon_dyadic_misc): Likewise.
-	(do_neon_cmp): Likewise.
-	(do_neon_cmp_inv): Likewise.
-	(do_neon_mul): Likewise.
-	(do_neon_fcmp_absolute): Likewise.
-	(do_neon_step): Likewise.
-	(do_neon_abs_neg): Likewise.
-	(CVT_FLAVOR_VAR): Likewise.
-	(do_neon_cvt_1): Likewise.
-	(do_neon_recip_est): Likewise.
-	(do_vmaxnm): Likewise.
-	(do_vrint_1): Likewise.
-	(neon_check_type): Check architecture support for FP16 extension.
-	(insns): Update comments.
-	* testsuite/gas/arm/armv8-2-fp16-simd.s: New test source.
-	* testsuite/gas/arm/armv8-2-fp16-simd.d: New testcase for arm mode.
-	* testsuite/gas/arm/armv8-2-fp16-simd-thumb.d: Likewise for thumb mode.
-	* testsuite/gas/arm/armv8-2-fp16-simd-warning.d: New rejection test for
-	arm mode.
-	* testsuite/gas/arm/armv8-2-fp16-simd-warning-thumb.d: Likewise for
-	thumb mode.
-	* testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New expected rejection
-	error file.
-
-2016-03-16  Nick Clifton  <nickc@redhat.com>
-
-	* read.c (emit_expr_with_reloc): Add code check a bignum with
-	nbytes == 1.
-	* config/rx/rx-parse.y (rx_intop): Accept bignum values for sizes
-	other than 32-bits.
-	* testsuite/gas/elf/bignum.s: New test source file.
-	* testsuite/gas/elf/bignum.d: New test driver file.
-	* testsuite/gas/elf/elf.exp: Run the new test.
-
-2016-03-15  Ulrich Drepper  <drepper@gmail.com>
-
-	* doc/c-i386.texi (Register Naming): Update to details of the
-	latest architecture version.
-
-2016-03-10  Mickael Guene  <mickael.guene@st.com>
-
-	PR gas/19744
-	* config/tc-arm.c (do_arit): Protect against bad relocations usage.
-	(do_mov): Likewise.
-	(do_t_add_sub): Allow pcrop relocations for Thumb-2 targets.
-	(do_t_mov_cmp): Likewise.
-	(do_t_add_sub): Protect against bad relocations usage.
-	(do_t_mov_cmp): Likewise.
-	* testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.s: New.
-	* testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.d: New.
-	* testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.s: New.
-	* testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.d: New.
-
-2016-03-09  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-arm.c (neon_alignment_bit): Rename do_align to
-	do_alignment.
-	(do_neon_ld_st_lane): Likewise.
-	(do_neon_ld_dup): Likewise.
-
-2016-03-08  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/inline-data-1.d: New file.
-	* testsuite/gas/arc/inline-data-1.s: New file.
-
-2016-03-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
-
-	* config/tc-arm.c (arm_cpus): Add cortex-r8.
-	* doc/c-arm.texi: Add cortex-r8.
-
-2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* config/tc-arc.c: Add const qualifiers.
-	* config/tc-h8300.c (md_begin): Likewise.
-	* config/tc-ia64.c (print_prmask): Likewise.
-	* config/tc-msp430.c (msp430_operands): Likewise.
-	* config/tc-nds32.c (struct suffix_name): Likewise.
-	(struct nds32_parse_option_table): Likewise.
-	(struct nds32_set_option_table): Likewise.
-	(do_pseudo_pushpopm): Likewise.
-	(do_pseudo_pushpop_stack): Likewise.
-	(nds32_relax_relocs): Likewise.
-	(nds32_flag): Likewise.
-	(struct nds32_hint_map): Likewise.
-	(nds32_find_reloc_table): Likewise.
-	(nds32_match_hint_insn): Likewise.
-	* config/tc-s390.c: Likewise.
-	* config/tc-sh.c (get_specific): Likewise.
-	* config/tc-tic30.c: Likewise.
-	* config/tc-tic4x.c (tic4x_inst_add): Likewise.
-	(tic4x_indirect_parse): Likewise.
-	* config/tc-vax.c (vax_cons): Likewise.
-	* config/tc-z80.c (struct reg_entry): Likewise.
-	* config/tc-epiphany.c (md_assemble): Adjust.
-	(epiphany_assemble): New function.
-	(epiphany_elf_section_rtn): Call do_align directly.
-	(epiphany_elf_section_text): Likewise.
-	* config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise.
-	(ip2k_elf_section_text): Likewise.
-	* read.c (do_align): Make it not static.
-	* read.h (do_align): New prototype.
-
-2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* config/tc-arm.c (aeabi_set_public_attributes): Emit attribute
-	for ARMv8.1 AdvSIMD use.
-	* testsuite/gas/arm/attr-march-armv8-a+rdma.d: New.
-	* testsuite/gas/arm/attr-march-armv8_1-a+simd.d: New.
-
-2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* config/gas/tc-arm.c (fpu_neon_ext_v8_1): Restrict to the ARMv8.1 RDMA
-	feature.
-	(record_feature_use): New.
-	(mark_feature_used): Use record_feature_use.
-	(do_neon_qrdmlah): New.
-	(insns): Use do_neon_qrdmlah for vqrdmlah and vqrdmlsh and
-	variants.
-	(arm_extensions): Put into alphabetical order.  Re-indent "simd"
-	and "rdma" entries.  Fix the incorrect merge value for "+rdma".
-	* testsuite/gas/arm/armv8-a+rdma-warning.d: New.
-	* testsuite/gas/arm/armv8-a+rdma.d: Add assembler command line options.
-	Make source file explicit.
-	* testsuite/gas/arm/armv8-a+rdma.l: New.
-	* testsuite/gas/arm/armv8-a+rdma.s: Remove .arch and .arch_extension
-	directives.  Fix white-space.
-	* testsuite/gas/arm/armv8_1-a+simd.d: New.
-
-2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/gas/i386/x86_64-intel.d: Adjusted for COFF.
-
-2016-02-29  Cupertino Miranda  <cmiranda@synopsys.com>
-	    Claudiu Zissulescu  <Claudiu.Zissulescu@synopsys.com>
-
-	* config/tc-arc.c (arc_extra_reloc): Change size to 0.
-	(tc_arc_fix_adjustable): Changed default return value to 1.
-	* testsuite/gas/arc/j.d: Updated expected symbol
-	* testsuite/gas/arc/jl.d: Likewise
-	* testsuite/gas/arc/relax-avoid1.d: Likewise
-	* testsuite/gas/arc/st.d: Likewise
-
-2016-02-29  Claudiu Zissulescu  <Claudiu.Zissulescu@synopsys.com>
-
-	* config/tc-arc.c: Enable code density instructions for ARC EM.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19645
-	* NEWS: Mention --enable-elf-stt-common and --elf-stt-common=
-	for ELF assemblers.
-	* as.c (flag_use_elf_stt_common): New.
-	(show_usage): Add --elf-stt-common=.
-	(option_values): Add OPTION_ELF_STT_COMMON.
-	(std_longopts): Add --elf-stt-common=.
-	(parse_args): Handle --elf-stt-common=.
-	* as.h (flag_use_elf_stt_common): New.
-	* config.in: Regenerated.
-	* configure: Likewise.
-	* configure.ac: Add --enable-elf-stt-common and define
-	DEFAULT_GENERATE_ELF_STT_COMMON.
-	* gas/write.c (write_object_file): Set BFD_CONVERT_ELF_COMMON
-	and BFD_USE_ELF_STT_COMMON if flag_use_elf_stt_common is set.
-	* doc/as.texinfo: Document --elf-stt-common=.
-	* testsuite/gas/elf/common3.s: New file.
-	* testsuite/gas/elf/common3a.d: Likewise.
-	* testsuite/gas/elf/common3b.d: Likewise.
-	* testsuite/gas/elf/common4.s: Likewise.
-	* testsuite/gas/elf/common4a.d: Likewise.
-	* testsuite/gas/elf/common4b.d: Likewise.
-	* testsuite/gas/i386/dw2-compress-3b.d: Likewise.
-	* testsuite/gas/i386/dw2-compressed-3b.d: Likewise.
-	* testsuite/gas/elf/elf.exp: Run common3a, common3b, common4a
-	and common4b.
-	* testsuite/gas/i386/dw2-compress-3.d: Renamed to ...
-	* testsuite/gas/i386/dw2-compress-3a.d: This.  Pass
-	--elf-stt-common=no to as.
-	* testsuite/gas/i386/dw2-compressed-3.d: Renamed to ...
-	* testsuite/gas/i386/dw2-compressed-3a.d: This.  Pass
-	--elf-stt-common=no to as.
-	* testsuite/gas/i386/i386.exp: Run dw2-compress-3a,
-	dw2-compress-3b, dw2-compressed-3a and dw2-compressed-3b instead
-	of dw2-compress-3 and dw2-compressed-3.
-
-2016-02-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* as.c (select_emulation_mode): Add const qualifiers.
-	* as.h: Likewise.
-	* config/bfin-defs.h: Likewise.
-	* config/bfin-parse.y: Likewise.
-	* config/rx-parse.y: Likewise.
-	* config/tc-aarch64.c (struct aarch64_option_table): Likewise.
-	(struct aarch64_cpu_option_table): Likewise.
-	(struct aarch64_arch_option_table): Likewise.
-	(struct aarch64_option_cpu_value_table): Likewise.
-	(struct aarch64_long_option_table): Likewise.
-	(struct aarch64_option_abi_value_table): Likewise.
-	* config/tc-arm.c (struct reloc_entry): Likewise.
-	(tc_gen_reloc): Likewise.
-	(struct arm_option_table): Likewise.
-	(struct arm_legacy_option_table): Likewise.
-	(struct arm_cpu_option_table): Likewise.
-	(struct arm_arch_option_table): Likewise.
-	(struct arm_option_extension_value_table): Likewise.
-	(struct arm_option_fpu_value_table): Likewise.
-	(struct arm_option_value_table): Likewise.
-	(struct arm_long_option_table): Likewise.
-	* config/tc-avr.c (struct avr_opcodes_s): Likewise.
-	(struct mcu_type_s): Likewise.
-	(struct exp_mod_s): Likewise.
-	(avr_operand): Likewise.
-	(avr_operands): Likewise.
-	* config/tc-d10v.c (md_begin): Likewise.
-	* config/tc-dlx.c: Likewise.
-	* config/tc-fr30.c (fr30_is_colon_insn): Likewise.
-	* config/tc-ft32.c (parse_condition): Likewise.
-	* config/tc-h8300.c (do_a_fix_imm): Likewise.
-	* config/tc-hppa.c (pa_ip): Likewise.
-	(hppa_regname_to_dw2regnum): Likewise.
-	* config/tc-i370.c (i370_elf_suffix): Likewise.
-	* config/tc-i960.c (struct tabentry): Likewise.
-	* config/tc-m32r.c: Likewise.
-	* config/tc-m68k.c: Likewise.
-	* config/tc-m68k.h: Likewise.
-	* config/tc-mcore.c (parse_psrmod): Likewise.
-	* config/tc-metag.c (struct metag_core_option): Likewise.
-	(struct metag_long_option): Likewise.
-	* config/tc-microblaze.c: Likewise.
-	* config/tc-mips.c (macro): Likewise.
-	* config/tc-mn10200.c: Likewise.
-	* config/tc-mn10300.c: Likewise.
-	* config/tc-msp430.c (struct rcodes_s): Likewise.
-	(struct hcodes_s): Likewise.
-	(md_parse_option): Likewise.
-	* config/tc-ns32k.c (struct ns32k_option): Likewise.
-	(optlist): Likewise.
-	* config/tc-ppc.c (ppc_elf_suffix): Likewise.
-	(tc_ppc_regname_to_dw2regnum): Likewise.
-	* config/tc-ppc.h: Likewise.
-	* config/tc-rl78.c: Likewise.
-	* config/tc-rx.c (struct cpu_type): Likewise.
-	* config/tc-sh.c (sh_regname_to_dw2regnum): Likewise.
-	* config/tc-sparc.c (struct priv_reg_entry): Likewise.
-	(sparc_ip): Likewise.
-	* config/tc-spu.c (insn_fmt_string): Likewise.
-	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
-	* config/tc-v850.c: Likewise.
-	* config/tc-visium.c (struct visium_arch_option_table): Likewise.
-	(struct visium_long_option_table): Likewise.
-	* config/tc-xgate.c: Likewise.
-	* config/tc-z8k.c: Likewise.
-	* read.c (add_include_dir): Likewise.
-	* read.h: Likewise.
-
-2016-02-25  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/all/gas.exp: Change target pattern to cover
-	arceb-*.
-	* testsuite/gas/all/redef3.d: Likewise.
-	* testsuite/gas/elf/elf.exp: Likewise.
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* config/tc-arm.c (BAD_FP16): New error message macro.
-	(do_scalar_fp16_v82_encode): Change the coproc field to 9 for armv8.2
-	fp16 scalar instructions.
-	(neon_check_type): Allow different size from key.
-	(do_vfp_nsyn_add_sub): Add support SE_H shape support.
-	(try_vfp_nsyn): Likewise.
-	(do_vfp_nsyn_mla_mls): Likewise.
-	(do_vfp_nsyn_fma_fms): Likewise.
-	(do_vfp_nsyn_ldm_stm): Likewise
-	(do_vfp_nsyn_sqrt): Likewise
-	(do_vfp_nsyn_div): Likewise
-	(do_vfp_nsyn_nmul): Likewise.
-	(do_vfp_nsyn_cmp): Likewise.
-	(do_neon_shll): Likewise.
-	(do_vfp_nsyn_cvt_fpv8): Likewise.
-	(do_neon_cvttb_2): Likewise.
-	(do_neon_mov): Likewise.
-	(do_neon_rshift_round_imm): Likewise.
-	(do_neon_ldr_str): Likewise.
-	(do_vfp_nsyn_fpv8): Likewise.
-	(do_vmaxnm): Likewise.
-	(do_vrint_1): Likewise.
-	(insns): New entry for vins, vmovx.
-	(md_apply_fix): Left shift 1 bit for fp16 vldr/vstr.
-	* testsuite/gas/arm/armv8-2-fp16-scalar-thumb.d: New.
-	* testsuite/gas/arm/armv8-2-fp16-scalar.d: New.
-	* testsuite/gas/arm/armv8-2-fp16-scalar.s: New.
-	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.s: New
-	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.d: New
-	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.l: New
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* config/tc-arm.c (NEON_ENC_TAB): Add fp16 instruction shape.
-	(neon_shape_class): New SC_HALF.
-	(neon_shape_el): New SE_H.
-	(neon_shape_el_size): New size for SE_H.
-	(N_F_ALL): New macro to aggregate N_F16, N_F32, N_64.
-	(neon_select_shape): Add SE_H support code.
-	(el_type_of_type_chk): Use N_F_ALL.
-	(do_vfp_nsyn_cvt): Add SE_H shape support.
-	(do_neon_cvtz): Likewise.
-	(do_neon_cvt_1): Likewise.
-	(do_neon_cvttb_1): Likewise.
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* testsuite/gas/arm/copro.d: Adjust output.
-	* testsuite/gas/arm/copro.s: Adjust co-processor num.
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* testsuite/gas/arm/mask_1.d: New.
-	* testsuite/gas/arm/mask_1.s: New.
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11.
-	* testsuite/gas/arm/copro.d: Update.
-
-2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
-
-	* config/tc-arm.c (arm_cpus): Add entry for cortex-a32.
-	* doc/c-arm.texi (ARM Options): Document cortex-a32.
-
-2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
-
-	* doc/c-arm.texi (ARM Options): Document cortex-a17.
-
-2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/gas/elf/elf.exp: Skip tests for common directive on
-	hpux.
-
-2016-02-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* output-file.c (output_file_create): Make file name argument const.
-	(output_file_close): Likewise.
-	* output-file.h (output_file_create): Adjust.
-	(output_file_close): Likewise.
-	* depend.c (quote_string_for_make): Make src argument const char *.
-	(register_dependency): Likewise.
-	(wrap_output): Likewise.
-	* as.h (register_dependency): Adjust.
-	* config/tc-xtensa.c (finish_vinsn): Remove unnecessary calls to
-	as_where ();
-	* symbols.c (S_SET_EXTERNAL): Likewise.
-	* input-scrub.c (as_where): Return the file name.
-	* as.h (as_where): Adjust prototype.
-	* app.c (do_scrub_chars): Adjust.
-	* cond.c (s_elseif): Likewise.
-	(s_else): Likewise.
-	(initialize_cframe): Likewise.
-	* config/obj-coff.c (obj_coff_init_stab_section): Likewise.
-	* config/obj-elf.c (obj_elf_init_stab_section): Likewise.
-	* config/obj-som.c (obj_som_init_stab_section): Likewise.
-	* config/tc-aarch64.c (output_info): Likewise.
-	* config/tc-ia64.c (md_assemble): Likewise.
-	(dot_alias): Likewise.
-	* config/tc-m68k.c (m68k_frob_label): Likewise.
-	* config/tc-mmix.c (s_bspec): Likewise.
-	(mmix_handle_mmixal): Likewise.
-	* config/tc-rx.c (rx_include): Likewise.
-	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
-	(tic54x_adjust_symtab): Likewise.
-	* config/tc-xtensa.c (directive_push): Likewise.
-	(xtensa_sanity_check): Likewise.
-	(xtensa_relax_frag): Likewise.
-	(md_convert_frag): Likewise.
-	(tinsn_to_slotbuf): Likewise.
-	* dwarf2dbg.c (dwarf2_where): Likewise.
-	* ecoff.c (add_file): Likewise.
-	(ecoff_generate_asm_lineno): Likewise.
-	* expr.c (make_expr_symbol): Likewise.
-	* frags.c (frag_new): Likewise.
-	(frag_var_init): Likewise.
-	* listing.c (listing_newline): Likewise.
-	* messages.c (identify): Likewise.
-	(as_show_where): Likewise.
-	(as_warn_internal): Likewise.
-	(as_bad_internal): Likewise.
-	* read.c (s_irp): Likewise.
-	(s_macro): Likewise.
-	(s_reloc): Likewise.
-	* stabs.c (stabs_generate_asm_file): Likewise.
-	(stabs_generate_asm_lineno): Likewise.
-	(stabs_generate_asm_func): Likewise.
-	* write.c (fix_new_internal): Likewise.
-	* as.h (PRINTF_WHERE_LIKE): Make file name argument const.
-	(as_warn_value_out_of_range): Adjust prototype.
-	(as_bad_value_out_of_range): Adjust prototype.
-	* messages.c (identify): Make file name argument const char *.
-	(as_warn_internal): Likewise.
-	(as_warn_where): Likewise.
-	(as_bad_internal): Likewise.
-	(as_bad_where): Likewise.
-	(as_internal_value_out_of_range): Likewise.
-	(as_warn_value_out_of_range): Likewise.
-	(as_bad_value_out_of_range): Likewise.
-	* as.h (found_comment_file): Change type to const char *.
-	* cond.c (file_line::file): Likewise.
-	* config/obj-coff.c (obj_coff_init_stab_section): Make variable const.
-	* config/obj-elf.c (obj_elf_init_stab_section): Likewise.
-	* config/obj-som.c (obj_som_init_stab_section): Likewise.
-	* config/tc-aarch64.c (output_info): Likewise.
-	* config/tc-alpha.c (insert_operand): Likewise.
-	* config/tc-arc.c (insert_operand): Likewise.
-	* config/tc-d30v.c (check_size): Likewise.
-	* config/tc-ia64.c (struct alias): Likewise.
-	* config/tc-m68k.c (struct label_line): Likewise.
-	* config/tc-mcore.c (md_apply_fix): Likewise.
-	* config/tc-microblaze.c (md_estimate_size_before_relax): Likewise.
-	* config/tc-mips.c (mips16_immed): Likewise.
-	* config/tc-mmix.c (mmix_handle_mmixal): Likewise.
-	* config/tc-ppc.c (ppc_insert_operand): Likewise.
-	* config/tc-rx.c (rx_include): Likewise.
-	* config/tc-s390.c (s390_insert_operand): Likewise.
-	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
-	(tic54x_adjust_symtab): Likewise.
-	* config/tc-tilegx.c (insert_operand): Likewise.
-	(apply_special_operator): Likewise.
-	* config/tc-tilepro.c (insert_operand): Likewise.
-	* config/tc-xtensa.c (directive_push): Likewise.
-	* ecoff.c (add_file): Likewise.
-	(ecoff_generate_asm_lineno): Likewise.
-	* listing.c (listing_newline): Likewise.
-	* read.c (s_irp): Likewise.
-	* write.c (install_reloc): Likewise.
-	* write.h (struct fix): Likewise.
-	* input-file.c (file_name): Change type to const char *.
-	(saved_file::file_name): Likewise.
-	(input_file_open): Change type of argument to const char *.
-	* input-file.h (input_file_open): Adjust.
-	* input-scrub.c (logical_input_file): change type to const char *.
-	(physical_input_file): Likewise.
-	(struct input_save): Adjust.
-	(input_scrub_push): Adjust.
-	(input_scrub_begin): Adjust.
-	(as_where): Adjust.
-	* input-scrub.c (input_scrub_new_file): Make file name argument const.
-	(input_scrub_include_file): Likewise.
-	(new_logical_line_flags): Likewise.
-	(new_logical_line): Likewise.
-	* as.h: Adjust.
-	* frags.h (struct frag): Change type of fr_file to const char *.
-	* expr.c (expr_symbol_where): Change type of file argument to
-	const char **.
-	* expr.h (expr_symbol_where): Likewise.
-	* config/tc-i370.c (md_apply_fix): adjust.
-	* config/tc-mmix.c (mmix_md_end): Likewise.
-	* config/tc-ppc.c (md_apply_fix): Likewise.
-	* config/tc-s390.c (md_apply_fix): Likewise.
-	* symbols.c (report_op_error): Likewise.
-	(resolve_symbol_value): Likewise.
-	* config/tc-ia64.c (slot::src_file): Change type to const char *.
-	(rsrc::file): Likewise.
-	* config/tc-xtensa.c (xtensa_sanity_check): Change type of variable to
-	const char *.
-	(xtensa_relax_frag): Likewise.
-	(md_convert_frag): Likewise.
-	(tinsn_to_slotbuf): Likewise.
-	* expr.c (expr_symbol_line): Likewise.
-	* macro.c (define_macro): Likewise.
-	* macro.h (macro_struct): Likewise.
-	* messages.c (as_show_where): Likewise.
-	* read.c (s_macro): Likewise.
-	* stabs.c (stabs_generate_asm_file): Likewise.
-	(generate_asm_file): Likewise.
-	(stabs_generate_asm_lineno): Likewise.
-	* write.h (struct reloc_list): Likewise.
-	* input-scrub.c (as_where): Change return type to const char *.
-	* as.h (as_wheree): Adjust.
-
-2016-02-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* write.c (compress_debug): Move BFD compression bits setting
-	to ...
-	(write_object_file): Here.
-
-2016-02-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (register_number): Check RegVRex.
-	* testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd
-	with %zmm19 and %zmm3.
-	* testsuite/gas/i386/x86-64-avx512f-intel.d: Updated.
-	* testsuite/gas/i386/x86-64-avx512f.d: Likewise.
-
-2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
-	    Jiong Wang  <jiong.wang@arm.com>
-
-	* config/tc-arm.c (arm_ext_fp16): New.
-	(arm_extensions): New entry for "fp16".
-
-2016-02-19  Nick Clifton  <nickc@redhat.com>
-
-	PR 19630
-	* read.c (read_a_source_file): Check for assemble_one returning
-	with input_line_pointer set to NULL.
-
-2016-02-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* listing.c (rebuffer_line): Change return type to void.
-
-	* symbols.c (decode_local_label_name): Make type a const char *.
-	* listing.c (print_source): Make type of p const char *.
-	(print_line): Make type of string const	char *.
-	(buffer_line): Return const char *.
-	(title): Make type const char *.
-	(subtitle): Likewise.
-	(listing_listing): Make type of p const char *.
-	* messages.c (as_internal_value_out_of_range): Make type of prefix
-	const char *.
-	* stabs.c (s_stab_generic): make type of stab_secname, stabstr_secname
-	and string const char *.
-	* read.c (_bfd_rel): Make type of name const char *.
-	* app.c (out_string): Change type to const char *.
-	(struct app_save::out_string): Likewise.
-
-2016-02-18  Dan Gisselquist  <dgisselq@verizon.net>
-	    Nick Clifton  <nickc@redhat.com>
-
-	* read.c (finish_bundle): Avoid recording a negative alignment.
-	(do_align): Use unsigned values for n, len and max.  Only create
-	a frag if the alignment requirement is greater than the minimum
-	byte alignment.  Avoid recording a negative alignment.
-	(s_align): Use unsigned values where appropriate.
-	(bss_alloc): Use an unsigned value for the alignment.
-	(sizeof_sleb128): Add a comment noting that we encode one octet
-	per byte, regardless of the value of OCTETS_PER_BYTE_POWER.
-	(emit_leb129_expr): Abort if the emitted encoding was longer than
-	expected.
-	* read.h (output_leb128): Update prototype.
-	(sizeof_leb128): Update prototype.
-	(bss_alloc): Update prototype.
-	* write.c (record_alignment): Use an unsigned value for the
-	alignment.  Do not record alignments less than the minimum
-	alignment for a byte.
-	* write.h (record_alignment): Update prototype.
-
-2016-02-17  Max Filippov  <jcmvbkbc@gmail.com>
-
-	* config/tc-xtensa.c (xtensa_move_literals): Fix check for
-	.init.literal/.fini.literal section name.
-	* testsuite/gas/xtensa/all.exp: Add init-fini-literals to the
-	list of xtensa tests.
-	* testsuite/gas/xtensa/init-fini-literals.d: New file:
-	init-fini-literals test result patterns.
-	* testsuite/gas/xtensa/init-fini-literals.s: New file:
-	init-fini-literals test.
-
-2016-02-17  Nick Clifton  <nickc@redhat.com>
-
-	* config/tc-msp430.c (msp430_mcu_data): Sync with data from TI's
-	devices.csv file as of March 2016.
-
-2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (tc_arc_frame_initial_instructions): New
-	function.
-	(tc_arc_regname_to_dw2regnum): Likewise.
-	* config/tc-arc.h (TARGET_USE_CFIPOP): Define
-	(tc_cfi_frame_initial_instructions): Likewise.
-	(tc_regname_to_dw2regnum): Likewise.
-	* testsuite/gas/cfi/cfi-arc-1.d: New file.
-	* testsuite/gas/cfi/cfi-arc-1.s: Likewise.
-	* testsuite/gas/cfi/cfi.exp: Allow running tests for arc.
-
-2016-02-16  Trevor Saunders  <tbsaunde@tbsaunde.org>
-
-	* doc/internals.texi (S_IS_EXTERN): Remove.
-
-2016-02-16  Nick Clifton  <nickc@redhat.com>
-
-	* doc/as.texinfo (Section): Fix up texinfo snafus in previous
-	update.
-
-2016-02-16  Renlin Li  <renlin.li@arm.com>
-
-	PR gas/19620
-	* config/tc-aarch64.c (parse_half): Remove restrictions on symbol name.
-	* testsuite/gas/aarch64/movw_label.d: New.
-	* testsuite/gas/aarch64/movw_label.s: New.
-
-2016-02-15  Vinay Kumar G. <Vinay.G@kpit.com>
-
-	PR gas/19556
-	* config/rx-parse.y (MOV):  Opcode generation for index
-	register addressing mode.
-	* testsuite/gas/rx/rx.exp: Updated for new testcase.
-	* testsuite/gas/rx/pr19665.s: New file.
-	* testsuite/gas/rx/pr19665.s: New file.
-	* testsuite/gas/rx/mov.d: Update expected output.
-
-2016-02-15  Nick Clifton  <nickc@redhat.com>
-
-	* doc/as.texinfo (.section): Document that numeric values can now
-	be used for the flags and type fields of the ELF target's .section
-	directive.  Add notes about the restrictions on setting flags and
-	types.
-	* config/obj-elf.c (obj_elf_change_section): Allow known sections
-	to be given processor specific section types.  Allow processor and
-	application specific flags of a section to be set after
-	definition.
-	(obj_elf_parse_section_letters): Handle parsing numeric values.
-	(obj_elf_section_type): Handle parsing numeric values.
-	(obj_elf_section): Allow numeric type values.
-	* config/obj-elf.h (obj_elf_change_section): Update prototype.
-	* testsuite/gas/elf/section10.d: New test.
-	* testsuite/gas/elf/section10.s: Source file for new test.
-	* testsuite/gas/elf/elf.exp: Run the new test.
-	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon
-	the description of the flags produced by readelf.
-	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
-	* NEWS: Mention the new feature.
-
-2016-02-11  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/19614
-	* dw2gencfi.c (cfi_sections_set): Delay setting this variable
-	until it is actually used.
-	(cfi_set_sections): Set cfi_sections_set to true.
-	(dot_cfi_startproc): Likewise.
-	(dot_cfi_endproc): Likewise.
-	(dot_cfi_fde_data): Likewise.
-	(cfi_finish): Likewise.
-	(dot_cfi_sections): Do not set cfi_sections_set.
-	* doc/as.texinfo (.cfi_sections): Note that targets can provide
-	their own cfi section name.  Also note that the directive can be
-	reissued provided that CFI generation has not started.
-	* testsuite/gas/mips/compact-eh-err2.s: Add .cfi_startproc and
-	.cfi_endproc directives so that the redefinition of .cfi_sections
-	will trigger the generation of the error message.
-	* testsuite/gas/mips/compact-eh-err2.l: Update expected line
-	number of error message.
-
-2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
-	    Janek van Oirschot <jvanoirs@synopsys.com>
-
-	* config/tc-arc.h (TC_FRAG_TYPE, TC_PCREL_ADJUST, MAX_INSN_ARGS)
-	(MAX_INSN_FLGS, MAX_FLAG_NAME_LENGHT, TC_GENERIC_RELAX_TABLE):
-	Define.
-	(arc_flags, arc_relax_type): New structure.
-	* config/tc-arc.c (FRAG_MAX_GROWTH, RELAX_TABLE_ENTRY)
-	(RELAX_TABLE_ENTRY_MAX): New define.
-	(relaxation_state, md_relax_table, arc_relaxable_insns)
-	(arc_num_relaxable_ins): New variable.
-	(rlx_operand_type, arc_rlx_types): New enums.
-	(arc_relaxable_ins): New structure.
-	(OPTION_RELAX): New option.
-	(arc_insn): New relax member.
-	(arc_flags): Remove.
-	(relax_insn_p): New function.
-	(apply_fixups): Likewise.
-	(relaxable_operand): Likewise.
-	(may_relax_expr): Likewise.
-	(relaxable_flag): Likewise.
-	(arc_pcrel_adjust): Likewise.
-	(md_estimate_size_before_relax): Implement.
-	(md_convert_frag): Likewise.
-	(md_parse_option): Handle new mrelax option.
-	(md_show_usage): Likewise.
-	(assemble_insn): Set relax member.
-	(emit_insn0): New function.
-	(emit_insn1): Likewise.
-	(emit_insn): Handle relaxation case.
-	* NEWS: Mention the new relaxation option.
-	* doc/c-arc.texi (ARC Options): Document new mrelax option.
-	* doc/as.texinfo (Target ARC Options): Likewise.
-	* testsuite/gas/arc/relax-avoid1.d: New file.
-	* testsuite/gas/arc/relax-avoid1.s: Likewise.
-	* testsuite/gas/arc/relax-avoid2.d: Likewise.
-	* testsuite/gas/arc/relax-avoid2.s: Likewise.
-	* testsuite/gas/arc/relax-avoid3.d: Likewise.
-	* testsuite/gas/arc/relax-avoid3.s: Likewise.
-	* testsuite/gas/arc/relax-b.d: Likewise.
-	* testsuite/gas/arc/relax-b.s: Likewise.
-
-2016-02-08  Nick Clifton  <nickc@redhat.com>
-
-	* config/tc-ia64.c (dot_prologue): Fix formatting.
-
-2016-02-04  Nick Clifton  <nickc@redhat.com>
-
-	* config/obj-elf.c (obj_elf_change_section): Remove support for
-	ARM NOREAD sections.
-	* config/tc-arm.c (arm_elf_section_letter): Delete.
-	* config/tc-arm.h (md_elf_section_letter): Delete.
-	* doc/c-arm.texi (ARM Section Attribute): Delete section.
-	* testsuite/gas/arm/section-execute-only.d: Delete.
-	* testsuite/gas/arm/section-execute-only.s: Delete.
-
-2016-02-04  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19561
-	* config/tc-msp430.c (msp430_operands): Remove case 7.  Use case 2
-	to handle encoding of RRUX instruction.
-	* testsuite/gas/msp430/msp430x.s: Add more tests of the extended
-	shift instructions.
-	* testsuite/gas/msp430/msp430x.d: Update expected disassembly.
-
-2016-02-03  Max Filippov  <jcmvbkbc@gmail.com>
-
-	* config/tc-xtensa.c (md_apply_fix): Mark BFD_RELOC_XTENSA_DIFF*
-	substitutions for BFD_RELOC_* as unsigned.
-	* testsuite/gas/xtensa/all.exp: Add loc to list of xtensa tests.
-	* testsuite/gas/xtensa/loc.d: New file: loc test result	patterns.
-	* testsuite/gas/xtensa/loc.s: New file: loc test.
-
-2016-02-03  Kevin Buettner  <kevinb@redhat.com>
-
-	* config/tc-msp430.h (DWARF2_ADDR_SIZE): Set to 4.
-
-2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/19520
-	* NEWS: Mention new command line option -mrelax-relocations and
-	new configure option --enable-x86-relax-relocations for x86
-	target.
-	* config.in: Regenerated.
-	* configure.ac: Add --enable-x86-relax-relocations.
-	(ac_default_x86_relax_relocations): New.  Default to 1 except
-	for x86 Solaris targets older than Solaris 12.
-	(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
-	* configure: Likewise.
-	* config/tc-i386.c (generate_relax_relocations): New.
-	(OPTION_MRELAX_RELOCATIONS): Likewise.
-	(output_disp): Don't generate relax relocations if
-	generate_relax_relocations is 0.
-	(md_longopts): Add -mrelax-relocations.
-	(md_show_usage): Likewise.
-	(md_parse_option): Handle OPTION_MRELAX_RELOCATIONS.
-	* doc/c-i386.texi: Document -mrelax-relocations=.
-	* testsuite/gas/i386/got-no-relax.d: New file.
-	* testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise.
-	* testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as.
-	* testsuite/gas/i386/localpic.d: Likewise.
-	* testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
-	* testsuite/gas/i386/reloc32.d: Likewise.
-	* testsuite/gas/i386/x86-64-gotpcrel.d: Likewise.
-	* testsuite/gas/i386/x86-64-localpic.d: Likewise.
-	* testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
-	* testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
-	* testsuite/gas/i386/i386.exp: Run got-no-relax and
-	x86-64-gotpcrel-no-relax.
-
-2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* NEWS: Mention new command line option -mfence-as-lock-add=yes
-	for x86 target.
-
-2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* NEWS: Remove duplicated marker for 2.26.
-
-2016-02-02  Renlin Li  <renlin.li@arm.com>
-
-	* testsuite/gas/arm/thumb2_it_search.d: Skip non-elf targets.
-
-2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/ip2k/allinsn.d: New file.
-	* testsuite/gas/ip2k/allinsn.s: New file.
-	* testsuite/gas/ip2k/ip2k-allinsn.exp: New file.
-
-2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/epiphany/addr-syntax.d: Add explicit 0 offset to
-	some load instructions.
-	* testsuite/gas/epiphany/allinsn.d: Likewise.
-	* testsuite/gas/epiphany/regression.d: Likewise.
-
-2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/epiphany/addr-syntax.d: Remove unneeded '.l'
-	suffixes from instruction mnemonics in expected output.
-	* testsuite/gas/epiphany/allinsn.d: Likewise.
-	* testsuite/gas/epiphany/regression.d: Likewise.
-	* testsuite/gas/epiphany/sample.d: Likewise.
-
-2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/epiphany/addr-syntax.d: Update expected register
-	names.
-	* testsuite/gas/epiphany/allinsn.d: Likewise.
-	* testsuite/gas/epiphany/sample.d: Likewise.
-
-2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/epiphany/sample.d: Update expected output.
-
-2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* config/tc-arc.c (md_apply_fix): Allow addendum.
-	(arc_reloc_op): Allow complex expressions for tpoff.
-	(md_apply_fix): Handle resolved TLS local symbol.
-	* testsuite/gas/arc/tls-relocs1.d: New file.
-	* testsuite/gas/arc/tls-relocs1.s: Likewise.
-
-2016-02-01  Loria  <Loria@phantasia.org>
-
-	PR target/19311
-	* config/tc-arm.c (encode_arm_immediate): Recode to improve
-	efficiency and avoid an LLVM loop optimization bug.
-
-2016-02-01  Nick Clifton  <nickc@redhat.com>
-
-	* config/tc-microblaze.c (parse_imm): Fix compile time warning
-	message extending a negative 32-bit value into a larger signed
-	value on a 32-bit host.
-
-2016-01-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/19532
-	* configure.ac (compressed_debug_sections): Replace == with =.
-	* configure: Regenerated.
-
-2016-01-29  Andrew Senkevich  <andrew.senkevich@intel.com>
-	    H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (avoid_fence): New.
-	(output_insn): Encode as lock addl $0x0, (%{r,e}sp) if avoid_fence
-	is true.
-	(OPTION_FENCE_AS_LOCK_ADD): New.
-	(md_longopts): Add -mfence-as-lock-add.
-	(md_parse_option): Handle -mfence-as-lock-add.
-	(md_show_usage): Add -mfence-as-lock-add=[no|yes].
-	* doc/c-i386.texi (-mfence-as-lock-add): Document.
-	* testsuite/gas/i386/i386.exp: Run new tests.
-	* testsuite/gas/i386/fence-as-lock-add.s: New.
-	* testsuite/gas/i386/fence-as-lock-add-yes.d: Likewise.
-	* testsuite/gas/i386/fence-as-lock-add-no.d: Likewise.
-	* testsuite/gas/i386/x86-64-fence-as-lock-add-yes.d: Likewise.
-	* testsuite/gas/i386/x86-64-fence-as-lock-add-no.d: Likewise.
-
-2016-01-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* configure.ac (compressed_debug_sections): Remove trailing `]'.
-	* configure: Regenerated.
-
-2016-01-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/tc-i386.c (OPTION_OMIT_LOCK_PREFIX): Renamed to ...
-	(OPTION_MOMIT_LOCK_PREFIX): This.
-	(md_longopts): Updated.
-	(md_parse_option): Likewise.
-
-2016-01-25  Catherine Moore  <clm@codesourcery.com>
-
-	* config/mips/tc-mips.c (md_begin): Avoid gp-relative addressing
-	if abicalls are in effect.
-	* testsuite/gas/mips/sdata-gp.s: New test.
-	* testsuite/gas/mips/sdata-gp.d: New expected output
-	* testsuite/gas/mips/mips.exp: Run new test.
-
-2016-01-25  Renlin Li  <renlin.li@arm.com>
-
-	* testsuite/gas/arm/thumb2_it_search.d: New.
-	* testsuite/gas/arm/thumb2_it_search.s: New.
-
-2016-01-21  Nick Clifton  <nickc@redhat.com>
-
-	PR gas/19454
-	* testsuite/gas/arm/mapshort-elf.d: Fix expected output to cope
-	with arm-netbsdelf target.
-	* testsuite/gas/arm/blx-bl-convert.d: Skip for netbsdelf.
-
-2016-01-20  Nick Clifton  <nickc@redhat.com>
-
-	PR 19456
-	* testsuite/gas/arm/weakdef-1.d: Skip for VxWorks.
-	* testsuite/gas/arm/blx-bl-convert.d
-	* testsuite/gas/arm/plt-1.d: Likewise.
-	* testsuite/gas/arm/reloc-bad.d: Likewise.
-	* testsuite/gas/arm/thumb-w-good.d: Likewise.
-	* testsuite/gas/arm/thumb2_pool.d: Likewise.
-	* testsuite/gas/arm/ldconst.d: Adjust so that it works with VxWorks
-	* testsuite/gas/arm/tls_vxworks.d: Update expected output.
-
-	PR 19499
-	* doc/as.texinfo (Errors): Correct documentation describing the
-	interaction of .file and .line with warning and error messages.
-
-	PR 19458
-	* testsuite/gas/arm/armv8_2-a.d: Skip for COFF based targets.
-	* testsuite/gas/arm/archv8m-main.d: Likewise.
-	* testsuite/gas/arm/archv8m-base.d: Likewise.
-
-2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* testsuite/gas/aarch64/armv8_2-a-illegal.d: New.
-	* testsuite/gas/aarch64/armv8_2-a-illegal.l: New.
-	* testsuite/gas/aarch64/armv8_2-a-illegal.s: New.
-
-2016-01-20  Mickael Guene  <mickael.guene@st.com>
-	    Terry Guo  <terry.guo@arm.com>
-
-	* config/obj-elf.c (obj_elf_change_section) : Allow arm section with
-	SHF_ARM_NOREAD section flag.
-	* config/tc-arm.h (md_elf_section_letter) : Implement this hook to
-	handle letter 'y'.
-	(arm_elf_section_letter) : Declare it.
-	* config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
-	SHF_ARM_NOREAD section flag.
-	* doc/c-arm.texi (ARM section attribute): Document the 'y' attribute.
-
-	* testsuite/gas/arm/section-execute-only.s: New test case.
-	* testsuite/gas/arm/section-execute-only.d: Expected output.
-
-2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-mips.c (micromips_insn_length): Remove the mention
-	of 48-bit microMIPS instructions.
-
-2016-01-18  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test.
-
-2016-01-14  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/gas/rl78/sp-relative-movw.s: New test.
-	* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
-	* testsuite/gas/rl78/rl78.exp: Run the new test.
-
-2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* testsuite/gas/aarch64/illegal-sysreg-2.l: New.
-	* testsuite/gas/aarch64/illegal-sysreg-2.d: New.
-
-2016-01-13  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* config/tc-nios2.c (output_movia): Preset `code' to 0.
-
-2016-01-13  Yoshinori Sato  <ysato@users.sourceforge.jp>
-
-	* config/tc-h8300.c (get_operand): Remove spurious condition in
-	test for closing parenthesis.
-
-2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* config/tc-arm.c (arm_ext_v8_2): New.
-	(insns): Add "esb".
-	* testsuite/gas/arm/armv8_2-a.d: New.
-	* testsuite/gas/arm/armv8_2-a.s: New.
-
-2016-01-12  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/gas/ppc/vsx3.d: Accept nop padding.
-
-2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
-
-	* testsuite/gas/ppc/power9.d <xscmpnedp, xvcmpnedp, xvcmpnedp.,
-	xvcmpnesp, xvcmpnesp.>: Delete tests.
-	* testsuite/gas/ppc/power9.s: Likewise.
-	* testsuite/gas/ppc/vsx3.d: Likewise.
-	* testsuite/gas/ppc/vsx3.s: Likewise.
-
-2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
-
-	PR gas/13050
-	* testsuite/gas/m68k/all.exp: Add tests p13050-1 and p13050-2.
-	* testsuite/gas/m68k/p13050-1.s: New file.
-	* testsuite/gas/m68k/p13050-2.d: New file.
-	* testsuite/gas/m68k/p13050-2.s: New file.
-
-2016-01-06  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/gas/arc/adc.d: Add 'R_' prefix to relocation names.
-	* testsuite/gas/arc/add.d: Likewise.
-	* testsuite/gas/arc/and.d: Likewise.
-	* testsuite/gas/arc/asl.d: Likewise.
-	* testsuite/gas/arc/asr.d: Likewise.
-	* testsuite/gas/arc/bic.d: Likewise.
-	* testsuite/gas/arc/extb.d: Likewise.
-	* testsuite/gas/arc/extw.d: Likewise.
-	* testsuite/gas/arc/j.d: Likewise.
-	* testsuite/gas/arc/jl.d: Likewise.
-	* testsuite/gas/arc/ld2.d: Likewise.
-	* testsuite/gas/arc/lsr.d: Likewise.
-	* testsuite/gas/arc/mov.d: Likewise.
-	* testsuite/gas/arc/or.d: Likewise.
-	* testsuite/gas/arc/pcl-relocs.d: Likewise.
-	* testsuite/gas/arc/pcrel-relocs.d: Likewise.
-	* testsuite/gas/arc/pic-relocs.d: Likewise.
-	* testsuite/gas/arc/plt-relocs.d: Likewise.
-	* testsuite/gas/arc/rlc.d: Likewise.
-	* testsuite/gas/arc/ror.d: Likewise.
-	* testsuite/gas/arc/rrc.d: Likewise.
-	* testsuite/gas/arc/sbc.d: Likewise.
-	* testsuite/gas/arc/sda-relocs.d: Likewise.
-	* testsuite/gas/arc/sda-relocs2.d: Likewise.
-	* testsuite/gas/arc/sexb.d: Likewise.
-	* testsuite/gas/arc/sexw.d: Likewise.
-	* testsuite/gas/arc/st.d: Likewise.
-	* testsuite/gas/arc/sub.d: Likewise.
-	* testsuite/gas/arc/tls-relocs.d: Likewise.
-	* testsuite/gas/arc/xor.d: Likewise.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-2015 and testsuite/ChangeLog-2015
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/gas/ChangeLog-2016 b/gas/ChangeLog-2016
new file mode 100644
index 0000000..1b6fd9d
--- /dev/null
+++ b/gas/ChangeLog-2016
@@ -0,0 +1,6024 @@
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* NEWS: Mention new PRU target.
+	* Makefile.am: Add PRU target.
+	* config/obj-elf.c: Ditto.
+	* configure.tgt: Ditto.
+	* config/tc-pru.c: New file.
+	* config/tc-pru.h: New file.
+	* doc/Makefile.am: Add documentation for PRU GAS port.
+	* doc/all.texi, Ditto.
+	* doc/as.texinfo: Ditto.
+	* doc/c-pru.texi: Document PRU GAS options.
+	* Makefile.in: Regenerate.
+	* doc/Makefile.in: Regenerate.
+	* po/POTFILES.in: Regenerate.
+	* testsuite/gas/pru/alu.d: New file for PRU GAS testsuite.
+	* testsuite/gas/pru/alu.s: Ditto.
+	* testsuite/gas/pru/branch.d: Ditto.
+	* testsuite/gas/pru/branch.s: Ditto.
+	* testsuite/gas/pru/illegal.l: Ditto.
+	* testsuite/gas/pru/illegal.s: Ditto.
+	* testsuite/gas/pru/ldi.d: Ditto.
+	* testsuite/gas/pru/ldi.s: Ditto.
+	* testsuite/gas/pru/ldst.d: Ditto.
+	* testsuite/gas/pru/ldst.s: Ditto.
+	* testsuite/gas/pru/loop.d: Ditto.
+	* testsuite/gas/pru/loop.s: Ditto.
+	* testsuite/gas/pru/misc.d: Ditto.
+	* testsuite/gas/pru/misc.s: Ditto.
+	* testsuite/gas/pru/pru.exp: Ditto.
+	* testsuite/gas/pru/pseudo.d: Ditto.
+	* testsuite/gas/pru/pseudo.s: Ditto.
+	* testsuite/gas/pru/warn_reglabel.l: Ditto.
+	* testsuite/gas/pru/warn_reglabel.s: Ditto.
+	* testsuite/gas/pru/xfr.d: Ditto.
+	* testsuite/gas/pru/xfr.s: Ditto.
+	* testsuite/gas/lns/lns.exp: Mark lns-common-1-alt variant for PRU.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-asmacro.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16-asmacro.d: New test.
+	* testsuite/gas/mips/mips16-64@mips16-asmacro.d: New test.
+	* testsuite/gas/mips/mips16-asmacro.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips16_immed): Limit `mips16_immed_extend'
+	use to operands whose LSB position is zero.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (match_mips16_insn): Don't update
+	`forced_insn_length' or the instruction opcode if an operand
+	requires an extended instruction form, but an unextended one
+	has been requested.
+	* testsuite/gas/mips/mips16-relax-unextended-1.d: New test.
+	* testsuite/gas/mips/mips16-relax-unextended-2.d: New test.
+	* testsuite/gas/mips/mips16-relax-unextended-1.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-relax-unextended-2.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-relax-unextended-1.s: New test
+	source.
+	* testsuite/gas/mips/mips16-relax-unextended-2.s: New test
+	source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips16_macro_build): Replace `0' and `4'
+	operand codes with `.' and `F' respectively.
+	(mips16_macro): Likewise.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (is_size_valid_16): Disallow a `.e' suffix
+	instruction size override for INSN2_SHORT_ONLY opcode table
+	entries.
+	* testsuite/gas/mips/mips16-extend-swap.d: Adjust output.
+	* testsuite/gas/mips/mips16-macro-e.l: Adjust error messages.
+	* testsuite/gas/mips/mips16-32@mips16-macro-e.l: Adjust error
+	messages.
+	* testsuite/gas/mips/mips16e-32@mips16-macro-e.l: Adjust error
+	messages.
+	* testsuite/gas/mips/mips16-insn-e.d: New test.
+	* testsuite/gas/mips/mips16-insn-t.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16-insn-e.d: New test.
+	* testsuite/gas/mips/mips16-64@mips16-insn-e.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16-insn-e.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16-insn-t.d: New test.
+	* testsuite/gas/mips/mips16-64@mips16-insn-t.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16-insn-t.d: New test.
+	* testsuite/gas/mips/mips16-insn-e.l: New stderr output.
+	* testsuite/gas/mips/mips16-insn-t.l: New stderr output.
+	* testsuite/gas/mips/mips16-32@mips16-insn-e.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-64@mips16-insn-e.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-32@mips16-insn-t.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-64@mips16-insn-t.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16e-32@mips16-insn-t.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-insn-e.s: New test source.
+	* testsuite/gas/mips/mips16-insn-t.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (match_mips16_insn): Remove the `6' operand
+	code special case and its associated comment.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips16_ip): Handle `.e' and `.t' instruction
+	suffixes followed by a null character rather than a space too.
+	* testsuite/gas/mips/mips16-insn-length-noargs.d: New test.
+	* testsuite/gas/mips/mips16-insn-length-noargs.s: New test
+	source.
+	* testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-extend-swap.d: New test.
+	* testsuite/gas/mips/mips16-extend-swap.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-12-23  Joe Seymour  <joe.s@somniumtech.com>
+
+	* config/tc-msp430.c (msp430_mcu_data): Sync with data from TI's
+	devices.csv file as of September 2016.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* configure: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* NEWS: Add marker for 2.28.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* po/gas.pot: Regenerate.
+
+2016-12-21  Andrew Waterman  <andrew@sifive.com>
+
+	* config/tc-riscv.c (riscv_make_nops): Emit 2-byte NOPs.
+	(riscv_frag_align_code): Correct frag_align_code arg.
+
+2016-12-21  Tim Newsome  <tim@sifive.com>
+
+	* config/tc-riscv.c (riscv_pre_output_hook): Remove const from
+	loc4_frag.
+
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	* doc/c-lm32.texi: Fix chars with high bit set.
+	* testsuite/gas/bfin/vector2.s: Likewise.
+
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	PR gas/10946
+	* doc/as.texinfo (Chars): Document escape sequences.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-sub.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16-sub.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16-sub.d: New test.
+	* testsuite/gas/mips/mips16e-sub.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16e-sub.d: New test.
+	* testsuite/gas/mips/mips16-64@mips16e-sub.d: New test.
+	* testsuite/gas/mips/mips16e-64-sub.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16e-64-sub.d: New test.
+	* testsuite/gas/mips/mips16-64@mips16e-64-sub.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: New test.
+	* testsuite/gas/mips/mips16-sub.s: New test source.
+	* testsuite/gas/mips/mips16e-sub.s: New test source.
+	* testsuite/gas/mips/mips16e-64-sub.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16e.s: Add a RESTORE instruction.
+	* testsuite/gas/mips/mips16e.d: Adjust accordingly.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16.d: Adjust test for multiple MIPS16
+	ISA testing.
+	* testsuite/gas/mips/mips16-64.d: Adjust test for multiple
+	MIPS16 ISA testing.
+	* testsuite/gas/mips/mips16e-64.d: Adjust test for multiple
+	MIPS16 ISA testing.
+	* testsuite/gas/mips/mips16-macro.d: Adjust test for multiple
+	MIPS16 ISA testing.
+	* testsuite/gas/mips/mips16e-64.s: Ensure MIPS16 ISA annotation.
+	* testsuite/gas/mips/mips16e-64.l: Rename to...
+	* testsuite/gas/mips/mips16e-32@mips16e-64.l: ... this.
+	* testsuite/gas/mips/mips16-64@mips16.d: New test.
+	* testsuite/gas/mips/mips16-64@mips16-64.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16e-64.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16-macro.d: New test.
+	* testsuite/gas/mips/mips16-64@mips16-macro.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16-macro.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16-macro-e.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16-macro-e.d: New test.
+	* testsuite/gas/mips/mips16-32@mips16-macro-t.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16-macro-t.d: New test.
+	* testsuite/gas/mips/mips16e-32@mips16e-64.l: New stderr output.
+	* testsuite/gas/mips/mips16-32@mips16-macro.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16e-32@mips16-macro.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-32@mips16-macro-e.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16e-32@mips16-macro-e.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16-32@mips16-macro-t.l: New stderr
+	output.
+	* testsuite/gas/mips/mips16e-32@mips16-macro-t.l: New stderr
+	output.
+	* testsuite/gas/mips/mips.exp: Run `mips16', `mips16-64',
+	`mips16-macro', `mips16-macro-t', `mips16-macro-e' and
+	`mips16e-64' testing across multiple MIPS16 ISAs.  Fold
+	`mips16-macro' and `mips16e-64' list test invocations into
+	corresponding dump tests.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
+	`mips16e' and `mips16' prefixes.
+	(run_list_test_arch): Likewise.
+	Rename `mips16' architecture to `mips16-32'.  Add `mips16-64',
+	`mips16e-32' and `mips16e-64' architectures.  Update `rol64',
+	`mips16e', `elf${el}-rel2' and `elf-rel4' test invocations
+	accordingly.
+	* testsuite/gas/mips/mips16e@branch-swap-3.d: New test.
+	* testsuite/gas/mips/mips16e@branch-swap-4.d: New test.
+	* testsuite/gas/mips/mips16e@loc-swap-dis.d: New test.
+	* testsuite/gas/mips/mips16e@loc-swap.d: New test.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/loc-swap.s: Use zeros rather than NOPs for
+	trailing alignment padding.
+	* testsuite/gas/mips/loc-swap.d: Adjust accordingly.
+	* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
+	* testsuite/gas/mips/mips16@loc-swap-dis.d: Likewise.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (micromips_insn_length): Use
+	`mips_opcode_32bit_p'.
+	(is_size_valid): Adjust description.
+	(is_size_valid_16): New function.
+	(validate_mips_insn): Use `mips_opcode_32bit_p' in MIPS16
+	operand decoding.
+	(validate_mips16_insn): Remove `a' and `i' operand code special
+	casing, use `mips_opcode_32bit_p' to determine instruction
+	width.
+	(append_insn): Adjust forced MIPS16 instruction size
+	determination.
+	(match_mips16_insn): Likewise.  Don't shift the instruction's
+	opcode with the `a' and `i' operand codes.  Use
+	`mips_opcode_32bit_p' in operand decoding.
+	(match_mips16_insns): Check for forced instruction size's
+	validity.
+	(mips16_ip): Don't force instruction size in the `noautoextend'
+	mode.
+	* testsuite/gas/mips/mips16-jal-e.d: New test.
+	* testsuite/gas/mips/mips16-jal-t.d: New test.
+	* testsuite/gas/mips/mips16-macro-e.d: New test.
+	* testsuite/gas/mips/mips16-macro-t.d: New test.
+	* testsuite/gas/mips/mips16-jal-t.l: New stderr output.
+	* testsuite/gas/mips/mips16-macro-e.l: New stderr output.
+	* testsuite/gas/mips/mips16-macro-t.l: New stderr output.
+	* testsuite/gas/mips/mips16-jal-e.s: New test source.
+	* testsuite/gas/mips/mips16-jal-t.s: New test source.
+	* testsuite/gas/mips/mips16-macro-e.s: New test source.
+	* testsuite/gas/mips/mips16-macro-t.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-macro.l: New list test.
+	* testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-sdrasp.d: New test.
+	* testsuite/gas/mips/mips16-sdrasp.l: New stderr output.
+	* testsuite/gas/mips/mips16-sdrasp.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips.exp: Limit remaining tests that
+	require NewABI support to `has_newabi' targets.
+
+2015-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* config/tc-riscv.c (riscv_pseudo_table): Remove "align",
+	"p2align", and "balign".
+	(s_align): Remove.
+	(riscv_handle_align): New function.
+	(riscv_frag_align_code): Likewise.
+	(riscv_make_nops): Likewise.
+	* config/tc-riscv.h (MAX_MEM_FOR_RS_ALIGN_CODE): Change to 7.
+	(HANDLE_ALIGN): Define.
+	(md_do_align): Define.
+	(riscv_handle_align): Declare.
+	(riscv_frag_align_code): Likewise.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* config/tc-riscv.h (xlen): Delete.
+	* config/tc-riscv.c (xlen): Make static.
+	(abi_xlen): New variable.
+	(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
+	with OPTION_MABI.
+	(md_longopts): Likewise.
+	(md_parse_option): Likewise.
+	(riscv_elf_final_processing): Likewise.
+	* doc/as.texinfo (Target RISC-V options): Likewise.
+	* doc/c-riscv.texi (OPTIONS): Likewise.
+	* config/tc-riscv.c (float_mode): Removed.
+	(float_abi): New type, specifies the floating-point ABI.
+	(riscv_set_abi): New function.
+	(riscv_add_subset): Only allow lower-case ISA names and require
+	them to start with "rv".
+	(riscv_after_parse_args): Likewise.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+	    Kuan-Lin Chen  <kuanlinchentw@gmail.com>
+
+	* config/tc-riscv.c (riscv_set_options): Add relax.
+	(riscv_opts): Likewise.
+	(s_riscv_option): Add relax and norelax.
+	(riscv_apply_const_reloc): New function.
+	(append_insn): Move constant relocation handling to
+	riscv_apply_const_reloc.
+	(md_pcrel_from): Likewise.
+	(parse_relocation): Skip BFD_RELOC_UNUSED.
+	(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
+	BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
+	(md_apply_fix): Likewise.
+	(riscv_pre_output_hook): New function.
+	* config/tc-riscv.h (md_pre_output_hook): Define.
+	(riscv_pre_output_hook): Declare.
+	(DWARF_CIE_DATA_ALIGNMENT): Always -4.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* config/tc-riscv.c: Formatting and comment fixes throughout.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (md_convert_frag): Report an error instead of
+	asserting on `ext'.
+	* testsuite/gas/mips/mips16-branch-unextended-1.d: New test.
+	* testsuite/gas/mips/mips16-branch-unextended-2.d: New test.
+	* testsuite/gas/mips/mips16-branch-unextended-1.s: New test
+	source.
+	* testsuite/gas/mips/mips16-branch-unextended-2.s: New test.
+	* testsuite/gas/mips/mips16-branch-unextended.l: New stderr
+	output.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-sprel-swap.d: New test.
+	* testsuite/gas/mips/mips16-sprel-swap.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-12-13 Renlin Li <renlin.li@arm.com>
+
+	* config/tc-aarch64.c (AARCH64_REG_TYPES): Remove CN register.
+	(get_reg_expected_msg): Remove CN register case.
+	(parse_operands): rewrite parser for CRn, CRm operand.
+	(reg_names): Remove CN register.
+	* testsuite/gas/aarch64/diagnostic.s: Add a new test case.
+	* testsuite/gas/aarch64/diagnostic.l: Adjust error message.
+
+2016-12-13  Jiong Wang  <jiong.wang@arm.com>
+
+	* gas/testsuite/gas/aarch64/addsub.d: Support ILP32 mode.
+	* gas/testsuite/gas/aarch64/advsimd-across.d: Likewise.
+	* gas/testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise.
+	* gas/testsuite/gas/aarch64/advsimd-fp16.d: Likewise.
+	* gas/testsuite/gas/aarch64/advsimd-misc.d: Likewise.
+	* gas/testsuite/gas/aarch64/advsisd-copy.d: Likewise.
+	* gas/testsuite/gas/aarch64/advsisd-misc.d: Likewise.
+	* gas/testsuite/gas/aarch64/alias.d: Likewise.
+	* gas/testsuite/gas/aarch64/armv8-ras-1.d: Likewise.
+	* gas/testsuite/gas/aarch64/b_1.d: Likewise.
+	* gas/testsuite/gas/aarch64/beq_1.d: Likewise.
+	* gas/testsuite/gas/aarch64/bitfield-dump: Likewise.
+	* gas/testsuite/gas/aarch64/bitfield-no-aliases.d: Likewise.
+	* gas/testsuite/gas/aarch64/codealign.d: Likewise.
+	* gas/testsuite/gas/aarch64/codealign_1.d: Likewise.
+	* gas/testsuite/gas/aarch64/crc32-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/crc32.d: Likewise.
+	* gas/testsuite/gas/aarch64/crypto-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/crypto.d: Likewise.
+	* gas/testsuite/gas/aarch64/dwarf.d: Likewise.
+	* gas/testsuite/gas/aarch64/float-fp16.d: Likewise.
+	* gas/testsuite/gas/aarch64/floatdp2.d: Likewise.
+	* gas/testsuite/gas/aarch64/fp-armv8_3.d: Likewise.
+	* gas/testsuite/gas/aarch64/fp-const0-parse.d: Likewise.
+	* gas/testsuite/gas/aarch64/fp_cvt_int.d: Likewise.
+	* gas/testsuite/gas/aarch64/fpmov.d: Likewise.
+	* gas/testsuite/gas/aarch64/inst-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldr_1.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-exclusive.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-reg-pair.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise.
+	* gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
+	* gas/testsuite/gas/aarch64/lor-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/lor.d: Likewise.
+	* gas/testsuite/gas/aarch64/lse-atomic.d: Likewise.
+	* gas/testsuite/gas/aarch64/mapmisc.d: Likewise.
+	* gas/testsuite/gas/aarch64/mov-no-aliases.d: Likewise.
+	* gas/testsuite/gas/aarch64/mov.d: Likewise.
+	* gas/testsuite/gas/aarch64/movi.d: Likewise.
+	* gas/testsuite/gas/aarch64/movw_label.d: Likewise.
+	* gas/testsuite/gas/aarch64/msr.d: Likewise.
+	* gas/testsuite/gas/aarch64/neon-fp-cvt-int.d: Likewise.
+	* gas/testsuite/gas/aarch64/neon-frint.d: Likewise.
+	* gas/testsuite/gas/aarch64/neon-ins.d: Likewise.
+	* gas/testsuite/gas/aarch64/neon-not.d: Likewise.
+	* gas/testsuite/gas/aarch64/neon-vfp-reglist-post.d: Likewise.
+	* gas/testsuite/gas/aarch64/neon-vfp-reglist.d: Likewise.
+	* gas/testsuite/gas/aarch64/no-aliases.d: Likewise.
+	* gas/testsuite/gas/aarch64/optional.d: Likewise.
+	* gas/testsuite/gas/aarch64/pac.d: Likewise.
+	* gas/testsuite/gas/aarch64/pan-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/pan.d: Likewise.
+	* gas/testsuite/gas/aarch64/rdma-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/rdma.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_g0.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_g1.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-tlsldm-1.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d: Likewise.
+	* gas/testsuite/gas/aarch64/shifted.d: Likewise.
+	* gas/testsuite/gas/aarch64/sve.d: Likewise.
+	* gas/testsuite/gas/aarch64/symbol.d: Likewise.
+	* gas/testsuite/gas/aarch64/sysreg-1.d: Likewise.
+	* gas/testsuite/gas/aarch64/sysreg-2.d: Likewise.
+	* gas/testsuite/gas/aarch64/sysreg-3.d: Likewise.
+	* gas/testsuite/gas/aarch64/sysreg.d: Likewise.
+	* gas/testsuite/gas/aarch64/system-2.d: Likewise.
+	* gas/testsuite/gas/aarch64/system-3.d: Likewise.
+	* gas/testsuite/gas/aarch64/system.d: Likewise.
+	* gas/testsuite/gas/aarch64/tbz_1.d: Likewise.
+	* gas/testsuite/gas/aarch64/tlbi_op.d: Likewise.
+	* gas/testsuite/gas/aarch64/tls.d: Likewise.
+	* gas/testsuite/gas/aarch64/uao-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/uao.d: Likewise.
+	* gas/testsuite/gas/aarch64/virthostext-directive.d: Likewise.
+	* gas/testsuite/gas/aarch64/virthostext.d: Likewise.
+	* gas/testsuite/gas/aarch64/adr_1.d: Restrict test under -mabi=lp64.
+	* gas/testsuite/gas/aarch64/int-insns.d: Likewise.
+	* gas/testsuite/gas/aarch64/programmer-friendly.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-data.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_g2.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-gotoff_g1.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-gottprel_g1.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-insn.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d: Likewise.
+	* gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d: Likewise.
+	* gas/testsuite/gas/aarch64/tail_padding.d: Likewise.
+	* gas/testsuite/gas/aarch64/tls-desc.d: Likewise.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips16_macro_build) <'>'>: Remove case.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-extend.d: New test.
+	* testsuite/gas/mips/mips16-extend.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-arc.c (arc_show_cpu_list): Rename `spaces' local
+	variable to `space_buf'.
+
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-arm.c (encode_arm_shift): Rename `index' local
+	variable to `op_index'.
+
+2016-12-08  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (is_opcode_valid): Use local `isa'
+	consistently.
+
+2016-12-06  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20901
+	* read.c (s_space): Place an upper limit on the number of spaces
+	generated.
+
+	PR gas/20896
+	* testsuite/gas/mmix/err-byte1.s: Adjust expected warning messages
+	to account for patch to next_char_of_string.
+
+2016-12-05  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20902
+	* read.c (next_char_of_string): Do end advance past the end of the
+	buffer.
+
+	PR gas/20904
+	* as.h (SKIP_ALL_WHITESPACE): New macro.
+	* expr.c (operand): Use it.
+
+2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-arm.c (do_vcmla, do_vcadd): Define.
+	(neon_scalar_for_vcmla): Define.
+	(enum operand_parse_code): Add OP_IROT1 and OP_IROT2.
+	(NEON_ENC_TAB): Add DDSI and QQSI variants.
+	(insns): Add vcmla and vcadd.
+	* testsuite/gas/arm/armv8_3-a-simd.d: New.
+	* testsuite/gas/arm/armv8_3-a-simd.s: New.
+	* testsuite/gas/arm/armv8_3-a-simd-bad.d: New.
+	* testsuite/gas/arm/armv8_3-a-simd-bad.l: New.
+	* testsuite/gas/arm/armv8_3-a-simd-bad.s: New.
+
+2016-12-05  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/textauxregister-1.d: New file.
+	* testsuite/gas/arc/textauxregister-1.s: Likewise.
+	* testsuite/gas/arc/textcondcode-err.s: Likewise.
+	* testsuite/gas/arc/textcoreregister-err.s: Likewise.
+	* config/tc-arc.c (tokenize_extregister): Return bfd_boolean,
+	don't check second argument of extension auxiliary register for
+	signess.
+	(arc_extcorereg): Consider the return of tokenize_extregister
+	function call.
+
+2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-arm.c (arm_ext_v8_3, do_vjcvt): Define.
+	(insns): Add vjcvt.
+	* testsuite/gas/aarch64/armv8_3-a-fp.s: New.
+	* testsuite/gas/aarch64/armv8_3-a-fp.d: New.
+	* testsuite/gas/aarch64/armv8_3-a-fp-bad.s: New.
+	* testsuite/gas/aarch64/armv8_3-a-fp-bad.d: New.
+	* testsuite/gas/aarch64/armv8_3-a-fp-bad.l: New.
+
+2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-arm.c (arm_archs): Add "armv8.3-a".
+	* doc/c-arm.texi (-march): Add "armv8.3-a".
+
+2016-12-02  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/cpu-em-err.s: New file.
+	* testsuite/gas/arc/cpu-em4-err.s: Likewise.
+	* testsuite/gas/arc/cpu-fpuda-err.s: Likewise.
+	* testsuite/gas/arc/cpu-hs-err.s: Likewise.
+	* testsuite/gas/arc/cpu-quarkse-err.s: Likewise.
+	* testsuite/gas/arc/noargs_a7.s: Add .cpu.
+	* config/tc-arc.c (ARC_CPU_TYPE_A6xx): Define.
+	(ARC_CPU_TYPE_A7xx): Likewise.
+	(ARC_CPU_TYPE_AV2EM): Likewise.
+	(ARC_CPU_TYPE_AV2HS): Likewise.
+	(cpu_types): Update list of known CPU names.
+	(arc_show_cpu_list): New function.
+	(md_show_usage): Print accepted CPU names.
+	(cl_features): New variable.
+	(arc_select_cpu): Use cl_features.
+	(arc_option): Allow various .cpu names.
+	(md_parse_option): Set cl_features.
+	* doc/c-arc.texi: Update -mcpu and .cpu documentation.
+
+2016-12-02  Josh Conner  <joshconner@google.com>
+
+	* configure.tgt: Add support for fuchsia (OS).
+
+2016-12-01  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20898
+	* app.c (do_scrub_chars): Do not attempt to unget EOF.
+
+	PR gas/20897
+	* subsegs.c (subsegs_print_statistics): Do nothing if no output
+	file was created.
+
+	PR gas/20895
+	* symbols.c (resolve_symbol_value): Gracefully handle erroneous
+	symbolic expressions.
+
+2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (find_opcode_match): New function argument
+	errmsg.
+	(assemble_tokens): Collect and report the eventual error message
+	found during opcode matching process.
+	* testsuite/gas/arc/lpcount-err.s: New file.
+	* testsuite/gas/arc/add_s-err.s: Update error message.
+
+2016-11-28  Ramiro Polla  <ramiro@hex-rays.com>
+	    Amit Pawar  <amit.pawar@amd.com>
+
+	PR binutils/20637
+	* testsuite/gas/i386/xop32reg.d: New file.
+	* testsuite/gas/i386/xop32reg.s: New file.
+	* testsuite/gas/i386/i386.exp: Run new test.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* arparse.y: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* config/bfin-lex.l: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* testsuite/gas/all/gas.exp: Fix spelling in comments.
+	* testsuite/gas/cris/cris.exp: Fix spelling in comments.
+	* testsuite/gas/hppa/basic/basic.exp: Fix spelling in comments.
+	* testsuite/gas/hppa/parse/parse.exp: Fix spelling in comments.
+	* testsuite/gas/hppa/reloc/reloc.exp: Fix spelling in comments.
+	* testsuite/gas/sh/arch/arch.exp: Fix spelling in comments.
+	* testsuite/gas/tic4x/tic4x.exp: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* testsuite/gas/arm/local_function.d: Fix spelling in comments.
+	* testsuite/gas/arm/req.s: Fix spelling in comments.
+	* testsuite/gas/arm/vfp1.s: Fix spelling in comments.
+	* testsuite/gas/arm/vfp1_t2.s: Fix spelling in comments.
+	* testsuite/gas/arm/vfp1xD.s: Fix spelling in comments.
+	* testsuite/gas/arm/vfp1xD_t2.s: Fix spelling in comments.
+	* testsuite/gas/mcore/allinsn.s: Fix spelling in comments.
+	* testsuite/gas/mips/24k-triple-stores-5.s: Fix spelling in comments.
+	* testsuite/gas/mips/delay.d: Fix spelling in comments.
+	* testsuite/gas/mips/nodelay.d: Fix spelling in comments.
+	* testsuite/gas/mips/r5900-full.s: Fix spelling in comments.
+	* testsuite/gas/mips/r5900.s: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* as.h: Fix spelling in comments.
+	* config/obj-ecoff.c: Fix spelling in comments.
+	* config/obj-macho.c: Fix spelling in comments.
+	* config/tc-aarch64.c: Fix spelling in comments.
+	* config/tc-arc.c: Fix spelling in comments.
+	* config/tc-arm.c: Fix spelling in comments.
+	* config/tc-avr.c: Fix spelling in comments.
+	* config/tc-cr16.c: Fix spelling in comments.
+	* config/tc-epiphany.c: Fix spelling in comments.
+	* config/tc-frv.c: Fix spelling in comments.
+	* config/tc-hppa.c: Fix spelling in comments.
+	* config/tc-hppa.h: Fix spelling in comments.
+	* config/tc-i370.c: Fix spelling in comments.
+	* config/tc-m68hc11.c: Fix spelling in comments.
+	* config/tc-m68k.c: Fix spelling in comments.
+	* config/tc-mcore.c: Fix spelling in comments.
+	* config/tc-mep.c: Fix spelling in comments.
+	* config/tc-metag.c: Fix spelling in comments.
+	* config/tc-mips.c: Fix spelling in comments.
+	* config/tc-mn10200.c: Fix spelling in comments.
+	* config/tc-mn10300.c: Fix spelling in comments.
+	* config/tc-nds32.c: Fix spelling in comments.
+	* config/tc-nios2.c: Fix spelling in comments.
+	* config/tc-ns32k.c: Fix spelling in comments.
+	* config/tc-pdp11.c: Fix spelling in comments.
+	* config/tc-ppc.c: Fix spelling in comments.
+	* config/tc-riscv.c: Fix spelling in comments.
+	* config/tc-rx.c: Fix spelling in comments.
+	* config/tc-score.c: Fix spelling in comments.
+	* config/tc-score7.c: Fix spelling in comments.
+	* config/tc-sparc.c: Fix spelling in comments.
+	* config/tc-tic54x.c: Fix spelling in comments.
+	* config/tc-vax.c: Fix spelling in comments.
+	* config/tc-xgate.h: Fix spelling in comments.
+	* config/tc-xtensa.c: Fix spelling in comments.
+	* config/tc-z80.c: Fix spelling in comments.
+	* dwarf2dbg.c: Fix spelling in comments.
+	* input-file.h: Fix spelling in comments.
+	* itbl-ops.c: Fix spelling in comments.
+	* read.c: Fix spelling in comments.
+	* stabs.c: Fix spelling in comments.
+	* symbols.c: Fix spelling in comments.
+	* write.c: Fix spelling in comments.
+	* testsuite/gas/all/itbl-test.c: Fix spelling in comments.
+	* testsuite/gas/tic4x/opclasses.h: Fix spelling in comments.
+
+2016-11-25  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c (sparc_ip): Avoid emitting a cbcond error
+	messages for non-cbcond instructions.
+	* testsuite/gas/sparc/cbcond-diag.s: New file.
+	* testsuite/gas/sparc/cbcond-diag.l: Likewise.
+	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run cbcond-diag tests.
+
+2016-11-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/sparc/sparc.exp (gas_64_check): Make sure the
+	hwcaps-bump test is run with 64-bit objects.
+
+2016-11-23  Kuan-Lin Chen  <kuanlinchentw@gmail.com>
+
+	* config/tc-riscv.c: Add missing break.
+
+2016-11-23  Alan Modra  <amodra@gmail.com>
+
+	* po/POTFILES.in: Regenerate.
+
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+        * configure: Regenerate.
+
+2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c: Move HWS_* and HWS2_* definitions to
+	opcodes/sparc-opc.c.
+	(sparc_arch): Clarify the new role of the hwcap_allowed and
+	hwcap2_allowed fields.
+	(sparc_arch_table): Remove HWS_* and HWS2_* instances from
+	hwcap_allowed and hwcap2_allowed respectively.
+	(md_parse_option): Include the opcode arch hwcaps when processing
+	-A.
+	(sparc_ip): Use the current opcode arch hwcaps to update
+	hwcap_allowed, as well as the hwcaps of the instruction triggering
+	the bump.
+	* testsuite/gas/sparc/hwcaps-bump.s: New file.
+	* testsuite/gas/sparc/hwcaps-bump.l: Likewise.
+	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run tests in
+	hwcaps-bump.
+
+2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/b.d: Update test result.
+
+2016-11-22  Alan Modra  <amodra@gmail.com>
+
+	PR 20744
+	* config/tc-ppc.c: Delete VLE insn defines.
+	(md_assemble): Swap use_a_reloc and use_d_reloc.
+	* testsuite/gas/ppc/vle-reloc.d: Update.
+
+2016-11-21  Renlin Li  <renlin.li@arm.com>
+
+	PR gas/20827
+	* config/tc-arm.c (encode_arm_shift): Don't assert for operands not
+	presented.
+	* testsuite/gas/arm/add-shift-two.d: New.
+	* testsuite/gas/arm/add-shift-two.s: New.
+
+2016-11-21  Alan Modra  <amodra@gmail.com>
+
+	* configure.ac: Invoke ACX_PROG_CMP_IGNORE_INITIAL.
+	* Makefile.am (comparison): Rewrite using do_compare.
+	* configure: Regenerate.
+	* Makefile.in: Regenerate.
+	* doc/Makefile.in: Regenerate.
+
+2016-11-18  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/cl-warn.s: New file.
+	* testsuite/gas/arc/cpu-pseudop-1.d: Likewise.
+	* testsuite/gas/arc/cpu-pseudop-1.s: Likewise.
+	* testsuite/gas/arc/cpu-pseudop-2.d: Likewise.
+	* testsuite/gas/arc/cpu-pseudop-2.s: Likewise.
+	* testsuite/gas/arc/cpu-warn2.s: Likewise.
+	* config/tc-arc.c (selected_cpu): Initialize.
+	(feature_type): New struct.
+	(feature_list): New variable.
+	(arc_check_feature): New function.
+	(arc_select_cpu): Check for .cpu duplicates. Don't overwrite the
+	current cpu features. Check if a feature is available for a given
+	cpu.
+	(md_parse_option): Test if features are available for a given cpu.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_IMM_ROT*.
+	* testsuite/gas/aarch64/advsimd-armv8_3.d: New.
+	* testsuite/gas/aarch64/advsimd-armv8_3.s: New.
+	* testsuite/gas/aarch64/illegal-fcmla.s: New.
+	* testsuite/gas/aarch64/illegal-fcmla.l: New.
+	* testsuite/gas/aarch64/illegal-fcmla.d: New.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Add ldaprb, ldaprh, ldapr tests.
+	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise.
+	* testsuite/gas/aarch64/illegal-ldapr.s: Likewise.
+	* testsuite/gas/aarch64/illegal-ldapr.d: Likewise.
+	* testsuite/gas/aarch64/illegal-ldapr.l: Likewise.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* testsuite/gas/aarch64/fp-armv8_3.s: Add fjcvtzs test.
+	* testsuite/gas/aarch64/fp-armv8_3.d: Likewise.
+	* testsuite/gas/aarch64/illegal-fjcvtzs.s: Likewise.
+	* testsuite/gas/aarch64/illegal-fjcvtzs.d: Likewise.
+	* testsuite/gas/aarch64/illegal-fjcvtzs.l: Likewise.
+	* testsuite/gas/aarch64/illegal-nofp-armv8_3.s: Likewise.
+	* testsuite/gas/aarch64/illegal-nofp-armv8_3.d: Likewise.
+	* testsuite/gas/aarch64/illegal-nofp-armv8_3.l: Likewise.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_ADDR_SIMM10.
+	(fix_insn): Likewise.
+	(warn_unpredictable_ldst): Handle ldst_imm10.
+	* testsuite/gas/aarch64/pac.s: Add ldraa and ldrab tests.
+	* testsuite/gas/aarch64/pac.d: Likewise.
+	* testsuite/gas/aarch64/illegal-ldraa.s: New.
+	* testsuite/gas/aarch64/illegal-ldraa.l: New.
+	* testsuite/gas/aarch64/illegal-ldraa.d: New.
+
+2016-11-15  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20803
+	* config/tc-sparc.c (cons_fix_new_sparc): Use unaligned relocs in
+	the .eh_frame section.
+
+2016-11-13  Anthony Green  <green@moxielogic.org>
+
+	* config/tc-moxie.c (md_assemble): Assemble 'bad' opcode.
+
+2016-11-11  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20732
+	* expr.c (integer_constant): If tc_allow_L_suffix is defined and
+	non-zero then accept a L or LL suffix.
+	* testsuite/gas/sparc/pr20732.d: New test source file.
+	* testsuite/gas/sparc/pr20732.d: New test output file.
+	* testsuite/gas/sparc/sparc.exp: Run new test.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* testsuite/gas/aarch64/pac.s: Add ARMv8.3 branch instruction tests.
+	* testsuite/gas/aarch64/pac.d: Likewise.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-aarch64.c (process_omitted_operand): Handle AARCH64_OPND_Rm_SP.
+	(parse_operands): Likewise.
+	* testsuite/gas/aarch64/pac.s: Add pacga.
+	* testsuite/gas/aarch64/pac.d: Add pacga.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* testsuite/gas/aarch64/pac.s: New.
+	* testsuite/gas/aarch64/pac.d: New.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* testsuite/gas/aarch64/sysreg-3.s: New.
+	* testsuite/gas/aarch64/sysreg-3.d: New.
+	* testsuite/gas/aarch64/illegal-sysreg-3.l: New.
+	* testsuite/gas/aarch64/illegal-sysreg-3.d: New.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* testsuite/gas/aarch64/system-3.s: New.
+	* testsuite/gas/aarch64/system-3.d: New.
+	* testsuite/gas/aarch64/system.d: Update expected output.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-aarch64.c (aarch64_archs): Add "armv8.3-a".
+	* doc/c-aarch64.texi (-march): Likewise.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-aarch64.c (aarch64_features): Fix "simd" and "crypto".
+	* testsuite/gas/aarch64/illegal-crypto-nofp.d: New.
+	* testsuite/gas/aarch64/illegal-crypto-nofp.l: New.
+	* testsuite/gas/aarch64/illegal-fp16-nofp.d: New.
+	* testsuite/gas/aarch64/illegal-fp16-nofp.l: New.
+	* testsuite/gas/aarch64/illegal-fp16-nofp.s: New.
+
+2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20799
+	* testsuite/gas/i386/opcode.s: Add a test for EVEX vpextrw.
+	* testsuite/gas/i386/opcode-intel.d: Updated.
+	* testsuite/gas/i386/opcode-suffix.d: Likewise.
+	* testsuite/gas/i386/opcode.d: Likewise.
+	* testsuite/gas/i386/x86-64-avx512bw-opts.s: Remove vpextrw
+	tests.
+	* testsuite/gas/i386/x86-64-avx512bw-opts-intel.d: Updated.
+	* testsuite/gas/i386/x86-64-avx512bw-opts.d: Likewise.
+
+2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20754
+	* testsuite/gas/i386/opcode-suffix.d: Updated.
+
+2016-11-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20775
+	* testsuite/gas/i386/i386.exp: Run fpu-bad.
+	* testsuite/gas/i386/fpu-bad.d: New file.
+	* testsuite/gas/i386/fpu-bad.s: Likewise.
+
+2016-11-04  Nathan Sidwell  <nathan@acm.org>
+
+	gas/
+	* input-scrub.c (partial_size): Make size_t.
+	(buffer_length): Likewise.  Adjust meaning.
+	(struct input_save): Adjust partial_size type.
+	(input_scrub_reinit): New.
+	(input_scrub_push, input_scrub_begin): Use it.
+	(input_scrub_next_buffer): Fix buffer extension logic. Only scan
+	newly read buffer for newline.
+
+2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (find_opcode_match): Use insert function to
+	validate matching address type operands.
+	* testsuite/gas/arc/nps400-10.d: New file.
+	* testsuite/gas/arc/nps400-10.s: New file.
+
+2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (cortex-m33): Declare new processor.
+	* doc/c-arm.texi (-mcpu ARM command line option): Document new
+	Cortex-M33 processor.
+	* NEWS: Mention ARM Cortex-M33 support.
+
+2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (cortex-m23): Declare new processor.
+	* doc/c-arm.texi (-mcpu ARM command line option): Document new
+	Cortex-M23 processor.
+	* NEWS: Mention ARM Cortex-M23 support.
+
+2016-11-04  Palmer Dabbelt  <palmer@dabbelt.com>
+	    Andrew Waterman <andrew@sifive.com>
+
+	* Makefile.am (CPU_DOCS): Add c-riscv.texi.
+	* Makefile.in: Regenerate.
+	* doc/all.texi: Set RISCV.
+	* doc/as.texinfo: Add RISCV options.
+	Add RISC-V-Dependent node.
+	Include c-riscv.texi.
+	* doc/c-riscv.texi: Rename RISC-V Options to RISC-V-Opts.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* testsuite/gas/arc/nps400-6.s: Change ldbit tests so that limm
+	operands are out of the range of an s9, in order to fix the test.
+	* testsuite/gas/arc/nps400-6.d: Updated to match new expected output.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* testsuite/gas/arc/nps-400-9.d: Added.
+	* testsuite/gas/arc/nps-400-9.s: Added.
+
+2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (struct arc_insn): Change type of insn field.
+	(md_number_to_chars_midend): Support 6- and 8-byte values.
+	(emit_insn0): Update debug output.
+	(find_opcode_match): Likewise.
+	(build_fake_opcode_hash_entry): Delete.
+	(find_special_case_long_opcode): Delete.
+	(find_special_case): Remove long format special case handling.
+	(insert_operand): Change instruction type and update debug print
+	format.
+	(assemble_insn): Change instruction type, update debug print
+	formats, and remove unneeded assert.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* config/tc-arc.c (assemble_insn): Replace use of ARC_SHORT with
+	arc_opcode_len.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* config/tc-arc.c (struct arc_insn): Replace short_insn flag with
+	len field.
+	(apply_fixups): Update to use len field.
+	(emit_insn0): Simplify code, making use of len field.
+	(md_convert_frag): Update to use len field.
+	(assemble_insn): Update to use len field.
+
+2016-11-03  Siddhesh Poyarekar  <siddhesh.poyarekar@linaro.org>
+
+	* config/tc-aarch64.c (aarch64_cpus): Add falkor.
+	* config/tc-arm.c (arm_cpus): Likewise.
+	* doc/c-aarch64.texi: Likewise.
+	* doc/c-arm.texi: Likewise.
+
+2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20754
+	* testsuite/gas/i386/opcode.s: Add tests for opcode 0x82.
+	* testsuite/gas/i386/opcode-intel.d: Updated.
+	* testsuite/gas/i386/opcode.d: Likewise.
+
+2016-11-02  Jiong Wang  <jiong.wang@arm.com>
+
+	* config/tc-arm.c (SBIT_SHIFT): New.
+	(T2_SBIT_SHIFT): Likewise.
+	(t32_insn_ok): Return TRUE for MOV in ARMv8-M Baseline.
+	(md_apply_fix): Try UINT16 encoding when ARM/Thumb modified immediate
+	encoding failed.
+	* testsuite/gas/arm/archv6t2-bad.s: New error case.
+	* testsuite/gas/arm/archv6t2-bad.l: New error match.
+	* testsuite/gas/arm/archv6t2.s: New testcase.
+	* testsuite/gas/arm/archv6t2.d: New expected result.
+	* testsuite/gas/arm/archv8m.s: New testcase.
+	* testsuite/gas/arm/archv8m-base.d: New expected result.
+	* testsuite/gas/arm/archv8m-main.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+
+2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+
+	* config/tc-i386.c: (cpu_arch) Add .avx512_4vnniw.
+	(cpu_noarch): Add noavx512_4vnniw.
+	* doc/c-i386.texi: Document avx512_4vnniw, noavx512_4vnniw.
+	* testsuite/gas/i386/i386.exp: Run AVX512_4VNNIW tests.
+	* testsuite/gas/i386/avx512_4vnniwd_vl-intel.d: New test.
+	* testsuite/gas/i386/avx512_4vnniwd_vl.d: Ditto.
+	* testsuite/gas/i386/avx512_4vnniwd_vl.s: Ditto.
+	* testsuite/gas/i386/avx512_4vnniwd-intel.d: Ditto.
+	* testsuite/gas/i386/avx512_4vnniwd.d: Ditto.
+	* testsuite/gas/i386/avx512_4vnniwd.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl-intel.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4vnniwd-intel.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4vnniwd.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4vnniwd.s: Ditto.
+
+2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Add .avx512_4fmaps.
+	(cpu_noarch): Add noavx512_4fmaps.
+	(process_operands): Handle implicit quad group.
+	* doc/c-i386.texi: Document avx512_4fmaps, noavx512_4fmaps.
+	* testsuite/gas/i386/i386.exp: Add AVX512_4FMAPS tests.
+	* testsuite/gas/i386/avx512_4fmaps_vl-intel.d: New test.
+	* testsuite/gas/i386/avx512_4fmaps_vl.d: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps_vl.s: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps-intel.d: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps.d: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps.s: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps-warn.l: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps-warn.s: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps_vl-warn.l: Ditto.
+	* testsuite/gas/i386/avx512_4fmaps_vl-warn.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps.d: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l: Ditto.
+	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s: Ditto.
+
+2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
+	    Andrew Waterman <andrew@sifive.com>
+
+	Add support for RISC-V architecture.
+	* Makefile.am: Add riscv files.
+	* Makefile.in: Regenerate.
+	* NEWS: Mention the support for this architecture.
+	* configure.in: Define a default architecture.
+	* configure: Regenerate.
+	* configure.tgt: Add entries for riscv.
+	* doc/as.texinfo: Likewise.
+	* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
+	* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
+	* config/tc-riscv.c: New file.
+	* config/tc-riscv.h: New file.
+	* doc/c-riscv.texi: New file.
+	* testsuite/gas/riscv: New directory.
+	* testsuite/gas/riscv/riscv.exp: New file.
+	* testsuite/gas/riscv/t_insns.d: New file.
+	* testsuite/gas/riscv/t_insns.s: New file.
+
+2016-10-27  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (arc_target): Delete.
+	(arc_target_name): Delete.
+	(arc_features): Delete.
+	(arc_mach_type): Delete.
+	(mach_type_specified_p): Delete.
+	(enum mach_selection_type): New enum.
+	(mach_selection_mode): New static global.
+	(selected_cpu): New static global.
+	(arc_eflag): Rename to ...
+	(arc_initial_eflag): ...this, and make const.
+	(arc_select_cpu): Update comment, new parameter, check how
+	previous machine type selection was made, and record this
+	selection.  Use selected_cpu instead of old globals.
+	(arc_option): Remove use of arc_get_mach, instead use
+	arc_select_cpu to validate machine type selection.  Use
+	selected_cpu over old globals.
+	(allocate_tok): Use selected_cpu over old globals.
+	(find_opcode_match): Likewise.
+	(assemble_tokens): Likewise.
+	(arc_cons_fix_new): Likewise.
+	(arc_extinsn): Likewise.
+	(arc_extcorereg): Likewise.
+	(md_begin): Update default machine type selection, use
+	selected_cpu over old globals.
+	(md_parse_option): Update machine type selection option handling,
+	use selected_cpu over old globals.
+	* testsuite/gas/arc/nps400-0.s: Add .cpu directive.
+
+2016-10-26  Alan Modra  <amodra@gmail.com>
+
+	Revert 2016-10-06  Alan Modra  <amodra@gmail.com>
+	* config/rl78-parse.y: Do use old %name-prefix syntax.
+	* config/rx-parse.y: Likewise.
+
+2016-10-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Remove .pcommit.
+	* doc/c-i386.texi: Likewise.
+	* testsuite/gas/i386/i386.exp: Remove pcommit tests.
+	* testsuite/gas/i386/pcommit-intel.d: Removed.
+	* testsuite/gas/i386/pcommit.d: Likewise.
+	* testsuite/gas/i386/pcommit.s: Likewise.
+	* testsuite/gas/i386/x86-64-pcommit-intel.d: Likewise.
+	* testsuite/gas/i386/x86-64-pcommit.d: Likewise.
+	* testsuite/gas/i386/x86-64-pcommit.s: Likewise.
+
+2016-10-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutis/20705
+	* testsuite/gas/i386/i386.exp: Run x86-64-opcode-bad.
+	* testsuite/gas/i386/x86-64-opcode-bad.d: New file.
+	* testsuite/gas/i386/x86-64-opcode-bad.s: Likewise.
+
+2016-10-19  Renlin Li  <renlin.li@arm.com>
+
+	* config/tc-arm.c (encode_arm_shift): Generate unpredictable warning
+	for register-shifted register instructions.
+	* testsuite/gas/arm/shift-bad-pc.d: New.
+	* testsuite/gas/arm/shift-bad-pc.l: New.
+	* testsuite/gas/arm/shift-bad-pc.s: New.
+
+2016-10-17  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/arc/dis-inv.d: Fixed matching.
+
+2016-10-17  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/arc/dis-inv.s: Test to validate patch.
+	* testsuite/arc/dis-inv.d: Likewise.
+
+2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/shortlimm_a7.d: New file.
+	* testsuite/gas/arc/shortlimm_a7.s: Likewise.
+	* testsuite/gas/arc/shortlimm_hs.d: Likewise.
+	* testsuite/gas/arc/shortlimm_hs.s: Likewise.
+
+2016-10-11  Nick Clifton  <nickc@redhat.com>
+
+	* gas/arm/tls.d: Adjust output to match change in objdump.
+
+2016-10-11  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20666
+	* testsuite/gas/aarch64/alias-2.d: Update expected results.
+
+2016-10-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* testsuite/gas/cfi/cfi-common-1.d: Adjust regexps for mips64.
+	* testsuite/gas/cfi/cfi-common-2.d: Likewise.
+	* testsuite/gas/cfi/cfi-common-3.d: Likewise.
+	* testsuite/gas/cfi/cfi-common-4.d: Likewise.
+	* testsuite/gas/cfi/cfi-common-5.d: Likewise.
+	* testsuite/gas/cfi/cfi-common-7.d: Likewise.
+	* testsuite/gas/cfi/cfi-common-8.d: Likewise.
+	* testsuite/gas/cfi/cfi-common-9.d: Likewise.
+	* testsuite/gas/cfi/cfi-mips-1.d: Likewise.
+
+2016-10-08  Alan Modra  <amodra@gmail.com>
+
+	* Makefile.am (EXTRA_as_new_SOURCES): Add config/rl78-parse.y and
+	config/rx-parse.y.  Move config/bfin-parse.y.
+	(bfin-parse.@OBJEXT@, rl78-parse.@OBJEXT@, rx-parse.@OBJEXT@): Delete.
+	($(srcdir)/config/rl78-defs.h): New rule.
+	* Makefile.in: Regenerate.
+
+2016-10-07  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20667
+	* testsuite/gas/aarch64/sys-rt-reg.s: Test source for instructions using
+	SYS_Rt reg.
+	* testsuite/gas/aarch64/sys-rt-reg.d: New testcase.
+
+2016-10-06  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/leave_enter.d: New file.
+	* testsuite/gas/arc/leave_enter.s: Likewise.
+	* testsuite/gas/arc/regnames.d: Likewise.
+	* testsuite/gas/arc/regnames.s: Likewise.
+	* config/tc-arc.c (arc_parse_name): Don't match reg names against
+	confirmed symbol names.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* app.c (do_scrub_chars): Move fall through comment.
+	* expr.c (operand): Likewise.
+
+2016-10-06  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	PR gas/20648
+	* dw2gencfi.c (dot_cfi_sections): Refine the check for
+	inconsistent .cfi_sections to only consider compact vs non
+	compact forms.
+	* testsuite/gas/cfi/cfi-common-9.d: New file.
+	* testsuite/gas/cfi/cfi-common-9.s: New file.
+	* testsuite/gas/cfi/cfi.exp: Run new test.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* app.c: Add missing fall through comments.
+	* dw2gencfi.c: Likewise.
+	* expr.c: Likewise.
+	* config/tc-alpha.c: Likewise.
+	* config/tc-arc.c: Likewise.
+	* config/tc-arm.c: Likewise.
+	* config/tc-cr16.c: Likewise.
+	* config/tc-crx.c: Likewise.
+	* config/tc-dlx.c: Likewise.
+	* config/tc-h8300.c: Likewise.
+	* config/tc-hppa.c: Likewise.
+	* config/tc-i370.c: Likewise.
+	* config/tc-i386.c: Likewise.
+	* config/tc-i960.c: Likewise.
+	* config/tc-ia64.c: Likewise.
+	* config/tc-m68hc11.c: Likewise.
+	* config/tc-m68k.c: Likewise.
+	* config/tc-mep.c: Likewise.
+	* config/tc-metag.c: Likewise.
+	* config/tc-microblaze.c: Likewise.
+	* config/tc-mips.c: Likewise.
+	* config/tc-ns32k.c: Likewise.
+	* config/tc-rx.c: Likewise.
+	* config/tc-score.c: Likewise.
+	* config/tc-score7.c: Likewise.
+	* config/tc-sh.c: Likewise.
+	* config/tc-tic4x.c: Likewise.
+	* config/tc-vax.c: Likewise.
+	* config/tc-xstormy16.c: Likewise.
+	* config/tc-z80.c: Likewise.
+	* config/tc-z8k.c: Likewise.
+	* config/obj-elf.c: Likewise.
+	* config/tc-i386.c: Likewise.
+	* depend.c: Spell fall through comments consistently.
+	* config/tc-arm.c: Likewise.
+	* config/tc-d10v.c: Likewise.
+	* config/tc-i960.c: Likewise.
+	* config/tc-ia64.c: Likewise.
+	* config/tc-m68k.c: Likewise.
+	* config/tc-mcore.c: Likewise.
+	* config/tc-mep.c: Likewise.
+	* config/tc-ns32k.c: Likewise.
+	* config/tc-visium.c: Likewise.
+	* config/tc-xstormy16.c: Likewise.
+	* config/tc-z8k.c: Likewise.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* as.h (as_assert): Add ATTRIBUTE_NORETURN.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-arc.c (find_opcode_match): Add missing break.
+	* config/tc-i960.c (get_cdisp): Likewise.
+	* config/tc-metag.c (parse_swap, md_apply_fix): Likewise.
+	* config/tc-mt.c (md_parse_option): Likewise.
+	* config/tc-nds32.c (nds32_apply_fix): Likewise.
+	* config/tc-hppa.c (pa_ip): Assert rather than testing last
+	condition of multiple if statements.
+	* config/tc-s390.c (s390_exp_compare): Return 0 on error.
+	* config/tc-tic4x.c (tic4x_operand_parse): Add as_bad and break
+	out of case rather than falling into next case.  Formatting.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* config/rl78-parse.y: Don't use deprecated %name-prefix.
+	* config/rx-parse.y: Likewise.
+
+2016-09-29  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20553
+	* testsuite/gas/aarch64/advsimd-fp16.s (indexed_elem): New high index
+	testcases for H and S variants.  New low index testcases for D variant.
+	* testsuite/gas/aarch64/advsimd-fp16.d: Update expected results.
+
+2016-09-29  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-ppc.c (md_assemble): Handle PPC_OPERAND_OPTIONAL32.
+	* testsuite/gas/ppc/power8.s: Provide tbegin. operand.
+	* testsuite/gas/ppc/power9.d: Update cmprb disassembly.
+
+2016-09-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-xtensa.c (xg_reverse_shift_count): Pass cnt_arg instead of
+	cnt_argp to concat.
+
+2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
+
+	* Makefile.in: Regenerate.
+	* configure: Likewise.
+	* doc/Makefile.in: Likewise.
+
+2016-09-26  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-ppc.c (ppc_elf_gnu_attribute): New function.
+	(md_pseudo_table <ELF>): Handle "gnu_attribute".
+
+2016-09-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (v7m_psrs): Remove BASEPRI_MASK MRS/MSR special
+	register and redundant basepri_max.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (print_operands): Print spaces between
+	operands.
+	* testsuite/gas/aarch64/ilp32-basic.d: Expect spaces after ","
+	in addresses.
+	* testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise.
+	* testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise.
+	* testsuite/gas/aarch64/ldst-reg-pair.d: Likewise.
+	* testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise.
+	* testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise.
+	* testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
+	* testsuite/gas/aarch64/reloc-insn.d: Likewise.
+	* testsuite/gas/aarch64/sve.d: Likewise.
+	* testsuite/gas/aarch64/symbol.d: Likewise.
+	* testsuite/gas/aarch64/system.d: Likewise.
+	* testsuite/gas/aarch64/tls-desc.d: Likewise.
+	* testsuite/gas/aarch64/sve-invalid.l: Expect spaces after ","
+	in suggested alternatives.
+	* testsuite/gas/aarch64/verbose-error.l: Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (output_operand_error_record): Use "must be"
+	rather than "should be" or "expected to be" in error messages.
+	(parse_operands): Likewise.
+	* testsuite/gas/aarch64/diagnostic.l: Likewise.
+	* testsuite/gas/aarch64/legacy_reg_names.l: Likewise.
+	* testsuite/gas/aarch64/sve-invalid.l: Likewise.
+	* testsuite/gas/aarch64/sve-reg-diagnostic.l: Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (opcode_lookup): Search for the end of
+	a condition name, rather than assuming that it will have exactly
+	2 characters.
+	(parse_operands): Likewise.
+	* testsuite/gas/aarch64/alias.d: Add new condition-code comments
+	to the expected output.
+	* testsuite/gas/aarch64/beq_1.d: Likewise.
+	* testsuite/gas/aarch64/float-fp16.d: Likewise.
+	* testsuite/gas/aarch64/int-insns.d: Likewise.
+	* testsuite/gas/aarch64/no-aliases.d: Likewise.
+	* testsuite/gas/aarch64/programmer-friendly.d: Likewise.
+	* testsuite/gas/aarch64/reloc-insn.d: Likewise.
+	* testsuite/gas/aarch64/b_c_1.d, testsuite/gas/aarch64/b_c_1.s:
+	New test.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* testsuite/gas/aarch64/diagnostic.s,
+	testsuite/gas/aarch64/diagnostic.l: Add tests for
+	invalid uses of MUL VL and MUL in base AArch64 instructions.
+	* testsuite/gas/aarch64/sve-add.s, testsuite/gas/aarch64/sve-add.d,
+	testsuite/gas/aarch64/sve-dup.s, testsuite/gas/aarch64/sve-dup.d,
+	testsuite/gas/aarch64/sve-invalid.s,
+	testsuite/gas/aarch64/sve-invalid.d,
+	testsuite/gas/aarch64/sve-invalid.l,
+	testsuite/gas/aarch64/sve-reg-diagnostic.s,
+	testsuite/gas/aarch64/sve-reg-diagnostic.d,
+	testsuite/gas/aarch64/sve-reg-diagnostic.l,
+	testsuite/gas/aarch64/sve.s, testsuite/gas/aarch64/sve.d: New tests.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* doc/c-aarch64.texi: Document the "sve" feature.
+	* config/tc-aarch64.c (REG_TYPE_R_Z_BHSDQ_VZP): New register type.
+	(get_reg_expected_msg): Handle it.
+	(parse_operands): When parsing operands of an SVE instruction,
+	disallow immediates that match REG_TYPE_R_Z_BHSDQ_VZP.
+	(aarch64_features): Add an entry for SVE.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_operands): Handle the new SVE core
+	and FP register operands.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (double_precision_operand_p): New function.
+	(parse_operands): Use it to calculate the dp_p input to
+	parse_aarch64_imm_float.  Handle the new SVE FP immediate operands.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_operands): Handle the new SVE integer
+	immediate operands.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (SHIFTED_NONE, SHIFTED_MUL_VL): New
+	parse_shift_modes.
+	(parse_shift): Handle SHIFTED_MUL_VL.
+	(parse_address_main): Add an imm_shift_mode parameter.
+	(parse_address, parse_sve_address): Update accordingly.
+	(parse_operands): Handle MUL VL addressing modes.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (REG_TYPE_SVE_BASE, REG_TYPE_SVE_OFFSET): New
+	register types.
+	(get_reg_expected_msg): Handle them.
+	(aarch64_addr_reg_parse): New function, split out from
+	aarch64_reg_parse_32_64.  Handle Z registers too.
+	(aarch64_reg_parse_32_64): Call it.
+	(parse_address_main): Add base_qualifier, offset_qualifier,
+	base_type and offset_type parameters.  Handle SVE base and offset
+	registers.
+	(parse_address): Update call to parse_address_main.
+	(parse_sve_address): New function.
+	(parse_operands): Parse the new SVE address operands.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (SHIFTED_MUL): New parse_shift_mode.
+	(parse_shift): Handle it.  Reject AARCH64_MOD_MUL for all other
+	shift modes.  Skip range tests for AARCH64_MOD_MUL.
+	(process_omitted_operand): Handle AARCH64_OPND_SVE_PATTERN_SCALED.
+	(parse_operands): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_enum_string): New function.
+	(po_enum_or_fail): New macro.
+	(parse_operands): Handle AARCH64_OPND_SVE_PATTERN and
+	AARCH64_OPND_SVE_PRFOP.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (vector_el_type): Add NT_zero and NT_merge.
+	(parse_vector_type_for_operand): Assert that the skipped character
+	is a '.'.
+	(parse_predication_for_operand): New function.
+	(parse_typed_reg): Parse /z and /m suffixes for predicate registers.
+	(vectype_to_qualifier): Handle NT_zero and NT_merge.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (NTA_HASVARWIDTH): New macro.
+	(AARCH64_REG_TYPES): Add ZN and PN.
+	(get_reg_expected_msg): Handle them.
+	(parse_vector_type_for_operand): Add a reg_type parameter.
+	Skip the width for Zn and Pn registers.
+	(parse_typed_reg): Extend vector handling to Zn and Pn.  Update the
+	call to parse_vector_type_for_operand.  Set HASVARTYPE for Zn and Pn,
+	expecting the width to be 0.
+	(parse_vector_reg_list): Restrict error about [BHSD]nn operands to
+	REG_TYPE_VN.
+	(vectype_to_qualifier): Use S_[BHSD] qualifiers for NTA_HASVARWIDTH.
+	(parse_operands): Handle the new Zn and Pn operands.
+	(REGSET16): New macro, split out from...
+	(REGSET31): ...here.
+	(reg_names): Add Zn and Pn entries.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (output_operand_error_record): Handle
+	AARCH64_OPDE_UNTIED_OPERAND.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (find_best_match): Simplify, allowing an
+	instruction with all-NIL qualifiers to fail to match.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_address_main): Remove reloc and
+	accept_reg_post_index parameters.  Parse relocations and register
+	post indexes unconditionally.
+	(parse_address): Remove accept_reg_post_index parameter.
+	Update call to parse_address_main.
+	(parse_address_reloc): Delete.
+	(parse_operands): Call parse_address instead of parse_address_main.
+	Update existing callers of parse_address and make them check
+	inst.reloc.type where appropriate.
+	* testsuite/gas/aarch64/diagnostic.s: Add tests for relocations
+	in ADDR_SIMPLE, SIMD_ADDR_SIMPLE, ADDR_SIMM7 and ADDR_SIMM9 addresses.
+	Also test for invalid uses of post-index register addressing.
+	* testsuite/gas/aarch64/diagnostic.l: Update accordingly.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (REG_TYPE_R_Z, REG_TYPE_R_SP): New register
+	types.
+	(get_reg_expected_msg): Handle them and REG_TYPE_R64_SP.
+	(aarch64_check_reg_type): Simplify.
+	(aarch64_reg_parse_32_64): Return the reg_entry instead of the
+	register number.  Return the type as a qualifier rather than an
+	"isreg32" boolean.  Remove reject_sp, reject_rz and isregzero
+	parameters.
+	(parse_shifter_operand): Update call to aarch64_parse_32_64_reg.
+	Use get_reg_expected_msg.
+	(parse_address_main): Likewise.  Use aarch64_check_reg_type.
+	(po_int_reg_or_fail): Replace reject_sp and reject_rz parameters
+	with a reg_type parameter.  Update call to aarch64_parse_32_64_reg.
+	Use aarch64_check_reg_type to test the result.
+	(parse_operands): Update after the above changes.  Parse ADDR_SIMPLE
+	addresses normally before enforcing the syntax restrictions.
+	* testsuite/gas/aarch64/diagnostic.s: Add tests for a post-index
+	zero register and for a stack pointer index.
+	* testsuite/gas/aarch64/diagnostic.l: Update accordingly.
+	Also update existing diagnostic messages after the above changes.
+	* testsuite/gas/aarch64/illegal-lse.l: Update the error message
+	for 32-bit register bases.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_aarch64_imm_float): Remove range check.
+	(parse_operands): Check the range of 8-bit FP immediates here instead.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_aarch64_imm_float): Report a specific
+	low-severity error for registers.
+	(parse_operands): Report an invalid floating point constant for
+	if parsing an FPIMM8 fails, and if no better error has been
+	recorded.
+	* testsuite/gas/aarch64/diagnostic.s,
+	testsuite/gas/aarch64/diagnostic.l: Add tests for integer operands
+	to FMOV.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (aarch64_double_precision_fmovable): Rename
+	to...
+	(can_convert_double_to_float): ...this.  Accept any double-precision
+	value that converts to single precision without loss of precision.
+	(parse_aarch64_imm_float): Update accordingly.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_immediate_expression): Add a
+	reg_type parameter.
+	(parse_constant_immediate): Likewise, and update calls.
+	(parse_aarch64_imm_float): Likewise.
+	(parse_big_immediate): Likewise.
+	(po_imm_nc_or_fail): Update accordingly, passing down a new
+	imm_reg_type variable.
+	(po_imm_of_fail): Likewise.
+	(parse_operands): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_neon_reg_list): Rename to...
+	(parse_vector_reg_list): ...this and take a register type
+	as input.
+	(parse_operands): Update accordingly.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_neon_type_for_operand): Rename to...
+	(parse_vector_type_for_operand): ...this.
+	(parse_typed_reg): Update accordingly.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (neon_type_el): Rename to...
+	(vector_type_el): ...this.
+	(parse_neon_type_for_operand): Update accordingly.
+	(parse_typed_reg): Likewise.
+	(aarch64_reg_parse): Likewise.
+	(vectype_to_qualifier): Likewise.
+	(parse_operands): Likewise.
+	(eq_neon_type_el): Likewise.  Rename to...
+	(eq_vector_type_el): ...this.
+	(parse_neon_reg_list): Update accordingly.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (neon_el_type: Rename to...
+	(vector_el_type): ...this.
+	(neon_type_el): Update accordingly.
+	(parse_neon_type_for_operand): Likewise.
+	(vectype_to_qualifier): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_neon_operand_type): Delete.
+	(parse_typed_reg): Call parse_neon_type_for_operand directly.
+
+2016-09-15  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/textinsnxop.d: New file.
+	* testsuite/gas/arc/textinsnxop.s: Likewise.
+
+2016-09-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run
+	dcti-couples-v9 only in ELF targets to avoid spurious failures in
+	sparc-aout and sparc-coff targets.
+
+2016-09-14  Peter Bergner <bergner@vnet.ibm.com>
+
+	* testsuite/gas/ppc/power9.d <slbiag, cpabort> New tests.
+	<addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
+	xor3, cp_abort, copy_first, paste, paste_last, sync>: Remove tests.
+	<copy, paste.>: Update tests.
+	* testsuite/gas/ppc/power9.s: Likewise.
+
+2016-09-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c (sparc_ip): Print the instruction arguments
+	in "architecture mismatch" error messages.
+
+2016-09-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c (md_assemble): Detect and warning on
+	unpredictable DCTI couples in certain arches.
+	(dcti_couples_detect): New global.
+	(md_longopts): Add command line option -dcti-couples-detect.
+	(md_show_usage): Document -dcti-couples-detect.
+	(md_parse_option): Handle OPTION_DCTI_COUPLES_DETECT.
+	* testsuite/gas/sparc/sparc.exp (gas_64_check): Run
+	dcti-couples-v8, dcti-couples-v9 and dcti-couples-v9c tests.
+	* testsuite/gas/sparc/dcti-couples.s: New file.
+	* testsuite/gas/sparc/dcti-couples-v9c.d: Likewise.
+	* testsuite/gas/sparc/dcti-couples-v8.d: Likewise.
+	* testsuite/gas/sparc/dcti-couples-v9.d: Likewise.
+	* testsuite/gas/sparc/dcti-couples-v9c.l: Likewise.
+	* testsuite/gas/sparc/dcti-couples-v8.l: Likewise.
+	* doc/as.texinfo (Overview): Document --dcti-couples-detect.
+	* doc/c-sparc.texi (Sparc-Opts): Likewise.
+
+2016-09-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/tls-relocs2.d: New file.
+	* testsuite/gas/arc/tls-relocs2.s: Likewise.
+	* config/tc-arc.c (tokenize_arguments): Accept offsets when base
+	is used.
+
+2016-09-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* config/tc-s390.c (s390_parse_cpu): Support alternate arch
+	strings.
+	* doc/as.texinfo: Document new arch strings.
+	* doc/c-s390.texi: Likewise.
+
+2016-09-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* config/tc-s390.c: Set all facitily bits by default
+
+2016-09-12  Patrick Steuer  <steuer@linux.vnet.ibm.com>
+
+	* testsuite/gas/s390/zarch-z196.d: Adjust testcase.
+
+2016-09-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (i386_target_format): Allow PROCESSOR_IAMCU
+	for Intel MCU.
+
+2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (valid_iamcu_cpu_flags): Removed.
+	(set_cpu_arch): Updated.
+	(md_parse_option): Likewise.
+	* testsuite/gas/i386/i386.exp: Run iamcu-4 and iamcu-5.  Remove
+	iamcu-inval-2 and iamcu-inval-3.
+	* testsuite/gas/i386/iamcu-4.d: New file.
+	* testsuite/gas/i386/iamcu-4.s: Likewise.
+	* testsuite/gas/i386/iamcu-5.d: Likewise.
+	* testsuite/gas/i386/iamcu-5.s: Likewise.
+	* testsuite/gas/i386/iamcu-inval-2.l: Removed.
+	* testsuite/gas/i386/iamcu-inval-2.s: Likewise.
+	* testsuite/gas/i386/iamcu-inval-3.l: Likewise.
+	* testsuite/gas/i386/iamcu-inval-3.s: Likewise.
+
+2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
+
+	* config/tc-arm.c ((arm_cpus): Use ARM_ARCH_V8A_CRC for all
+	ARMv8-A CPUs except xgene1.
+
+2016-08-31  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-ppc.c (md_assemble): Set sh_flags for VLE.  Test
+	ppc_cpu rather than calling ppc_mach to determine VLE mode.
+	(ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
+
+2016-08-26  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/sparc/crypto.d: Rename invalid opcode camellia_fi
+	to camellia_fl.
+	* testsuite/gas/sparc/crypto.s: Likewise.
+
+2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (v7m_psrs): Add MSPLIM, PSPLIM, MSPLIM_NS,
+	PSPLIM_NS, PRIMASK_NS, BASEPRI_NS, FAULTMASK_NS, CONTROL_NS, SP_NS and
+	their lowecase counterpart special registers.  Write register
+	identifier in hex.
+	* testsuite/gas/arm/archv8m-cmse-msr.s: Reorganize tests per
+	operation, special register and then case.  Use different register for
+	each operation.  Add tests for new special registers.
+	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Adapt expected result
+	accordingly.
+	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+
+2016-08-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
+	special registers.
+	* testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
+	registers.
+	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+
+2016-08-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Add .ptwrite.
+	* doc/c-i386.texi: Document ptwrite and .ptwrite.
+	* testsuite/gas/i386/i386.exp: Run ptwrite, ptwrite-intel,
+	x86-64-ptwrite and x86-64-ptwrite-intel.
+	* testsuite/gas/i386/ptwrite-intel.d: New file.
+	* testsuite/gas/i386/ptwrite.d: Likewise.
+	* testsuite/gas/i386/ptwrite.s: Likewise.
+	* testsuite/gas/i386/x86-64-ptwrite-intel.d: Likewise.
+	* testsuite/gas/i386/x86-64-ptwrite.d: Likewise.
+	* testsuite/gas/i386/x86-64-ptwrite.s: Likewise.
+
+2016-08-19  Tamar Christina  <tamar.christina@arm.com>
+
+	* config/tc-arm.c (do_co_reg2c): Added constraint.
+	* testsuite/gas/arm/dest-unpredictable.s: New.
+	* testsuite/gas/arm/dest-unpredictable.l: New.
+	* testsuite/gas/arm/dest-unpredictable.d: New.
+
+2016-08-19  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Adjust expected
+	ordering of sections.
+	* testsuite/gas/i386/x86-64-unwind.d: Likewise.
+	* testsuite/gas/ia64/alias-ilp32.d: Likewise.
+	* testsuite/gas/ia64/alias.d: Likewise.
+	* testsuite/gas/ia64/group-1.d: Likewise.
+	* testsuite/gas/ia64/group-2.d: Likewise.
+	* testsuite/gas/ia64/secname-ilp32.d: Likewise.
+	* testsuite/gas/ia64/secname.d: Likewise.
+	* testsuite/gas/ia64/unwind-ilp32.d: Likewise.
+	* testsuite/gas/ia64/unwind.d: Likewise.
+	* testsuite/gas/ia64/xdata-ilp32.d: Likewise.
+	* testsuite/gas/ia64/xdata.d: Likewise.
+	* testsuite/gas/mmix/bspec-1.d: Likewise.
+	* testsuite/gas/mmix/bspec-2.d: Likewise.
+	* testsuite/gas/mmix/byte-1.d: Likewise.
+	* testsuite/gas/mmix/loc-1.d: Likewise.
+	* testsuite/gas/mmix/loc-2.d: Likewise.
+	* testsuite/gas/mmix/loc-3.d: Likewise.
+	* testsuite/gas/mmix/loc-4.d: Likewise.
+	* testsuite/gas/mmix/loc-5.d: Likewise.
+	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
+
+2016-08-11  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/tc-aarch64.c (parse_aarch64_imm_float): Reject -0.0.
+	* testsuite/gas/aarch64/illegal.s, testsuite/gas/aarch64/illegal.l:
+	Add tests for -0.0.  Add an end-of-file comment.
+
+2016-08-05  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20429
+	* config/tc-arm.c (do_vfp_nsyn_push): Check that no more than 16
+	registers are pushed.
+	(do_vfp_nsyn_pop): Check that no more than 16 registers are
+	popped.
+	* testsuite/gas/arm/pr20429.s: New test.
+	* testsuite/gas/arm/pr20429.d: New test driver.
+	* testsuite/gas/arm/pr20429.1: Expected error output.
+
+	PR gas/20364
+	* config/tc-aarch64.c (s_ltorg): Change the mapping state after
+	aligning the frag.
+	(aarch64_init): Treat rs_align frags in code sections as
+	containing code, not data.
+	* testsuite/gas/aarch64/pr20364.s: New test.
+	* testsuite/gas/aarch64/pr20364.d: New test driver.
+
+2016-08-04  Stefan Trleman  <stefan.teleman@oracle.com>
+
+	PR gas/20427
+	* config/tc-sparc.c (cons_fix_new_sparc): Prevent the generation
+	of 64-bit relocation types when assembling for a 32-bit Solaris
+	target.
+
+2016-07-27  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/sparc/sparc.exp: Use is_elf_format to discriminate
+	ELF targets.
+	Run natural, natural-32, pr4587, ticc-imm-reg, v8-movwr-imm,
+	pause, save-args, cbcond, cfr, crypto edge, flush, hpcvis3, ima,
+	ld_st_fsr, ldtw_sttw, ldd_std, ldx_stx, ldx_efsr, mwait, mcdper,
+	sparc5vis4, xcrypto, v9branch1 and imm-plus-rreg only in ELF
+	targets.
+	(sparc_elf_setup): Delete.
+	* testsuite/gas/sparc/save-args.d: Fix a copy-paste typo in the
+	test's #name entry.
+
+2016-07-27  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag.
+	(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16)
+	(RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16)
+	(RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32)
+	(RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits.
+	(get_append_method): Also return APPEND_ADD_COMPACT for
+	microMIPS instructions.
+	(find_altered_mips16_opcode): Exclude macros from matching.
+	Factor code out...
+	(find_altered_opcode): ... to this new function.
+	(find_altered_micromips_opcode): New function.
+	(frag_branch_delay_slot_size): Likewise.
+	(append_insn): Handle microMIPS branch/jump compaction.
+	(macro_start): Likewise.
+	(relaxed_micromips_32bit_branch_length): Likewise.
+	(md_convert_frag): Likewise.
+	* testsuite/gas/mips/micromips.s: Add conditional explicit NOPs
+	for delay slot filling.
+	* testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for
+	delay slot filling.
+	* testsuite/gas/mips/micromips-size-1.s: Likewise.
+	* testsuite/gas/mips/micromips.l: Adjust line numbers.
+	* testsuite/gas/mips/micromips-warn.l: Likewise.
+	* testsuite/gas/mips/micromips-size-1.l: Likewise.
+	* testsuite/gas/mips/micromips.d: Adjust padding.
+	* testsuite/gas/mips/micromips-trap.d: Likewise.
+	* testsuite/gas/mips/micromips-insn32.d: Likewise.
+	* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
+	* testsuite/gas/mips/micromips@beq.d: Update patterns for
+	branch/jump compaction.
+	* testsuite/gas/mips/micromips@bge.d: Likewise.
+	* testsuite/gas/mips/micromips@bgeu.d: Likewise.
+	* testsuite/gas/mips/micromips@blt.d: Likewise.
+	* testsuite/gas/mips/micromips@bltu.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-4.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-5.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
+	* testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise.
+	* testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d:
+	Likewise.
+	* testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d:
+	Likewise.
+	* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
+	* testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise.
+	* testsuite/gas/mips/micromips@relax.d: Likewise.
+	* testsuite/gas/mips/micromips@relax-at.d: Likewise.
+	* testsuite/gas/mips/micromips@relax-swap3.d: Likewise.
+	* testsuite/gas/mips/branch-extern-2.d: Likewise.
+	* testsuite/gas/mips/branch-extern-4.d: Likewise.
+	* testsuite/gas/mips/branch-section-2.d: Likewise.
+	* testsuite/gas/mips/branch-section-4.d: Likewise.
+	* testsuite/gas/mips/branch-weak-2.d: Likewise.
+	* testsuite/gas/mips/branch-weak-5.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-addend.d:
+	Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
+	Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
+	Likewise.
+	* testsuite/gas/mips/micromips-compact.d: New test.
+	* testsuite/gas/mips/mips.exp: Run the new test.
+
+2016-07-27  Graham Markall  <graham.markall@embecosm.com>
+
+        * config/tc-arc.c: Add new global arc_addrtype_hash.
+        Define O_colon and O_addrtype.
+        (debug_exp): Add O_colon and O_addrtype.
+        (tokenize_arguments): Handle colon and address type
+        tokens.
+        (declare_addrtype): New function.
+        (md_begin): Initialise arc_addrtype_hash.
+        (arc_parse_name): Add lookup of address types.
+	(assemble_insn): Handle colons and address types by
+        ignoring them.
+        * testsuite/gas/arc/nps400-8.s: New file.
+        * testsuite/gas/arc/nps400-8.d: New file.
+        * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests.
+        * testsuite/gas/arc/nps400-8.d: Add expected PMU
+        instruction output.
+
+2016-07-26  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `insn32' flag.
+	(RELAX_MICROMIPS_INSN32): New macro.
+	(RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
+	(RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_RELAX32)
+	(RELAX_MICROMIPS_TOOFAR16, RELAX_MICROMIPS_MARK_TOOFAR16)
+	(RELAX_MICROMIPS_CLEAR_TOOFAR16, RELAX_MICROMIPS_TOOFAR32)
+	(RELAX_MICROMIPS_MARK_TOOFAR32, RELAX_MICROMIPS_CLEAR_TOOFAR32):
+	Shift bits.
+	(append_insn): Record `mips_opts.insn32' with relaxed microMIPS
+	branches.
+	(relaxed_micromips_32bit_branch_length): Handle the `insn32'
+	mode.
+	(md_convert_frag): Likewise.
+	* testsuite/gas/mips/micromips-branch-relax.s: Add `insn32'
+	conditionals.
+	* testsuite/gas/mips/micromips-branch-relax.l: Update line
+	numbers accordingly.
+	* testsuite/gas/mips/micromips-branch-relax-pic.l: Likewise.
+	* testsuite/gas/mips/micromips-branch-relax-insn32.d: New test.
+	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.d: New
+	test.
+	* testsuite/gas/mips/micromips-branch-relax-insn32.l: New
+	stderr output.
+	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.l: New
+	stderr output.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* configure: Regenerated.
+
+2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/dsp.d: New file.
+	* testsuite/gas/arc/dsp.s: Likewise.
+	* testsuite/gas/arc/fpu.d: Likewise.
+	* testsuite/gas/arc/fpu.s: Likewise.
+	* testsuite/gas/arc/ext2op.d: Add specific disassembler option.
+	* testsuite/gas/arc/ext3op.d: Likewise.
+	* testsuite/gas/arc/tdpfp.d: Likewise.
+	* testsuite/gas/arc/tfpuda.d: Likewise.
+
+2016-07-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_force_relocation): Remove
+	R_MIPS_PC26_S2 and R_MIPS_PC21_S2.
+
+2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
+	Adjust comments for BAL to JALX linker conversion.
+	(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
+	* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
+	expected.
+	* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
+	* testsuite/gas/mips/branch-local-4.d: New test.
+	* testsuite/gas/mips/branch-local-n32-4.d: New test.
+	* testsuite/gas/mips/branch-local-n64-4.d: New test.
+	* testsuite/gas/mips/branch-addend.d: New test.
+	* testsuite/gas/mips/branch-addend-n32.d: New test.
+	* testsuite/gas/mips/branch-addend-n64.d: New test.
+	* testsuite/gas/mips/branch-local-4.s: New test source.
+	* testsuite/gas/mips/branch-addend.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_force_relocation): Also retain branch
+	relocations against MIPS16 and microMIPS symbols.
+	(fix_bad_cross_mode_jump_p): New function.
+	(fix_bad_same_mode_jalx_p): Likewise.
+	(fix_bad_misaligned_jump_p): Likewise.
+	(fix_bad_cross_mode_branch_p): Likewise.
+	(fix_bad_misaligned_branch_p): Likewise.
+	(fix_validate_branch): Likewise.
+	(md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP>
+	<BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5,
+	etc.  Verify the ISA mode and alignment of the jump target.
+	<BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check
+	with a call to `fix_validate_branch'.
+	<BFD_RELOC_MIPS_26_PCREL_S2>: Likewise.
+	<BFD_RELOC_16_PCREL_S2>: Likewise.
+	<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
+	<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend.
+	Verify the ISA mode and alignment of the branch target.
+	(md_convert_frag): Verify the ISA mode and alignment of resolved
+	MIPS16 branch targets.
+	* testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction
+	branch targets with `.insn'.
+	* testsuite/gas/mips/branch-misc-5.s: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-5-64.d: Update
+	accordingly.
+	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-relax.s: Annotate
+	non-instruction branch target with `.insn'.
+	* testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets
+	with external symbols.
+	* testsuite/gas/mips/micromips-insn32.d: Update accordingly.
+	* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
+	* testsuite/gas/mips/micromips-trap.d: Likewise.
+	* testsuite/gas/mips/micromips.d: Likewise.
+	* testsuite/gas/mips/mips16.s: Annotate non-instruction branch
+	targets with `.insn'.
+	* testsuite/gas/mips/mips16.d: Update accordingly.
+	* testsuite/gas/mips/mips16-64.d: Likewise.
+	* testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction
+	branch target with `.insn'.
+	* testsuite/gas/mips/relax-swap3.s: Likewise.
+	* testsuite/gas/mips/branch-local-2.l: New list test.
+	* testsuite/gas/mips/branch-local-3.l: New list test.
+	* testsuite/gas/mips/branch-local-n32-2.l: New list test.
+	* testsuite/gas/mips/branch-local-n32-3.l: New list test.
+	* testsuite/gas/mips/branch-local-n64-2.l: New list test.
+	* testsuite/gas/mips/branch-local-n64-3.l: New list test.
+	* testsuite/gas/mips/unaligned-jump-1.l: New list test.
+	* testsuite/gas/mips/unaligned-jump-2.l: New list test.
+	* testsuite/gas/mips/unaligned-jump-3.d: New test.
+	* testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test.
+	* testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test.
+	* testsuite/gas/mips/unaligned-jump-mips16-3.d: New test.
+	* testsuite/gas/mips/unaligned-jump-micromips-1.l: New list
+	test.
+	* testsuite/gas/mips/unaligned-jump-micromips-2.l: New list
+	test.
+	* testsuite/gas/mips/unaligned-jump-micromips-3.d: New test.
+	* testsuite/gas/mips/unaligned-branch-1.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-2.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-3.d: New test.
+	* testsuite/gas/mips/unaligned-branch-r6-1.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-r6-2.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-r6-3.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-r6-4.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-r6-5.d: New test.
+	* testsuite/gas/mips/unaligned-branch-r6-6.d: New test.
+	* testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test.
+	* testsuite/gas/mips/unaligned-branch-mips16-3.d: New test.
+	* testsuite/gas/mips/unaligned-branch-micromips-1.l: New list
+	test.
+	* testsuite/gas/mips/unaligned-branch-micromips-2.l: New list
+	test.
+	* testsuite/gas/mips/unaligned-branch-micromips-3.d: New test.
+	* testsuite/gas/mips/branch-local-2.s: New test source.
+	* testsuite/gas/mips/branch-local-3.s: New test source.
+	* testsuite/gas/mips/branch-local-n32-2.s: New test source.
+	* testsuite/gas/mips/branch-local-n32-3.s: New test source.
+	* testsuite/gas/mips/branch-local-n64-2.s: New test source.
+	* testsuite/gas/mips/branch-local-n64-3.s: New test source.
+	* testsuite/gas/mips/unaligned-jump-1.s: New test source.
+	* testsuite/gas/mips/unaligned-jump-2.s: New test source.
+	* testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source.
+	* testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source.
+	* testsuite/gas/mips/unaligned-jump-micromips-1.s: New test
+	source.
+	* testsuite/gas/mips/unaligned-jump-micromips-2.s: New test
+	source.
+	* testsuite/gas/mips/unaligned-branch-1.s: New test source.
+	* testsuite/gas/mips/unaligned-branch-2.s: New test source.
+	* testsuite/gas/mips/unaligned-branch-r6-1.s: New test source.
+	* testsuite/gas/mips/unaligned-branch-r6-2.s: New test source.
+	* testsuite/gas/mips/unaligned-branch-r6-3.s: New test source.
+	* testsuite/gas/mips/unaligned-branch-r6-4.s: New test source.
+	* testsuite/gas/mips/unaligned-branch-mips16-1.s: New test
+	source.
+	* testsuite/gas/mips/unaligned-branch-mips16-2.s: New test
+	source.
+	* testsuite/gas/mips/unaligned-branch-micromips-1.s: New test
+	source.
+	* testsuite/gas/mips/unaligned-branch-micromips-2.s: New test
+	source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-nds32.c (struct nds32_pseudo_opcode): Make pseudo_val
+	unsigned int.
+	(do_pseudo_b): Adjust.
+	(do_pseudo_bal): Likewise.
+	(do_pseudo_bge): Likewise.
+	(do_pseudo_bges): Likewise.
+	(do_pseudo_bgt): Likewise.
+	(do_pseudo_bgts): Likewise.
+	(do_pseudo_ble): Likewise.
+	(do_pseudo_bles): Likewise.
+	(do_pseudo_blt): Likewise.
+	(do_pseudo_blts): Likewise.
+	(do_pseudo_br): Likewise.
+	(do_pseudo_bral): Likewise.
+	(do_pseudo_la): Likewise.
+	(do_pseudo_li): Likewise.
+	(do_pseudo_ls_bhw): Likewise.
+	(do_pseudo_ls_bhwp): Likewise.
+	(do_pseudo_ls_bhwpc): Likewise.
+	(do_pseudo_ls_bhwi): Likewise.
+	(do_pseudo_move): Likewise.
+	(do_pseudo_neg): Likewise.
+	(do_pseudo_not): Likewise.
+	(do_pseudo_pushpopm): Likewise.
+	(do_pseudo_pushpop): Likewise.
+	(do_pseudo_v3push): Likewise.
+	(do_pseudo_v3pop): Likewise.
+	(do_pseudo_pushpop_stack): Likewise.
+	(do_pseudo_push_bhwd): Likewise.
+	(do_pseudo_pop_bhwd): Likewise.
+	(do_pseudo_pusha): Likewise.
+	(do_pseudo_pushi): Likewise.
+
+2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-sparc.c (struct pop_entry): Make the type of reloc
+	bfd_reloc_code_real_type.
+
+2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-sparc.c (pop_table): Remove sentinel.
+	(NUM_PERC_ENTRIES): Use ARRAY_SIZE on pop_table.
+	(md_begin): Adjust.
+
+2016-07-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-z8k.c (newfix): Make type of type argument
+	bfd_reloc_code_real_type.
+	(apply_fix): Likewise.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-epiphany.c: Don't include libbfd.h.
+	* config/tc-frv.c: Likewise.
+	* config/tc-ip2k.c: Likewise.
+	* config/tc-iq2000.c: Likewise.
+	* config/tc-m32c.c: Likewise.
+	* config/tc-mep.c: Likewise.
+	* config/tc-mt.c: Likewise.
+	* config/tc-nios2.c: Likewise.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* config/bfin-parse.y: Don't include libbfd.h.
+	* config/tc-bfin.c: Likewise.
+	* config/tc-rl78.c: Likewise.
+	* config/tc-rx.c: Likewise.
+	* config/tc-metag.c: Likewise.
+	(create_dspreg_htabs, create_scond_htab): Use gas_assert not BFD_ASSERT.
+	* Makefile.am: Update dependencies.
+	* Makefile.in: Regenerate.
+
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro.
+	(mips_force_relocation_abs): New prototype.
+	* config/tc-mips.c (mips_force_relocation_abs): New function.
+	* testsuite/gas/mips/branch-absolute.d: Adjust dump patterns.
+	* testsuite/gas/mips/mips16-branch-absolute.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
+	Likewise.
+	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
+	Likewise.
+	* testsuite/gas/mips/branch-absolute-addend.d: New test.
+	* testsuite/gas/mips/mips16-branch-absolute-addend.d: New test.
+	* testsuite/gas/mips/micromips-branch-absolute-addend.d: New
+	test.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1>
+	<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
+	<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the
+	addend calculated.
+	* testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit
+	in `bar', export `foo'.
+	* testsuite/gas/mips/mips16-branch-absolute.d: Adjust
+	accordingly.
+	* testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise.
+	* testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise.
+	* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d:
+	Likewise.
+	* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d:
+	Likewise.
+
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips16-branch-absolute.d: Update patterns.
+	* testsuite/gas/mips/branch-absolute.d: New test.
+	* testsuite/gas/mips/branch-absolute-n32.d: New test.
+	* testsuite/gas/mips/branch-absolute-n64.d: New test.
+	* testsuite/gas/mips/branch-absolute-addend-n32.d: New test.
+	* testsuite/gas/mips/branch-absolute-addend-n64.d: New test.
+	* testsuite/gas/mips/mips16-branch-absolute-n32.d: New test.
+	* testsuite/gas/mips/mips16-branch-absolute-n64.d: New test.
+	* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New
+	test.
+	* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New
+	test.
+	* testsuite/gas/mips/micromips-branch-absolute.d: New test.
+	* testsuite/gas/mips/micromips-branch-absolute-n32.d: New test.
+	* testsuite/gas/mips/micromips-branch-absolute-n64.d: New test.
+	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New
+	test.
+	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New
+	test.
+	* testsuite/gas/mips/branch-absolute.s: New test source.
+	* testsuite/gas/mips/branch-absolute-addend.s: New test source.
+	* testsuite/gas/mips/mips16-branch-absolute-addend.s: New test
+	source.
+	* testsuite/gas/mips/micromips-branch-absolute.s: New test
+	source.
+	* testsuite/gas/mips/micromips-branch-absolute-addend.s: New
+	test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-13  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/nal-1.d: New test.
+	* testsuite/gas/mips/mipsr6@nal-1.d: New test.
+	* testsuite/gas/mips/nal-2.d: New test.
+	* testsuite/gas/mips/mipsr6@nal-2.d: New test.
+	* testsuite/gas/mips/nal.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-12  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/sparc/ldtxa.s: New file.
+	* testsuite/gas/sparc/ldtxa.d: Likewise.
+	* testsuite/gas/sparc/sparc.exp: Execute the ldtxa test.
+
+2016-07-11  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (arc_reloc_op_tag): Allow complex ops for dtpoff.
+	(tc_gen_reloc): Remove passing DTPOFF base info into reloc addendum
+	as it is no longer needed.
+
+2016-07-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (append_insn): Remove extraneous
+	`install_insn' call.
+
+2016-07-04  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (check_qword_reg): Correct register kind
+	checked.
+	* testsuite/gas/i386/x86-64-suffix-bad.s: Add q-suffix with
+	16-bit register cases.
+	* testsuite/gas/i386/x86-64-suffix-bad.l: Adjust expectations.
+
+
+2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/ecoff@ld.d: Remove test.
+	* testsuite/gas/mips/ecoff@ld-forward.d: Remove test.
+	* testsuite/gas/mips/ecoff@ld-zero-3.d: Remove test.
+	* testsuite/gas/mips/ecoff@sd.d: Remove test.
+	* testsuite/gas/mips/ecoff@sd-forward.d: Remove test.
+	* testsuite/gas/mips/beq.d: Remove a.out and ECOFF support from
+	reloc patterns.
+	* testsuite/gas/mips/mipsr6@beq.d: Likewise.
+	* testsuite/gas/mips/bge.d: Likewise.
+	* testsuite/gas/mips/mipsr6@bge.d: Likewise.
+	* testsuite/gas/mips/bgeu.d: Likewise.
+	* testsuite/gas/mips/mipsr6@bgeu.d: Likewise.
+	* testsuite/gas/mips/blt.d: Likewise.
+	* testsuite/gas/mips/mipsr6@blt.d: Likewise.
+	* testsuite/gas/mips/bltu.d: Likewise.
+	* testsuite/gas/mips/mipsr6@bltu.d: Likewise.
+	* testsuite/gas/mips/branch-likely.d: Likewise.
+	* testsuite/gas/mips/la.d: Likewise.
+	* testsuite/gas/mips/lb.d: Likewise.
+	* testsuite/gas/mips/lifloat.d: Likewise.
+	* testsuite/gas/mips/sb.d: Likewise.
+	* testsuite/gas/mips/uld.d: Likewise.
+	* testsuite/gas/mips/ulh.d: Likewise.
+	* testsuite/gas/mips/ulw.d: Likewise.
+	* testsuite/gas/mips/usd.d: Likewise.
+	* testsuite/gas/mips/ush.d: Likewise.
+	* testsuite/gas/mips/usw.d: Likewise.
+
+2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/branch-misc-2.s: Move non
+	locally-defined-global symbol tests...
+	* testsuite/gas/mips/branch-misc-5.s: ... to this new test.
+	* testsuite/gas/mips/branch-misc-2.d: Update accordingly.
+	* testsuite/gas/mips/branch-misc-2-64.d: Likewise.
+	* testsuite/gas/mips/branch-misc-2pic.d: Likewise.
+	* testsuite/gas/mips/branch-misc-2pic-64.d: Likewise.
+	* testsuite/gas/mips/mipsr6@branch-misc-2-64.d: Likewise.
+	* testsuite/gas/mips/mipsr6@branch-misc-2pic-64.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-2.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-2-64.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-2pic.d: Likewise.
+	* testsuite/gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
+	* testsuite/gas/mips/branch-misc-5.d: New test.
+	* testsuite/gas/mips/branch-misc-5pic.d: New test.
+	* testsuite/gas/mips/branch-misc-5-64.d: New test.
+	* testsuite/gas/mips/branch-misc-5pic-64.d: New test.
+	* testsuite/gas/mips/mipsr6@branch-misc-5-64.d: New test.
+	* testsuite/gas/mips/mipsr6@branch-misc-5pic-64.d: New test.
+	* testsuite/gas/mips/micromips@branch-misc-5.d: New test.
+	* testsuite/gas/mips/micromips@branch-misc-5pic.d: New test.
+	* testsuite/gas/mips/micromips@branch-misc-5-64.d: New test.
+	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: New test.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/beq.s: Uncomment branches to undefined
+	symbols.
+	* testsuite/gas/mips/beq.d: Update accordingly.
+	* testsuite/gas/mips/mipsr6@beq.d: Likewise.
+	* testsuite/gas/mips/micromips@beq.d: Likewise.
+
+2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips.exp: Restrict 64-bit `branch-mips'
+	tests to NewABI targets.
+
+2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips.exp: Group `branch-misc' tests
+	together.
+
+2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* config/tc-aarch64.c (struct aarch64_option_cpu_value_table): Add
+	require field.
+	(aarch64_features): Initialize require fields.
+	(aarch64_parse_features): Handle dependencies.
+	(aarch64_feature_enable_set, aarch64_feature_disable_set): New.
+	(md_assemble): Use AARCH64_CPU_HAS_ALL_FEATURES.
+	* testsuite/gas/aarch64/illegal-nofp16.s: New.
+	* testsuite/gas/aarch64/illegal-nofp16.l: New.
+	* testsuite/gas/aarch64/illegal-nofp16.d: New.
+
+2016-07-01  Nick Clifton  <nickc@redhat.com>
+
+	* macro.c (macro_expand_body): Use a buffer big enough to hold an
+	extremely large integer.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* testsuite/gas/i386/mpx-inval-2.l: Relax for COFF targets.
+
+2016-07-01  Tristan Gingold  <gingold@adacore.com>
+
+	* NEWS: Add marker for 2.27.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* tc-i386.c (i386_index_check): Add special checks for bndmk,
+	bndldx, and bndstx.
+	* testsuite/gas/i386/mpx-inval-2.s: Add %rip and %eip relative
+	as well as scaling by other than 1 tests.
+	* testsuite/gas/i386/mpx-inval-2.l: Adjust accordingly.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* tc-i386.c (md_assemble): Alter address size checking for MPX
+	instructions.
+	* testsuite/gas/i386/mpx-inval-2.s: New.
+	* testsuite/gas/i386/mpx-inval-2.l: New.
+	* testsuite/gas/i386/i386.exp: Run new test.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	PR gas/20318
+	* config/tc-i386.c (match_template): Add char parameter,
+	consumed in Intel mode for an extra suffix check.
+	(md_assemble): New local variable mnem_suffix.
+	* testsuite/gas/i386/suffix-bad.s: New.
+	* testsuite/gas/i386/suffix-bad.l: New.
+	* testsuite/gas/i386/i386.exp: Run new test (twice).
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* testsuite/gas/i386/movz.s: New.
+	* testsuite/gas/i386/movz32.d: New.
+	* testsuite/gas/i386/movz64.d: New.
+	* testsuite/gas/i386/i386.exp: Run new tests.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (struct _i386_insn): New field memop1_string.
+	(md_assemble): Free first memory operand string.
+	(i386_index_check): Use repprefixok to distingush xlat from
+	other (real) string ops.
+	(maybe_adjust_templates): New.
+	(i386_att_operand). Call it. Store first memory operand string.
+	* config/tc-i386-intel.c (i386_intel_operand): Likewise.
+	* testsuite/gas/i386/intel-movs.s: New.
+	* testsuite/gas/i386/intel-movs32.d: New.
+	* testsuite/gas/i386/intel-movs64.d: New.
+	* testsuite/gas/i386/i386.exp: Run new tests. Invoke as for
+	64-bits tests with "--defsym x86_64=1 --strip-local-absolute".
+
+2016-06-30  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (get_append_method): Fix a comment typo.
+
+2016-06-30  Matthew Fortune <Matthew.Fortune@imgtec.com>
+	    Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special
+	case MIPS16 handling.
+	* testsuite/gas/mips/branch-swap-3.d: New test.
+	* testsuite/gas/mips/branch-swap-4.d: New test.
+	* testsuite/gas/mips/mips16@branch-swap-3.d: New test.
+	* testsuite/gas/mips/mips16@branch-swap-4.d: New test.
+	* testsuite/gas/mips/micromips@branch-swap-3.d: New test.
+	* testsuite/gas/mips/micromips@branch-swap-4.d: New test.
+	* testsuite/gas/mips/branch-swap-3.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-30  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (append_insn): Simplify non-MIPS16 branch
+	swapping sequence.
+
+2016-06-30  Maciej W. Rozycki  <macro@imgtec.com>
+
+	PR gas/20312
+	* write.c (subsegs_finish_section): Force no section padding to
+	alignment on failed assembly, always set last frag's alignment
+	from section.
+	* testsuite/gas/all/pr20312.l: New list test.
+	* testsuite/gas/all/pr20312.s: New test source.
+	* testsuite/gas/all/gas.exp: Run the new test
+
+2016-06-30  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config.in (TARGET_WITH_CPU): Undefine.
+	* configure.ac: Add --with-cpu support, and define in config.h.
+	* configure: Regenerate.
+	* config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU.
+	* NEWS: Mention new configure option.
+
+2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* testsuite/gas/arm/armv8_2+rdma.d: New.
+
+2016-06-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* NEWS: Mention --enable-compressed-debug-sections=gas is the
+	default for Linux/x86 targets.
+	* configure.tgt (ac_default_compressed_debug_sections): Default
+	to yes for Linux/x86 targets.
+
+2016-06-29  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* write.c: Remove "libbfd.h" inclusion.
+
+2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/elf/elf.exp: Use `supports_gnu_unique' with the
+	`type' test.
+
+2016-06-28  Alan Modra  <amodra@gmail.com>
+
+	PR gas/20247
+	* testsuite/gas/elf/section11.s: Don't start directives in first column.
+
+2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* testsuite/gas/aarch64/diagnostic.s,
+	testsuite/gas/aarch64/diagnostic.l: Add tests for out-of-range indices.
+
+2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips16_reloc_p): Handle
+	BFD_RELOC_MIPS16_16_PCREL_S1.
+	(b_reloc_p): Likewise.
+	(limited_pcrel_reloc_p): Likewise.
+	(md_pcrel_from): Likewise.
+	(md_apply_fix): Likewise.
+	(tc_gen_reloc): Likewise.
+	(md_convert_frag): Likewise.
+	(mips_fix_adjustable): Update comment.
+	* testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
+	output, add dump patterns.
+	* testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
+	output, add dump patterns.
+	* testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
+	output, add dump patterns.
+	* testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
+	output, add dump patterns.
+	* testsuite/gas/mips/mips16-branch-absolute.d: Remove error
+	output, add dump patterns.
+	* testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
+	* testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
+	* testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
+	* testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
+	* testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
+	* testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
+	* testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
+	implicit instruction padding, avoid MIPS16 JR->JRC conversion.
+	* testsuite/gas/mips/branch-weak-6.d: New test.
+	* testsuite/gas/mips/branch-weak-7.d: New test.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-27  Vineet Gupta  <vgupta@synopsys.com>
+
+	* config//tc-arc.c (tc_arc_frame_initial_instructions): Use
+	cfi_add_CFA_def_cfa to generate default CFA with offset
+	* testsuite/gas/cfi/cfi-arc-1.d: Update expected output.
+
+2016-06-27  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20247
+	* as.h (do_not_pad_sections_to_alignment): New global variable.
+	* as.c (show_usage): Add --no-pad-sections.
+	(parse_args): Likewise.
+	* write.c (size_seg): Skip padding the end of the section if
+	requested from the command line.
+	(SUB_SEGMENT_ALIGN): Likewise.
+	* doc/as.texinfo: Document the new option.
+	* NEWS: Mention the new feature.
+	* testsuite/gas/elf/section11.s: New test.
+	* testsuite/gas/elf/section11.d: New test driver.
+	* testsuite/gas/elf/elf.exp: Run the new test.
+
+2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-dlx.c: Include bfd/elf32-dlx.h.
+	* config/tc-dlx.h: Remove prototype of dlx_set_skip_hi16.
+
+2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-xtensa.c (xtensa_elf_suffix): Use ARRAY_SIZE instead of a
+	sentinal element.
+	(map_suffix_reloc_to_operator): Likewise.
+	(map_operator_to_reloc): Likewise.
+
+2016-06-27  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-nds32.c (md_begin): Use ARRAY_SIZE instead of a sentinal
+	element in relax_table.
+
+2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-aarch64.c: Make the type of reg_entry::type
+	aarch_reg_type.
+
+2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-bfin.c (bfin_cpus): Remove sentinal.
+	(md_parse_option): Adjust.
+	* config/tc-aarch64.c (aarch64_parse_abi): Replace use of a sentinal
+	with iteration from 0 to ARRAY_SIZE.
+	* config/tc-mcore.c (md_begin): Likewise.
+	* config/tc-visium.c (visium_parse_arch): Likewise.
+
+2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-tic54x.c (tic54x_set_default_include): remove argument
+							   and simplify accordingly.
+	(tic54x_include): Adjust.
+	(tic54x_mlib): Likewise.
+
+2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-xtensa.c (xtensa_make_property_section): Remove prototype.
+
+2016-06-24  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (append_insn): Use any `O_symbol' expression
+	unchanged with relaxed MIPS16 instructions.
+	(mips16_extended_frag): Adjust accordingly.  Return 1 right
+	away if a relocation will be required for the symbol requested.
+	Remove dead first relaxation pass code.
+	(mips_relax_frag): Pass `sec' down to `mips16_extended_frag'.
+	(md_convert_frag): Adjust symbol value calculation.  Raise an
+	error if a relocation is required for the symbol requested.
+	* testsuite/gas/mips/mips16@relax-swap3.d: Remove dump patterns,
+	add error output.
+	* testsuite/gas/mips/mips16@relax-swap3.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-relax-0.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-relax-1.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-relax-2.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-relax-3.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-0.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-1.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-2.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-3.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-4.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-5.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-6.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-7.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-addend-0.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-addend-1.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-addend-2.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-addend-3.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-absolute.d: New test.
+	* testsuite/gas/mips/mips16-branch-reloc-0.d: New test.
+	* testsuite/gas/mips/mips16-branch-reloc-1.d: New test.
+	* testsuite/gas/mips/mips16-branch-reloc-2.d: New test.
+	* testsuite/gas/mips/mips16-branch-reloc-3.d: New test.
+	* testsuite/gas/mips/mips16-branch-addend-0.d: New test.
+	* testsuite/gas/mips/mips16-branch-addend-1.d: New test.
+	* testsuite/gas/mips/mips16-branch-addend-2.d: New test.
+	* testsuite/gas/mips/mips16-branch-addend-3.d: New test.
+	* testsuite/gas/mips/mips16-branch-absolute.d: New test.
+	* testsuite/gas/mips/mips16-absolute-reloc-0.d: New test.
+	* testsuite/gas/mips/mips16-absolute-reloc-1.d: New test.
+	* testsuite/gas/mips/mips16-absolute-reloc-2.d: New test.
+	* testsuite/gas/mips/mips16-absolute-reloc-3.d: New test.
+	* testsuite/gas/mips/mips16-pcrel-reloc-2.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-reloc-3.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-reloc-6.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-reloc-7.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-addend-2.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-addend-3.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-absolute.l: New error output.
+	* testsuite/gas/mips/mips16-branch-reloc-2.l: New error output.
+	* testsuite/gas/mips/mips16-branch-reloc-3.l: New error output.
+	* testsuite/gas/mips/mips16-branch-addend-2.l: New error output.
+	* testsuite/gas/mips/mips16-branch-addend-3.l: New error output.
+	* testsuite/gas/mips/mips16-branch-absolute.l: New error output.
+	* testsuite/gas/mips/mips16-absolute-reloc-2.l: New error output.
+	* testsuite/gas/mips/mips16-absolute-reloc-3.l: New error output.
+	* testsuite/gas/mips/mips16-pcrel-relax-0.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-relax-2.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-0.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-1.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-2.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-3.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-4.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-5.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-6.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-reloc-7.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-addend-0.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-addend-1.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-addend-2.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-addend-3.s: New test source.
+	* testsuite/gas/mips/mips16-pcrel-absolute.s: New test source.
+	* testsuite/gas/mips/mips16-branch-reloc-0.s: New test source.
+	* testsuite/gas/mips/mips16-branch-reloc-1.s: New test source.
+	* testsuite/gas/mips/mips16-branch-reloc-2.s: New test source.
+	* testsuite/gas/mips/mips16-branch-reloc-3.s: New test source.
+	* testsuite/gas/mips/mips16-branch-addend-0.s: New test source.
+	* testsuite/gas/mips/mips16-branch-addend-1.s: New test source.
+	* testsuite/gas/mips/mips16-branch-addend-2.s: New test source.
+	* testsuite/gas/mips/mips16-branch-addend-3.s: New test source.
+	* testsuite/gas/mips/mips16-branch-absolute.s: New test source.
+	* testsuite/gas/mips/mips16-absolute-reloc-0.s: New test source.
+	* testsuite/gas/mips/mips16-absolute-reloc-1.s: New test source.
+	* testsuite/gas/mips/mips16-absolute-reloc-2.s: New test source.
+	* testsuite/gas/mips/mips16-absolute-reloc-3.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-24  Alan Modra  <amodra@gmail.com>
+
+	* configure.tgt (alpha-*-openbsd*): Use em=nbsd.
+
+2016-06-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (b_reloc_p): New function.
+	(mips_fix_adjustable): Also keep the original microMIPS symbol
+	referred from branch relocations.
+	* testsuite/gas/mips/branch-local-1.d: New test.
+	* testsuite/gas/mips/branch-local-n32-1.d: New test.
+	* testsuite/gas/mips/branch-local-n64-1.d: New test.
+	* testsuite/gas/mips/micromips@branch-misc-4-64.d: Update
+	relocations.
+	* testsuite/gas/mips/branch-local-1.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new cases.
+
+2016-06-23  Graham Markall  <graham.markall@embecosm.com>
+
+	* config/tc-arc.c (options, md_longopts, md_parse_option): Move
+	-mspfp, -mdpfp and -mfpuda out of the sections for dummy
+	options. Correct erroneous enabling of SPFP instructions when
+	using -mnps400.
+
+2016-06-22  Peter Bergner <bergner@vnet.ibm.com>
+
+	* testsuite/gas/ppc/power9.d <brd, brh, brw, mffs, mffs., mffsce,
+	mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl, nandxor, rldixor,
+	setbool, xor3>: New tests.
+	* testsuite/gas/ppc/power9.s: Likewise.
+
+2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-xtensa.c: Include elf/xtensa.h.
+
+2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (calculate_reloc) <BFD_RELOC_HI16_S_PCREL>
+	<BFD_RELOC_LO16_PCREL>: New switch cases.
+	(md_apply_fix) <BFD_RELOC_HI16_S_PCREL, BFD_RELOC_LO16_PCREL>:
+	Move switch cases along `BFD_RELOC_MIPS_JMP'.
+	<BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2>
+	<BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2>: Handle
+	the resolved case.
+	* testsuite/gas/mips/pcrel-reloc-4.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-4-r6.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-5.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-5-r6.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-6.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-6.l: New list test.
+	* testsuite/gas/mips/pcrel-reloc-4.s: New test source.
+	* testsuite/gas/mips/pcrel-reloc-6.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS_18_PCREL_S3>
+	<BFD_RELOC_MIPS_19_PCREL_S2>: Avoid null pointer dereferences
+	via `fixP->fx_addsy'.
+
+2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (md_pcrel_from) <BFD_RELOC_MIPS_18_PCREL_S3>:
+	Calculate relocation from the containing aligned doubleword.
+	(tc_gen_reloc) <BFD_RELOC_MIPS_18_PCREL_S3>: Calculate the
+	addend from the containing aligned doubleword.
+
+2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_force_relocation): Use `file_mips_opts'
+	rather than `mips_opts' for the R6 ISA check.
+	(mips_fix_adjustable): Likewise.
+	* testsuite/gas/mips/pcrel-reloc-1.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-1-r6.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-2.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-2-r6.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-3.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-3-r6.d: New test.
+	* testsuite/gas/mips/pcrel-reloc-1.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+	* config/tc-arc.c (check_cpu_feature, md_parse_option):
+	Add nps400 option and feature. Add check for nps400
+	feature. Refactor existing checks to check subclass before
+	feature enablement.
+	(md_show_usage): Document flags for NPS-400 and add some other
+	undocumented flags.
+	(cpu_type): Remove nps400 CPU type entry
+	(check_zol): Remove bfd_mach_arc_nps400 case.
+	(md_show_usage): Add help on -mcpu=nps400.
+	(cpu_types): Add entry for nps400 as arc700 plus nps400 extension
+	set.
+	* doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
+	-fpuda flags.  Document -mcpu=nps400.
+	* testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
+	expected flags to match ARC700 instead of NPS400.
+	* testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
+	* testsuite/gas/arc/nps-400-2.d: Likewise.
+	* testsuite/gas/arc/nps-400-3.d: Likewise.
+	* testsuite/gas/arc/nps-400-4.d: Likewise.
+	* testsuite/gas/arc/nps-400-5.d: Likewise.
+	* testsuite/gas/arc/nps-400-6.d: Likewise.
+	* testsuite/gas/arc/nps-400-7.d: Likewise.
+	* testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
+	avoid clash with cbba instruction.
+	* testsuite/gas/arc/textinsn2op01.d: Likewise.
+	* testsuite/gas/arc/textinsn3op.d: Likewise.
+	* testsuite/gas/arc/textinsn3op.s: Likewise.
+	* testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
+	-mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.
+
+2016-06-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/r6-64-n32.d: Change the `name' tag.
+	* testsuite/gas/mips/r6-64-n64.d: Likewise.
+
+2016-06-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_fix_adjustable): Update comment on jump
+	reloc conversion.
+
+2016-06-20  Virendra Pathak  <virendra.pathak@broadcom.com>
+
+	* config/tc-aarch64.c (aarch64_cpus): Update vulcan feature set.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper,
+	%hmcddfr and %hva_mask_nz.
+	(sparc_ip): New handling of asr/privileged/hyperprivileged
+	registers, adapted to the new form of the sparc opcodes table.
+	* testsuite/gas/sparc/rdasr.s: New file.
+	* testsuite/gas/sparc/rdasr.d: Likewise.
+	* testsuite/gas/sparc/wrasr.s: Likewise.
+	* testsuite/gas/sparc/wrasr.d: Likewise.
+	* testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and
+	wrasr tests.
+	* testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged
+	registers require it.
+	* testsuite/gas/sparc/wrpr.s: Complete to cover all privileged
+	registers and write instruction modalities.
+	* testsuite/gas/sparc/wrpr.d: Likewise.
+	* testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged
+	registers.
+	* testsuite/gas/sparc/rdhpr.d: Likewise.
+	* testsuite/gas/sparc/wrhpr.s: Likewise.
+	* testsuite/gas/sparc/wrhpr.d: Likewise.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c (sparc_arch_table): adjust the GAS
+	architectures to use the right opcode architecture.
+	(sparc_md_end): Handle v9{c,d,e,v,m}.
+	(sparc_ip): Fix some comments.
+	* testsuite/gas/sparc/ldx_efsr.d: Fix the architecture of this
+	instruction, which is v9d.
+	* testsuite/gas/sparc/mwait.s: Remove the `rd %mwait,%g1'
+	instruction from the test, as %mwait is not readable.
+	* testsuite/gas/sparc/mwait.d: Likewise.
+	* testsuite/gas/sparc/mism-1.s: Expand to check v9b and v9e
+	mismatch architecture errors.
+	* testsuite/gas/sparc/mism-2.s: New file.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c (priv_reg_table): Use NULL instead of the
+	empty string to mark the end of the array.
+	(hpriv_reg_table): Likewise.
+	(v9a_asr_table): Likewise.
+	(cmp_reg_entry): Handle entries with NULL names.
+	(F_POP_V9): Define.
+	(F_POP_PCREL): Likewise.
+	(F_POP_TLS_CALL): Likewise.
+	(F_POP_POSTFIX): Likewise.
+	(struct pop_entry): New type.
+	(pop_table): New variable.
+	(enum pop_entry_type): New type.
+	(struct perc_entry): Likewise.
+	(NUM_PERC_ENTRIES): Define.
+	(perc_table): New variable.
+	(cmp_perc_entry): New function.
+	(md_begin): Sort hpriv_reg_table and v9a_asr_table, and initialize
+	perc_table.
+	(sparc_ip): Handle entries with NULL names in priv_reg_table,
+	hpriv_reg_table and v9a_asr_table.  Use perc_table to handle
+	%-pseudo-ops.
+
+2016-06-15  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the
+	instruction size.
+	* config/tc-mcore.c (md_assemble): Likewise.
+	* config/tc-mn10200.c (md_assemble): Likewise.
+	* config/tc-moxie.c (md_assemble): Likewise.
+	* config/tc-pj.c (md_apply_fix): Handle BFD_RELOC_PJ_CODE_REL32.
+	* testsuite/gas/all/gas.exp (diff1 test): Alpha sort list of
+	exception targets.  Add alpha, hppa, microblaze and rl78 to list
+	of exceptions.
+	(forward): Add microblaze to list of exceptions.
+	(fwdexp): Add alpha to list of exceptions.
+	(redef2): Add arm-epoc-pe and rl78 to list of exceptions.
+	(redef3): Add rl78 and x86_64 cygwin to list of exceptions.
+	(do_930509a): Alpha sort list of exception targets.  Add h8300 and
+	mn10200 to list of exceptions.
+	(align2): Expect to fail for nds32.
+	(cond): Add alpha and rl78 to list of exceptions.
+	* testsuite/gas/all/none.d: Skip for ft32 and hppa.
+	* testsuite/gas/all/string.d: Skip for tic4x.
+	* testsuite/gas/alpha/alpha.exp: Note that the alpha-linuxecoff
+	target does not support ELF.
+	* testsuite/gas/arm/blx-bl-convert.dL Skip for the nto target.
+	* testsuite/gas/cfi/cfi-alpha-2.d: All extended format names.
+	* testsuite/gas/cfi/cfi.exp: Alpha sort list of targets.  Skip SH
+	tests for sh-pe and sh-rtemscoff targets.
+	* testsuite/gas/elf/elf.exp (redef): Add rl78, xgate and vax to
+	list of exceptions.
+	(type): Run the noifunc version for alpha-freebsd and visium.
+	* testsuite/gas/elf/warn-2.s: Do not expect to fail on the mcore,
+	mn10200 or moxie targets.
+	* testsuite/gas/ft32/insn.d: Update expected disassembly.
+	* testsuite/gas/i386/i386.exp (x86-64-pcrel): Skip for cygwin
+	targets.
+	* testsuite/gas/lns/lns.exp (lns-common-1): No longer skip for
+	mcore and rx targets.
+	* testsuite/gas/macros/macros.exp (dot): Add exceptions for ns32k,
+	rl78 and vax.
+	(purge): Expect to fail on the ns32k and vax.
+	* testsuite/gas/nds32/alu-2.d: Update expected disassembly.
+	* testsuite/gas/nds32/ls.d: Likewise.
+	* testsuite/gas/nds32/sys-reg.d: Likewise.
+	* testsuite/gas/nds32/usr-spe-reg.d: Likewise.
+	* testsuite/gas/pe/aligncomm-d.d: Skip for the sh.
+	* testsuite/gas/pe/section-align-3.d: Likewise.
+	* testsuite/gas/pe/section-exclude.d: Likewise.
+	* testsuite/gas/ppc/test2xcoff32.d: Pass once all the required
+	data has been seen.
+	* testsuite/gas/ppc/textalign-xcoff-001.d: Fix up regexp to allow
+	for variations in whitespace.
+	* testsuite/gas/tilepro/t_constants.d: Pass once all the required
+	data has been seen.
+	* testsuite/gas/tilepro/t_constants.s (.safe_word): New macro.
+	Installs a 32-bit value without generating warnings on 64-bit
+	hosts.
+	Use the new macro to replace the .word directives.
+
+2016-06-15  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/add_s.d: New file.
+	* testsuite/gas/arc/add_s.s: New file.
+
+2016-06-14  Graham Markall <graham.markall@embecosm.com>
+
+	* testsuite/gas/arc/nps400-6.s: Add tests of ldbit.
+	* testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14  Graham Markall <graham.markall@embecosm.com>
+
+	* testsuite/gas/arc/nps400-6.s: Add tests of hash, tr, utf8, e4by, and
+	addf.
+	* testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14  Graham Markall <graham.markall@embecosm.com>
+
+	* testsuite/gas/arc/nps400-6.s: Add tests of calcbsd, calcbxd,
+	calckey, calcxkey, mxb, imxb, addl, subl, andl, orl, xorl, andab, orab,
+	lbdsize, bdlen, csms, csma, cbba, zncv, and hofs.
+	* testsuite/gas/arc/nps400-6.d: Likewise.
+
+2016-06-14  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-nds32.c (nds32_get_align): Avoid left shifting a
+	signed constant.
+
+2016-06-13  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_fix_adjustable): Don't convert RELA
+	JALR relocations on R6.
+	* testsuite/gas/mips/jal-svr4pic-local.d: New test.
+	* testsuite/gas/mips/mips1@jal-svr4pic-local.d: New test.
+	* testsuite/gas/mips/r3000@jal-svr4pic-local.d: New test.
+	* testsuite/gas/mips/micromips@jal-svr4pic-local.d: New test.
+	* testsuite/gas/mips/jal-svr4pic-local-n32.d: New test.
+	* testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: New
+	test.
+	* testsuite/gas/mips/jal-svr4pic-local-n64.d: New test.
+	* testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: New
+	test.
+	* testsuite/gas/mips/jal-svr4pic-local.s: New test source.
+	* testsuite/gas/mips/jal-svr4pic-local-newabi.s: New test
+	source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-06-13  Virendra Pathak  <virendra.pathak@broadcom.com>
+
+        * config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
+        * doc/c-aarch64.texi: Document that vulcan is a valid processor
+	name.
+
+2016-06-13  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-arm.c: For non-ELF based targets skip ARM feature sets
+	that are not supported.
+
+	* config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
+	constant.
+	* config/tc-cr16.c (check_range): Likewise.
+	* config/tc-nios2.c (nios2_check_overflow): Likewise.
+
+2016-06-08  Renlin Li  <renlin.li@arm.com>
+
+	* config/tc-aarch64.c (print_operands): Substitute size.
+	(output_operand_error_record): Likewise.
+
+2016-06-07  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
+	PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
+	PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
+	(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
+	by vle_opcodes, and that vle flag doesn't enable opcodes.  Don't
+	add vle_opcodes twice.
+	(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
+
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
+	(arm_ext_ras): Renamed from arm_ext_v8_2.
+	(insns): Update for arm_ext_v8_2 renaming.
+	(arm_extensions): Add "ras".
+	* doc/c-arm.texi (ARM Options): Add an entry for "ras".
+	* testsuite/gas/arm/armv8-a+ras.d: New.
+	* testsuite/gas/arm/armv8_2-a.d: Add explicit command line
+	options.
+
+2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* itbl-parse.y (yyerror): Use modern argument declaration style.
+
+2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-sh.c (parse_reg): Change type of mode argument to
+	sh_arg_type.
+	(get_operand): Adjust.
+	(insert): Change type of how to bfd_reloc_code_real_type.
+	(insert4): Likewise.
+	* config/tc-sh64.c (shmedia_get_operand): Adjust.
+	(shmedia_parse_reg): Change type of mode to shmedia_arg_type.
+
+2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
+	const char *.
+
+2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
+
+	PR binutils/20196
+	* gas/testsuite/gas/ppc/e6500.s <lbarx, lharx, lwarx, ldarx,
+	stbcx., sthcx., stwcx., stdcx.>: Add tests.
+	* gas/testsuite/gas/ppc/e6500.d: Likewise.
+	* gas/testsuite/gas/ppc/power8.s: Likewise.
+	* gas/testsuite/gas/ppc/power8.d: Likewise.
+	* gas/testsuite/gas/ppc/power4.s <lwarx, ldarx, stwcx.,
+	stdcx.>: Add tests.
+	* gas/testsuite/gas/ppc/power4.d: Likewise.
+
+2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutis/18386
+	* testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
+	* testsuite/gas/i386/x86-64-branch.d: Updated.
+	* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
+	* testsuite/gas/i386/x86-64-branch-4.l: New file.
+	* testsuite/gas/i386/x86-64-branch-4.s: Likewise.
+
+2016-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/tc-aarch64.c (aarch64_cpus): Add cortex-a73 entry.
+	* doc/c-aarch64.texi (-mcpu): Document cortex-a73 value.
+
+2016-06-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/tc-arm.c (arm_cpus): Add cortex-a73 entry.
+	* doc/c-arm.texi (-mcpu=): Document cortex-a73 value.
+
+2016-06-02  Vineet Gupta  <Vineet.Gupta1@synopsys.com>
+
+	* configure.tgt: Replace -uclibc with *.
+
+2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (parse_opcode_flags): New function.
+	(find_opcode_match): Move flag parsing code out to new function.
+	Ignore operands marked IGNORE.
+	(build_fake_opcode_hash_entry): New function.
+	(find_special_case_long_opcode): New function.
+	(find_special_case): Lookup long opcodes.
+	* testsuite/gas/arc/nps400-7.d: New file.
+	* testsuite/gas/arc/nps400-7.s: New file.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-ns32k.c: Remove definition of input_line_pointer.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-avr.c (avr_parse_cons_expression): Replace iteration to
+	sentinal with iteration to array size.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/xtensa-relax.h: Move typedefs of enums to the enums
+	definition.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-ns32k.c (bit_fix_new): Replace obstack-alloc with XOBNEW
+	macro.
+
+2016-06-01  Graham Markall  <graham.markall@embecosm.com>
+
+	* testsuite/gas/arc/nps-400-1.s: Add rflt variants with
+	operands of types a,b,u6, 0,b,u6, and 0,b,limm.
+	* testsuite/gas/arc/nps-400-1.d: Likewise.
+
+2016-05-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20145
+	* config/tc-i386.c (cpu_noarch): Add noavx512f, noavx512cd,
+	noavx512er, noavx512pf, noavx512dq, noavx512bw, noavx512vl,
+	noavx512ifma and noavx512vbmi.
+	* doc/c-i386.texi: Mention noavx512f, noavx512cd, noavx512er,
+	noavx512pf, noavx512dq, noavx512bw, noavx512vl, noavx512ifma
+	and noavx512vbmi.
+	* testsuite/gas/i386/i386.exp: Run noavx512-1 and noavx512-2.
+	* testsuite/gas/i386/noavx512-1.l: New file.
+	* testsuite/gas/i386/noavx512-1.s: Likewise.
+	* testsuite/gas/i386/noavx512-2.l: Likewise.
+	* testsuite/gas/i386/noavx512-2.s: Likewise.
+
+2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20145
+	* config/tc-i386.c (cpu_arch): Add 687.
+	(cpu_noarch): Add no287, no387, no687, nosse2, nosse3, nossse3,
+	nosse4.1, nosse4.2, nosse4 and noavx2.
+	(parse_real_register): Check cpuregmmx instead of cpummx for MMX
+	register.  Check cpuregxmm instead of cpusse for XMM register.
+	Check cpuregymm instead of cpuavx for YMM register.  Check
+	cpuregzmm/cpuregmask instead of cpuavx512f for ZMMM/mask register.
+	* doc/c-i386.texi: Mention 687, no287, no387, no687, nosse2,
+	nosse3, nossse3, nosse4.1, nosse4.2, nosse4 and noavx2.
+	* testsuite/gas/i386/arch-10-prefetchw.d (as): Add mmx.
+	* testsuite/gas/i386/arch-10.d (as): Likewise.
+	* testsuite/gas/i386/arch-11.s: Add ".arch .mmx".
+	* testsuite/gas/i386/i386.exp: Pass mmx to assembler for
+	arch-10-3 and arch-10-4.  Run no87-3, nosse-4, nosse-5, noavx-3
+	and noavx-4.
+	* testsuite/gas/i386/no87-3.l: New file.
+	* testsuite/gas/i386/no87-3.s: Likewise.
+	* testsuite/gas/i386/noavx-3.l: Likewise.
+	* testsuite/gas/i386/noavx-3.s: Likewise.
+	* testsuite/gas/i386/noavx-4.d: Likewise.
+	* testsuite/gas/i386/noavx-4.s: Likewise.
+	* testsuite/gas/i386/nosse-4.l: Likewise.
+	* testsuite/gas/i386/nosse-4.s: Likewise.
+	* testsuite/gas/i386/nosse-5.d: Likewise.
+	* testsuite/gas/i386/nosse-5.s: Likewise.
+
+2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20154
+	* config/tc-i386.c (cpu_flags_match): Don't set cpuamd64 nor
+	cpuintel64.
+	(match_template): Check Intel64/AMD64 ISA.
+
+2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20154
+	* config/tc-i386.c (intel64): New.
+	(cpu_flags_match): Set cpuamd64 and cpuintel64.
+	(md_parse_option): Set intel64 instead of cpuamd64 and
+	cpuintel64.
+
+2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (cpu_flags_match): Don't clear cpu64 nor
+	cpuno64.
+
+2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
+
+	* testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
+	* testsuite/gas/ppc/altivec3.s: Likewise.
+	* testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
+	* testsuite/gas/ppc/power9.s: Likewise.
+
+2016-05-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/gas/i386/avx512vl-2.l: Append "#pass".
+	* testsuite/gas/i386/noavx-1.l: Likewise.
+	* testsuite/gas/i386/nommx-1.l: Likewise.
+	* testsuite/gas/i386/nosse-1.l: Likewise.
+	* testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
+	* testsuite/gas/i386/avx512vl-2.s: Append ".p2align 4".
+	* testsuite/gas/i386/noavx-1.s: Likewise.
+	* testsuite/gas/i386/nommx-1.s: Likewise.
+	* testsuite/gas/i386/nosse-1.s: Likewise.
+	* testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
+
+2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-metag.c (metag_handle_align): Make the type of noop
+	unsigned char.
+
+2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-rx.c (md_convert_frag): Make the type of reloc_type
+	bfd_reloc_code_real_type.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20140
+	* config/tc-i386.c (cpu_flags_match): Require another match
+	for AVX512VL.
+	* testsuite/gas/i386/i386.exp: Run avx512vl-1, avx512vl-2,
+	x86-64-avx512vl-1 and x86-64-avx512vl-2.
+	* testsuite/gas/i386/avx512vl-1.l: New file.
+	* testsuite/gas/i386/avx512vl-1.s: Likewise.
+	* testsuite/gas/i386/avx512vl-2.l: Likewise.
+	* testsuite/gas/i386/avx512vl-2.s: Likewise.
+	* testsuite/gas/i386/x86-64-avx512vl-1.l: Likewise.
+	* testsuite/gas/i386/x86-64-avx512vl-1.s: Likewise.
+	* testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
+	* testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20141
+	* testsuite/gas/i386/i386.exp: Run x86-64-pr20141.
+	* testsuite/gas/i386/x86-64-pr20141.d: New file.
+	* testsuite/gas/i386/x86-64-pr20141.s: Likewise.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (arch_entry): Remove negated.
+	(noarch_entry): New struct.
+	(cpu_arch): Updated.  Remove .no87, .nommx, .nosse and .noavx.
+	(cpu_noarch): New.
+	(set_cpu_arch): Check cpu_noarch after cpu_arch.
+	(md_parse_option): Allow -march=+nosse.  Check cpu_noarch after
+	cpu_arch.
+	(output_message): New function.
+	(show_arch): Use it.  Handle cpu_noarch.
+	* testsuite/gas/i386/i386.exp: Run nommx-1, nommx-2, nommx-3,
+	nosse-1, nosse-2, nosse-3, noavx-1 and noavx-2.
+	* testsuite/gas/i386/noavx-1.l: New file.
+	* testsuite/gas/i386/noavx-1.s: Likewise.
+	* testsuite/gas/i386/noavx-2.s: Likewise.
+	* testsuite/gas/i386/noavx-2.l: Likewise.
+	* testsuite/gas/i386/nommx-1.s: Likewise.
+	* testsuite/gas/i386/nommx-1.l: Likewise.
+	* testsuite/gas/i386/nommx-2.s: Likewise.
+	* testsuite/gas/i386/nommx-2.l: Likewise.
+	* testsuite/gas/i386/nommx-3.s: Likewise.
+	* testsuite/gas/i386/nommx-3.l: Likewise.
+	* testsuite/gas/i386/nosse-1.s: Likewise.
+	* testsuite/gas/i386/nosse-1.l: Likewise.
+	* testsuite/gas/i386/nosse-2.s: Likewise.
+	* testsuite/gas/i386/nosse-2.l: Likewise.
+	* testsuite/gas/i386/nosse-3.s: Likewise.
+	* testsuite/gas/i386/nosse-3.l: Likewise.
+
+2016-05-25  Chua Zheng Leong  <chuazl@comp.nus.edu.sg>
+
+	PR target/20067
+	* config/tc-arm.c (move_or_literal_pool): Only generate a VMOV.I64
+	instruction if supported by the currently selected fpu variant.
+	* testsuite/gas/arm/vfpv3-ldr_immediate.s: Add test of this PR.
+	* testsuite/gas/arm/vfpv3-ldr_immediate.d: Update expected disassembly.
+
+2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_fix_adjustable): Also return 0 for
+	jump relocations against MIPS16 or microMIPS symbols on RELA
+	targets.
+	* testsuite/gas/mips/jalx-local.d: New test.
+	* testsuite/gas/mips/jalx-local-n32.d: New test.
+	* testsuite/gas/mips/jalx-local-n64.d: New test.
+	* testsuite/gas/mips/jalx-local.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (md_apply_fix)
+	<BFD_RELOC_MIPS16_TLS_TPREL_LO16>: Remove fall-through, adjust
+	code accordingly.
+
+2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-xtensa.c (struct suffix_reloc_map): Change type of field
+	operator to operatorT.
+	(map_suffix_reloc_to_operator): Change return type to operatorT.
+
+2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-d30v.c (find_format): Change type of X_op to operatorT.
+
+2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-mmix.c (mmix_parse_predefined_name): Change type of
+	handler_charp to const char *.
+
+2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-ft32.h (DEFAULT_TARGET_FORMAT): Remove.
+	(ft32_target_format): Likewise.
+	(TARGET_FORMAT): Adjust.
+
+2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-ia64.c (dot_rot): simplify allocations from obstacks.
+	(ia64_frob_label): Likewise.
+
+2016-05-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-cr16.c (check_range): Make type of retval op_err.
+	* config/tc-crx.c: Likewise.
+
+2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (md_begin): Add XY registers.
+	(cpu_types): Code density is default off for ARC EM.
+
+2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* config/tc-arc.c (attributes_t): Renamed attribute class to
+	attr_class.
+	(find_opcode_match, assemble_insn, tokenize_extinsn): Changed.
+
+2016-05-23  Kuba Sejdak  <jakub.sejdak@phoesys.com>
+
+	* configuse.tgt: Add entry for arm-phoenix.
+
+2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-tic54x.c (tic54x_sect): simplify string creation.
+
+2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-spu.c (APUOP): Use OPCODE as an unsigned constant.
+
+2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-tic54x.c (tic54x_mmregs): Adjust.
+	(md_begin): Likewise.
+	(encode_condition): Likewise.
+	(encode_cc3): Likewise.
+	(encode_cc2): Likewise.
+	(encode_operand): Likewise.
+	(tic54x_undefined_symbol): Likewise.
+
+2016-05-20  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* config/tc-mips.c (mips_cpu_info_table): Update comment.  Add
+	p6600 entry.
+	* doc/c-mips.texi: Document p6600 -march option.
+
+2016-05-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/19600
+	* config/tc-i386.c (md_apply_fix): Preserve addend for
+	BFD_RELOC_386_GOT32 and BFD_RELOC_X86_64_GOT32.
+	* testsuite/gas/i386/addend.d: New file.
+	* testsuite/gas/i386/addend.s: Likewise.
+	* testsuite/gas/i386/x86-64-addend.d: Likewise.
+	* testsuite/gas/i386/x86-64-addend.s: Likewise.
+	* testsuite/gas/i386/i386.exp: Run addend and x86-64-addend.
+	* testsuite/gas/i386/reloc32.d: Updated.
+
+2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (append_insn): Correct the encoding of a
+	constant argument for microMIPS JALX.
+	(tc_gen_reloc): Correct the encoding of an in-place addend for
+	microMIPS JALX.
+	* testsuite/gas/mips/jalx-addend.d: New test.
+	* testsuite/gas/mips/jalx-addend-n32.d: New test.
+	* testsuite/gas/mips/jalx-addend-n64.d: New test.
+	* testsuite/gas/mips/jalx-imm.d: New test.
+	* testsuite/gas/mips/jalx-imm-n32.d: New test.
+	* testsuite/gas/mips/jalx-imm-n64.d: New test.
+	* testsuite/gas/mips/jalx-addend.s: New test source.
+	* testsuite/gas/mips/jalx-imm.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c: Correct tab-after-space formatting mistakes
+	throughout.
+
+2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (find_opcode_match): Remove casting away of
+	const.
+	* config/tc-arc.h (struct arc_flags): Make flgp field const.
+
+2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (md_pcrel_from_section): Use BFD_VMA_FMT where
+	appropriate.
+	(md_convert_frag): Likewise.
+
+2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (arc_opcode_hash_entry_iterator_next): Set
+	cached opcode to NULL when we reach a non-matching opcode.
+	* testsuite/gas/arc/asm-errors-2.d: New file.
+	* testsuite/gas/arc/asm-errors-2.err: New file.
+	* testsuite/gas/arc/asm-errors-2.s: New file.
+
+2016-05-18  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (tokenize_arguments): Add checks for array
+	overflow.
+	* testsuite/gas/arc/asm-errors.s: Addition test line added.
+	* testsuite/gas/arc/asm-errors.err: Update expected results.
+
+2016-05-18  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-rx.c (struct cpu_type): Change the type of a field from
+	int to enum rx_cpu_types.
+
+2016-05-18  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-dlx.c (struct machine_it): change the type of a field from
+	int to bfd_reloc_code_real_type.
+	* config/tc-tic4x.c: Likewise.
+
+2016-05-18  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-v850.c (v850_target_arch): change type to enum
+	bfd_architecture.
+	* config/tc-v850.h (v850_target_arch): Likewise.
+
+2016-05-18  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-ppc.c (ppc_insert_operand): Trim PPC_OPERAND_SIGNOPT
+	allowed negative range.
+	* testsuite/gas/ppc/power9.s: Test xxspltib of -128, not -256.
+	* testsuite/gas/ppc/power9.d: Update.
+
+2016-05-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
+	disassembling and stop skipping targets.
+	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+	* testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
+	instruction for targets that have stronger alignment requirement.
+	* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+	* testsuite/gas/arm/archv8m-main.d: Likewise.
+	* testsuite/gas/arm/archv8m.s: Add label.
+	* testsuite/gas/arm/archv8m-cmse.s: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
+
+2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-m32r.c (mach_table): Make static and const.
+
+2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-vax.c (flonum_gen2vax): Adjust prototype to match
+	definition.
+
+2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-mn10300.c (md_begin): set linkrelax here instead of
+	defining it.
+	* config/tc-msp430.c (md_begin): Likewise.
+
+2016-05-16  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-m68hc11.c (fixup8): Change variables type from int to
+	bfd_reloc_code_real_type where appropriate.
+	(fixup16): Likewise.
+	(fixup8_xg): Likewise.
+
+2016-05-15  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-sh64.c (shmedia_check_limits): Constify `msg'.
+
+2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
+
+	* testsuite/gas/ppc/power9.d <xxspltib>: Add additional operand tests.
+	* testsuite/gas/ppc/power9.s: Likewise.
+
+2016-05-13  Alan Modra  <amodra@gmail.com>
+
+	* config/obj-coff.c (weak_uniquify): Delete unused var.
+
+2016-05-13  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* app.c (app_push): Use XNEW and related macros.
+	* as.c (parse_args): Likewise.
+	* cgen.c (make_right_shifted_expr): Likewise.
+	(gas_cgen_tc_gen_reloc): Likewise.
+	* config/bfin-defs.h: Likewise.
+	* config/bfin-parse.y: Likewise.
+	* config/obj-coff.c (stack_init): Likewise.
+	(stack_push): Likewise.
+	(coff_obj_symbol_new_hook): Likewise.
+	(coff_obj_symbol_clone_hook): Likewise.
+	(add_lineno): Likewise.
+	(coff_frob_symbol): Likewise.
+	* config/obj-elf.c (obj_elf_section_name): Likewise.
+	(build_group_lists): Likewise.
+	* config/obj-evax.c (evax_symbol_new_hook): Likewise.
+	* config/obj-macho.c (obj_mach_o_indirect_symbol): Likewise.
+	* config/tc-aarch64.c (insert_reg_alias): Likewise.
+	(find_or_make_literal_pool): Likewise.
+	(add_to_lit_pool): Likewise.
+	(fill_instruction_hash_table): Likewise.
+	* config/tc-alpha.c (load_expression): Likewise.
+	(emit_jsrjmp): Likewise.
+	(s_alpha_ent): Likewise.
+	(s_alpha_end): Likewise.
+	(s_alpha_linkage): Likewise.
+	(md_begin): Likewise.
+	(tc_gen_reloc): Likewise.
+	* config/tc-arc.c (arc_insert_opcode): Likewise.
+	(arc_extcorereg): Likewise.
+	* config/tc-bfin.c: Likewise.
+	* config/tc-cr16.c: Likewise.
+	* config/tc-cris.c: Likewise.
+	* config/tc-crx.c (preprocess_reglist): Likewise.
+	* config/tc-d10v.c: Likewise.
+	* config/tc-frv.c (frv_insert_vliw_insn): Likewise.
+	(frv_tomcat_shuffle): Likewise.
+	* config/tc-h8300.c: Likewise.
+	* config/tc-i370.c (i370_macro): Likewise.
+	* config/tc-i386.c (lex_got): Likewise.
+	(md_parse_option): Likewise.
+	* config/tc-ia64.c (alloc_record): Likewise.
+	(set_imask): Likewise.
+	(save_prologue_count): Likewise.
+	(dot_proc): Likewise.
+	(dot_endp): Likewise.
+	(ia64_frob_label): Likewise.
+	(add_qp_imply): Likewise.
+	(add_qp_mutex): Likewise.
+	(mark_resource): Likewise.
+	(dot_alias): Likewise.
+	* config/tc-m68hc11.c: Likewise.
+	* config/tc-m68k.c (m68k_frob_label): Likewise.
+	(s_save): Likewise.
+	(mri_control_label): Likewise.
+	(push_mri_control): Likewise.
+	(build_mri_control_operand): Likewise.
+	(s_mri_else): Likewise.
+	(s_mri_break): Likewise.
+	(s_mri_next): Likewise.
+	(s_mri_for): Likewise.
+	(s_mri_endw): Likewise.
+	* config/tc-metag.c (create_mnemonic_htab): Likewise.
+	* config/tc-microblaze.c: Likewise.
+	* config/tc-mmix.c (s_loc): Likewise.
+	* config/tc-nds32.c (nds32_relax_hint): Likewise.
+	* config/tc-nios2.c (nios2_insn_reloc_new): Likewise.
+	* config/tc-rl78.c: Likewise.
+	* config/tc-rx.c (rx_include): Likewise.
+	* config/tc-sh.c: Likewise.
+	* config/tc-sh64.c (shmedia_frob_section_type): Likewise.
+	* config/tc-sparc.c: Likewise.
+	* config/tc-spu.c: Likewise.
+	* config/tc-tic6x.c (static tic6x_unwind_info *tic6x_get_unwind): Likewise.
+	(tic6x_start_unwind_section): Likewise.
+	* config/tc-tilegx.c: Likewise.
+	* config/tc-tilepro.c: Likewise.
+	* config/tc-v850.c: Likewise.
+	* config/tc-visium.c: Likewise.
+	* config/tc-xgate.c: Likewise.
+	* config/tc-xtensa.c (xtensa_translate_old_userreg_ops): Likewise.
+	(new_resource_table): Likewise.
+	(resize_resource_table): Likewise.
+	(xtensa_create_trampoline_frag): Likewise.
+	(xtensa_maybe_create_literal_pool_frag): Likewise.
+	(cache_literal_section): Likewise.
+	* config/xtensa-relax.c (append_transition): Likewise.
+	(append_condition): Likewise.
+	(append_value_condition): Likewise.
+	(append_constant_value_condition): Likewise.
+	(append_literal_op): Likewise.
+	(append_label_op): Likewise.
+	(append_constant_op): Likewise.
+	(append_field_op): Likewise.
+	(append_user_fn_field_op): Likewise.
+	(enter_opname_n): Likewise.
+	(enter_opname): Likewise.
+	(split_string): Likewise.
+	(parse_insn_templ): Likewise.
+	(clone_req_or_option_list): Likewise.
+	(clone_req_option_list): Likewise.
+	(parse_option_cond): Likewise.
+	(parse_insn_pattern): Likewise.
+	(parse_insn_repl): Likewise.
+	(build_transition): Likewise.
+	(build_transition_table): Likewise.
+	* dw2gencfi.c (alloc_fde_entry): Likewise.
+	(alloc_cfi_insn_data): Likewise.
+	(cfi_add_CFA_remember_state): Likewise.
+	(dot_cfi_escape): Likewise.
+	(dot_cfi_fde_data): Likewise.
+	(select_cie_for_fde): Likewise.
+	* dwarf2dbg.c (dwarf2_directive_loc): Likewise.
+	* ecoff.c (ecoff_add_bytes): Likewise.
+	(ecoff_build_debug): Likewise.
+	* input-scrub.c (input_scrub_push): Likewise.
+	(input_scrub_begin): Likewise.
+	(input_scrub_next_buffer): Likewise.
+	* itbl-ops.c (append_insns_as_macros): Likewise.
+	(alloc_entry): Likewise.
+	(alloc_field): Likewise.
+	* listing.c (listing_newline): Likewise.
+	(listing_listing): Likewise.
+	* macro.c (get_any_string): Likewise.
+	(delete_macro): Likewise.
+	* stabs.c (generate_asm_file): Likewise.
+	(stabs_generate_asm_lineno): Likewise.
+	* subsegs.c (subseg_change): Likewise.
+	(subseg_get): Likewise.
+	* symbols.c (define_dollar_label): Likewise.
+	(symbol_relc_make_sym): Likewise.
+	* write.c (write_relocs): Likewise.
+
+2016-05-13  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/obj-coff.c (obj_coff_def): Simplify string copying.
+	(weak_name2altname): Likewise.
+	(weak_uniquify): Likewise.
+	(obj_coff_section): Likewise.
+	(obj_coff_init_stab_section): Likewise.
+	* config/obj-elf.c (obj_elf_section_name): Likewise.
+	(obj_elf_init_stab_section): Likewise.
+	* config/obj-evax.c (evax_shorten_name): Likewise.
+	* config/obj-macho.c (obj_mach_o_make_or_get_sect): Likewise.
+	* config/tc-aarch64.c (create_register_alias): Likewise.
+	* config/tc-alpha.c (load_expression): Likewise.
+	(s_alpha_file): Likewise.
+	(s_alpha_section_name): Likewise.
+	(tc_gen_reloc): Likewise.
+	* config/tc-arc.c (md_assemble): Likewise.
+	* config/tc-arm.c (create_neon_reg_alias): Likewise.
+	(start_unwind_section): Likewise.
+	* config/tc-hppa.c (pa_build_unwind_subspace): Likewise.
+	(hppa_elf_mark_end_of_function): Likewise.
+	* config/tc-nios2.c (nios2_modify_arg): Likewise.
+	(nios2_negate_arg): Likewise.
+	* config/tc-rx.c (rx_section): Likewise.
+	* config/tc-sh64.c (sh64_consume_datalabel): Likewise.
+	* config/tc-tic30.c (tic30_find_parallel_insn): Likewise.
+	* config/tc-tic54x.c (tic54x_include): Likewise.
+	(tic54x_macro_info): Likewise.
+	(subsym_get_arg): Likewise.
+	(subsym_substitute): Likewise.
+	(tic54x_start_line_hook): Likewise.
+	* config/tc-xtensa.c (xtensa_literal_prefix): Likewise.
+	(xg_reverse_shift_count): Likewise.
+	* config/xtensa-relax.c (enter_opname_n): Likewise.
+	(split_string): Likewise.
+	* dwarf2dbg.c (get_filenum): Likewise.
+	(process_entries): Likewise.
+	* expr.c (operand): Likewise.
+	* itbl-ops.c (alloc_entry): Likewise.
+	* listing.c (listing_message): Likewise.
+	(listing_title): Likewise.
+	* macro.c (check_macro): Likewise.
+	* stabs.c (s_xstab): Likewise.
+	* symbols.c (symbol_relc_make_expr): Likewise.
+	* write.c (compress_debug): Likewise.
+
+2016-05-12  Nick Clifton  <nickc@redhat.com>
+
+	PR target/20068
+	* testsuite/gas/arm/pr20068.d: Use correct regexp syntax.
+
+2016-05-11  Nick Clifton  <nickc@redhat.com>
+
+	PR target/20068
+	* testsuite/gas/arm/pr20068.d: Adjust expected output to allow for
+	big endian ARM configurations.
+
+2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
+	    Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* config/tc-mips.c (options): Add OPTION_DSPR3 and
+	OPTION_NO_DSPR3.
+	(md_longopts): Likewise.
+	(md_show_usage): Add help for -mdspr3 and -mno-dspr3.
+	(mips_ases): Define availability for DSPr3.
+	(mips_ase_groups): Add ASE_DSPR3 to the DSP group.
+	(mips_convert_ase_flags): Map ASE_DSPR3 to AFL_ASE_DSPR3.
+	* doc/as.texinfo: Document -mdspr3, -mno-dspr3.  Fix -mdspr2
+	formatting.
+	* doc/c-mips.texi: Document -mdspr3, -mno-dspr3, .set dspr3 and
+	.set nodspr3.  Fix -mdspr2 formatting.
+	* testsuite/gas/mips/mips32-dspr3.d: New file.
+	* testsuite/gas/mips/mips32-dspr3.s: Likewise.
+	* testsuite/gas/mips/mips.exp: Run mips32-dspr3 test.
+
+2016-05-11  Nick Clifton  <nickc@redhat.com>
+
+	PR target/20068
+	* config/tc-arm.c (add_to_lit_pool): Ensure that the padding added
+	to the pool uses O_constant.
+	* testsuite/gas/arm/pr20068.s: New test.
+	* testsuite/gas/arm/pr20068.d: Test driver.
+
+2016-05-11  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/gas/arm/archv8m-cmse-base.d: Skip for non-ELF ARM targets.
+	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+
+2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
+
+	* testsuite/gas/i386/i386.exp: Run RDPID tests.
+	* testsuite/gas/i386/prefix.d: Adjust.
+	* testsuite/gas/i386/rdpid.s: New test.
+	* testsuite/gas/i386/rdpid.d: Ditto.
+	* testsuite/gas/i386/rdpid-intel.d: Ditto.
+	* testsuite/gas/i386/x86-64-rdpid.s: Ditto.
+	* testsuite/gas/i386/x86-64-rdpid.d: Ditto.
+	* testsuite/gas/i386/x86-64-rdpid-intel.d: Ditto.
+
+2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Add RDPID.
+	* doc/c-i386.texi: Document RDPID.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
+	set branch type of a symbol.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions.
+	* config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP
+	instructions.
+	(arm_extensions): Add dsp extension for ARMv8-M Mainline.
+	(aeabi_set_public_attributes): Memorize the feature bits of the
+	architecture selected for Tag_CPU_arch.  Use it to set
+	Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension.
+	(arm_convert_symbolic_attribute): Define Tag_DSP_extension.
+	* testsuite/gas/arm/arch7em-bad.d: Rename to ...
+	* testsuite/gas/arm/arch7em-bad-1.d: This.
+	* testsuite/gas/arm/arch7em-bad-2.d: New file.
+	* testsuite/gas/arm/arch7em-bad-3.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
+	* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
+	* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (struct arm_option_extension_value_table): Make
+	allowed_archs an array with 2 entries.
+	(ARM_EXT_OPT): Adapt to only fill the first entry of allowed_archs.
+	(ARM_EXT_OPT2): New macro filling the two entries of allowed_archs.
+	(arm_extensions): Use separate entries in allowed_archs when several
+	archs are allowed to use an extension and change ARCH_ANY in
+	ARM_ARCH_NONE in allowed_archs.
+	(arm_parse_extension): Check that, for each allowed_archs entry, all
+	bits are set in the current architecture, ignoring ARM_ANY entries.
+	(s_arm_arch_extension): Likewise.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/tc-arm.c (arm_ext_m): Add feature bit ARM_EXT2_V8M_MAIN.
+	(arm_ext_v8m_main): New feature set for bit ARM_EXT2_V8M_MAIN.
+	(arm_ext_v8m_m_only): New feature set for instructions in ARMv8-M not
+	shared with a non M profile architecture.
+	(do_rn): New function.
+	(known_t32_only_insn): Check opcode against arm_ext_v8m_m_only rather
+	than arm_ext_v8m.
+	(v7m_psrs): Add ARMv8-M security extensions new special registers.
+	(insns): Add ARMv8-M Security Extensions instructions.
+	(aeabi_set_public_attributes): Use arm_ext_v8m_m_only instead of
+	arm_ext_v8m_m to decide the profile and the Thumb ISA.
+	* testsuite/gas/arm/archv8m-cmse.s: New file.
+	* testsuite/gas/arm/archv8m-cmse-main.s: Likewise..
+	* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
+	* testsuite/gas/arm/any-cmse.d: Likewise.
+	* testsuite/gas/arm/any-cmse-main.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
+	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
+
+2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/sparc/sparc5vis4.s: Fix mnemonic of faligndatai.
+	* testsuite/gas/sparc/sparc5vis4.d: Likewise.
+
+2016-05-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/tc-arm.c (fpu_arch_vfp_v1): Mark with ATTRIBUTE_UNUSED.
+	(fpu_arch_vfp_v3): Likewise.
+	(fpu_arch_neon_v1): Likewise.
+	(arm_arch_full): Likewise.
+	(parse_neon_el_struct_list): Initialize fields of firsttype.
+
+2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP.
+	(arc_extinsn): Handle new introduced syntax.
+	* testsuite/gas/arc/textinsn1op.d: New file.
+	* testsuite/gas/arc/textinsn1op.s: Likewise.
+	* doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP.
+
+2016-05-03  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	* testsuite/gas/lns/lns.exp: Add avr to list of targets using
+	DW_LNS_fixed_advance_pc.
+
+2016-04-27  Alan Modra  <amodra@gmail.com>
+
+	* as.h (inline, __PTR_TO_INT, __INT_TO_PTR): Don't define.
+	(xmemdup0): New inline function.
+
+2016-04-22  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (code_option_type): New enum.
+	(parse_code_option): Return status indicating option type.
+	(s_mipsset): Update `parse_code_option' call site accordingly.
+	Always set register sizes from the ISA with ISA overrides.
+	(s_module): Update `parse_code_option' call site.
+	* testsuite/gas/mips/isa-override-1.d: New test.
+	* testsuite/gas/mips/micromips@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips1@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips2@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
+	* testsuite/gas/mips/r3000@isa-override-1.d: New test.
+	* testsuite/gas/mips/r3900@isa-override-1.d: New test.
+	* testsuite/gas/mips/r5900@isa-override-1.d: New test.
+	* testsuite/gas/mips/octeon@isa-override-1.d: New test.
+	* testsuite/gas/mips/octeon3@isa-override-1.d: New test.
+	* testsuite/gas/mips/isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips1@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips2@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
+	* testsuite/gas/mips/r3000@isa-override-2.l: New list test.
+	* testsuite/gas/mips/r3900@isa-override-2.l: New list test.
+	* testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
+	* testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
+	output.
+	* testsuite/gas/mips/isa-override-1.s: New test source.
+	* testsuite/gas/mips/r5900@isa-override-1.s: New test source.
+	* testsuite/gas/mips/isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips1@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips2@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
+	* testsuite/gas/mips/r3000@isa-override-2.s: New test source.
+	* testsuite/gas/mips/r3900@isa-override-2.s: New test source.
+	* testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* cgen.c: Likewise.
+	* config/tc-bfin.c: Likewise.
+	* config/tc-ia64.c: Likewise.
+	* config/tc-mep.c: Likewise.
+	* config/tc-metag.c: Likewise.
+	* config/tc-nios2.c: Likewise.
+	* config/tc-rl78.c: Likewise.
+
+2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* doc/c-arc.texi (ARC Options): Add nps400 to list of valus for
+	-mcpu.  Add cross reference to .cpu directive from -mcpu option.
+	(ARC Directives): Add NPS400 to .cpu directive list.
+
+2016-04-20  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* config/tc-aarch64.c (aarch64_features): Add "ras".
+	* doc/c-aarch64.texi (AArch64 Extensions): Add "ras".
+	* testsuite/gas/aarch64/armv8-ras-1.d: New.
+	* testsuite/gas/aarch64/armv8-ras-1.s: New.
+	* testsuite/gas/aarch64/illegal-ras-1.d: New.
+	* testsuite/gas/aarch64/illegal-ras-1.s: New.
+
+2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/nps400-6.d: New file.
+	* testsuite/gas/arc/nps400-6.s: New file.
+
+2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/nps400-4.d: New file.
+	* testsuite/gas/arc/nps400-4.s: New file.
+	* testsuite/gas/arc/nps400-5.d: New file.
+	* testsuite/gas/arc/nps400-5.s: New file.
+
+2016-04-19  Martin Galvan  <martin.galvan@tallertechnologies.com>
+
+	* doc/as.texinfo (.cfi_remember_state, .cfi_restore_state): Improve
+	documentation.
+
+2016-04-17  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	Revert prevous change.
+	* config/tc-arc.c (arc_option): Make .cpu directive
+	case-sensitive again.
+
+2016-04-16  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (arc_option): Make .cpu directive
+	case-insensitive.
+
+2016-04-16  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (arc_option): Allow NPS400 in .cpu directive.
+
+2016-04-15  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-mips.c (md_begin): Remove useless assignment.
+
+2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated with automake 1.11.6.
+	* aclocal.m4: Likewise.
+	* doc/Makefile.in: Likewise.
+
+2016-04-15  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-ppc.c (toc_reloc_types): Wrap in #ifdef OBJ_ELF
+
+2016-04-14  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-nios2.c (nios2_as_options): Make file static.
+	* config/tc-ppc.c (toc_reloc_ypes): Likewise.
+	* config/tc-sparc.c (native_op_table): Likewise.
+
+2016-04-14  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-m32c.c (M32C_Macros): Remove.
+	* config/tc-msp430.c (option_numbers): Likewise.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/nps400-3.d: New file.
+	* testsuite/gas/arc/nps400-3.s: New file.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/add_s-err.s: Update target pattern.
+	* testsuite/gas/arc/warn.s: Likewise.
+	* testsuite/gas/elf/elf.exp: Run test for arc.
+
+2016-04-14  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19938
+	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Allow for the string
+	sections possibly having the SHF_STRINGS flag bit set.
+	* testsuite/gas/i386/x86-64-unwind.d: Likewise.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (mach_type_specified_p): Change type to
+	bfd_boolean.
+	(arc_option): Set private flags when parsing cpu pseudo-op.
+	(md_parse_option): Set mach_type_specified_p to TRUE.
+
+2016-04-13  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19937
+	* testsuite/gas/v850/pr19937.s: New test.
+	* testsuite/gas/v850/pr19937.d: New test control file.
+	* testsuite/gas/v850/basic.exp: Run the new test.
+
+2016-04-13  Maciej W. Rozycki  <macro@imgtec.com>
+	    Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* config/tc-mips.c (relaxed_branch_length): Use the long
+	sequence where the target is a weak symbol.
+	(relaxed_micromips_32bit_branch_length): Likewise.
+	(relaxed_micromips_16bit_branch_length): Likewise.
+	* testsuite/gas/mips/branch-weak-1.d: New test.
+	* testsuite/gas/mips/branch-weak-2.d: New test.
+	* testsuite/gas/mips/branch-weak-3.d: New test.
+	* testsuite/gas/mips/branch-weak-4.d: New test.
+	* testsuite/gas/mips/branch-weak-5.d: New test.
+	* testsuite/gas/mips/branch-weak.l: New stderr output.
+	* testsuite/gas/mips/branch-weak.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-13  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (relaxed_branch_length): Use the long
+	sequence where the distance cannot be determined.
+	(relaxed_micromips_32bit_branch_length): Likewise.
+	* testsuite/gas/mips/branch-extern-1.d: New test.
+	* testsuite/gas/mips/branch-extern-2.d: New test.
+	* testsuite/gas/mips/branch-extern-3.d: New test.
+	* testsuite/gas/mips/branch-extern-4.d: New test.
+	* testsuite/gas/mips/branch-extern.l: New stderr output.
+	* testsuite/gas/mips/branch-extern.s: New test source.
+	* testsuite/gas/mips/branch-section-1.d: New test.
+	* testsuite/gas/mips/branch-section-2.d: New test.
+	* testsuite/gas/mips/branch-section-3.d: New test.
+	* testsuite/gas/mips/branch-section-4.d: New test.
+	* testsuite/gas/mips/branch-section.l: New stderr output.
+	* testsuite/gas/mips/branch-section.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/textauxregister.d: New file.
+	* testsuite/gas/arc/textauxregister.s: Likewise.
+	* testsuite/gas/arc/textcondcode.d: Likewise.
+	* testsuite/gas/arc/textcondcode.s: Likewise.
+	* testsuite/gas/arc/textcoreregister.d: Likewise.
+	* testsuite/gas/arc/textcoreregister.s: Likewise.
+	* testsuite/gas/arc/textpseudoop.d: Likewise.
+	* testsuite/gas/arc/textpseudoop.s: Likewise.
+	* testsuite/gas/arc/ld2.d: Update test.
+	* testsuite/gas/arc/st.d: Likewise.
+	* testsuite/gas/arc/taux.d: Likewise.
+	* doc/c-arc.texi (ARC Directives): Add .extCondCode,
+	.extCoreRegister and .extAuxRegister documentation.
+	* config/tc-arc.c (arc_extcorereg): New function.
+	(md_pseudo_table): Add .extCondCode, .extCoreRegister and
+	.extAuxRegister pseudo-ops.
+	(extRegister_t): New type.
+	(ext_condcode, arc_aux_hash): New global variable.
+	(find_opcode_match): Check for extensions.
+	(preprocess_operands): Likewise.
+	(md_begin): Add aux registers in a hash.
+	(assemble_insn): Update use arc_flags member.
+	(tokenize_extregister): New function.
+	(create_extcore_section): Likewise.
+	* config/tc-arc.h (arc_flags): Delete code, add flgp.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/noargs_a7.d: New file.
+	* testsuite/gas/arc/noargs_a7.s: Likewise.
+	* testsuite/gas/arc/noargs_hs.d: Likewise.
+	* testsuite/gas/arc/noargs_hs.s: Likewise.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/textinsn-errors.d: New File.
+	* testsuite/gas/arc/textinsn-errors.err: Likewise.
+	* testsuite/gas/arc/textinsn-errors.s: Likewise.
+	* testsuite/gas/arc/textinsn2op.d: Likewise.
+	* testsuite/gas/arc/textinsn2op.s: Likewise.
+	* testsuite/gas/arc/textinsn2op01.d: Likewise.
+	* testsuite/gas/arc/textinsn2op01.s: Likewise.
+	* testsuite/gas/arc/textinsn3op.d: Likewise.
+	* testsuite/gas/arc/textinsn3op.s: Likewise.
+	* doc/c-arc.texi (ARC Directives): Add .extInstruction
+	documentation.
+	* config/tc-arc.c (arcext_section): New variable.
+	(arc_extinsn): New function.
+	(md_pseudo_table): Add .extInstruction pseudo op.
+	(attributes_t): New type.
+	(suffixclass, syntaxclass, syntaxclassmod): New constant
+	structures.
+	(find_opcode_match): Remove arc_num_opcodes.
+	(md_begin): Likewise.
+	(tokenize_extinsn): New function.
+	(arc_set_ext_seg): Likewise.
+	(create_extinst_section): Likewise.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (preprocess_operands): Mark AUX symbol.
+	(arc_adjust_symtab): New function.
+	* config/tc-arc.h (ARC_FLAG_AUX): Define.
+	(obj_adjust_symtab): Likewise.
+	* testsuite/gas/arc/taux.d: New file.
+	* testsuite/gas/arc/taux.s: Likewise.
+
+2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (s_option): Sanitize `.option picX'
+	pseudo-op.
+	* testsuite/gas/mips/option-pic-1.d: New test.
+	* testsuite/gas/mips/option-pic-2.l: New list test.
+	* testsuite/gas/mips/option-pic-1.s: New test source.
+	* testsuite/gas/mips/option-pic-2.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (s_option): Reject `.option picX' if VxWorks
+	PIC.
+	* testsuite/gas/mips/option-pic-vxworks-1.l: New list test.
+	* testsuite/gas/mips/option-pic-vxworks-2.l: New list test.
+	* testsuite/gas/mips/option-pic-vxworks-1.s: New test source.
+	* testsuite/gas/mips/option-pic-vxworks-2.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (can_swap_branch_p): Correct call formatting.
+
+2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* messages.c (as_bad): Fix a typo in description.
+
+2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_check_options): Unify messages.
+
+2016-04-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (mips_check_options): Use `opts->isa'
+	consistently.
+
+2016-04-08  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19910
+	* testsuite/gas/sparc/pr19910-1.d: Adjust regexps to work with
+	COFF and AOUT sparc targets.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
+	* testsuite/gas/arc/nps400-2.d: New file.
+	* testsuite/gas/arc/nps400-2.s: New file.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (struct arc_opcode_hash_entry_iterator): New
+	structure.
+	(arc_opcode_hash_entry_iterator_init): New function.
+	(arc_opcode_hash_entry_iterator_next): New function.
+	(find_opcode_match): Iterate over all arc_opcode entries
+	referenced by the arc_opcode_hash_entry passed in as a parameter.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (arc_find_opcode): Now returns
+	arc_opcode_hash_entry pointer.
+	(find_opcode_match): Update argument type, extract arc_opcode from
+	incoming arc_opcode_hash_entry.
+	(find_special_case_pseudo): Update return type.
+	(find_special_case_flag): Update return type.
+	(find_special_case): Update return type.
+	(assemble_tokens): Lookup arc_opcode_hash_entry based on
+	instruction mnemonic, then use find_opcode_match to identify
+	specific arc_opcode.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (struct arc_opcode_hash_entry): New structure.
+	(arc_find_opcode): New function.
+	(find_special_case_pseudo): Use arc_find_opcode.
+	(find_special_case_flag): Likewise.
+	(assemble_tokens): Likewise.
+	(md_begin): Build hash using struct arc_opcode_hash_entry.
+
+2016-04-07  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (arc_option): Prepare string for automatic
+	translation.
+	(declare_register): Likewise.
+
+2016-04-06  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* doc/c-aarch64.texi (Architecture Extensions): Add entry for LSE.
+	Correct entry for RDMA.  Alpha sort entries.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (tokenize_flags): Allow greater range of
+	characters into flag names.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (find_opcode_match): Handle O_symbol case, add
+	new de_fault label.
+	(preprocess_operands): Delete.
+	(assemble_tokens): Remove call to preprocess_operands.
+
+2016-04-07  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/19910
+	* config/tc-sparc.c (sparc_ip): Report an error if the expression
+	inside a %-macro could not be fully parsed.
+	* expr.c (integer_constant): Accept and ignore U suffixes to
+	integers.
+	(operand): When a missing closing parenthesis is encountered,
+	report the character that was found instead.
+	* testsuite/gas/mips/tls-ill.l: Update expected error message.
+	* testsuite/gas/sparc/pr19910-1.d: New test driver.
+	* testsuite/gas/sparc/pr19910-1.s: New test.
+	* testsuite/gas/sparc/pr19910-2.l: Expected error output.
+	* testsuite/gas/sparc/pr19910-2.s: New test.
+	* testsuite/gas/sparc/sparc.exp: Run the new tests.
+
+2016-04-06  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-msp430.c (msp430_operands): Check for a NOP preceding
+	an EINT instruction.  Warn/fix as necessary.
+	* testsuite/gas/msp430/bad.s: Add test of EINT without preceding NOP.
+	* testsuite/gas/msp430/bad.l: Update expected messages.
+
+2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/nps400-1.d: Update expected results.
+	* testsuite/gas/arc/nps400-1.s: Additional test cases.
+
+2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (is_code_density_p): Compare directly the
+	subclass field.
+	(is_spfp_p, is_dpfp_p, is_spfp_p): Define.
+	(check_cpu_feature): New function.
+	(find_opcode_match): Use check_cpu_feature function.
+	(preprocess_operands): Likewise.
+	(md_parse_option): Use mfpuda, mdpfp, mspfp options.
+	* testsuite/gas/arc/tdpfp.d: New file.
+	* testsuite/gas/arc/tfpuda.d: Likewise.
+	* testsuite/gas/arc/tfpx.s: Likewise.
+
+2016-04-05  Jiong Wang  <jiong.wang@arm.com>
+
+	* config/tc-arm.c (do_neon_mac_maybe_scalar): Allow F16.
+	* testsuite/gas/arm/armv8-2-fp16-simd.s: New tests.
+	* testsuite/gas/arm/armv8-2-fp16-simd.d: New expected results.
+	* testsuite/gas/arm/armv8-2-fp16-simd-thum.d: Likewise for Thumb.
+	* testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New warning results.
+	* testsuite/gas/arm/simd_by_scalar_low_regbank.s: New test source.
+	* testsuite/gas/arm/simd_by_scalar_low_regbank.d: New testcase.
+	* testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d: Likewise
+	for Thumb.
+	* testsuite/gas/arm/simd_by_scalar_low_regbank.l: New warning results.
+
+2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (assemble_insn): Prohibit pc-rel relocations for
+	JUMP instructions type.
+	* testsuite/gas/arc/relocs-errors.d: New file.
+	* testsuite/gas/arc/relocs-errors.err: Likewise.
+	* testsuite/gas/arc/relocs-errors.s: Likewise.
+
+2016-04-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/19909
+	* config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
+	only if i.disp_encoding != disp_encoding_32bit.
+	* gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
+	* gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
+	* gas/testsuite/gas/i386/disp32.d: Updated.
+	* gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
+
+2016-04-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/19498
+	* testsuite/gas/i386/i386.exp: Run pr19498.
+	* testsuite/gas/i386/pr19498.d: New file.
+	* testsuite/gas/i386/pr19498.s: Likewise.
+
+2016-04-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.h: Include 'opcode/arc.h'.
+	(MAX_INSN_ARGS): Delete.
+	(MAX_INSN_FLGS): Delete.
+
+2016-04-04  Alan Modra  <amodra@gmail.com>
+
+	PR 19498
+	* symbols.c (resolve_symbol_value): Clear sy_resolving on exit
+	from function on all paths that set sy_resolving.
+
+2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* app.c (app_push): use XNEW macro.
+	* as.c: Likewise.
+	* config/obj-elf.c (obj_elf_change_section): Likewise.
+	(elf_copy_symbol_attributes): Likewise.
+	(obj_elf_size): Likewise.
+	(build_group_lists): Likewise.
+	* config/tc-aarch64.c (add_operand_error_record): Likewise.
+	(md_assemble): Likewise.
+	(tc_gen_reloc): Likewise.
+	(get_upper_str): Likewise.
+	(aarch64_parse_features): Likewise.
+	* config/tc-arm.c (insert_reg_alias): Likewise.
+	(insert_neon_reg_alias): Likewise.
+	(find_or_make_literal_pool): Likewise.
+	(s_arm_elf_cons): Likewise.
+	(add_unwind_opcode): Likewise.
+	(arm_parse_extension): Likewise.
+	* config/tc-avr.c (create_record_for_frag): Likewise.
+	* config/tc-crx.c: Likewise.
+	* config/tc-d30v.c: Likewise.
+	* config/tc-dlx.c (s_proc): Likewise.
+	* config/tc-ft32.c: Likewise.
+	* config/tc-h8300.c: Likewise.
+	* config/tc-hppa.c (pa_proc): Likewise.
+	(create_new_space): Likewise.
+	(create_new_subspace): Likewise.
+	* config/tc-i860.c: Likewise.
+	* config/tc-i960.c: Likewise.
+	* config/tc-ia64.c: Likewise.
+	* config/tc-iq2000.c (iq2000_add_macro): Likewise.
+	(iq2000_record_hi16): Likewise.
+	* config/tc-m32c.c (m32c_indirect_operand): Likewise.
+	* config/tc-m32r.c (debug_sym): Likewise.
+	(m32r_record_hi16): Likewise.
+	* config/tc-m68k.c (m68k_ip): Likewise.
+	(md_begin): Likewise.
+	* config/tc-mcore.c: Likewise.
+	* config/tc-microblaze.c (check_got): Likewise.
+	* config/tc-mips.c (append_insn): Likewise.
+	(s_mipsset): Likewise.
+	(mips_record_label): Likewise.
+	(s_mips_end): Likewise.
+	* config/tc-mmix.c (mmix_frob_file): Likewise.
+	* config/tc-mn10200.c: Likewise.
+	* config/tc-mn10300.c: Likewise.
+	* config/tc-moxie.c: Likewise.
+	* config/tc-msp430.c: Likewise.
+	* config/tc-nds32.c (nds32_elf_save_pseudo_pattern): Likewise.
+	* config/tc-ns32k.c: Likewise.
+	* config/tc-or1k.c: Likewise.
+	* config/tc-pdp11.c: Likewise.
+	* config/tc-pj.c (fake_opcode): Likewise.
+	* config/tc-ppc.c (ppc_apuinfo_section_add): Likewise.
+	(ppc_macro): Likewise.
+	(ppc_dwsect): Likewise.
+	(ppc_machine): Likewise.
+	* config/tc-rl78.c (rl78_frag_init): Likewise.
+	* config/tc-rx.c (rx_frag_init): Likewise.
+	* config/tc-s390.c (s390_lit_suffix): Likewise.
+	(s390_machine): Likewise.
+	(s390_machinemode): Likewise.
+	* config/tc-score.c (s3_insert_reg): Likewise.
+	(s3_gen_reloc): Likewise.
+	* config/tc-score7.c (s7_insert_reg): Likewise.
+	(s7_gen_reloc): Likewise.
+	* config/tc-tic30.c (tic30_operand): Likewise.
+	* config/tc-tic4x.c (tic4x_inst_make): Likewise.
+	* config/tc-tic54x.c (stag_add_field): Likewise.
+	(tic54x_struct): Likewise.
+	(tic54x_space): Likewise.
+	(tic54x_field): Likewise.
+	(tic54x_mlib): Likewise.
+	(subsym_substitute): Likewise.
+	* config/tc-tic6x.c (tic6x_frob_label): Likewise.
+	* config/tc-vax.c: Likewise.
+	* config/tc-xc16x.c: Likewise.
+	* config/tc-xtensa.c (xtensa_add_insn_label): Likewise.
+	(directive_push): Likewise.
+	(xtensa_begin_directive): Likewise.
+	(tokenize_arguments): Likewise.
+	(xtensa_add_literal_sym): Likewise.
+	(new_resource_table): Likewise.
+	(resize_resource_table): Likewise.
+	(emit_single_op): Likewise.
+	(xtensa_create_trampoline_frag): Likewise.
+	(xtensa_maybe_create_literal_pool_frag): Likewise.
+	(xtensa_add_config_info): Likewise.
+	(xtensa_realloc_fixup_cache): Likewise.
+	(add_subseg_info): Likewise.
+	(cache_literal_section): Likewise.
+	(add_xt_block_frags): Likewise.
+	(add_xt_prop_frags): Likewise.
+	(init_op_placement_info_table): Likewise.
+	(build_section_rename): Likewise.
+	* config/tc-z80.c: Likewise.
+	* config/tc-z8k.c: Likewise.
+	* depend.c (register_dependency): Likewise.
+	* dwarf2dbg.c (get_line_subseg): Likewise.
+	(dwarf2_gen_line_info_1): Likewise.
+	(get_filenum): Likewise.
+	* ecoff.c (allocate_scope): Likewise.
+	(allocate_vlinks): Likewise.
+	(allocate_shash): Likewise.
+	(allocate_thash): Likewise.
+	(allocate_tag): Likewise.
+	(allocate_forward): Likewise.
+	(allocate_thead): Likewise.
+	(allocate_lineno_list): Likewise.
+	* expr.c (make_expr_symbol): Likewise.
+	* hash.c (hash_new_sized): Likewise.
+	* input-file.c (input_file_push): Likewise.
+	* listing.c (file_info): Likewise.
+	(listing_newline): Likewise.
+	* macro.c (new_formal): Likewise.
+	(define_macro): Likewise.
+	* remap.c (add_debug_prefix_map): Likewise.
+	* symbols.c (symbol_find_noref): Likewise.
+	(define_dollar_label): Likewise.
+	(fb_label_instance_inc): Likewise.
+	(symbol_relc_make_value): Likewise.
+
+2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/obj-elf.c (obj_elf_vendor_attribute): Use xstrdup.
+	* config/tc-ppc.c (ppc_frob_file_before_adjust): Likewise.
+	(ppc_znop): Likewise.
+	(ppc_pe_section): Likewise.
+	(ppc_frob_symbol): Likewise.
+	* config/tc-tic30.c (tic30_operand): Likewise.
+	* config/tc-tic4x.c (tic4x_sect): Likewise.
+	(tic4x_usect): Likewise.
+
+2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-alpha.c: Const qualify FLT_CHARS.
+	* config/atof-ieee.c: Remove declarations of FLT_CHARS and EXP_CHARS.
+	* config/tc-cris.h: Likewise.
+	* expr.c: Likewise.
+	* config/tc-mmix.c (md_atof): Adjust comment.
+	* config/tc-mmix.h: Stop defining FLT_CHARS and EXP_CHARS as macros.
+	* tc.h: Declare FLT_CHARS and EXP_CHARS.
+
+2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-score.c (s3_gen_reloc): Add const qualifiers.
+	* config/tc-score7.c (s7_gen_reloc): Likewise.
+
+2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-arm.c (do_t_branch): Change the type of reloc to
+	bfd_reloc_code_real_type.
+
+2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/bfin-parse.y (current_inputline): Remove definition.
+	* config/tc-bfin.c (md_assemble): Simplify use of current_inputline.
+
+2016-04-03  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-avr.c (md_parse_option): Use strcasecmp () to compare
+	strings.
+
+2016-04-02  Alan Modra  <amodra@gmail.com>
+
+	PR 19896
+	* read.c (assign_symbol): Consume rest of line after an error
+	rather than continuing to process the line.
+
+2016-04-01  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.h (MAX_FLAG_NAME_LENGHT): Rename to...
+	(MAX_FLAG_NAME_LENGTH): ...this.
+	(struct arc_flags): Update to use MAX_FLAG_NAME_LENGTH.
+	* config/tc-arc.c (tokenize_flags): Likewise.
+
+2016-04-01  Alan Modra  <amodra@gmail.com>
+
+	* cgen.c (weak_operand_overflow_check): Return const char*.
+	* messages.c (as_internal_value_out_of_range): Formatting.
+	(as_warn_value_out_of_range): Consify prefix param.
+	(as_bad_value_out_of_range): Likewise.
+	* read.c (s_errwarn): Constify msg..
+	(s_float_space, float_cons): ..and err.
+	* as.h (as_warn_value_out_of_range, as_bad_value_out_of_range,
+	ieee_md_atof, vax_md_atof): Update prototypes.
+	* tc.h (md_atof): Update prototype.
+	* config/atof-ieee.c (ieee_md_atof): Return const char*.
+	* config/atof-vax.c (vax_md_atof): Likewise.
+	* config/obj-elf.c (obj_elf_parse_section_letters): Constify bad_msg.
+	* config/tc-aarch64.c (md_atof): Return const char*.
+	* config/tc-alpha.c (s_alpha_section_name): Likewise.
+	(s_alpha_comm): Constify sec_name.
+	(section_name): Constify.
+	(s_alpha_section): Consify name..
+	(alpha_elf_section_letter): ..and ptr_msg param..
+	(md_atof): ..and return.
+	* config/tc-alpha.h (alpha_elf_section_letter): Update prototype.
+	* config/tc-arc.c (md_atof): Return const char*.
+	* config/tc-arm.c (md_atof): Likewise.
+	* config/tc-avr.c (md_atof): Likewise.
+	* config/tc-bfin.c (md_atof): Likewise.
+	* config/tc-cr16.c (md_atof): Likewise.
+	* config/tc-cris.c (md_atof): Likewise.
+	* config/tc-crx.c (md_atof): Likewise.
+	* config/tc-d10v.c (md_atof): Likewise.
+	* config/tc-d30v.c (md_atof): Likewise.
+	* config/tc-dlx.c (md_atof): Likewise.
+	* config/tc-epiphany.c (md_atof): Likewise.
+	* config/tc-fr30.c (md_atof): Likewise.
+	* config/tc-frv.c (md_atof): Likewise.
+	* config/tc-ft32.c (md_atof): Likewise.
+	* config/tc-h8300.c (md_atof): Likewise.
+	* config/tc-hppa.c (struct default_subspace_dict): Constify name.
+	(struct default_space_dict): Likewise.
+	(create_new_space): Constify name param.
+	(create_new_subspace): Likewise.
+	(is_defined_space, is_defined_subspace): Likewise.
+	(pa_parse_space_stmt): Constify space_name param.
+	(md_atof): Return const char*.
+	(pa_spaces_begin): Constify name.
+	* config/tc-i370.c (md_atof): Return const char*.
+	* config/tc-i386.c (md_atof): Likewise.
+	(x86_64_section_letter): Constify ptr_msg param.
+	* config/tc-i386.h (x86_64_section_letter): Update prototype.
+	* config/tc-i860.c (struct i860_it): Constify error.
+	(md_atof): Return const char*.
+	* config/tc-i960.c (md_atof): Likewise.
+	* config/tc-ia64.c (md_atof): Likewise.
+	(ia64_elf_section_letter): Constify ptr_msg param.
+	* config/tc-ia64.h (ia64_elf_section_letter): Update prototype.
+	* config/tc-ip2k.c (md_atof): Return const char*.
+	* config/tc-iq2000.c (md_atof): Likewise.
+	* config/tc-lm32.c (md_atof): Likewise.
+	* config/tc-m32c.c (md_atof): Likewise.
+	* config/tc-m32r.c (md_atof): Likewise.
+	* config/tc-m68hc11.c (md_atof): Likewise.
+	* config/tc-m68k.c (md_atof): Likewise.
+	* config/tc-mcore.c (md_atof): Likewise.
+	* config/tc-mep.c (md_atof): Likewise.
+	(mep_elf_section_letter): Constify ptr_msg param.
+	* config/tc-mep.h (mep_elf_section_letter): Update prototype.
+	* config/tc-metag.c (md_atof): Return const char*.
+	* config/tc-microblaze.c (md_atof): Likewise.
+	* config/tc-microblaze.h (md_atof): Delete prototype.
+	* config/tc-mips.c (mips_parse_argument_token): Constify err.
+	(md_atof): Return const char*.
+	* config/tc-mmix.c (md_atof): Likewise.
+	* config/tc-mn10200.c (md_atof): Likewise.
+	* config/tc-mn10300.c (md_atof): Likewise.
+	* config/tc-moxie.c (md_atof): Likewise.
+	* config/tc-msp430.c (md_atof): Likewise.
+	* config/tc-mt.c (md_atof): Likewise.
+	* config/tc-nds32.c (md_atof): Likewise.
+	* config/tc-nios2.c (md_atof): Likewise.
+	(nios2_elf_section_letter): Constify ptr_msg param.
+	* config/tc-nios2.h (nios2_elf_section_letter): Update prototype.
+	* config/tc-ns32k.c (md_atof): Return const char*.
+	* config/tc-or1k.c (md_atof): Likewise.
+	* config/tc-pdp11.c (struct pdp11_code): Constify error.
+	(md_atof): Return const char*.
+	* config/tc-pj.c (md_atof): Likewise.
+	* config/tc-ppc.c (md_atof): Likewise.
+	* config/tc-rl78.c (md_atof): Likewise.
+	* config/tc-rx.c (md_atof): Likewise.
+	* config/tc-s390.c (md_atof): Likewise.
+	* config/tc-score.c (s3_atof, md_atof): Likewise.
+	* config/tc-sh.c (md_atof): Likewise.
+	* config/tc-sparc.c (struct sparc_it): Constify error.
+	(md_atof): Return const char*.
+	* config/tc-spu.c (md_atof): Likewise.
+	* config/tc-tic30.c (md_atof): Likewise.
+	* config/tc-tic4x.c (md_atof): Likewise.
+	* config/tc-tic54x.c (md_atof): Likewise.
+	* config/tc-tic6x.c (md_atof): Likewise.
+	* config/tc-tilegx.c (md_atof): Likewise.
+	* config/tc-tilepro.c (md_atof): Likewise.
+	* config/tc-v850.c (parse_register_list, md_atof): Likewise.
+	* config/tc-vax.c (md_atof): Likewise.
+	* config/tc-visium.c (md_atof): Likewise.
+	* config/tc-xc16x.c (md_atof): Likewise.
+	* config/tc-xgate.c (md_atof): Likewise.
+	* config/tc-xstormy16.c (md_atof): Likewise.
+	* config/tc-xtensa.c (md_atof): Likewise.
+	* config/tc-z80.c (md_atof): Likewise.
+	* config/tc-z8k.c (md_atof): Likewise.
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-xtensa.c (struct rename_section_struct): Make old_name
+	const.
+	(xtensa_section_rename): Make argument type const char *.
+	* config/tc-xtensa.h (xtensa_section_rename): Adjust.
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-i960.c (parse_ldconst): Cast to char * when assigning to
+	args[0].
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-m32c.c (m32c_md_end): cast the argument to md_assemble to
+	char *.
+	(m32c_indirect_operand): Likewise.
+	* config/tc-nds32.c (do_pseudo_b): Likewise.
+	(do_pseudo_bal): Likewise.
+	(do_pseudo_ls_bhw): Likewise.
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* as.c (parse_args): Cast literal to char * when assigning to optarg.
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-ia64.c (md_assemble): Add temporary variable to pass to
+	get_symbol_name ().
+	* config/tc-sparc.c (s_register): Cast a literal to char * in
+	assignment.
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-i960.c (parse_expr): Cast to char * when assigning to
+	input_line_pointer.
+	* config/tc-m32r.c (expand_debug_syms): Likewise.
+	* config/tc-msp430.c (msp430_dstoperand): Likewise.
+	* config/tc-z80.c (md_begin): Likewise.
+	* stabs.c (stabs_generate_asm_func): Likewise.
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* cgen.c: Modernize the way functions declare arguments.
+	* config/tc-bfin.c: Likewise.
+	* config/tc-pdp11.c: Likewise.
+	* literal.c: Likewise.
+	* read.c: Likewise.
+	* stabs.c: Likewise.
+
+2016-03-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-aarch64.c (aarch64_handle_align): Make the type of some
+	variables unsigned char[].
+	* config/tc-alpha.c (alpha_handle_align): Likewise.
+	* config/tc-arm.c (arm_handle_align): Likewise.
+	* config/tc-z80.c: Likewise.
+
+2016-03-30  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19880
+	* config/tc-arm.c (do_t_push_pop): Cast bitmask to unsigned before
+	shifting.
+
+2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/all/gas.exp: Don't xfail on ARC.
+	* testsuite/gas/elf/elf.exp: Likewise.
+	* testsuite/gas/all/redef3.d: Allow execution for ARC.
+
+2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/warn.exp: Fix matching pattern.
+
+2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/ext2op.d: New file.
+	* testsuite/gas/arc/ext2op.s: Likewise.
+	* testsuite/gas/arc/ext3op.d: Likewise.
+	* testsuite/gas/arc/ext3op.s: Likewise.
+
+2016-03-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-aarch64.c (struct aarch64_long_option_table): Ad const
+	qualifier.
+	* config/tc-alpha.c (md_parse_option): Likewise.
+	* config/tc-arc.c (md_parse_option): Likewise.
+	* config/tc-arm.c (struct arm_long_option_table): Likewise.
+	(md_parse_option): Likewise.
+	* config/tc-avr.c (md_parse_option): Likewise.
+	* config/tc-bfin.c (md_parse_option): Likewise.
+	* config/tc-cr16.c (md_parse_option): Likewise.
+	* config/tc-cris.c (s_cris_arch): Likewise.
+	(md_parse_option): Likewise.
+	* config/tc-crx.c (md_parse_option): Likewise.
+	* config/tc-d10v.c (md_parse_option): Likewise.
+	* config/tc-d30v.c (md_parse_option): Likewise.
+	* config/tc-dlx.c (md_parse_option): Likewise.
+	* config/tc-epiphany.c (md_parse_option): Likewise.
+	* config/tc-fr30.c (md_parse_option): Likewise.
+	* config/tc-frv.c (md_parse_option): Likewise.
+	* config/tc-ft32.c (md_parse_option): Likewise.
+	* config/tc-h8300.c (md_parse_option): Likewise.
+	* config/tc-hppa.c (md_parse_option): Likewise.
+	* config/tc-i370.c (md_parse_option): Likewise.
+	* config/tc-i386.c (md_parse_option): Likewise.
+	* config/tc-i860.c (md_parse_option): Likewise.
+	* config/tc-i960.c (md_parse_option): Likewise.
+	* config/tc-ia64.c (md_parse_option): Likewise.
+	* config/tc-ip2k.c (md_parse_option): Likewise.
+	* config/tc-iq2000.c (md_parse_option): Likewise.
+	* config/tc-lm32.c (md_parse_option): Likewise.
+	* config/tc-m32c.c (md_parse_option): Likewise.
+	* config/tc-m32r.c (md_parse_option): Likewise.
+	* config/tc-m68hc11.c (md_parse_option): Likewise.
+	* config/tc-m68k.c (md_parse_option): Likewise.
+	* config/tc-mcore.c (md_parse_option): Likewise.
+	* config/tc-mep.c (md_parse_option): Likewise.
+	* config/tc-metag.c (struct metag_long_option): Likewise.
+	(md_parse_option): Likewise.
+	* config/tc-microblaze.c (md_parse_option): Likewise.
+	* config/tc-microblaze.h (md_parse_option): Remove prototype.
+	* config/tc-mips.c (md_parse_option): Adjust.
+	* config/tc-mmix.c (md_parse_option): Likewise.
+	* config/tc-mn10200.c (md_parse_option): Likewise.
+	* config/tc-mn10300.c (md_parse_option): Likewise.
+	* config/tc-moxie.c (md_parse_option): Likewise.
+	* config/tc-msp430.c (md_parse_option): Likewise.
+	* config/tc-mt.c (md_parse_option): Likewise.
+		* config/tc-nds32.c (md_parse_option): Likewise.
+		* config/tc-nds32.h (nds32_parse_option): Likewise.
+	* config/tc-nios2.c (md_parse_option): Likewise.
+	* config/tc-ns32k.c (md_parse_option): Likewise.
+	* config/tc-or1k.c (md_parse_option): Likewise.
+	* config/tc-pdp11.c (md_parse_option): Likewise.
+	* config/tc-pj.c (md_parse_option): Likewise.
+	* config/tc-ppc.c (md_parse_option): Likewise.
+	* config/tc-rl78.c (md_parse_option): Likewise.
+	* config/tc-rx.c (md_parse_option): Likewise.
+	* config/tc-s390.c (s390_parse_cpu): Likewise.
+	* config/tc-score.c (md_parse_option): Likewise.
+	* config/tc-sh.c (md_parse_option): Likewise.
+	* config/tc-sparc.c (md_parse_option): Likewise.
+	* config/tc-spu.c (md_parse_option): Likewise.
+	* config/tc-tic30.c (md_parse_option): Likewise.
+	* config/tc-tic4x.c (md_parse_option): Likewise.
+	* config/tc-tic54x.c (md_parse_option): Likewise.
+	* config/tc-tic6x.c (md_parse_option): Likewise.
+	* config/tc-tilegx.c (md_parse_option): Likewise.
+	* config/tc-tilepro.c (md_parse_option): Likewise.
+	* config/tc-v850.c (md_parse_option): Likewise.
+	* config/tc-vax.c (md_parse_option): Likewise.
+	* config/tc-visium.c (struct visium_long_option_table): Likewise.
+	* config/tc-xc16x.c (md_parse_option): Likewise.
+	* config/tc-xgate.c (md_parse_option): Likewise.
+	* config/tc-xstormy16.c (md_parse_option): Likewise.
+	* config/tc-xtensa.c (md_parse_option): Likewise.
+	* config/tc-z80.c (md_parse_option): Likewise.
+	* config/tc-z8k.c (md_parse_option): Likewise.
+	* tc.h (md_parse_option): Likewise.
+
+2016-03-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-bfin.c (gencode): Use XOBNEW obstack_alloc () wrapper.
+	* config/tc-hppa.c (fix_new_hppa): Likewise.
+	(pa_vtable_entry): Likewise.
+	(pa_vtable_inherit): Likewise.
+	* config/tc-m68k.c (md_begin): Likewise.
+
+2016-03-28  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/obj-elf.c (obj_elf_section_name): Return const char *.
+	* config/obj-elf.h (obj_elf_section_name): Adjust.
+	* config/tc-aarch64.c (aarch64_parse_features): Likewise.
+	(aarch64_parse_cpu): Likewise.
+	(aarch64_parse_arch): Likewise.
+	* config/tc-arm.c (arm_parse_extension): Likewise.
+	(arm_parse_cpu): Likewise.
+	(arm_parse_arch): Likewise.
+	* config/tc-nds32.c: Likewise.
+	* config/xtensa-relax.c (parse_special_fn): Likewise.
+	* stabs.c (generate_asm_file): Likewise.
+
+2016-03-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-cr16.c (cr16_assemble): New function.
+	(md_assemble): Call cr16_assemble.
+
+2016-03-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* as.c (parse_args): Adjust.
+	* as.h (flag_size_check): Rename to flag_allow_nonconst_size.
+	* config/obj-elf.c (elf_frob_symbol): Adjust.
+
+2016-03-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* config/tc-sparc.c (sparc_ip): Remove the V9 restriction on ASR
+	registers to be in the 16..31 range.
+
+2016-03-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-microblaze.c (md_assemble): Cast opc to char * when calling
+	frag_var ().
+
+2016-03-24  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-visium.c (md_atof): Localize the string returned on
+	failure.
+
+2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-h8300.c (h8300_elf_section): Add const qualifiers.
+	* config/tc-ia64.c (obj_elf_vms_common): Likewise.
+	* config/tc-m68hc11.c (md_begin): Likewise.
+	(print_opcode_list): Likewise.
+	* config/tc-msp430.c (msp430_section): Likewise.
+	* config/tc-score.c (struct s3_insn_to_dependency): Likewise.
+	(s3_build_dependency_insn_hsh): Likewise.
+	* config/tc-score7.c (struct s7_insn_to_dependency): Likewise.
+	(s7_build_dependency_insn_hsh): Likewise.
+	* config/tc-tic4x.c: Likewise.
+	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+	(subsym_get_arg): Likewise.
+	* config/tc-xtensa.c (struct suffix_reloc_map): Likewise.
+	(get_directive): Likewise.
+	(cache_literal_section): Likewise.
+	* config/xtensa-relax.c: Likewise.
+	* symbols.c (symbol_create): Likewise.
+	(local_symbol_make): Likewise.
+	(symbol_relc_make_expr): Likewise.
+
+2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-pdp11.c (md_assemble): Remove useless if and assignment to
+	str.
+
+2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-sparc.c (sparc_regname_to_dw2regnum): Replace strchr ()
+	call with a switch.
+
+2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-ia64.c (ia64_do_align): Remove.
+	(ia64_cons_align): Call do_align () directly.
+	(dot_proc): Likewise.
+	(stmt_float_cons): Likewise.
+
+2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* listing.c (listing_message): Use XNEW style allocation macros.
+	* read.c (read_a_source_file): Likewise.
+	(read_symbol_name): Likewise.
+	(s_mri_common): Likewise.
+	(assign_symbol): Likewise.
+	(s_reloc): Likewise.
+	(emit_expr_with_reloc): Likewise.
+	(s_incbin): Likewise.
+	(s_include): Likewise.
+	* sb.c (sb_build): Likewise.
+	(sb_check): Likewise.
+
+2016-03-22  Alan Modra  <amodra@gmail.com>
+
+	* write.c (record_alignment): Revert 2016-02-18 change.
+
+2016-03-22  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-alpha.c (load_expression): Replace alloca with xmalloc.
+	(emit_jsrjmp, tc_gen_reloc): Likewise.
+	* config/tc-i370.c (i370_macro): Likewise.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	* configure: Regenerate.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/nps400-0.d: New file.
+	* testsuite/gas/arc/nps400-0.s: New file.
+	* testsuite/gas/arc/nps400-1.d: New file.
+	* testsuite/gas/arc/nps400-1.s: New file.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (find_opcode_match): Move lnflg, and i
+	declarations to start of block.  Reset code on all flags before
+	attempting to match them.  Handle multiple hits on the same flag.
+	Handle flag class.
+	* testsuite/gas/arc/asm-errors.d: New file.
+	* testsuite/gas/arc/asm-errors.err: New file.
+	* testsuite/gas/arc/asm-errors.s: New file.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (cpu_types): Add nps400 entry.
+	(check_zol): Handle nps400.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (arc_select_cpu): Remove use of
+	EF_ARC_CPU_GENERIC.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (arc_target): Delay initialisation until
+	arc_select_cpu.
+	(arc_target_name): Likewise.
+	(arc_features): Likewise.
+	(arc_mach_type): Likewise.
+	(cpu_types): Remove "all" entry.
+	(arc_select_cpu): New function, most of the content is from...
+	(md_parse_option): ... here.  Call new arc_select_cpu.
+	(md_begin): Call arc_select_cpu if needed, default is now arc700.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/inline-data-1.d: Add target restriction.
+	* testsuite/gas/arc/inline-data-2.d: New file.
+
+2016-03-21  Nick Clifton  <nickc@redhat.com>
+
+	* atof-generic.c: Replace use of alloca with call to xmalloc.
+	* cgen.c: Likewise.
+	* dwarf2dbg.c: Likewise.
+	* macro.c: Likewise.
+	* remap.c: Likewise.
+	* stabs.c: Likewise.
+	* symbols.c: Likewise.
+	* config/obj-elf.c: Likewise.
+	* config/tc-aarch64.c: Likewise.
+	* config/tc-arc.c: Likewise.
+	* config/tc-arm.c: Likewise.
+	* config/tc-avr.c: Likewise.
+	* config/tc-ia64.c: Likewise.
+	* config/tc-mips.c: Likewise.
+	* config/tc-msp430.c: Likewise.
+	* config/tc-nds32.c: Likewise.
+	* config/tc-ppc.c: Likewise.
+	* config/tc-sh.c: Likewise.
+	* config/tc-tic30.c: Likewise.
+	* config/tc-tic54x.c: Likewise.
+	* config/tc-xstormy16.c: Likewise.
+	* config/te-vms.c: Likewise.
+	* configure: Regenerate.
+
+2016-03-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* tc-i386.c (f32_1): Change type to unsigned char[].
+	(f32_2): Likewise.
+	(f32_3): Likewise.
+	(f32_4): Likewise.
+	(f32_5): Likewise.
+	(f32_6): Likewise.
+	(f32_7): Likewise.
+	(f32_8): Likewise.
+	(f32_9): Likewise.
+	(f32_10): Likewise.
+	(f32_11): Likewise.
+	(f32_12): Likewise.
+	(f32_13): Likewise.
+	(f32_14): Likewise.
+	(f16_3): Likewise.
+	(f16_4): Likewise.
+	(f16_5): Likewise.
+	(f16_6): Likewise.
+	(f16_7): Likewise.
+	(f16_8): Likewise.
+	(jump_31): Likewise.
+	(f32_patt): Likewise.
+	(f16_patt): Likewise.
+	(alt_3): Likewise.
+	(alt_4): Likewise.
+	(alt_5): Likewise.
+	(alt_6): Likewise.
+	(alt_7): Likewise.
+	(alt_8): Likewise.
+	(alt_9): Likewise.
+	(alt_10): Likewise.
+	(alt_patt): Likewise.
+
+2016-03-18  Nick Clifton  <nickc@redhat.com>
+
+	* doc/c-aarch64.texi (AArch64 Directives): Add descriptions of
+	.cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall,
+	.tlsdescldr and .xword directives.
+
+	PR target/19721
+	* testsuite/gas/aarch64/pr19721.s: New test source file.
+	* testsuite/gas/aarch64/pr19721.d: New test driver file.
+
+	* doc/as.texinfo: Place the target specific command line options
+	into their own man page section.
+
+2016-03-16  Jiong Wang  <jiong.wang@arm.com>
+
+	* config/tc-arm.c (N_S_32): New.
+	(N_F_16_32): Likewise.
+	(N_SUF_32): Support N_F16.
+	(N_IF_32): Likewise.
+	(neon_dyadic_misc): Likewise.
+	(do_neon_cmp): Likewise.
+	(do_neon_cmp_inv): Likewise.
+	(do_neon_mul): Likewise.
+	(do_neon_fcmp_absolute): Likewise.
+	(do_neon_step): Likewise.
+	(do_neon_abs_neg): Likewise.
+	(CVT_FLAVOR_VAR): Likewise.
+	(do_neon_cvt_1): Likewise.
+	(do_neon_recip_est): Likewise.
+	(do_vmaxnm): Likewise.
+	(do_vrint_1): Likewise.
+	(neon_check_type): Check architecture support for FP16 extension.
+	(insns): Update comments.
+	* testsuite/gas/arm/armv8-2-fp16-simd.s: New test source.
+	* testsuite/gas/arm/armv8-2-fp16-simd.d: New testcase for arm mode.
+	* testsuite/gas/arm/armv8-2-fp16-simd-thumb.d: Likewise for thumb mode.
+	* testsuite/gas/arm/armv8-2-fp16-simd-warning.d: New rejection test for
+	arm mode.
+	* testsuite/gas/arm/armv8-2-fp16-simd-warning-thumb.d: Likewise for
+	thumb mode.
+	* testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New expected rejection
+	error file.
+
+2016-03-16  Nick Clifton  <nickc@redhat.com>
+
+	* read.c (emit_expr_with_reloc): Add code check a bignum with
+	nbytes == 1.
+	* config/rx/rx-parse.y (rx_intop): Accept bignum values for sizes
+	other than 32-bits.
+	* testsuite/gas/elf/bignum.s: New test source file.
+	* testsuite/gas/elf/bignum.d: New test driver file.
+	* testsuite/gas/elf/elf.exp: Run the new test.
+
+2016-03-15  Ulrich Drepper  <drepper@gmail.com>
+
+	* doc/c-i386.texi (Register Naming): Update to details of the
+	latest architecture version.
+
+2016-03-10  Mickael Guene  <mickael.guene@st.com>
+
+	PR gas/19744
+	* config/tc-arm.c (do_arit): Protect against bad relocations usage.
+	(do_mov): Likewise.
+	(do_t_add_sub): Allow pcrop relocations for Thumb-2 targets.
+	(do_t_mov_cmp): Likewise.
+	(do_t_add_sub): Protect against bad relocations usage.
+	(do_t_mov_cmp): Likewise.
+	* testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.s: New.
+	* testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.d: New.
+	* testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.s: New.
+	* testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.d: New.
+
+2016-03-09  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-arm.c (neon_alignment_bit): Rename do_align to
+	do_alignment.
+	(do_neon_ld_st_lane): Likewise.
+	(do_neon_ld_dup): Likewise.
+
+2016-03-08  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/inline-data-1.d: New file.
+	* testsuite/gas/arc/inline-data-1.s: New file.
+
+2016-03-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* config/tc-arm.c (arm_cpus): Add cortex-r8.
+	* doc/c-arm.texi: Add cortex-r8.
+
+2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* config/tc-arc.c: Add const qualifiers.
+	* config/tc-h8300.c (md_begin): Likewise.
+	* config/tc-ia64.c (print_prmask): Likewise.
+	* config/tc-msp430.c (msp430_operands): Likewise.
+	* config/tc-nds32.c (struct suffix_name): Likewise.
+	(struct nds32_parse_option_table): Likewise.
+	(struct nds32_set_option_table): Likewise.
+	(do_pseudo_pushpopm): Likewise.
+	(do_pseudo_pushpop_stack): Likewise.
+	(nds32_relax_relocs): Likewise.
+	(nds32_flag): Likewise.
+	(struct nds32_hint_map): Likewise.
+	(nds32_find_reloc_table): Likewise.
+	(nds32_match_hint_insn): Likewise.
+	* config/tc-s390.c: Likewise.
+	* config/tc-sh.c (get_specific): Likewise.
+	* config/tc-tic30.c: Likewise.
+	* config/tc-tic4x.c (tic4x_inst_add): Likewise.
+	(tic4x_indirect_parse): Likewise.
+	* config/tc-vax.c (vax_cons): Likewise.
+	* config/tc-z80.c (struct reg_entry): Likewise.
+	* config/tc-epiphany.c (md_assemble): Adjust.
+	(epiphany_assemble): New function.
+	(epiphany_elf_section_rtn): Call do_align directly.
+	(epiphany_elf_section_text): Likewise.
+	* config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise.
+	(ip2k_elf_section_text): Likewise.
+	* read.c (do_align): Make it not static.
+	* read.h (do_align): New prototype.
+
+2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* config/tc-arm.c (aeabi_set_public_attributes): Emit attribute
+	for ARMv8.1 AdvSIMD use.
+	* testsuite/gas/arm/attr-march-armv8-a+rdma.d: New.
+	* testsuite/gas/arm/attr-march-armv8_1-a+simd.d: New.
+
+2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* config/gas/tc-arm.c (fpu_neon_ext_v8_1): Restrict to the ARMv8.1 RDMA
+	feature.
+	(record_feature_use): New.
+	(mark_feature_used): Use record_feature_use.
+	(do_neon_qrdmlah): New.
+	(insns): Use do_neon_qrdmlah for vqrdmlah and vqrdmlsh and
+	variants.
+	(arm_extensions): Put into alphabetical order.  Re-indent "simd"
+	and "rdma" entries.  Fix the incorrect merge value for "+rdma".
+	* testsuite/gas/arm/armv8-a+rdma-warning.d: New.
+	* testsuite/gas/arm/armv8-a+rdma.d: Add assembler command line options.
+	Make source file explicit.
+	* testsuite/gas/arm/armv8-a+rdma.l: New.
+	* testsuite/gas/arm/armv8-a+rdma.s: Remove .arch and .arch_extension
+	directives.  Fix white-space.
+	* testsuite/gas/arm/armv8_1-a+simd.d: New.
+
+2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/gas/i386/x86_64-intel.d: Adjusted for COFF.
+
+2016-02-29  Cupertino Miranda  <cmiranda@synopsys.com>
+	    Claudiu Zissulescu  <Claudiu.Zissulescu@synopsys.com>
+
+	* config/tc-arc.c (arc_extra_reloc): Change size to 0.
+	(tc_arc_fix_adjustable): Changed default return value to 1.
+	* testsuite/gas/arc/j.d: Updated expected symbol
+	* testsuite/gas/arc/jl.d: Likewise
+	* testsuite/gas/arc/relax-avoid1.d: Likewise
+	* testsuite/gas/arc/st.d: Likewise
+
+2016-02-29  Claudiu Zissulescu  <Claudiu.Zissulescu@synopsys.com>
+
+	* config/tc-arc.c: Enable code density instructions for ARC EM.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19645
+	* NEWS: Mention --enable-elf-stt-common and --elf-stt-common=
+	for ELF assemblers.
+	* as.c (flag_use_elf_stt_common): New.
+	(show_usage): Add --elf-stt-common=.
+	(option_values): Add OPTION_ELF_STT_COMMON.
+	(std_longopts): Add --elf-stt-common=.
+	(parse_args): Handle --elf-stt-common=.
+	* as.h (flag_use_elf_stt_common): New.
+	* config.in: Regenerated.
+	* configure: Likewise.
+	* configure.ac: Add --enable-elf-stt-common and define
+	DEFAULT_GENERATE_ELF_STT_COMMON.
+	* gas/write.c (write_object_file): Set BFD_CONVERT_ELF_COMMON
+	and BFD_USE_ELF_STT_COMMON if flag_use_elf_stt_common is set.
+	* doc/as.texinfo: Document --elf-stt-common=.
+	* testsuite/gas/elf/common3.s: New file.
+	* testsuite/gas/elf/common3a.d: Likewise.
+	* testsuite/gas/elf/common3b.d: Likewise.
+	* testsuite/gas/elf/common4.s: Likewise.
+	* testsuite/gas/elf/common4a.d: Likewise.
+	* testsuite/gas/elf/common4b.d: Likewise.
+	* testsuite/gas/i386/dw2-compress-3b.d: Likewise.
+	* testsuite/gas/i386/dw2-compressed-3b.d: Likewise.
+	* testsuite/gas/elf/elf.exp: Run common3a, common3b, common4a
+	and common4b.
+	* testsuite/gas/i386/dw2-compress-3.d: Renamed to ...
+	* testsuite/gas/i386/dw2-compress-3a.d: This.  Pass
+	--elf-stt-common=no to as.
+	* testsuite/gas/i386/dw2-compressed-3.d: Renamed to ...
+	* testsuite/gas/i386/dw2-compressed-3a.d: This.  Pass
+	--elf-stt-common=no to as.
+	* testsuite/gas/i386/i386.exp: Run dw2-compress-3a,
+	dw2-compress-3b, dw2-compressed-3a and dw2-compressed-3b instead
+	of dw2-compress-3 and dw2-compressed-3.
+
+2016-02-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* as.c (select_emulation_mode): Add const qualifiers.
+	* as.h: Likewise.
+	* config/bfin-defs.h: Likewise.
+	* config/bfin-parse.y: Likewise.
+	* config/rx-parse.y: Likewise.
+	* config/tc-aarch64.c (struct aarch64_option_table): Likewise.
+	(struct aarch64_cpu_option_table): Likewise.
+	(struct aarch64_arch_option_table): Likewise.
+	(struct aarch64_option_cpu_value_table): Likewise.
+	(struct aarch64_long_option_table): Likewise.
+	(struct aarch64_option_abi_value_table): Likewise.
+	* config/tc-arm.c (struct reloc_entry): Likewise.
+	(tc_gen_reloc): Likewise.
+	(struct arm_option_table): Likewise.
+	(struct arm_legacy_option_table): Likewise.
+	(struct arm_cpu_option_table): Likewise.
+	(struct arm_arch_option_table): Likewise.
+	(struct arm_option_extension_value_table): Likewise.
+	(struct arm_option_fpu_value_table): Likewise.
+	(struct arm_option_value_table): Likewise.
+	(struct arm_long_option_table): Likewise.
+	* config/tc-avr.c (struct avr_opcodes_s): Likewise.
+	(struct mcu_type_s): Likewise.
+	(struct exp_mod_s): Likewise.
+	(avr_operand): Likewise.
+	(avr_operands): Likewise.
+	* config/tc-d10v.c (md_begin): Likewise.
+	* config/tc-dlx.c: Likewise.
+	* config/tc-fr30.c (fr30_is_colon_insn): Likewise.
+	* config/tc-ft32.c (parse_condition): Likewise.
+	* config/tc-h8300.c (do_a_fix_imm): Likewise.
+	* config/tc-hppa.c (pa_ip): Likewise.
+	(hppa_regname_to_dw2regnum): Likewise.
+	* config/tc-i370.c (i370_elf_suffix): Likewise.
+	* config/tc-i960.c (struct tabentry): Likewise.
+	* config/tc-m32r.c: Likewise.
+	* config/tc-m68k.c: Likewise.
+	* config/tc-m68k.h: Likewise.
+	* config/tc-mcore.c (parse_psrmod): Likewise.
+	* config/tc-metag.c (struct metag_core_option): Likewise.
+	(struct metag_long_option): Likewise.
+	* config/tc-microblaze.c: Likewise.
+	* config/tc-mips.c (macro): Likewise.
+	* config/tc-mn10200.c: Likewise.
+	* config/tc-mn10300.c: Likewise.
+	* config/tc-msp430.c (struct rcodes_s): Likewise.
+	(struct hcodes_s): Likewise.
+	(md_parse_option): Likewise.
+	* config/tc-ns32k.c (struct ns32k_option): Likewise.
+	(optlist): Likewise.
+	* config/tc-ppc.c (ppc_elf_suffix): Likewise.
+	(tc_ppc_regname_to_dw2regnum): Likewise.
+	* config/tc-ppc.h: Likewise.
+	* config/tc-rl78.c: Likewise.
+	* config/tc-rx.c (struct cpu_type): Likewise.
+	* config/tc-sh.c (sh_regname_to_dw2regnum): Likewise.
+	* config/tc-sparc.c (struct priv_reg_entry): Likewise.
+	(sparc_ip): Likewise.
+	* config/tc-spu.c (insn_fmt_string): Likewise.
+	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+	* config/tc-v850.c: Likewise.
+	* config/tc-visium.c (struct visium_arch_option_table): Likewise.
+	(struct visium_long_option_table): Likewise.
+	* config/tc-xgate.c: Likewise.
+	* config/tc-z8k.c: Likewise.
+	* read.c (add_include_dir): Likewise.
+	* read.h: Likewise.
+
+2016-02-25  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/all/gas.exp: Change target pattern to cover
+	arceb-*.
+	* testsuite/gas/all/redef3.d: Likewise.
+	* testsuite/gas/elf/elf.exp: Likewise.
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* config/tc-arm.c (BAD_FP16): New error message macro.
+	(do_scalar_fp16_v82_encode): Change the coproc field to 9 for armv8.2
+	fp16 scalar instructions.
+	(neon_check_type): Allow different size from key.
+	(do_vfp_nsyn_add_sub): Add support SE_H shape support.
+	(try_vfp_nsyn): Likewise.
+	(do_vfp_nsyn_mla_mls): Likewise.
+	(do_vfp_nsyn_fma_fms): Likewise.
+	(do_vfp_nsyn_ldm_stm): Likewise
+	(do_vfp_nsyn_sqrt): Likewise
+	(do_vfp_nsyn_div): Likewise
+	(do_vfp_nsyn_nmul): Likewise.
+	(do_vfp_nsyn_cmp): Likewise.
+	(do_neon_shll): Likewise.
+	(do_vfp_nsyn_cvt_fpv8): Likewise.
+	(do_neon_cvttb_2): Likewise.
+	(do_neon_mov): Likewise.
+	(do_neon_rshift_round_imm): Likewise.
+	(do_neon_ldr_str): Likewise.
+	(do_vfp_nsyn_fpv8): Likewise.
+	(do_vmaxnm): Likewise.
+	(do_vrint_1): Likewise.
+	(insns): New entry for vins, vmovx.
+	(md_apply_fix): Left shift 1 bit for fp16 vldr/vstr.
+	* testsuite/gas/arm/armv8-2-fp16-scalar-thumb.d: New.
+	* testsuite/gas/arm/armv8-2-fp16-scalar.d: New.
+	* testsuite/gas/arm/armv8-2-fp16-scalar.s: New.
+	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.s: New
+	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.d: New
+	* testsuite/gas/arm/armv8-2-fp16-scalar-bad.l: New
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* config/tc-arm.c (NEON_ENC_TAB): Add fp16 instruction shape.
+	(neon_shape_class): New SC_HALF.
+	(neon_shape_el): New SE_H.
+	(neon_shape_el_size): New size for SE_H.
+	(N_F_ALL): New macro to aggregate N_F16, N_F32, N_64.
+	(neon_select_shape): Add SE_H support code.
+	(el_type_of_type_chk): Use N_F_ALL.
+	(do_vfp_nsyn_cvt): Add SE_H shape support.
+	(do_neon_cvtz): Likewise.
+	(do_neon_cvt_1): Likewise.
+	(do_neon_cvttb_1): Likewise.
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* testsuite/gas/arm/copro.d: Adjust output.
+	* testsuite/gas/arm/copro.s: Adjust co-processor num.
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* testsuite/gas/arm/mask_1.d: New.
+	* testsuite/gas/arm/mask_1.s: New.
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11.
+	* testsuite/gas/arm/copro.d: Update.
+
+2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/tc-arm.c (arm_cpus): Add entry for cortex-a32.
+	* doc/c-arm.texi (ARM Options): Document cortex-a32.
+
+2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* doc/c-arm.texi (ARM Options): Document cortex-a17.
+
+2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/gas/elf/elf.exp: Skip tests for common directive on
+	hpux.
+
+2016-02-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* output-file.c (output_file_create): Make file name argument const.
+	(output_file_close): Likewise.
+	* output-file.h (output_file_create): Adjust.
+	(output_file_close): Likewise.
+	* depend.c (quote_string_for_make): Make src argument const char *.
+	(register_dependency): Likewise.
+	(wrap_output): Likewise.
+	* as.h (register_dependency): Adjust.
+	* config/tc-xtensa.c (finish_vinsn): Remove unnecessary calls to
+	as_where ();
+	* symbols.c (S_SET_EXTERNAL): Likewise.
+	* input-scrub.c (as_where): Return the file name.
+	* as.h (as_where): Adjust prototype.
+	* app.c (do_scrub_chars): Adjust.
+	* cond.c (s_elseif): Likewise.
+	(s_else): Likewise.
+	(initialize_cframe): Likewise.
+	* config/obj-coff.c (obj_coff_init_stab_section): Likewise.
+	* config/obj-elf.c (obj_elf_init_stab_section): Likewise.
+	* config/obj-som.c (obj_som_init_stab_section): Likewise.
+	* config/tc-aarch64.c (output_info): Likewise.
+	* config/tc-ia64.c (md_assemble): Likewise.
+	(dot_alias): Likewise.
+	* config/tc-m68k.c (m68k_frob_label): Likewise.
+	* config/tc-mmix.c (s_bspec): Likewise.
+	(mmix_handle_mmixal): Likewise.
+	* config/tc-rx.c (rx_include): Likewise.
+	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+	(tic54x_adjust_symtab): Likewise.
+	* config/tc-xtensa.c (directive_push): Likewise.
+	(xtensa_sanity_check): Likewise.
+	(xtensa_relax_frag): Likewise.
+	(md_convert_frag): Likewise.
+	(tinsn_to_slotbuf): Likewise.
+	* dwarf2dbg.c (dwarf2_where): Likewise.
+	* ecoff.c (add_file): Likewise.
+	(ecoff_generate_asm_lineno): Likewise.
+	* expr.c (make_expr_symbol): Likewise.
+	* frags.c (frag_new): Likewise.
+	(frag_var_init): Likewise.
+	* listing.c (listing_newline): Likewise.
+	* messages.c (identify): Likewise.
+	(as_show_where): Likewise.
+	(as_warn_internal): Likewise.
+	(as_bad_internal): Likewise.
+	* read.c (s_irp): Likewise.
+	(s_macro): Likewise.
+	(s_reloc): Likewise.
+	* stabs.c (stabs_generate_asm_file): Likewise.
+	(stabs_generate_asm_lineno): Likewise.
+	(stabs_generate_asm_func): Likewise.
+	* write.c (fix_new_internal): Likewise.
+	* as.h (PRINTF_WHERE_LIKE): Make file name argument const.
+	(as_warn_value_out_of_range): Adjust prototype.
+	(as_bad_value_out_of_range): Adjust prototype.
+	* messages.c (identify): Make file name argument const char *.
+	(as_warn_internal): Likewise.
+	(as_warn_where): Likewise.
+	(as_bad_internal): Likewise.
+	(as_bad_where): Likewise.
+	(as_internal_value_out_of_range): Likewise.
+	(as_warn_value_out_of_range): Likewise.
+	(as_bad_value_out_of_range): Likewise.
+	* as.h (found_comment_file): Change type to const char *.
+	* cond.c (file_line::file): Likewise.
+	* config/obj-coff.c (obj_coff_init_stab_section): Make variable const.
+	* config/obj-elf.c (obj_elf_init_stab_section): Likewise.
+	* config/obj-som.c (obj_som_init_stab_section): Likewise.
+	* config/tc-aarch64.c (output_info): Likewise.
+	* config/tc-alpha.c (insert_operand): Likewise.
+	* config/tc-arc.c (insert_operand): Likewise.
+	* config/tc-d30v.c (check_size): Likewise.
+	* config/tc-ia64.c (struct alias): Likewise.
+	* config/tc-m68k.c (struct label_line): Likewise.
+	* config/tc-mcore.c (md_apply_fix): Likewise.
+	* config/tc-microblaze.c (md_estimate_size_before_relax): Likewise.
+	* config/tc-mips.c (mips16_immed): Likewise.
+	* config/tc-mmix.c (mmix_handle_mmixal): Likewise.
+	* config/tc-ppc.c (ppc_insert_operand): Likewise.
+	* config/tc-rx.c (rx_include): Likewise.
+	* config/tc-s390.c (s390_insert_operand): Likewise.
+	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
+	(tic54x_adjust_symtab): Likewise.
+	* config/tc-tilegx.c (insert_operand): Likewise.
+	(apply_special_operator): Likewise.
+	* config/tc-tilepro.c (insert_operand): Likewise.
+	* config/tc-xtensa.c (directive_push): Likewise.
+	* ecoff.c (add_file): Likewise.
+	(ecoff_generate_asm_lineno): Likewise.
+	* listing.c (listing_newline): Likewise.
+	* read.c (s_irp): Likewise.
+	* write.c (install_reloc): Likewise.
+	* write.h (struct fix): Likewise.
+	* input-file.c (file_name): Change type to const char *.
+	(saved_file::file_name): Likewise.
+	(input_file_open): Change type of argument to const char *.
+	* input-file.h (input_file_open): Adjust.
+	* input-scrub.c (logical_input_file): change type to const char *.
+	(physical_input_file): Likewise.
+	(struct input_save): Adjust.
+	(input_scrub_push): Adjust.
+	(input_scrub_begin): Adjust.
+	(as_where): Adjust.
+	* input-scrub.c (input_scrub_new_file): Make file name argument const.
+	(input_scrub_include_file): Likewise.
+	(new_logical_line_flags): Likewise.
+	(new_logical_line): Likewise.
+	* as.h: Adjust.
+	* frags.h (struct frag): Change type of fr_file to const char *.
+	* expr.c (expr_symbol_where): Change type of file argument to
+	const char **.
+	* expr.h (expr_symbol_where): Likewise.
+	* config/tc-i370.c (md_apply_fix): adjust.
+	* config/tc-mmix.c (mmix_md_end): Likewise.
+	* config/tc-ppc.c (md_apply_fix): Likewise.
+	* config/tc-s390.c (md_apply_fix): Likewise.
+	* symbols.c (report_op_error): Likewise.
+	(resolve_symbol_value): Likewise.
+	* config/tc-ia64.c (slot::src_file): Change type to const char *.
+	(rsrc::file): Likewise.
+	* config/tc-xtensa.c (xtensa_sanity_check): Change type of variable to
+	const char *.
+	(xtensa_relax_frag): Likewise.
+	(md_convert_frag): Likewise.
+	(tinsn_to_slotbuf): Likewise.
+	* expr.c (expr_symbol_line): Likewise.
+	* macro.c (define_macro): Likewise.
+	* macro.h (macro_struct): Likewise.
+	* messages.c (as_show_where): Likewise.
+	* read.c (s_macro): Likewise.
+	* stabs.c (stabs_generate_asm_file): Likewise.
+	(generate_asm_file): Likewise.
+	(stabs_generate_asm_lineno): Likewise.
+	* write.h (struct reloc_list): Likewise.
+	* input-scrub.c (as_where): Change return type to const char *.
+	* as.h (as_wheree): Adjust.
+
+2016-02-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* write.c (compress_debug): Move BFD compression bits setting
+	to ...
+	(write_object_file): Here.
+
+2016-02-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (register_number): Check RegVRex.
+	* testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd
+	with %zmm19 and %zmm3.
+	* testsuite/gas/i386/x86-64-avx512f-intel.d: Updated.
+	* testsuite/gas/i386/x86-64-avx512f.d: Likewise.
+
+2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
+	    Jiong Wang  <jiong.wang@arm.com>
+
+	* config/tc-arm.c (arm_ext_fp16): New.
+	(arm_extensions): New entry for "fp16".
+
+2016-02-19  Nick Clifton  <nickc@redhat.com>
+
+	PR 19630
+	* read.c (read_a_source_file): Check for assemble_one returning
+	with input_line_pointer set to NULL.
+
+2016-02-19  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* listing.c (rebuffer_line): Change return type to void.
+
+	* symbols.c (decode_local_label_name): Make type a const char *.
+	* listing.c (print_source): Make type of p const char *.
+	(print_line): Make type of string const	char *.
+	(buffer_line): Return const char *.
+	(title): Make type const char *.
+	(subtitle): Likewise.
+	(listing_listing): Make type of p const char *.
+	* messages.c (as_internal_value_out_of_range): Make type of prefix
+	const char *.
+	* stabs.c (s_stab_generic): make type of stab_secname, stabstr_secname
+	and string const char *.
+	* read.c (_bfd_rel): Make type of name const char *.
+	* app.c (out_string): Change type to const char *.
+	(struct app_save::out_string): Likewise.
+
+2016-02-18  Dan Gisselquist  <dgisselq@verizon.net>
+	    Nick Clifton  <nickc@redhat.com>
+
+	* read.c (finish_bundle): Avoid recording a negative alignment.
+	(do_align): Use unsigned values for n, len and max.  Only create
+	a frag if the alignment requirement is greater than the minimum
+	byte alignment.  Avoid recording a negative alignment.
+	(s_align): Use unsigned values where appropriate.
+	(bss_alloc): Use an unsigned value for the alignment.
+	(sizeof_sleb128): Add a comment noting that we encode one octet
+	per byte, regardless of the value of OCTETS_PER_BYTE_POWER.
+	(emit_leb129_expr): Abort if the emitted encoding was longer than
+	expected.
+	* read.h (output_leb128): Update prototype.
+	(sizeof_leb128): Update prototype.
+	(bss_alloc): Update prototype.
+	* write.c (record_alignment): Use an unsigned value for the
+	alignment.  Do not record alignments less than the minimum
+	alignment for a byte.
+	* write.h (record_alignment): Update prototype.
+
+2016-02-17  Max Filippov  <jcmvbkbc@gmail.com>
+
+	* config/tc-xtensa.c (xtensa_move_literals): Fix check for
+	.init.literal/.fini.literal section name.
+	* testsuite/gas/xtensa/all.exp: Add init-fini-literals to the
+	list of xtensa tests.
+	* testsuite/gas/xtensa/init-fini-literals.d: New file:
+	init-fini-literals test result patterns.
+	* testsuite/gas/xtensa/init-fini-literals.s: New file:
+	init-fini-literals test.
+
+2016-02-17  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-msp430.c (msp430_mcu_data): Sync with data from TI's
+	devices.csv file as of March 2016.
+
+2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (tc_arc_frame_initial_instructions): New
+	function.
+	(tc_arc_regname_to_dw2regnum): Likewise.
+	* config/tc-arc.h (TARGET_USE_CFIPOP): Define
+	(tc_cfi_frame_initial_instructions): Likewise.
+	(tc_regname_to_dw2regnum): Likewise.
+	* testsuite/gas/cfi/cfi-arc-1.d: New file.
+	* testsuite/gas/cfi/cfi-arc-1.s: Likewise.
+	* testsuite/gas/cfi/cfi.exp: Allow running tests for arc.
+
+2016-02-16  Trevor Saunders  <tbsaunde@tbsaunde.org>
+
+	* doc/internals.texi (S_IS_EXTERN): Remove.
+
+2016-02-16  Nick Clifton  <nickc@redhat.com>
+
+	* doc/as.texinfo (Section): Fix up texinfo snafus in previous
+	update.
+
+2016-02-16  Renlin Li  <renlin.li@arm.com>
+
+	PR gas/19620
+	* config/tc-aarch64.c (parse_half): Remove restrictions on symbol name.
+	* testsuite/gas/aarch64/movw_label.d: New.
+	* testsuite/gas/aarch64/movw_label.s: New.
+
+2016-02-15  Vinay Kumar G. <Vinay.G@kpit.com>
+
+	PR gas/19556
+	* config/rx-parse.y (MOV):  Opcode generation for index
+	register addressing mode.
+	* testsuite/gas/rx/rx.exp: Updated for new testcase.
+	* testsuite/gas/rx/pr19665.s: New file.
+	* testsuite/gas/rx/pr19665.s: New file.
+	* testsuite/gas/rx/mov.d: Update expected output.
+
+2016-02-15  Nick Clifton  <nickc@redhat.com>
+
+	* doc/as.texinfo (.section): Document that numeric values can now
+	be used for the flags and type fields of the ELF target's .section
+	directive.  Add notes about the restrictions on setting flags and
+	types.
+	* config/obj-elf.c (obj_elf_change_section): Allow known sections
+	to be given processor specific section types.  Allow processor and
+	application specific flags of a section to be set after
+	definition.
+	(obj_elf_parse_section_letters): Handle parsing numeric values.
+	(obj_elf_section_type): Handle parsing numeric values.
+	(obj_elf_section): Allow numeric type values.
+	* config/obj-elf.h (obj_elf_change_section): Update prototype.
+	* testsuite/gas/elf/section10.d: New test.
+	* testsuite/gas/elf/section10.s: Source file for new test.
+	* testsuite/gas/elf/elf.exp: Run the new test.
+	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon
+	the description of the flags produced by readelf.
+	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
+	* NEWS: Mention the new feature.
+
+2016-02-11  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/19614
+	* dw2gencfi.c (cfi_sections_set): Delay setting this variable
+	until it is actually used.
+	(cfi_set_sections): Set cfi_sections_set to true.
+	(dot_cfi_startproc): Likewise.
+	(dot_cfi_endproc): Likewise.
+	(dot_cfi_fde_data): Likewise.
+	(cfi_finish): Likewise.
+	(dot_cfi_sections): Do not set cfi_sections_set.
+	* doc/as.texinfo (.cfi_sections): Note that targets can provide
+	their own cfi section name.  Also note that the directive can be
+	reissued provided that CFI generation has not started.
+	* testsuite/gas/mips/compact-eh-err2.s: Add .cfi_startproc and
+	.cfi_endproc directives so that the redefinition of .cfi_sections
+	will trigger the generation of the error message.
+	* testsuite/gas/mips/compact-eh-err2.l: Update expected line
+	number of error message.
+
+2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
+	    Janek van Oirschot <jvanoirs@synopsys.com>
+
+	* config/tc-arc.h (TC_FRAG_TYPE, TC_PCREL_ADJUST, MAX_INSN_ARGS)
+	(MAX_INSN_FLGS, MAX_FLAG_NAME_LENGHT, TC_GENERIC_RELAX_TABLE):
+	Define.
+	(arc_flags, arc_relax_type): New structure.
+	* config/tc-arc.c (FRAG_MAX_GROWTH, RELAX_TABLE_ENTRY)
+	(RELAX_TABLE_ENTRY_MAX): New define.
+	(relaxation_state, md_relax_table, arc_relaxable_insns)
+	(arc_num_relaxable_ins): New variable.
+	(rlx_operand_type, arc_rlx_types): New enums.
+	(arc_relaxable_ins): New structure.
+	(OPTION_RELAX): New option.
+	(arc_insn): New relax member.
+	(arc_flags): Remove.
+	(relax_insn_p): New function.
+	(apply_fixups): Likewise.
+	(relaxable_operand): Likewise.
+	(may_relax_expr): Likewise.
+	(relaxable_flag): Likewise.
+	(arc_pcrel_adjust): Likewise.
+	(md_estimate_size_before_relax): Implement.
+	(md_convert_frag): Likewise.
+	(md_parse_option): Handle new mrelax option.
+	(md_show_usage): Likewise.
+	(assemble_insn): Set relax member.
+	(emit_insn0): New function.
+	(emit_insn1): Likewise.
+	(emit_insn): Handle relaxation case.
+	* NEWS: Mention the new relaxation option.
+	* doc/c-arc.texi (ARC Options): Document new mrelax option.
+	* doc/as.texinfo (Target ARC Options): Likewise.
+	* testsuite/gas/arc/relax-avoid1.d: New file.
+	* testsuite/gas/arc/relax-avoid1.s: Likewise.
+	* testsuite/gas/arc/relax-avoid2.d: Likewise.
+	* testsuite/gas/arc/relax-avoid2.s: Likewise.
+	* testsuite/gas/arc/relax-avoid3.d: Likewise.
+	* testsuite/gas/arc/relax-avoid3.s: Likewise.
+	* testsuite/gas/arc/relax-b.d: Likewise.
+	* testsuite/gas/arc/relax-b.s: Likewise.
+
+2016-02-08  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-ia64.c (dot_prologue): Fix formatting.
+
+2016-02-04  Nick Clifton  <nickc@redhat.com>
+
+	* config/obj-elf.c (obj_elf_change_section): Remove support for
+	ARM NOREAD sections.
+	* config/tc-arm.c (arm_elf_section_letter): Delete.
+	* config/tc-arm.h (md_elf_section_letter): Delete.
+	* doc/c-arm.texi (ARM Section Attribute): Delete section.
+	* testsuite/gas/arm/section-execute-only.d: Delete.
+	* testsuite/gas/arm/section-execute-only.s: Delete.
+
+2016-02-04  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19561
+	* config/tc-msp430.c (msp430_operands): Remove case 7.  Use case 2
+	to handle encoding of RRUX instruction.
+	* testsuite/gas/msp430/msp430x.s: Add more tests of the extended
+	shift instructions.
+	* testsuite/gas/msp430/msp430x.d: Update expected disassembly.
+
+2016-02-03  Max Filippov  <jcmvbkbc@gmail.com>
+
+	* config/tc-xtensa.c (md_apply_fix): Mark BFD_RELOC_XTENSA_DIFF*
+	substitutions for BFD_RELOC_* as unsigned.
+	* testsuite/gas/xtensa/all.exp: Add loc to list of xtensa tests.
+	* testsuite/gas/xtensa/loc.d: New file: loc test result	patterns.
+	* testsuite/gas/xtensa/loc.s: New file: loc test.
+
+2016-02-03  Kevin Buettner  <kevinb@redhat.com>
+
+	* config/tc-msp430.h (DWARF2_ADDR_SIZE): Set to 4.
+
+2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/19520
+	* NEWS: Mention new command line option -mrelax-relocations and
+	new configure option --enable-x86-relax-relocations for x86
+	target.
+	* config.in: Regenerated.
+	* configure.ac: Add --enable-x86-relax-relocations.
+	(ac_default_x86_relax_relocations): New.  Default to 1 except
+	for x86 Solaris targets older than Solaris 12.
+	(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
+	* configure: Likewise.
+	* config/tc-i386.c (generate_relax_relocations): New.
+	(OPTION_MRELAX_RELOCATIONS): Likewise.
+	(output_disp): Don't generate relax relocations if
+	generate_relax_relocations is 0.
+	(md_longopts): Add -mrelax-relocations.
+	(md_show_usage): Likewise.
+	(md_parse_option): Handle OPTION_MRELAX_RELOCATIONS.
+	* doc/c-i386.texi: Document -mrelax-relocations=.
+	* testsuite/gas/i386/got-no-relax.d: New file.
+	* testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise.
+	* testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as.
+	* testsuite/gas/i386/localpic.d: Likewise.
+	* testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
+	* testsuite/gas/i386/reloc32.d: Likewise.
+	* testsuite/gas/i386/x86-64-gotpcrel.d: Likewise.
+	* testsuite/gas/i386/x86-64-localpic.d: Likewise.
+	* testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
+	* testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
+	* testsuite/gas/i386/i386.exp: Run got-no-relax and
+	x86-64-gotpcrel-no-relax.
+
+2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* NEWS: Mention new command line option -mfence-as-lock-add=yes
+	for x86 target.
+
+2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* NEWS: Remove duplicated marker for 2.26.
+
+2016-02-02  Renlin Li  <renlin.li@arm.com>
+
+	* testsuite/gas/arm/thumb2_it_search.d: Skip non-elf targets.
+
+2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/ip2k/allinsn.d: New file.
+	* testsuite/gas/ip2k/allinsn.s: New file.
+	* testsuite/gas/ip2k/ip2k-allinsn.exp: New file.
+
+2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/epiphany/addr-syntax.d: Add explicit 0 offset to
+	some load instructions.
+	* testsuite/gas/epiphany/allinsn.d: Likewise.
+	* testsuite/gas/epiphany/regression.d: Likewise.
+
+2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/epiphany/addr-syntax.d: Remove unneeded '.l'
+	suffixes from instruction mnemonics in expected output.
+	* testsuite/gas/epiphany/allinsn.d: Likewise.
+	* testsuite/gas/epiphany/regression.d: Likewise.
+	* testsuite/gas/epiphany/sample.d: Likewise.
+
+2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/epiphany/addr-syntax.d: Update expected register
+	names.
+	* testsuite/gas/epiphany/allinsn.d: Likewise.
+	* testsuite/gas/epiphany/sample.d: Likewise.
+
+2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/epiphany/sample.d: Update expected output.
+
+2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (md_apply_fix): Allow addendum.
+	(arc_reloc_op): Allow complex expressions for tpoff.
+	(md_apply_fix): Handle resolved TLS local symbol.
+	* testsuite/gas/arc/tls-relocs1.d: New file.
+	* testsuite/gas/arc/tls-relocs1.s: Likewise.
+
+2016-02-01  Loria  <Loria@phantasia.org>
+
+	PR target/19311
+	* config/tc-arm.c (encode_arm_immediate): Recode to improve
+	efficiency and avoid an LLVM loop optimization bug.
+
+2016-02-01  Nick Clifton  <nickc@redhat.com>
+
+	* config/tc-microblaze.c (parse_imm): Fix compile time warning
+	message extending a negative 32-bit value into a larger signed
+	value on a 32-bit host.
+
+2016-01-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/19532
+	* configure.ac (compressed_debug_sections): Replace == with =.
+	* configure: Regenerated.
+
+2016-01-29  Andrew Senkevich  <andrew.senkevich@intel.com>
+	    H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (avoid_fence): New.
+	(output_insn): Encode as lock addl $0x0, (%{r,e}sp) if avoid_fence
+	is true.
+	(OPTION_FENCE_AS_LOCK_ADD): New.
+	(md_longopts): Add -mfence-as-lock-add.
+	(md_parse_option): Handle -mfence-as-lock-add.
+	(md_show_usage): Add -mfence-as-lock-add=[no|yes].
+	* doc/c-i386.texi (-mfence-as-lock-add): Document.
+	* testsuite/gas/i386/i386.exp: Run new tests.
+	* testsuite/gas/i386/fence-as-lock-add.s: New.
+	* testsuite/gas/i386/fence-as-lock-add-yes.d: Likewise.
+	* testsuite/gas/i386/fence-as-lock-add-no.d: Likewise.
+	* testsuite/gas/i386/x86-64-fence-as-lock-add-yes.d: Likewise.
+	* testsuite/gas/i386/x86-64-fence-as-lock-add-no.d: Likewise.
+
+2016-01-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* configure.ac (compressed_debug_sections): Remove trailing `]'.
+	* configure: Regenerated.
+
+2016-01-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (OPTION_OMIT_LOCK_PREFIX): Renamed to ...
+	(OPTION_MOMIT_LOCK_PREFIX): This.
+	(md_longopts): Updated.
+	(md_parse_option): Likewise.
+
+2016-01-25  Catherine Moore  <clm@codesourcery.com>
+
+	* config/mips/tc-mips.c (md_begin): Avoid gp-relative addressing
+	if abicalls are in effect.
+	* testsuite/gas/mips/sdata-gp.s: New test.
+	* testsuite/gas/mips/sdata-gp.d: New expected output
+	* testsuite/gas/mips/mips.exp: Run new test.
+
+2016-01-25  Renlin Li  <renlin.li@arm.com>
+
+	* testsuite/gas/arm/thumb2_it_search.d: New.
+	* testsuite/gas/arm/thumb2_it_search.s: New.
+
+2016-01-21  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/19454
+	* testsuite/gas/arm/mapshort-elf.d: Fix expected output to cope
+	with arm-netbsdelf target.
+	* testsuite/gas/arm/blx-bl-convert.d: Skip for netbsdelf.
+
+2016-01-20  Nick Clifton  <nickc@redhat.com>
+
+	PR 19456
+	* testsuite/gas/arm/weakdef-1.d: Skip for VxWorks.
+	* testsuite/gas/arm/blx-bl-convert.d
+	* testsuite/gas/arm/plt-1.d: Likewise.
+	* testsuite/gas/arm/reloc-bad.d: Likewise.
+	* testsuite/gas/arm/thumb-w-good.d: Likewise.
+	* testsuite/gas/arm/thumb2_pool.d: Likewise.
+	* testsuite/gas/arm/ldconst.d: Adjust so that it works with VxWorks
+	* testsuite/gas/arm/tls_vxworks.d: Update expected output.
+
+	PR 19499
+	* doc/as.texinfo (Errors): Correct documentation describing the
+	interaction of .file and .line with warning and error messages.
+
+	PR 19458
+	* testsuite/gas/arm/armv8_2-a.d: Skip for COFF based targets.
+	* testsuite/gas/arm/archv8m-main.d: Likewise.
+	* testsuite/gas/arm/archv8m-base.d: Likewise.
+
+2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* testsuite/gas/aarch64/armv8_2-a-illegal.d: New.
+	* testsuite/gas/aarch64/armv8_2-a-illegal.l: New.
+	* testsuite/gas/aarch64/armv8_2-a-illegal.s: New.
+
+2016-01-20  Mickael Guene  <mickael.guene@st.com>
+	    Terry Guo  <terry.guo@arm.com>
+
+	* config/obj-elf.c (obj_elf_change_section) : Allow arm section with
+	SHF_ARM_NOREAD section flag.
+	* config/tc-arm.h (md_elf_section_letter) : Implement this hook to
+	handle letter 'y'.
+	(arm_elf_section_letter) : Declare it.
+	* config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
+	SHF_ARM_NOREAD section flag.
+	* doc/c-arm.texi (ARM section attribute): Document the 'y' attribute.
+
+	* testsuite/gas/arm/section-execute-only.s: New test case.
+	* testsuite/gas/arm/section-execute-only.d: Expected output.
+
+2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (micromips_insn_length): Remove the mention
+	of 48-bit microMIPS instructions.
+
+2016-01-18  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test.
+
+2016-01-14  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/gas/rl78/sp-relative-movw.s: New test.
+	* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
+	* testsuite/gas/rl78/rl78.exp: Run the new test.
+
+2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* testsuite/gas/aarch64/illegal-sysreg-2.l: New.
+	* testsuite/gas/aarch64/illegal-sysreg-2.d: New.
+
+2016-01-13  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-nios2.c (output_movia): Preset `code' to 0.
+
+2016-01-13  Yoshinori Sato  <ysato@users.sourceforge.jp>
+
+	* config/tc-h8300.c (get_operand): Remove spurious condition in
+	test for closing parenthesis.
+
+2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* config/tc-arm.c (arm_ext_v8_2): New.
+	(insns): Add "esb".
+	* testsuite/gas/arm/armv8_2-a.d: New.
+	* testsuite/gas/arm/armv8_2-a.s: New.
+
+2016-01-12  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/gas/ppc/vsx3.d: Accept nop padding.
+
+2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
+
+	* testsuite/gas/ppc/power9.d <xscmpnedp, xvcmpnedp, xvcmpnedp.,
+	xvcmpnesp, xvcmpnesp.>: Delete tests.
+	* testsuite/gas/ppc/power9.s: Likewise.
+	* testsuite/gas/ppc/vsx3.d: Likewise.
+	* testsuite/gas/ppc/vsx3.s: Likewise.
+
+2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
+
+	PR gas/13050
+	* testsuite/gas/m68k/all.exp: Add tests p13050-1 and p13050-2.
+	* testsuite/gas/m68k/p13050-1.s: New file.
+	* testsuite/gas/m68k/p13050-2.d: New file.
+	* testsuite/gas/m68k/p13050-2.s: New file.
+
+2016-01-06  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/gas/arc/adc.d: Add 'R_' prefix to relocation names.
+	* testsuite/gas/arc/add.d: Likewise.
+	* testsuite/gas/arc/and.d: Likewise.
+	* testsuite/gas/arc/asl.d: Likewise.
+	* testsuite/gas/arc/asr.d: Likewise.
+	* testsuite/gas/arc/bic.d: Likewise.
+	* testsuite/gas/arc/extb.d: Likewise.
+	* testsuite/gas/arc/extw.d: Likewise.
+	* testsuite/gas/arc/j.d: Likewise.
+	* testsuite/gas/arc/jl.d: Likewise.
+	* testsuite/gas/arc/ld2.d: Likewise.
+	* testsuite/gas/arc/lsr.d: Likewise.
+	* testsuite/gas/arc/mov.d: Likewise.
+	* testsuite/gas/arc/or.d: Likewise.
+	* testsuite/gas/arc/pcl-relocs.d: Likewise.
+	* testsuite/gas/arc/pcrel-relocs.d: Likewise.
+	* testsuite/gas/arc/pic-relocs.d: Likewise.
+	* testsuite/gas/arc/plt-relocs.d: Likewise.
+	* testsuite/gas/arc/rlc.d: Likewise.
+	* testsuite/gas/arc/ror.d: Likewise.
+	* testsuite/gas/arc/rrc.d: Likewise.
+	* testsuite/gas/arc/sbc.d: Likewise.
+	* testsuite/gas/arc/sda-relocs.d: Likewise.
+	* testsuite/gas/arc/sda-relocs2.d: Likewise.
+	* testsuite/gas/arc/sexb.d: Likewise.
+	* testsuite/gas/arc/sexw.d: Likewise.
+	* testsuite/gas/arc/st.d: Likewise.
+	* testsuite/gas/arc/sub.d: Likewise.
+	* testsuite/gas/arc/tls-relocs.d: Likewise.
+	* testsuite/gas/arc/xor.d: Likewise.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-2015 and testsuite/ChangeLog-2015
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 4f69eee..e33ce1b 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,1660 +1,6 @@
-2016-12-28  Andreas Schwab  <schwab@linux-m68k.org>
-
-	* copy-relocs.h: Fix comment typo.
-
-2016-12-28  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20996
-	* object.cc (build_compressed_section_map): Add explicit instantiations.
-
-2016-12-27  Cary Coutant  <ccoutant@gmail.com>
-
-	PR ld/20995
-	* copy-relocs.cc (Copy_relocs::make_copy_reloc): Use .data.rel.ro for
-	read-only data when linking with -z relro.
-	* copy-relocs.h (Copy_relocs::dynrelro_): New data member.
-	* testsuite/Makefile.am (copy_test_relro): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/copy_test_relro.cc: New source file.
-	* testsuite/copy_test_relro_1.cc: New source file.
-
-2016-12-23  Cary Coutant  <ccoutant@gmail.com>
-
-	* NEWS: Add new features in 1.14.
-	* version.cc (version_string): Bump to 1.14.
-
-2016-12-22  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/17643
-	* options.h (-z bndplt): New option.
-	* x86_64.cc (Output_data_plt_x86_64::regular_count): New method.
-	(Output_data_plt_x86_64::address_for_global): Move implementation into
-	virtual method.
-	(Output_data_plt_x86_64::address_for_local): Likewise.
-	(Output_data_plt_x86_64::got): New method.
-	(Output_data_plt_x86_64::got_plt): New method.
-	(Output_data_plt_x86_64::got_irelative): New method.
-	(Output_data_plt_x86_64::do_address_for_global): New virtual method.
-	(Output_data_plt_x86_64::do_address_for_local): New virtual method.
-	(class Output_data_plt_x86_64_bnd): New class.
-	(Target_x86_64::do_make_data_plt): Move out of line and specialize
-	for each size (both overloads).
-	(Output_data_plt_x86_64::set_final_data_size): Cosmetic changes.
-	* testsuite/Makefile.am (bnd_plt_1): New test case.
-	(bnd_ifunc_1): New test case.
-	(bnd_ifunc_2): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/bnd_ifunc_1.s: New source file.
-	* testsuite/bnd_ifunc_1.sh: New shell script.
-	* testsuite/bnd_ifunc_2.s: New source file.
-	* testsuite/bnd_ifunc_2.sh: New shell script.
-	* testsuite/bnd_plt_1.s: New source file.
-	* testsuite/bnd_plt_1.sh: New shell script.
-
-2016-12-22  Cary Coutant  <ccoutant@gmail.com>
-
-	* layout.cc (Layout::finalize): Track count of forced-local symbols
-	in .dynsym.
-	(Layout::create_symtab_sections): Add local_dynamic_count parameter;
-	use that instead of sh_info value.
-	(Layout::create_dynamic_symtab): Add pforced_local_dynamic_count
-	parameter; pass it to Symtab::set_dynsym_indexes().  Include forced
-	locals in sh_info value.  Pass index of first real global to
-	Dynobj::create_gnu_hash_table() and Dynobj::create_elf_hash_table().
-	* layout.h (Layout::create_symtab_sections): Add local_dynamic_count
-	parameter.
-	(Layout::create_dynamic_symtab): Add pforced_local_dynamic_count
-	parameter.
-	* symtab.cc (Symbol_table::set_dynsym_indexes): Add pforced_local_count
-	parameter.  Process forced-local symbols first and return the count.
-	(Symbol_table::finalize): Update comments.
-	* symtab.h (Symbol_table::set_dynsym_indexes): Add pforced_local_count
-	parameter.
-	(Symbol_table::first_dynamic_global_index_): Update comment.
-	(Symbol_table::dynamic_count_): Update comment.
-	* testsuite/Makefile.am (ifuncmod1.sh): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/ifuncmod1.sh: New shell script.
-
-2016-12-21  Cary Coutant  <ccoutant@gmail.com>
-
-	* symtab.cc (Symbol_table::define_special_symbol): Add is_forced_local
-	parameter; if set, do not check version script.
-	(Symbol_table::do_define_in_output_data): Pass is_forced_local for
-	STB_LOCAL predefined symbols.
-	(Symbol_table::do_define_in_output_segment): Likewise.
-	(Symbol_table::do_define_in_output_segment): Likewise.
-	(Symbol_table::do_define_as_constant): Likewise.
-	* symtab.h (Symbol_table::define_special_symbol): Add is_forced_local
-	parameter. Adjust all callers.
-	* testsuite/Makefile.am (ver_test_8.sh): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* ver_test_8.sh: New test script.
-
-2016-12-21  Cary Coutant  <ccoutant@gmail.com>
-
-	* output.cc (Output_segment::first_section): Return NULL if there are
-	no sections in the segment.
-	* output.h (Output_segment::first_section_load_address): Assert that
-	first section is not NULL.
-	* symtab.cc (Symbol_table::sized_write_globals): Attach linker-created
-	segment-relative symbols to first section of the segment.
-
-2016-12-21  Alan Modra  <amodra@gmail.com>
-
-	* arm.cc: Fix comment chars with high bit set.
-
-2016-12-20  Cary Coutant  <ccoutant@gmail.com>
-
-	* testsuite/Makefile.am: Add missing dependencies on gcctestdir/ld
-	or ../ld-new.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-12-19  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20949
-	* script.cc (Lex::get_token): Don't look ahead past NUL characters.
-
-2016-12-19  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/14676
-	PR gold/20983
-	* layout.h (Layout::choose_output_section): Add match_input_spec
-	parameter. Adjust all callers.
-	* layout.cc (Layout::choose_output_section): Likewise.  Pass
-	match_input_spec to Script_sections::output_section_name().
-	(Layout::create_note): Pass true for match_input_spec.
-	* script-sections.h (Script_sections::output_section_name): Add
-	match_input_spec parameter.
-	* script-sections.cc (Sections_element::output_section_name): Likewise.
-	(Output_section_definition::output_section_name): Likewise.
-	(Script_sections::output_section_name): Likewise.
-
-2016-12-19  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* arm.cc (Target_arm::Target_arm): Move initialization code ...
-	(Target_arm::do_select_as_default_target): ... to here.
-	* testsuite/Makefile.am (arm_target_lazy_init): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/arm_target_lazy_init.s: New source file.
-	* testsuite/arm_target_lazy_init.t: New linker script.
-
-2016-12-19  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20976
-	* symtab.cc (Symbol_table::sized_write_globals): Use address of
-	output section, not input section.
-	* testsuite/Makefile.am (pr20976): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/pr20976.c: New source file.
-
-2016-12-13  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20749
-	* options.h (--orphan-handling): New option.
-	(General_options::Orphan_handling): New enum.
-	(General_options::orphan_handling_enum): New method.
-	(General_options::set_orphan_handling_enum): New method.
-	(General_options::orphan_handling_enum_): New data member.
-	* options.cc (General_options::General_options): Initialize new member.
-	(General_options::finalize): Convert --orphan-handling argument to enum.
-	* script-sections.cc (Script_sections::output_section_name): Check it.
-
-2016-12-13  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20522
-	* layout.cc (Layout::choose_output_section): Add is_reloc parameter.
-	Adjust all callers.  Do not use linker script for is_reloc sections.
-	(Layout::layout_reloc): Pass is_reloc == true.
-	* layout.h (Layout::choose_output_section): Add is_reloc parameter.
-
-2016-12-12  Igor Kudrin  <ikudrin@accesssoftek.com>
-	    Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/14676
-	* script-sections.cc (Output_section_definition::output_section_name):
-	For linker-generated sections, compare with output section name.
-	* testsuite/Makefile.am (script_test_13): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/script_test_13.c: New source file.
-	* testsuite/script_test_13.sh: New script.
-	* testsuite/script_test_13.t: New linker script.
-
-2016-12-12  Cary Coutant  <ccoutant@gmail.com>
-
-	* script-sections.cc (Orphan_section_placement::update_last_alloc):
-	New method.
-	(Orphan_section_placement::find_place): Place orphan .data section
-	after either RODATA or TEXT.
-	(Script_sections::place_orphan): Call update_last_alloc for allocated
-	sections.
-	(Script_sections::create_segments): Improve handling of BSS.
-
-2016-12-13  Alan Modra  <amodra@gmail.com>
-
-	PR gold/16711
-	* testsuite/script_test_15a.sh: Allows larger p_filesz.
-	* testsuite/script_test_15b.sh: Likewise.
-	* testsuite/script_test_15c.sh: Likewise.
-
-2016-12-13  Alan Modra  <amodra@gmail.com>
-
-	PR gold/20717
-	* testsuite/pr20717.t: Add .got output section containing .toc.
-
-2016-12-11  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	PR gold/20717
-	* testsuite/Makefile.am (pr20717): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/pr20717.c: New test source file.
-	* testsuite/pr20717.sh: New test script.
-	* testsuite/pr20717.t: New test linker script.
-
-2016-12-11  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/16711
-	* output.cc (Output_section::set_final_data_size): Calculate data size
-	based on relative offset rather than file offset.
-	(Output_segment::set_section_addresses): Track file offset separately
-	from address offset.
-	(Output_segment::set_section_list_addresses): Add pfoff parameter.
-	Track file offset separately.  Don't move file offset for BSS
-	sections.
-	* output.h (Output_segment::set_section_list_addresses): Add pfoff
-	parameter.
-	* script-sections.cc (Orphan_section_placement): Add PLACE_LAST_ALLOC.
-	(Orphan_section_placement::Orphan_section_placement): Initialize it.
-	(Orphan_section_placement::output_section_init): Track last allocated
-	section.
-	(Orphan_section_placement::find_place): Place BSS after last allocated
-	section.
-	(Output_section_element_input::set_section_addresses): Always override
-	input section alignment when SUBALIGN is specified.
-	(Output_section_definition::set_section_addresses): Override alignment
-	of output section when SUBALIGN is specified.
-
-	* testsuite/Makefile.am (script_test_15a, script_test_15b)
-	(script_test_15c): New test cases.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/script_test_2.cc: Adjust expected layout.
-	* testsuite/script_test_15.c: New source file.
-	* testsuite/script_test_15a.sh: New shell script.
-	* testsuite/script_test_15a.t: New linker script.
-	* testsuite/script_test_15b.sh: New shell script.
-	* testsuite/script_test_15b.t: New linker script.
-	* testsuite/script_test_15c.sh: New shell script.
-	* testsuite/script_test_15c.t: New linker script.
-
-2016-12-08  Alan Modra  <amodra@gmail.com>
-
-	* powerpc.cc (Powerpc_relobj::stub_table): Return NULL rather
-	then asserting.
-
-2016-12-08  Alan Modra  <amodra@gmail.com>
-
-	* options.h (--stub-group-multi): Fix typo.
-
-2016-12-07  Alan Modra  <amodra@gmail.com>
-
-	* options.h (--stub-group-multi): New PowerPC option.
-	* powerpc.cc (Stub_control): Add multi_os_ var and param
-	to constructor.  Sort start_ var later.  Comment State.
-	(Stub_control::can_add_to_stub_group): Heed multi_os_.
-	(Target_powerpc::group_sections): Update.
-
-2016-12-07  Alan Modra  <amodra@gmail.com>
-
-	PR gold/20878
-	* powerpc.cc (Stub_control): Replace stubs_always_before_branch_
-	with stubs_always_after_branch_, group_end_addr_ with
-	group_start_addr_.
-	(Stub_control::can_add_to_stub_group): Rewrite to suit scanning
-	sections by increasing address.
-	(Target_powerpc::group_sections): Scan that way.  Delete corner
-	case.
-	* options.h (--stub-group-size): Update help string.
-
-2016-12-07  Alan Modra  <amodra@gmail.com>
-
-	* powerpc.cc (Stub_table_owner): Provide constructor.
-	(Powerpc_relobj::set_stub_table): Resize fill with -1.
-	(Target_powerpc::Branch_info::make_stub): Provide target debug
-	output on returning false.
-
-2016-12-05  Cary Coutant  <ccoutant@gmail.com>
-	    Tristan Gingold  <gingold@adacore.com>
-
-	* object.cc (Sized_relobj_file::do_count_local_symbols): Check
-	is_ordinary before using shndx.
-	* testsuite/Makefile.am (file_in_many_sections_test.sh): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/file_in_many_sections.c: New source file.
-	* testsuite/file_in_many_sections_test.sh: New script.
-
-2016-12-01  Cary Coutant  <ccoutant@gmail.com>
-	    Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	PR gold/20717
-	* script-sections.cc (Script_sections): Set *keep to false when
-	no match.
-
-2016-12-01  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20834
-	* target.h (Target::default_text_segment_address): Bump default
-	start address up to ABI page size.
-
-2016-12-01  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/18989
-	* options.cc (General_options::object_format_to_string): New function.
-	(General_options::copy_from_posdep_options): New function.
-	(General_options::parse_push_state): New function.
-	(General_options::parse_pop_state): New function.
-	* options.h (--push-state, --pop-state): New options.
-	(General_options::object_format_to_string): New method.
-	(General_options::set_incremental_disposition): New method.
-	(General_options::copy_from_posdep_options): New method.
-	(General_options::options_stack_): New data member.
-
-2016-12-01  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20807
-	* aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Handle
-	section symbols correctly.
-	* arm.cc (Target_arm): Likewise.
-	* powerpc.cc (Target_powerpc): Likewise.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* aarch64-reloc.def: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* aarch64.cc: Fix spelling in comments.
-	* arm.cc: Fix spelling in comments.
-	* icf.cc: Fix spelling in comments.
-	* layout.cc: Fix spelling in comments.
-	* layout.h: Fix spelling in comments.
-	* mips.cc: Fix spelling in comments.
-	* output.h: Fix spelling in comments.
-	* plugin.h: Fix spelling in comments.
-	* script-sections.h: Fix spelling in comments.
-	* script.h: Fix spelling in comments.
-	* stringpool.h: Fix spelling in comments.
-	* tilegx.cc: Fix spelling in comments.
-
-2016-11-22  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20346
-	* options.cc (One_option::print): Print "(default)" when appropriate.
-	* options.h: Clean up and re-sort options.
-	(One_option::is_default): New data member.
-	(One_option::One_option): Add is_default parameter; adjust all calls.
-	(DEFINE_var): Add is_default__ parameter; adjust all calls.
-	(DEFINE_bool): Set is_default based on default_value__.
-	(DEFINE_bool_ignore): New macro.
-	(--no-eh-frame-hdr): New option.
-	(--enable-new-dtags): Remove mention of DT_FLAGS.
-
-2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* configure: Regenerate.
-
-2016-11-21  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20693
-	* gold.cc (queue_middle_tasks): Force valid target earlier.
-
-2016-11-21  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* layout.cc: Include windows.h and rpcdce.h (for MinGW32).
-	(Layout::create_build_id): Generate uuid using UuidCreate().
-
-2016-11-04  Loïc Yhuel <loic.yhuel@softathome.com>
-
-	* configure.ac: add missing '$'.
-	* configure: Regenerate.
-
-2016-10-21  Gergely Nagy  <ngg@tresorit.com>
-
-	PR gold/17704
-	* icf.cc (match_sections): Add new parameter section_addraligns.
-	Check section alignment and keep the section with the strictest
-	alignment.
-	(find_identical_sections): New local variable section_addraligns.
-	Store each section's alignment.
-	* testsuite/pr17704a_test.s: New file.
-	* testsuite/Makefile.am (pr17704a_test): New test.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* powerpc.cc (Target_powerpc::Relocate::relocate): Add fall
-	through comment.
-	* tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* aarch64.cc: Spell fall through comments as "// Fall through.".
-	* arm.cc: Likewise.
-	* mips.cc: Likewise.
-	* powerpc.cc: Likewise.
-	* s390.cc: Likewise.
-	* sparc.cc: Likewise.
-	* x86_64.cc: Likewise.
-	* powerpc.cc (Target_powerpc::Relocate::relocate): Add missing
-	fall through comments.
-	* sparc.cc: (Target_sparc::Scan::global): Likewise.
-	(Target_sparc::Relocate::relocate): Likewise.
-	* tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
-	* resolve.cc (symbol_to_bits): Add missing break.
-
-2016-09-26  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20238
-	* symtab.cc (Symbol_table::define_default_version): Check that
-	unversioned symbol is defined.
-
-2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
-
-	* Makefile.in: Regenerate.
-	* configure: Likewise.
-	* testsuite/Makefile.in: Likewise.
-
-2016-09-26  Alan Modra  <amodra@gmail.com>
-
-	* aarch64.cc (Target_aarch64::is_erratum_835769_sequence): Avoid
-	compiler warning.
-	* output.cc (Output_segment::set_section_addresses): Likewise.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-09-02  Doug Kwan  <dougkwan@google.com>
-
-	* arm.cc (Target_arm::Target_arm): Move method definition outside of
-	class definition.  Add code to handle --target1-rel, --target1-abs
-	and --target2= options.
-	(Target_arm::get_reloc_reloc_type): Change method to be non-static
-	and const.
-	(Target_arm::target1_is_rel_, Target_arm::target2_reloc_): New data
-	member declaration.
-	(Target_arm::Scan::local, Target_arm::Scan::global,
-	Target_arm::Relocate::relocate,
-	Target_arm::Relocatable_size_for_reloc::get_size_for_reloc): Adjust
-	call to Target_arm::get_real_reloc_type.
-	(Target_arm::get_real_reloc_type): Use command line options to
-	determine real types of R_ARM_TARGET1 and R_ARM_TARGET2.
-	* options.h (--target1-rel, --target1-abs, --target2): New ARM-only
-	options.
-
-2016-08-31  Alan Modra  <amodra@gmail.com>
-
-	* powerpc.cc (class Stub_control): Delete stub14_group_size_
-	and has14_.  Add group_size_.
-	(Stub_control::can_add_to_stub_group): Adjust to suit.  Print
-	debug info when switching to adding sections before stubs.
-
-2016-08-31  Alan Modra  <amodra@gmail.com>
-
-	* debug.h (DEBUG_TARGET): New.
-	(DEBUG_ALL): Add DEBUG_TARGET.
-	(gold_debug): Delete FORMAT param.
-	* powerpc.cc (Stub_control::can_add_to_stub_group): Print debug ourput.
-
-2016-08-30  Alan Modra  <amodra@gmail.com>
-
-	PR 20523
-	* powerpc.cc (class Stub_control): Add has14_.  Comment owner_.
-	(Stub_control::can_add_to_stub_group): Correct grouping of
-	sections containing 14-bit external branches.  When returning
-	false, set state_ to reflect the fact that we have one section
-	for the next group.  Rewrite most of function for clarity.
-	Add and expand comments.
-	(Target_powerpc::do_relax): Print stub group size retry in hex.
-
-2016-08-26  Han Shen  <shenhan@google.com>
-
-	PR gold/20529 - relaxing loop never ends.
-
-	* powerpc.cc (Stub_table::min_size_threshold_): New member to
-	limit size.
-	(Stub_table::set_min_size_threshold): New member function.
-	(Stub_table::set_address_and_size): Add code to only allow size
-	increase.
-	(Target_powerpc::do_relax): Add code to record last size.
-
-2016-08-23  Roland McGrath  <roland@hack.frob.com>
-
-	* options.h (General_options): Grok -z stack-size.
-	* output.h (Output_segment::set_size): New method.
-	* layout.cc (Layout::create_executable_stack_info): Renamed to ...
-	(Layout::create_stack_segment): ... this.  Always create the
-	segment if -z stack-size was used.
-	(Layout::set_segment_offsets): Don't call ->set_offset on the
-	PT_GNU_STACK segment.
-
-2016-08-15  Bharathi Seshadri  <bseshadr@cisco.com>
-
-	* options.h (General_options): Add --be8 option.
-	* arm.cc (Arm_relobj::do_relocate_sections): Add code to swap for be8.
-	(Output_data_plt_arm_standard::do_fill_first_plt_entry): Likewise.
-	(Output_data_plt_arm_short::do_fill_plt_entry): Likewise.
-	(Output_data_plt_arm_long::do_fill_plt_entry): Likewise.
-	(Target_arm::do_adjust_elf_header): Do EF_ARM_BE8 adjustment.
-
-2016-08-17  Cary Coutant  <ccoutant@gmail.com>
-
-	* i386.cc (Target_i386): Reset skip_call_tls_get_addr_ after printing
-	error message.
-	* testsuite/Makefile.am (pr20216a): Add missing dependencies.
-	(pr20308a): Add -Bgcctestdir/ to compile rules.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-08-12  Roland McGrath  <roland@hack.frob.com>
-
-	PR gold/20462
-	* script-sections.cc (Script_sections::release_segments):
-	Reset this->segments_created_.
-
-2016-08-12  Roland McGrath  <roland@hack.frob.com>
-
-	* yyscript.y (HIDDEN): New %token.
-	(assignment): Handle HIDDEN(string = expr) syntax.
-	* script.cc (script_keyword_parsecodes): Add HIDDEN.
-
-2016-08-10  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20216
-	* x86_64.cc (Target_x86_64::Relocate::relocate): Add check for
-	R_X86_64_GOTPCREL. Reset skip_call_tls_get_addr_ after printing
-	error message.
-	* testsuite/Makefile.am (pr20216_gd.o): Add -Bgcctestdir/.
-	(pr20216_ld.o): Likewise.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-08-10  James Clarke  <jrtc27@jrtc27.com>
-
-	PR gold/20443
-	* symtab.cc (Symbol_table::add_from_relobj): Handle NULL symbols,
-	which will be present for STT_SPARC_REGISTER.
-	(Symbol_table::add_from_pluginobj): Likewise.
-	(Symbol_table::add_from_dynobj): Likewise.
-	(Symbol_table::add_from_incrobj): Removed dead code.
-
-2016-08-10  James Clarke  <jrtc27@jrtc27.com>
-
-	PR gold/20442
-	* sparc.cc (Target_sparc::Relocate::relocate): R_SPARC_GOTDATA_OP_LOX10
-	should fall back on R_SPARC_GOT10, not R_SPARC_GOT13.
-
-2016-08-10  James Clarke  <jrtc27@jrtc27.com>
-
-	PR gold/20441
-	* sparc.cc (Target_sparc::Scan::check_non_pic): Allow R_SPARC_32 on
-	sparc64.
-
-2016-06-29  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/20310
-	* testsuite/dynamic_list.sh: Remove check for _ZdlPv.
-
-2016-06-29  Cary Coutant  <ccoutant@gmail.com>
-
-	* testsuite/Makefile.am (MOSTLYCLEANFILES): Add eh_test_2.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-06-30  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/Makefile.am (memory_test, memory_test_2): Pass
-	-Wl,-z to gcc, not plain -z.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-06-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gold/20308
-	* i386.cc (Target_i386::Relocate::relocate): Allow
-	R_386_GOT32X relocation against ___tls_get_addr.
-	(Target_i386::Relocate::tls_gd_to_ie): Support indirect
-	call to __tls_get_addr.
-	(Target_i386::Relocate::tls_gd_to_le): Likewise.
-	(Target_i386::Relocate::tls_ld_to_le): Likewise.
-	* testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test,
-	pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test.
-	(pr20308a_test_SOURCES): New.
-	(pr20308a_test_DEPENDENCIES): Likewise.
-	(pr20308a_test_CFLAGS): Likewise.
-	(pr20308a_test_LDFLAGS): Likewise.
-	(pr20308a_test_LDADD): Likewise.
-	(pr20308b_test_SOURCES): Likewise.
-	(pr20308b_test_DEPENDENCIES): Likewise.
-	(pr20308b_test_CFLAGS): Likewise.
-	(pr20308b_test_LDFLAGS): Likewise.
-	(pr20308b_test_LDADD): Likewise.
-	(pr20308c_test_SOURCES): Likewise.
-	(pr20308c_test_DEPENDENCIES): Likewise.
-	(pr20308c_test_CFLAGS): Likewise.
-	(pr20308c_test_LDFLAGS): Likewise.
-	(pr20308c_test_LDADD): Likewise.
-	(pr20308d_test_SOURCES): Likewise.
-	(pr20308d_test_DEPENDENCIES): Likewise.
-	(pr20308d_test_CFLAGS): Likewise.
-	(pr20308d_test_LDFLAGS): Likewise.
-	(pr20308d_test_LDADD): Likewise.
-	(pr20308e_test_SOURCES): Likewise.
-	(pr20308e_test_DEPENDENCIES): Likewise.
-	(pr20308e_test_CFLAGS): Likewise.
-	(pr20308e_test_LDFLAGS): Likewise.
-	(pr20308e_test_LDADD): Likewise.
-	(pr20308a.so): Likewise.
-	(pr20308b.so): Likewise.
-	(pr20308_gd.o): Likewise.
-	(pr20308_ld.o): Likewise.
-	(MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so.
-	* testsuite/Makefile.in: Regenerated.
-	* testsuite/pr20308_def.c: New file.
-	* testsuite/pr20308_gd.S: Likewise.
-	* testsuite/pr20308_ld.S: Likewise.
-	* testsuite/pr20308_main.c: Likewise.
-
-2016-06-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gold/20216
-	* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
-	AM_CONDITIONAL.
-	* configure: Regenerated.
-	* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
-	R_X86_64_GOTPCRELX relocation against __tls_get_addr.
-	(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
-	call to __tls_get_addr.
-	(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
-	(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
-	* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
-	pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
-	(pr20216a_test_SOURCES): New.
-	(pr20216a_test_DEPENDENCIES): Likewise.
-	(pr20216a_test_CFLAGS): Likewise.
-	(pr20216a_test_LDFLAGS): Likewise.
-	(pr20216a_test_LDADD): Likewise.
-	(pr20216b_test_SOURCES): Likewise.
-	(pr20216b_test_DEPENDENCIES): Likewise.
-	(pr20216b_test_CFLAGS): Likewise.
-	(pr20216b_test_LDFLAGS): Likewise.
-	(pr20216b_test_LDADD): Likewise.
-	(pr20216c_test_SOURCES): Likewise.
-	(pr20216c_test_DEPENDENCIES): Likewise.
-	(pr20216c_test_CFLAGS): Likewise.
-	(pr20216c_test_LDFLAGS): Likewise.
-	(pr20216c_test_LDADD): Likewise.
-	(pr20216d_test_SOURCES): Likewise.
-	(pr20216d_test_DEPENDENCIES): Likewise.
-	(pr20216d_test_CFLAGS): Likewise.
-	(pr20216d_test_LDFLAGS): Likewise.
-	(pr20216d_test_LDADD): Likewise.
-	(pr20216e_test_SOURCES): Likewise.
-	(pr20216e_test_DEPENDENCIES): Likewise.
-	(pr20216e_test_CFLAGS): Likewise.
-	(pr20216e_test_LDFLAGS): Likewise.
-	(pr20216e_test_LDADD): Likewise.
-	(pr20216a.so): Likewise.
-	(pr20216b.so): Likewise.
-	(pr20216_gd.o): Likewise.
-	(pr20216_ld.o): Likewise.
-	(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
-	* testsuite/Makefile.in: Regenerated.
-	* testsuite/pr20216_def.c: New file.
-	* testsuite/pr20216_gd.S: Likewise.
-	* testsuite/pr20216_ld.S: Likewise.
-	* testsuite/pr20216_main.c: Likewise.
-
-2016-06-29  Alan Modra  <amodra@gmail.com>
-
-	* script_test_12.t: Delete .plt, specify 64k page size.
-	* script_test_12i.t: Likewise.
-
-2016-06-29  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/plugin_layout_with_alignment.c: Explicitly align all
-	variables.
-
-2016-06-29  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/Makefile.am (copy_test_protected): Disable for powerpc.
-	* testsuite/Makefile.in: Regenerate.
-
-2016-06-28  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* aarch64-reloc.def (NONE): New relocation.
-	* aarch64.cc (Target_aarch64::Scan::local): Handle R_AARCH64_NONE.
-	(Target_aarch64::Scan::global): Likewise.
-	* testsuite/Makefile.am (aarch64_reloc_none): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/aarch64_reloc_none.s: New test source file.
-	* testsuite/aarch64_reloc_none.sh: New test script.
-
-2016-06-28  Sriraman Tallam  <tmsriram@google.com>
-
-	* x86_64.cc (Lazy_view): New class.
-	(can_convert_mov_to_lea): Templatize function.  Make the function
-	check for appropriate relocation types and use the view parameter
-	to get section contents.
-	(can_convert_callq_to_direct): New function.
-	(Target_x86_64<size>::Scan::global): Refactor.
-	(Target_x86_64<size>::Relocate::relocate): Refactor. Change any indirect
-	call via GOT that can be converted.
-	* testsuite/Makefile.am (x86_64_indirect_call_to_direct.sh): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/x86_64_indirect_call_to_direct1.s: New file.
-	* testsuite/x86_64_indirect_jump_to_direct1.s: New file.
-
-2016-06-28  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* aarch64.cc (Target_aarch64::Scan::local): Move the call to got_section
-	from the top level to the places of its use.
-
-2016-06-28  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	PR gold/18098
-	* script-c.h (Sort_wildcard): Add SORT_WILDCARD_BY_INIT_PRIORITY.
-	* script-sections.cc (Input_section_sorter::get_init_priority): New method.
-	(Input_section_sorter::operator()): Handle SORT_WILDCARD_BY_INIT_PRIORITY.
-	(Output_section_element_input::print): Likewise.
-	* script.cc (script_keyword_parsecodes): Add entry SORT_BY_INIT_PRIORITY.
-	* yyscript.y (SORT_BY_INIT_PRIORITY): New token.
-	(wildcard_section): Handle SORT_BY_INIT_PRIORITY.
-
-	* testsuite/Makefile.am (script_test_14): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/script_test_14.s: New test source file.
-	* testsuite/script_test_14.sh: New test script.
-	* testsuite/script_test_14.t: New test linker script.
-
-2016-06-28  James Clarke  <jrtc27@jrtc27.com>
-
-	* sparc.cc (Target_sparc::Scan::local): Don't convert R_SPARC_32
-	to R_SPARC_RELATIVE if class is ELFCLASS64.
-	(Target_sparc::Scan::global): Likewise.
-
-2016-06-23  Cary Coutant  <ccoutant@gmail.com>
-	    Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	PR gold/15370
-	* script-sections.cc
-	(Output_section_element_input::set_section_addresses): Keep bin_count
-	separate from input_pattern_count.
-	* testsuite/script_test_12.t: Add another section .x4.
-	* testsuite/script_test_12i.t: Likewise.
-	* testsuite/script_test_12a.c: Likewise.
-	* testsuite/script_test_12b.c: Likewise.
-
-2016-06-23  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* gold-threads.cc (impl_threads::Lock_impl_threads): Fix typos.
-
-2016-06-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20283
-	* NEWS: Mention --enable-relro.
-	* configure.ac: Add --enable-relro.
-	(DEFAULT_LD_Z_RELRO): New.  Set by --enable-relro and default
-	to 1.
-	* config.in: Regenerated.
-	* configure: Likewise.
-	* options.h (General_options::relro): Default to
-	DEFAULT_LD_Z_RELRO.
-
-2016-06-20  Cary Coutant  <ccoutant@gmail.com>
-
-	* NEWS: Add new features in 1.12.
-	* version.cc (version_string): Bump to 1.12.
-
-2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gold/20245
-	* i386.cc (Target_i386::first_plt_entry_offset): Return 0 if
-	plt_ is NULL.
-	(Target_i386::plt_entry_size): Likewise.
-	(Target_x86_64<size>::first_plt_entry_offset): Likewise.
-	(Target_x86_64<size>::plt_entry_size): Likewise.
-
-2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-	* mips.cc (Target_mips::Target_mips): Initialize rld_map_.
-	(Target_mips::rld_map_): New data member.
-	(Target_mips::do_finalize_sections): Add support for
-	DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags,
-	.rld_map section, and __RLD_MAP symbol.
-	(Target_mips::do_dynamic_tag_custom_value): Add support for
-	DT_MIPS_RLD_MAP_REL dynamic tag.
-	* output.cc (Output_data_dynamic::get_entry_offset): New method
-	definition.
-	* output.h (Output_data_dynamic::get_entry_offset): New method
-	declaration.
-
-2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-	* mips.cc (Mips_relocate_functions::relpc16): Add unaligned check.
-
-2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-	* mips.cc (relocation_needs_la25_stub): Add support for relocs:
-	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
-	(hi16_reloc): Add support for R_MIPS_PCHI16 relocation.
-	(is_matching_lo16_reloc): Likewise.
-	(lo16_reloc): Add support for R_MIPS_PCLO16 relocation.
-	(Mips_output_data_plt::plt_entry_r6): New static data member for
-	R6 PLT entry.
-	(Target_mips::is_output_r6): New method.
-	(Target_mips::Mips_mach): Add new enum constants.
-	(Mips_relocate_functions::Status): Likewise.
-	(Mips_relocate_functions::pchi16_relocs): New static data member.
-	(Mips_relocate_functions::relpc21): New method.
-	(Mips_relocate_functions::relpc26): Likewise.
-	(Mips_relocate_functions::relpc18): Likewise.
-	(Mips_relocate_functions::relpc19): Likewise.
-	(Mips_relocate_functions::relpchi16): Likewise.
-	(Mips_relocate_functions::do_relpchi16): Likewise.
-	(Mips_relocate_functions::relpclo16): Likewise.
-	(Mips_output_data_plt::do_write): Add support for Mips r6 plt
-	entry.
-	(Target_mips::mips_32bit_flags): Add E_MIPS_ARCH_32R6 support.
-	(Target_mips::elf_mips_mach): Add E_MIPS_ARCH_32R6 and
-	E_MIPS_ARCH_64R6 support.
-	(Target_mips::update_abiflags_isa): Likewise.
-	(mips_get_size_for_reloc): Add support for relocs: R_MIPS_PCHI16,
-	R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3 and
-	R_MIPS_PC19_S2.
-	(Target_mips::Scan::local): Add support for relocs: R_MIPS_PCHI16
-	and R_MIPS_PCLO16.
-	(Target_mips::Scan::global): Add support for relocs:
-	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
-	(Target_mips::Relocate::relocate): Call functions for resolving
-	Mips32r6 and Mips64r6 relocations, and print error message for
-	STATUS_PCREL_UNALIGNED.
-	(Target_mips::Scan::get_reference_flags): Add support for relocs:
-	R_MIPS_PCHI16, R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2,
-	R_MIPS_PC18_S3 and R_MIPS_PC19_S2.
-	(Target_mips::elf_mips_mach_name): Add E_MIPS_ARCH_32R6 and
-	E_MIPS_ARCH_64R6 support.
-
-2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gold/20246
-	* testsuite/script_test_2.t: Add .got.plt after .got.
-
-2016-06-10  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-	* mips.cc (struct Mips_abiflags): New struct.
-	(Mips_relobj::Mips_relobj): Initialize attributes_section_data_
-	and abiflags_.
-	(Mips_relobj::~Mips_relobj): Delete object pointed by
-	attributes_section_data_.
-	(Mips_relobj::abiflags): New method.
-	(Mips_relobj::attributes_section_data): Likewise.
-	(Mips_relobj::attributes_section_data_): New data member.
-	(Mips_relobj::abiflags_): Likewise.
-	(class Mips_output_section_abiflags): New class.
-	(Target_mips::Target_mips): Initialize attributes_section_data_,
-	abiflags_ and has_abiflags_section_.
-	(Target_mips::do_should_include_section): Don't emit input
-	.MIPS.abiflags sections to output .MIPS.abiflags.
-	(Target_mips::Mips_mach): Add new enum constants.
-	(Target_mips::mips_isa_ext_mach): New method.
-	(Target_mips::mips_isa_ext): Likewise.
-	(Target_mips::update_abiflags_isa): Likewise.
-	(Target_mips::infer_abiflags): Likewise.
-	(Target_mips::create_abiflags): Likewise.
-	(Target_mips::fp_abi_string): Likewise.
-	(Target_mips::select_fp_abi): Likewise.
-	(Target_mips::merge_obj_attributes): Likewise.
-	(Target_mips::merge_obj_abiflags): Likewise.
-	(Target_mips::level_rev): Likewise.
-	(Target_mips::merge_obj_e_flags): Rename from
-	merge_processor_specific_flags. Remove dyn_obj argument,
-	call update_abiflags_isa when needed, compare NaN encodings and
-	compare FP64 state.
-	(Target_mips::add_machine_extensions): Add two machine extensions
-	and fix one.
-	(Target_mips::attributes_section_data_): New data member.
-	(Target_mips::abiflags_): Likewise.
-	(Target_mips::has_abiflags_section_): Likewise.
-	(Mips_relobj::do_read_symbols): Read .gnu.attributes and
-	.MIPS.abiflags sections if they exists.
-	(Target_mips::elf_mips_mach): Add E_MIPS_MACH_5900 and
-	E_MIPS_MACH_OCTEON3 support.
-	(Target_mips::do_adjust_elf_header): Setup EI_ABIVERSION flag.
-	(Target_mips::do_finalize_sections): Merge .gnu.attributes and
-	.MIPS.abiflags sections from input. Create these sections if
-	needed.
-	(Target_mips::elf_mips_mach_name): Add E_MIPS_MACH_5900 and
-	E_MIPS_MACH_OCTEON3 support, and change strings for
-	E_MIPS_MACH_LS2E, E_MIPS_MACH_LS2F and E_MIPS_MACH_LS3A just
-	to match bfd.
-
-2016-06-10  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
-
-	* mips.cc (Mips_relobj::Mips_relobj): Initialize
-	has_reginfo_section_.
-	(Mips_relobj::has_reginfo_section_): New data member.
-	(Mips_relobj::has_reginfo_section): New method.
-	(class Mips_output_section_reginfo): Change base class to
-	Output_section_data, and set masks of the output .reginfo section
-	in constructor.
-	(Mips_output_section_reginfo::as_mips_output_section_reginfo):
-	Remove.
-	(Mips_output_section_reginfo::set_masks): Likewise.
-	(Mips_output_section_reginfo::set_final_data_size): Likewise.
-	(Mips_output_section_reginfo::do_print_to_mapfile): New method.
-	(Target_mips::do_make_output_section): Remove.
-	(Mips_relobj::do_read_symbols): Set has_reginfo_section_ to true
-	if the object contains a .reginfo section.
-	(Target_mips::do_finalize_sections): Create a .reginfo output
-	section if needed.
-
-2016-06-09  Artemiy Volkov  <artemiyv@acm.org>
-
-	* mips.cc (Mips_output_data_got::do_write): Add missing template
-	args via typedef.
-
-2016-05-30  Marcin Kościelnicki  <koriakin@0x04.net>
-
-	PR/19960
-	* s390.cc (Target_s390::ss_code_st_r14): Removed.
-	(Target_s390::ss_code_l_r14): Removed.
-	(Target_s390::ss_code_ear): Removed.
-	(Target_s390::ss_code_c): Removed.
-	(Target_s390::ss_match_st_r14): New function.
-	(Target_s390::ss_match_l_r14): New function.
-	(Target_s390::ss_match_mcount): Call ss_match_{l,st}_r14 instead
-	of matching code directly.
-	(Target_s390::ss_match_ear): New function.
-	(Target_s390::ss_match_c): New function.
-	(Target_s390::do_calls_non_split): Call ss_match_{ear,c} instead
-	of matching code directly.
-
-2016-05-19  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19823
-	* copy-relocs.cc (Copy_relocs::make_copy_reloc): Add object
-	parameter; check for protected symbol.
-	* copy-relocs.h (Copy_relocs::make_copy_reloc): Add object parameter.
-	* mips.cc (Mips_copy_relocs): Adjust call to make_copy_reloc.
-	* symtab.cc (Symbol::init_fields): Initialize is_protected_.
-	(Symbol_table::add_from_dynobj): Mark protected symbols.
-	* symtab.h (Symbol::is_protected): New method.
-	(Symbol::set_is_protected): New method.
-	(Symbol::is_protected_): New data member.
-
-	* testsuite/Makefile.am (copy_test_protected): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/copy_test.cc (main): Add legal reference to protected
-	symbol.
-	* testsuite/copy_test_v1.cc (main): Likewise.
-	* testsuite/copy_test_2.cc (ip): Add protected symbol.
-	* testsuite/copy_test_protected.cc: New test source file.
-	* testsuite/copy_test_protected.sh: New test script.
-
-2016-05-19  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
-
-	* mips.cc (Mips_got_entry::Mips_got_entry): Remove object argument
-	for global got symbols, and set addend to 0.
-	(Mips_got_entry::hash): Change hash algorithm.
-	(Mips_got_entry::equals): Refactor.
-	(Mips_got_entry::object): Return input object for local got symbols
-	from union d.
-	(Mips_got_entry::addend): Change return of the relocation addend.
-	(Mips_got_entry::addend_): Move from union d.
-	(Mips_got_entry::object_): Move into union d.
-	(class Mips_symbol_hash): New class.
-	(Mips_got_info::Global_got_entry_set): New type.
-	(Mips_got_info::global_got_symbols): Change return type to
-	Global_got_entry_set.
-	(Mips_got_info::global_got_symbols_): Change type to
-	Global_got_entry_set.
-	(Mips_symbol::hash): New method.
-	(Mips_output_data_la25_stub::symbols_): Change type to std::vector.
-	(Mips_output_data_mips_stubs::Mips_stubs_entry_set): New type.
-	(Mips_output_data_mips_stubs::symbols_): Change type to
-	Mips_stubs_entry_set.
-	(Mips_got_info::record_global_got_symbol): Don't pass object
-	argument when creating global got symbol.
-	(Mips_got_info::record_got_entry): Remove find before inserting
-	got entries.
-	(Mips_got_info::add_reloc_only_entries): Change type of iterator
-	to Global_got_entry_set.
-	(Mips_got_info::count_got_symbols): Likewise.
-	(Mips_output_data_la25_stub::create_la25_stub): Use push_back
-	for adding entries to symbols_.
-	(Mips_output_data_la25_stub::do_write): Change type of iterator
-	to std::vector.
-	(Mips_output_data_mips_stubs::set_lazy_stub_offsets): Change type
-	of iterator to Mips_stubs_entry_set.
-	(Mips_output_data_mips_stubs::set_needs_dynsym_value): Likewise.
-	(Mips_output_data_mips_stubs::do_write): Likewise.
-
-2016-05-06  Han Shen  <shenhan@google.com>
-
-	PR gold/19987.
-
-	* aarch64-reloc.def: New relocation type.
-	* aarch64.cc (AArch64_relocate_functions::Page): Changed to public.
-	(Target_aarch64::Scan::local): Add R_AARCH64_LD64_GOTPAGE_LO15.
-	(Target_aarch64::Scan::global): Add R_AARCH64_LD64_GOTPAGE_LO15.
-	(Target_aarch64::Relocate::relocate): Implement R_AARCH64_LD64_GOTPAGE_LO15.
-
-2016-04-28  Nick Clifton  <nickc@redhat.com>
-
-	* po/zh_CN.po: Updated Chinese (simplified) translation.
-
-2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.in: Regenerated with automake 1.11.6.
-	* aclocal.m4: Likewise.
-	* testsuite/Makefile.in: Likewise.
-
-2016-03-30  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/16979
-	* symtab.cc (Symbol_table::define_default_version): Check for case
-	where symbols are both in different shared objects.
-
-2016-03-27  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/16111
-	* i386.cc (Target_i386): Add check for fully-resolved symbol for
-	R_386_GOTOFF.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	* configure: Regenerate.
-
-2016-03-21  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19842
-	* errors.cc (Errors::undefined_symbol): Add info message when
-	symbol should have been provided by a plugin.
-	* target-reloc.h (issue_undefined_symbol_error): Check for
-	placeholder symbols defined in discarded sections.
-	* testsuite/Makefile.am (plugin_test_9b): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/plugin_test_9b_elf.cc: New test source file.
-	* testsuite/plugin_test_9b_ir.cc: New test source file.
-
-2016-03-20  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19002
-	* ehframe.cc (Eh_frame::read_fde): Check for dropped functions.
-	* testsuite/Makefile.am (eh_test_2): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/eh_test_2.sh: New test script.
-	* testsuite/eh_test_a.cc (bar): Make it comdat.
-	* testsuite/eh_test_b.cc (bar): Add a duplicate copy.
-
-2016-03-18  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
-
-	* mips.cc (Mips_relobj::is_n64_): Remove.
-	(Target_mips::ei_class_): Likewise.
-	(Mips_relobj::is_newabi): Call methods.
-	(Mips_relobj::is_n64): Change checking for N64 ABI.
-	(Target_mips::is_output_n64): Likewise.
-	(Target_mips::merge_processor_specific_flags): Remove ei_class
-	argument, and remove comparing ei_class.
-	(Target_mips::do_adjust_elf_header): Remove setting EI_CLASS field
-	of the ELF header.
-	(Target_mips::do_finalize_sections): Don't pass ei_class argument
-	to merge_processor_specific_flags.
-	(Target_mips::elf_mips_abi_name): Remove ei_class argument, and
-	change checking for N64 ABI.
-
-2016-03-17  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
-
-	* mips.cc (enum Special_relocation_symbol): New enum type.
-	(is_readonly_section): New function.
-	(eh_reloc): Likewise.
-	(Mips_got_entry::is_section_symbol_): New member.
-	(Mips_got_entry::is_section_symbol): New method.
-	(Mips_got_info::record_local_got_symbol): Add is_section_symbol
-	argument.
-	(Mips_relobj::mips_elf_options_section_name): New method.
-	(Mips_output_data_got::record_local_got_symbol): Add
-	is_section_symbol argument, and pass it to
-	Mips_got_info::record_local_got_symbol.
-	(Mips_output_data_got::got_offset): Add addend argument, and pass
-	it to Relobj::local_got_offset.
-	(struct Mips_output_reloc_writer): New type.
-	(class Mips_output_data_reloc): New class.
-	(Mips_output_data_plt::Reloc_section): Change type to
-	Mips_output_data_reloc.
-	(Target_mips::Reloc_section): Likewise.
-	(Mips_reloc_types::get_r_addend): Remove unsigned from return type.
-	(Mips_classify_reloc::get_r_type2): New method.
-	(Mips_classify_reloc::get_r_type3): Likewise.
-	(Mips_classify_reloc::get_r_ssym): Likewise.
-	(Target_mips::Reloca_section): Remove.
-	(Relocate::should_apply_static_reloc): Rename from
-	should_apply_r_mips_32_reloc.
-	(Target_mips::copy_reloc): Replace Reltype parameter with r_type
-	and r_offset.
-	(Mips_relocate_functions::Valtype): New type.
-	(Mips_relocate_functions::Valtype64): New type.
-	(Mips_relocate_functions::check_overflow): New method.
-	(Mips_relocate_functions::mips_reloc_unshuffle): Move to public
-	interface.
-	(Mips_relocate_functions::mips_reloc_shuffle): Likewise.
-	(Mips_relocate_functions::rel16): Add support for resolving
-	relocations for Mips64.
-	(Mips_relocate_functions::rel32): Likewise.
-	(Mips_relocate_functions::reljalr): Likewise.
-	(Mips_relocate_functions::relpc32): Likewise.
-	(Mips_relocate_functions::rel26): Likewise.
-	(Mips_relocate_functions::relpc16): Likewise.
-	(Mips_relocate_functions::relmicromips_pc7_s1): Likewise.
-	(Mips_relocate_functions::relmicromips_pc10_s1): Likewise.
-	(Mips_relocate_functions::relmicromips_pc16_s1): Likewise.
-	(Mips_relocate_functions::do_relhi16): Likewise.
-	(Mips_relocate_functions::do_relgot16_local): Likewise.
-	(Mips_relocate_functions::rello16): Likewise.
-	(Mips_relocate_functions::relgot): Likewise.
-	(Mips_relocate_functions::relgotpage): Likewise.
-	(Mips_relocate_functions::relgotofst): Likewise.
-	(Mips_relocate_functions::relgot_hi16): Likewise.
-	(Mips_relocate_functions::relgot_lo16): Likewise.
-	(Mips_relocate_functions::relgprel): Likewise.
-	(Mips_relocate_functions::relgprel32): Likewise.
-	(Mips_relocate_functions::tlsrelhi16): Likewise.
-	(Mips_relocate_functions::tlsrello16): Likewise.
-	(Mips_relocate_functions::tlsrel32): Likewise.
-	(Mips_relocate_functions::relsub): Likewise.
-	(Mips_relocate_functions::releh): New method.
-	(Mips_relocate_functions::rel64): Likewise.
-	(Mips_got_info::record_local_got_symbol): Add is_section_symbol and
-	pass it to Mips_got_entry.
-	(Mips_got_info::add_local_entries): Pass addend argument
-	to code functions, and for STT_SECTION symbols call
-	add_symbolless_local_addend.
-	(Mips_got_info::add_tls_entries): Pass addend argument to code
-	functions.
-	(Mips_relobj::do_read_symbols): Read gp value that was used to
-	create object.
-	(Mips_output_data_plt::plt_entry): Remove opcode from l[wd]
-	instruction. Opcode for instruction will be selected later.
-	(Target_mips::gc_process_relocs): Add case for SHT_RELA.
-	(Target_mips::scan_relocatable_relocs): Likewise.
-	(Target_mips::emit_relocs_scan): Likewise.
-	(Target_mips::relocate_relocs): Likewise.
-	(Target_mips::do_finalize_sections): Skip objects for merging
-	processor specific flags in which all input sections will be
-	discarded.
-	(mips_get_size_for_reloc): Add case for R_MIPS_EH.
-	(Target_mips::Scan::get_reference_flags): Likewise.
-	(Target_mips::relocate_special_relocatable): Call rel26 method with
-	calculate_only and calculated_value arguments.
-	(Target_mips::Scan::local): Add case for R_MIPS_EH. Don't create a
-	dynamic relocation against a readonly sections, and pass
-	is_section_symbol to Mips_got_info::record_local_got_symbol.
-	(Target_mips::Scan::global): Add case for R_MIPS_EH. Don't create a
-	dynamic relocation against a readonly sections, and pass r_type
-	and r_offset to Target_mips::copy_reloc.
-	(Target_mips::Relocate::relocate): Add support for resolving
-	relocations for Mips64.
-	(Target_mips::mips_info): Add case for Mips64 default dynamic
-	linker name.
-	(Target_selector_mips): Correct emulation names.
-
-2016-03-17  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
-
-	* mips.cc (class Mips_output_data_la25_stub): Add
-	do_print_to_mapfile function.
-
-2016-03-17  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
-
-	* mips.cc (Mips_classify_reloc::put_r_info): Call 32bit version of
-	elf_r_info.
-
-2016-03-09  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/plugin_layout_with_alignment.cc: Renamed to ..
-	* testsuite/plugin_layout_with_alignment.c: This.
-	* testsuite/Makefile.am (plugin_layout_with_alignment.o): Updated.
-	(plugin_layout_with_alignment): Likewise.
-	* testsuite/Makefile.in: Regenerated.
-
-2016-03-08  Cary Coutant  <ccoutant@gmail.com>
-
-	PR 19751
-	* testsuite/Makefile.am (retain_symbols_file_test): Remove check
-	for constructor.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/dynamic_list.sh: Likewise.
-	* testsuite/retain_symbols_file_test.sh: Likewise.
-
-2016-03-08  Cary Coutant  <ccoutant@gmail.com>
-
-	PR 19751
-	* arm.cc (Reloc_stub::Key::name): Add unused attribute.
-	* dirsearch.cc (Dir_caches::~Dir_caches): Likewise.
-
-2016-03-08  Cary Coutant  <ccoutant@gmail.com>
-	    Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
-
-	* output.cc (Output_reloc_writer): New type.
-	(Output_data_reloc_base::do_write): Move implementation to template
-	in output.h and replace with invocation of template.
-	* output.h (Output_file): Move to top of file.
-	(Output_reloc::get_symbol_index): Move to public interface.
-	(Output_reloc::get_address): Likewise.
-	(Output_data_reloc_base::do_write_generic): New function template.
-
-2016-03-04  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19019
-	PR gold/19763
-	* symtab.cc: Instantiate Sized_symbol::init_constant and
-	Sized_symbol::init_undefined.
-
-2016-03-03  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19019
-	* layout.h (Layout::add_target_specific_dynamic_tag): New function.
-	* layout.cc (Layout::add_target_specific_dynamic_tag): New function.
-	* mips.cc (Target_mips::make_symbol): Adjust function signature.
-	* sparc.cc (Target_sparc::Target_sparc): Initialize register_syms_.
-	(Target_sparc::do_is_defined_by_abi): Remove test for
-	STT_SPARC_REGISTER.
-	(Target_sparc::Register_symbol): New struct type.
-	(Target_sparc::register_syms_): New data member.
-	(Target_sparc<64, true>::sparc_info): Set has_make_symbol to true.
-	(Target_sparc::make_symbol): New function.
-	(Target_sparc::do_finalize_sections): Add register symbols and new
-	dynamic table entries.
-	* symtab.h (Sized_symbol::init_undefined): Add value parameter.
-	(Symbol_table::add_target_global_symbol): New function.
-	(Symbol_table::target_symbols_): New data member.
-	* symtab.cc (Sized_symbol::init_undefined): Add value parameter.
-	(Symbol_table::Symbol_table): Initialize target_symbols_.
-	(Symbol_table::add_from_object): Pass additional parameters to
-	Target::make_symbol.
-	(Symbol_table::define_special_symbol): Likewise.
-	(Symbol_table::add_undefined_symbol_from_command_line): Pass 0 for
-	undefined symbol value.
-	(Symbol_table::set_dynsym_indexes): Process target-specific symbols.
-	(Symbol_table::sized_finalize): Likewise.
-	(Symbol_table::sized_write_globals): Likewise.
-	* target.h (Sized_target::make_symbol): Add name, st_type, object,
-	st_shndx, and value parameters.
-
-2016-03-03  Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
-
-	* plugin.cc (do_should_include_member): Ignore LDPK_UNDEF and
-	LDPK_WEAKUNDEF symbols.
-
-2016-03-03  Than McIntosh  <thanm@google.com>
-
-	* plugin.cc (Plugin::load): Include hooks for get_input_section_size
-	and get_input_section_alignment in transfer vector.
-	(get_input_section_alignment): New function.
-	(get_input_section_size): New function.
-	* testsuite/Makefile.am: Add plugin_layout_with_alignment.sh test.
-	* testsuite/Makefile.in: [Regenerate.]
-	* testsuite/plugin_section_alignment.cc: New test file.
-	* testsuite/plugin_layout_with_alignment.cc: New test file.
-	* testsuite/plugin_layout_with_alignment.sh: New test file.
-
-2016-03-03  Evgenii Stepanov  <eugenis@google.com>
-
-	* plugin.h (Pluginobj::get_symbol_resolution_info): Add version
-	parameter.
-	* plugin.cc (get_symbols_v3): New function.
-	(Plugin::load): Add LDPT_GET_SYMBOLS_V3.
-	(Pluginobj::get_symbol_resolution_info): Return LDPS_NO_SYMS when using
-	new version.
-
-2016-02-26  Egor Kochetov  <egor.kochetov@intel.com>
-	    Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19735
-	* ehframe.h (Cie::fde_encoding): New method.
-	* ehframe.cc (Eh_frame::read_fde): Discard FDEs for zero-length
-	address ranges.
-
-2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/Makefile.am (x86_64_mov_to_lea5.o): Pass
-	-mrelax-relocations=yes to $(TEST_AS).
-	(x86_64_mov_to_lea6.o): Likewise.
-	(x86_64_overflow_pc32.o): Remove duplicated target.
-	* testsuite/Makefile.in: Regenerated.
-
-2016-02-15  Marcin Kościelnicki  <koriakin@0x04.net>
-
-	* s390.cc (Target_s390::match_view_u): New helper method.
-	(Target_s390::do_is_call_to_non_split): New method.
-	(Target_s390::ss_code_st_r14): New const.
-	(Target_s390::ss_code_l_r14): New const.
-	(Target_s390::ss_code_bras_8): New const.
-	(Target_s390::ss_code_l_basr): New const.
-	(Target_s390::ss_code_a_basr): New const.
-	(Target_s390::ss_code_ear): New const.
-	(Target_s390::ss_code_c): New const.
-	(Target_s390::ss_code_larl): New const.
-	(Target_s390::ss_code_brasl): New const.
-	(Target_s390::ss_code_jg): New const.
-	(Target_s390::ss_code_jgl): New const.
-	(Target_s390::ss_match_mcount): New helper method.
-	(Target_s390::ss_match_l): New helper method.
-	(Target_s390::ss_match_ahi): New helper method.
-	(Target_s390::ss_match_alfi): New helper method.
-	(Target_s390::ss_match_cr): New helper method.
-	(Target_s390::do_calls_non_split): New method.
-	* testsuite/Makefile.am: Added new tests.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/split_s390.sh: New test.
-	* testsuite/split_s390_1_a1.s: New test.
-	* testsuite/split_s390_1_a2.s: New test.
-	* testsuite/split_s390_1_n1.s: New test.
-	* testsuite/split_s390_1_n2.s: New test.
-	* testsuite/split_s390_1_z1.s: New test.
-	* testsuite/split_s390_1_z2.s: New test.
-	* testsuite/split_s390_1_z3.s: New test.
-	* testsuite/split_s390_1_z4.s: New test.
-	* testsuite/split_s390_2_ns.s: New test.
-	* testsuite/split_s390_2_s.s: New test.
-	* testsuite/split_s390x_1_a1.s: New test.
-	* testsuite/split_s390x_1_a2.s: New test.
-	* testsuite/split_s390x_1_n1.s: New test.
-	* testsuite/split_s390x_1_n2.s: New test.
-	* testsuite/split_s390x_1_z1.s: New test.
-	* testsuite/split_s390x_1_z2.s: New test.
-	* testsuite/split_s390x_1_z3.s: New test.
-	* testsuite/split_s390x_1_z4.s: New test.
-	* testsuite/split_s390x_2_ns.s: New test.
-	* testsuite/split_s390x_2_s.s: New test.
-
-2016-02-11 Rahul Chaudhry  <rahulchaudhry@google.com>
-
-	* aarch64.cc (Target_aarch64::scan_erratum_843419_span): Remove
-	info message for every erratum 843419 found and fixed.
-
-2016-02-07  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/18695
-	* x86_64.cc (Target_x86_64::Relocate::relocate): Add additional
-	information to relocation overflow errors.
-
-2016-02-06  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/18695
-	* x86_64.cc (X86_64_relocate_functions::pcrela32_check): Fix x32
-	overflow checking when symbol value + addend < 0.
-
-2016-02-06  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19577
-	* reloc.h (Limits): New class.
-	(Bits::has_overflow32): Use min/max values from Limits.
-	(Bits::has_unsigned_overflow32): Likewise.
-	(Bits::has_signed_unsigned_overflow32): Likewise.
-	(Bits::has_overflow): Likewise.
-	(Bits::has_unsigned_overflow): Likewise.
-	(Bits::has_signed_unsigned_overflow64): Likewise.
-
-2016-02-06  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19567
-	* reloc.h (Relocate_functions::Overflow_check): Add comments.
-	* x86_64.cc (X86_64_relocate_functions): New class.
-	(Target_x86_64::Relocate::relocate): Use the new class.
-	* testsuite/Makefile.am (x86_64_overflow_pc32): Add -Tdata option.
-	(x32_overflow_pc32): New test case.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/x32_overflow_pc32.sh: New script.
-	* testsuite/x86_64_overflow_pc32.s: Remove .space directive.
-
-2016-02-06  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19577
-	* reloc.h (Bits::has_unsigned_overflow32): Fix static_cast.
-	(Bits::has_unsigned_overflow): Remove unnecessary static_cast.
-
-2016-02-06  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19577
-	* reloc.h (Bits::has_unsigned_overflow32): Fix unsigned/signed
-	comparison.
-	(Bits::has_unsigned_overflow): Likewise.
-
-2016-02-06  Marcin Kościelnicki  <koriakin@0x04.net>
-
-	* i386.cc (Target_i386::is_call_to_non_split): Add view and view_size
-	parameters.
-	* reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Pass view
-	and view_size to is_call_to_non_split.
-	* target.cc (Target::is_call_to_non_split): Add view and view_size
-	parameters.
-	* target.h (class Target): Likewise.
-
-2016-02-05  Sriraman Tallam  <tmsriram@google.com>
-
-	* icf.cc (get_rel_addend): New function.
-	(get_section_contents):  Move merge section addend computation to a
-	new function.  Ignore negative values for SHT_REL and SHT_RELA addends.
-	Fix bug to not read past the length of the section.
-
-2016-02-05  Cary Coutant  <ccoutant@gmail.com>
-	    Andrew Senkevich  <andrew.senkevich@intel.com>
-
-	PR gold/18695
-	* x86_64.cc (Target_x86_64::Relocate::relocate): Add overflow
-	checking for R_X86_64_32, R_X86_64_32S, R_X86_64_PC32, and
-	R_X86_64_PLT32.
-	* testsuite/Makefile.am (x86_64_overflow_pc32): New test.
-	* testsuite/x86_64_overflow_pc32.sh: New test script.
-	* testsuite/x86_64_overflow_pc32.s: New source file.
-
-2016-02-05  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/18695
-	* reloc.h (Relocate_functions::Address): New typedef.
-	(Relocate_functions::Addendtype): New typedef.
-	(Relocate_functions::Overflow_check): New enum type.
-	(Relocate_functions::Reloc_status): New enum type.
-	(Relocate_functions::check_overflow): New function template.
-	(Relocate_functions::rel): Add check parameter; check for overflow.
-	(Relocate_functions::rel_unaligned): Likewise.
-	(Relocate_functions::rela): Likewise.
-	(Relocate_functions::pcrel): Likewise.
-	(Relocate_functions::pcrel_unaligned): Likewise.
-	(Relocate_functions::pcrela): Likewise.
-	(Relocate_functions::rel8): Adjust parameter types.
-	(Relocate_functions::rela8): Likewise.
-	(Relocate_functions::pcrel8): Likewise.
-	(Relocate_functions::pcrela8): Likewise.
-	(Relocate_functions::rel16): Likewise.
-	(Relocate_functions::rela168): Likewise.
-	(Relocate_functions::pcrel16): Likewise.
-	(Relocate_functions::pcrela16): Likewise.
-	(Relocate_functions::rel32): Likewise.
-	(Relocate_functions::rel32_unaligned): Likewise.
-	(Relocate_functions::rela32): Likewise.
-	(Relocate_functions::pcrel32): Likewise.
-	(Relocate_functions::pcrel32_unaligned): Likewise.
-	(Relocate_functions::pcrela32): Likewise.
-	(Relocate_functions::rel8_check): New function.
-	(Relocate_functions::rela8_check): New function.
-	(Relocate_functions::pcrel8_check): New function.
-	(Relocate_functions::pcrela8_check): New function.
-	(Relocate_functions::rel16_check): New function.
-	(Relocate_functions::rela168_check): New function.
-	(Relocate_functions::pcrel16_check): New function.
-	(Relocate_functions::pcrela16_check): New function.
-	(Relocate_functions::rel32_check): New function.
-	(Relocate_functions::rel32_unaligned_check): New function.
-	(Relocate_functions::rela32_check): New function.
-	(Relocate_functions::pcrel32_check): New function.
-	(Relocate_functions::pcrel32_unaligned_check): New function.
-	(Relocate_functions::pcrela32_check): New function.
-	(Bits::has_unsigned_overflow32): New function.
-	(Bits::has_unsigned_overflow): New function.
-	* testsuite/Makefile.am (overflow_unittest): New test.
-	* testsuite/Makefile.in: Regenerate.
-	* testsuite/overflow_unittest.cc: New source file.
-
-2016-02-04  Alan Modra  <amodra@gmail.com>
-
-	* powerpc.cc (relocate): Adjust last patch for big-endian.
-
-2016-02-02  Alan Modra  <amodra@gmail.com>
-
-	* powerpc.cc (relocate): Further restrict ELFv2 entry optimization.
-
-2016-01-15 Han Shen  <shenhan@google.com>
-
-	PR gold/19472 - need pc-relative stubs.
-
-	* aarch64.cc (Reloc_stub::stub_type_for_reloc): Return PC-relative
-	stub type for DSOs and pie executables.
-
-2016-01-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386.cc (Target_i386::Classify_reloc::get_r_addend): Remove
-	'typename'.
-
-2016-01-12  Cary Coutant  <ccoutant@gmail.com>
-
-	* arm.cc (Target_arm::Classify_reloc::get_r_addend): New method.
-	* i386.cc (Target_i386::Classify_reloc::get_r_addend): New method.
-	* mips.cc (Target_arm::Mips_classify_reloc::get_r_addend): (Both
-	specializations) New method.
-
-2016-01-11  Cary Coutant  <ccoutant@gmail.com>
-
-	PR gold/19353
-	* aarch64.cc (Target_aarch64::relocate_tls): Don't insist that
-	we have a TLS segment for GD-to-IE optimization.
-	* i386.cc (Target_i386::tls_gd_to_ie): Remove tls_segment parameter.
-	Adjust all calls.
-	(Target_i386::tls_desc_gd_to_ie): Likewise.
-	(Target_i386::relocate_tls): Don't insist that we have a TLS segment
-	for TLSDESC GD-to-IE optimizations.
-	* x86_64.cc (Target_x86_64::tls_gd_to_ie): Remove tls_segment parameter.
-	Adjust all calls.
-	(Target_x86_64::tls_desc_gd_to_ie): Likewise.
-	(Target_x86_64::relocate_tls): Don't insist that we have a TLS segment
-	for TLSDESC GD-to-IE optimizations.
-
-2016-01-11  Cary Coutant  <ccoutant@gmail.com>
-
-	Refactor gold to enable support for MIPS-64 relocation format.
-
-	* gc.h (get_embedded_addend_size): Remove sh_type parameter.
-	(gc_process_relocs): Remove sh_type template parameter.
-	Use Classify_reloc to access r_sym, r_type, and r_addend fields.
-	* object.h (Sized_relobj_file::split_stack_adjust): Add target
-	parameter.
-	(Sized_relobj_file::split_stack_adjust_reltype): Likewise.
-	* reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA
-	specializations) Remove.
-	* reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h.
-	(Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan().
-	(Sized_relobj_file::emit_relocs_scan_reltype): Remove.
-	(Sized_relobj_file::split_stack_adjust): Add target parameter.
-	Adjust all callers.
-	(Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call
-	Target::get_r_sym() to get r_sym field from relocations.
-	(Track_relocs::next_symndx): Call Target::get_r_sym().
-	* target-reloc.h (scan_relocs): Remove sh_type template parameter;
-	add Classify_reloc template parameter.  Use for accessing r_sym and
-	r_type.
-	(relocate_section): Likewise.
-	(Default_classify_reloc): New class (renamed and moved from reloc.cc).
-	(Default_scan_relocatable_relocs): Remove sh_type template parameter.
-	(Default_scan_relocatable_relocs::Reltype): New typedef.
-	(Default_scan_relocatable_relocs::reloc_size): New const.
-	(Default_scan_relocatable_relocs::sh_type): New const.
-	(Default_scan_relocatable_relocs::get_r_sym): New method.
-	(Default_scan_relocatable_relocs::get_r_type): New method.
-	(Default_emit_relocs_strategy): New class.
-	(scan_relocatable_relocs): Replace sh_type template parameter with
-	Scan_relocatable_relocs class.  Use it to access r_sym and r_type
-	fields.
-	(relocate_relocs): Replace sh_type template parameter with
-	Classify_reloc class.  Use it to access r_sym and r_type fields.
-	* target.h (Target::is_call_to_non_split): Replace r_type parameter
-	with pointer to relocation. Adjust all callers.
-	(Target::do_is_call_to_non_split): Likewise.
-	(Target::emit_relocs_scan): New virtual method.
-	(Sized_target::get_r_sym): New virtual method.
-	* target.cc (Target::do_is_call_to_non_split): Replace r_type parameter
-	with pointer to relocation.
-
-	* aarch64.cc (Target_aarch64::emit_relocs_scan): New method.
-	(Target_aarch64::Relocatable_size_for_reloc): Remove.
-	(Target_aarch64::gc_process_relocs): Use Default_classify_reloc.
-	(Target_aarch64::scan_relocs): Likewise.
-	(Target_aarch64::relocate_section): Likewise.
-	(Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc):
-	Remove.
-	(Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc.
-	(Target_aarch64::relocate_relocs): Use Default_classify_reloc.
-	* arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type
-	template parameter.
-	(Target_arm::emit_relocs_scan): New method.
-	(Target_arm::Relocatable_size_for_reloc): Replace with...
-	(Target_arm::Classify_reloc): ...this.
-	(Target_arm::gc_process_relocs): Use Classify_reloc.
-	(Target_arm::scan_relocs): Likewise.
-	(Target_arm::relocate_section): Likewise.
-	(Target_arm::scan_relocatable_relocs): Likewise.
-	(Target_arm::relocate_relocs): Likewise.
-	* i386.cc (Target_i386::emit_relocs_scan): New method.
-	(Target_i386::Relocatable_size_for_reloc): Replace with...
-	(Target_i386::Classify_reloc): ...this.
-	(Target_i386::gc_process_relocs): Use Classify_reloc.
-	(Target_i386::scan_relocs): Likewise.
-	(Target_i386::relocate_section): Likewise.
-	(Target_i386::scan_relocatable_relocs): Likewise.
-	(Target_i386::relocate_relocs): Likewise.
-	* mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template
-	parameter.
-	(Mips_reloc_types): New class template.
-	(Mips_classify_reloc): New class template.
-	(Target_mips::Reltype): New typedef.
-	(Target_mips::Relatype): New typedef.
-	(Target_mips::emit_relocs_scan): New method.
-	(Target_mips::get_r_sym): New method.
-	(Target_mips::Relocatable_size_for_reloc): Replace with
-	Mips_classify_reloc.
-	(Target_mips::copy_reloc): Use Mips_classify_reloc.
-	(Target_mips::gc_process_relocs): Likewise.
-	(Target_mips::scan_relocs): Likewise.
-	(Target_mips::relocate_section): Likewise.
-	(Target_mips::scan_relocatable_relocs): Likewise.
-	(Target_mips::relocate_relocs): Likewise.
-	(mips_get_size_for_reloc): New function, factored out from
-	Relocatable_size_for_reloc::get_size_for_reloc.
-	(Target_mips::Scan::local): Use Mips_classify_reloc.
-	(Target_mips::Scan::global): Likewise.
-	(Target_mips::Relocate::relocate): Likewise.
-	* powerpc.cc (Target_powerpc::emit_relocs_scan): New method.
-	(Target_powerpc::Relocatable_size_for_reloc): Remove.
-	(Target_powerpc::gc_process_relocs): Use Default_classify_reloc.
-	(Target_powerpc::scan_relocs): Likewise.
-	(Target_powerpc::relocate_section): Likewise.
-	(Powerpc_scan_relocatable_reloc): Convert to class template.
-	(Powerpc_scan_relocatable_reloc::Reltype): New typedef.
-	(Powerpc_scan_relocatable_reloc::reloc_size): New const.
-	(Powerpc_scan_relocatable_reloc::sh_type): New const.
-	(Powerpc_scan_relocatable_reloc::get_r_sym): New method.
-	(Powerpc_scan_relocatable_reloc::get_r_type): New method.
-	(Target_powerpc::scan_relocatable_relocs): Use
-	Powerpc_scan_relocatable_reloc.
-	(Target_powerpc::relocate_relocs): Use Default_classify_reloc.
-	* s390.cc (Target_s390::emit_relocs_scan): New method.
-	(Target_s390::Relocatable_size_for_reloc): Remove.
-	(Target_s390::gc_process_relocs): Use Default_classify_reloc.
-	(Target_s390::scan_relocs): Likewise.
-	(Target_s390::relocate_section): Likewise.
-	(Target_s390::Relocatable_size_for_reloc::get_size_for_reloc):
-	Remove.
-	(Target_s390::scan_relocatable_relocs): Use Default_classify_reloc.
-	(Target_s390::relocate_relocs): Use Default_classify_reloc.
-	* sparc.cc (Target_sparc::emit_relocs_scan): New method.
-	(Target_sparc::Relocatable_size_for_reloc): Remove.
-	(Target_sparc::gc_process_relocs): Use Default_classify_reloc.
-	(Target_sparc::scan_relocs): Likewise.
-	(Target_sparc::relocate_section): Likewise.
-	(Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc):
-	Remove.
-	(Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc.
-	(Target_sparc::relocate_relocs): Use Default_classify_reloc.
-	* tilegx.cc (Target_tilegx::emit_relocs_scan): New method.
-	(Target_tilegx::Relocatable_size_for_reloc): Remove.
-	(Target_tilegx::gc_process_relocs): Use Default_classify_reloc.
-	(Target_tilegx::scan_relocs): Likewise.
-	(Target_tilegx::relocate_section): Likewise.
-	(Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc):
-	Remove.
-	(Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc.
-	(Target_tilegx::relocate_relocs): Use Default_classify_reloc.
-	* x86_64.cc (Target_x86_64::emit_relocs_scan): New method.
-	(Target_x86_64::Relocatable_size_for_reloc): Remove.
-	(Target_x86_64::gc_process_relocs): Use Default_classify_reloc.
-	(Target_x86_64::scan_relocs): Likewise.
-	(Target_x86_64::relocate_section): Likewise.
-	(Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc):
-	Remove.
-	(Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc.
-	(Target_x86_64::relocate_relocs): Use Default_classify_reloc.
-
-	* testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-0815
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/gold/ChangeLog-2016 b/gold/ChangeLog-2016
new file mode 100644
index 0000000..4f69eee
--- /dev/null
+++ b/gold/ChangeLog-2016
@@ -0,0 +1,1668 @@
+2016-12-28  Andreas Schwab  <schwab@linux-m68k.org>
+
+	* copy-relocs.h: Fix comment typo.
+
+2016-12-28  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20996
+	* object.cc (build_compressed_section_map): Add explicit instantiations.
+
+2016-12-27  Cary Coutant  <ccoutant@gmail.com>
+
+	PR ld/20995
+	* copy-relocs.cc (Copy_relocs::make_copy_reloc): Use .data.rel.ro for
+	read-only data when linking with -z relro.
+	* copy-relocs.h (Copy_relocs::dynrelro_): New data member.
+	* testsuite/Makefile.am (copy_test_relro): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/copy_test_relro.cc: New source file.
+	* testsuite/copy_test_relro_1.cc: New source file.
+
+2016-12-23  Cary Coutant  <ccoutant@gmail.com>
+
+	* NEWS: Add new features in 1.14.
+	* version.cc (version_string): Bump to 1.14.
+
+2016-12-22  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/17643
+	* options.h (-z bndplt): New option.
+	* x86_64.cc (Output_data_plt_x86_64::regular_count): New method.
+	(Output_data_plt_x86_64::address_for_global): Move implementation into
+	virtual method.
+	(Output_data_plt_x86_64::address_for_local): Likewise.
+	(Output_data_plt_x86_64::got): New method.
+	(Output_data_plt_x86_64::got_plt): New method.
+	(Output_data_plt_x86_64::got_irelative): New method.
+	(Output_data_plt_x86_64::do_address_for_global): New virtual method.
+	(Output_data_plt_x86_64::do_address_for_local): New virtual method.
+	(class Output_data_plt_x86_64_bnd): New class.
+	(Target_x86_64::do_make_data_plt): Move out of line and specialize
+	for each size (both overloads).
+	(Output_data_plt_x86_64::set_final_data_size): Cosmetic changes.
+	* testsuite/Makefile.am (bnd_plt_1): New test case.
+	(bnd_ifunc_1): New test case.
+	(bnd_ifunc_2): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/bnd_ifunc_1.s: New source file.
+	* testsuite/bnd_ifunc_1.sh: New shell script.
+	* testsuite/bnd_ifunc_2.s: New source file.
+	* testsuite/bnd_ifunc_2.sh: New shell script.
+	* testsuite/bnd_plt_1.s: New source file.
+	* testsuite/bnd_plt_1.sh: New shell script.
+
+2016-12-22  Cary Coutant  <ccoutant@gmail.com>
+
+	* layout.cc (Layout::finalize): Track count of forced-local symbols
+	in .dynsym.
+	(Layout::create_symtab_sections): Add local_dynamic_count parameter;
+	use that instead of sh_info value.
+	(Layout::create_dynamic_symtab): Add pforced_local_dynamic_count
+	parameter; pass it to Symtab::set_dynsym_indexes().  Include forced
+	locals in sh_info value.  Pass index of first real global to
+	Dynobj::create_gnu_hash_table() and Dynobj::create_elf_hash_table().
+	* layout.h (Layout::create_symtab_sections): Add local_dynamic_count
+	parameter.
+	(Layout::create_dynamic_symtab): Add pforced_local_dynamic_count
+	parameter.
+	* symtab.cc (Symbol_table::set_dynsym_indexes): Add pforced_local_count
+	parameter.  Process forced-local symbols first and return the count.
+	(Symbol_table::finalize): Update comments.
+	* symtab.h (Symbol_table::set_dynsym_indexes): Add pforced_local_count
+	parameter.
+	(Symbol_table::first_dynamic_global_index_): Update comment.
+	(Symbol_table::dynamic_count_): Update comment.
+	* testsuite/Makefile.am (ifuncmod1.sh): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/ifuncmod1.sh: New shell script.
+
+2016-12-21  Cary Coutant  <ccoutant@gmail.com>
+
+	* symtab.cc (Symbol_table::define_special_symbol): Add is_forced_local
+	parameter; if set, do not check version script.
+	(Symbol_table::do_define_in_output_data): Pass is_forced_local for
+	STB_LOCAL predefined symbols.
+	(Symbol_table::do_define_in_output_segment): Likewise.
+	(Symbol_table::do_define_in_output_segment): Likewise.
+	(Symbol_table::do_define_as_constant): Likewise.
+	* symtab.h (Symbol_table::define_special_symbol): Add is_forced_local
+	parameter. Adjust all callers.
+	* testsuite/Makefile.am (ver_test_8.sh): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* ver_test_8.sh: New test script.
+
+2016-12-21  Cary Coutant  <ccoutant@gmail.com>
+
+	* output.cc (Output_segment::first_section): Return NULL if there are
+	no sections in the segment.
+	* output.h (Output_segment::first_section_load_address): Assert that
+	first section is not NULL.
+	* symtab.cc (Symbol_table::sized_write_globals): Attach linker-created
+	segment-relative symbols to first section of the segment.
+
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	* arm.cc: Fix comment chars with high bit set.
+
+2016-12-20  Cary Coutant  <ccoutant@gmail.com>
+
+	* testsuite/Makefile.am: Add missing dependencies on gcctestdir/ld
+	or ../ld-new.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-12-19  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20949
+	* script.cc (Lex::get_token): Don't look ahead past NUL characters.
+
+2016-12-19  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/14676
+	PR gold/20983
+	* layout.h (Layout::choose_output_section): Add match_input_spec
+	parameter. Adjust all callers.
+	* layout.cc (Layout::choose_output_section): Likewise.  Pass
+	match_input_spec to Script_sections::output_section_name().
+	(Layout::create_note): Pass true for match_input_spec.
+	* script-sections.h (Script_sections::output_section_name): Add
+	match_input_spec parameter.
+	* script-sections.cc (Sections_element::output_section_name): Likewise.
+	(Output_section_definition::output_section_name): Likewise.
+	(Script_sections::output_section_name): Likewise.
+
+2016-12-19  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* arm.cc (Target_arm::Target_arm): Move initialization code ...
+	(Target_arm::do_select_as_default_target): ... to here.
+	* testsuite/Makefile.am (arm_target_lazy_init): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/arm_target_lazy_init.s: New source file.
+	* testsuite/arm_target_lazy_init.t: New linker script.
+
+2016-12-19  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20976
+	* symtab.cc (Symbol_table::sized_write_globals): Use address of
+	output section, not input section.
+	* testsuite/Makefile.am (pr20976): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/pr20976.c: New source file.
+
+2016-12-13  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20749
+	* options.h (--orphan-handling): New option.
+	(General_options::Orphan_handling): New enum.
+	(General_options::orphan_handling_enum): New method.
+	(General_options::set_orphan_handling_enum): New method.
+	(General_options::orphan_handling_enum_): New data member.
+	* options.cc (General_options::General_options): Initialize new member.
+	(General_options::finalize): Convert --orphan-handling argument to enum.
+	* script-sections.cc (Script_sections::output_section_name): Check it.
+
+2016-12-13  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20522
+	* layout.cc (Layout::choose_output_section): Add is_reloc parameter.
+	Adjust all callers.  Do not use linker script for is_reloc sections.
+	(Layout::layout_reloc): Pass is_reloc == true.
+	* layout.h (Layout::choose_output_section): Add is_reloc parameter.
+
+2016-12-12  Igor Kudrin  <ikudrin@accesssoftek.com>
+	    Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/14676
+	* script-sections.cc (Output_section_definition::output_section_name):
+	For linker-generated sections, compare with output section name.
+	* testsuite/Makefile.am (script_test_13): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/script_test_13.c: New source file.
+	* testsuite/script_test_13.sh: New script.
+	* testsuite/script_test_13.t: New linker script.
+
+2016-12-12  Cary Coutant  <ccoutant@gmail.com>
+
+	* script-sections.cc (Orphan_section_placement::update_last_alloc):
+	New method.
+	(Orphan_section_placement::find_place): Place orphan .data section
+	after either RODATA or TEXT.
+	(Script_sections::place_orphan): Call update_last_alloc for allocated
+	sections.
+	(Script_sections::create_segments): Improve handling of BSS.
+
+2016-12-13  Alan Modra  <amodra@gmail.com>
+
+	PR gold/16711
+	* testsuite/script_test_15a.sh: Allows larger p_filesz.
+	* testsuite/script_test_15b.sh: Likewise.
+	* testsuite/script_test_15c.sh: Likewise.
+
+2016-12-13  Alan Modra  <amodra@gmail.com>
+
+	PR gold/20717
+	* testsuite/pr20717.t: Add .got output section containing .toc.
+
+2016-12-11  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	PR gold/20717
+	* testsuite/Makefile.am (pr20717): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/pr20717.c: New test source file.
+	* testsuite/pr20717.sh: New test script.
+	* testsuite/pr20717.t: New test linker script.
+
+2016-12-11  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/16711
+	* output.cc (Output_section::set_final_data_size): Calculate data size
+	based on relative offset rather than file offset.
+	(Output_segment::set_section_addresses): Track file offset separately
+	from address offset.
+	(Output_segment::set_section_list_addresses): Add pfoff parameter.
+	Track file offset separately.  Don't move file offset for BSS
+	sections.
+	* output.h (Output_segment::set_section_list_addresses): Add pfoff
+	parameter.
+	* script-sections.cc (Orphan_section_placement): Add PLACE_LAST_ALLOC.
+	(Orphan_section_placement::Orphan_section_placement): Initialize it.
+	(Orphan_section_placement::output_section_init): Track last allocated
+	section.
+	(Orphan_section_placement::find_place): Place BSS after last allocated
+	section.
+	(Output_section_element_input::set_section_addresses): Always override
+	input section alignment when SUBALIGN is specified.
+	(Output_section_definition::set_section_addresses): Override alignment
+	of output section when SUBALIGN is specified.
+
+	* testsuite/Makefile.am (script_test_15a, script_test_15b)
+	(script_test_15c): New test cases.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/script_test_2.cc: Adjust expected layout.
+	* testsuite/script_test_15.c: New source file.
+	* testsuite/script_test_15a.sh: New shell script.
+	* testsuite/script_test_15a.t: New linker script.
+	* testsuite/script_test_15b.sh: New shell script.
+	* testsuite/script_test_15b.t: New linker script.
+	* testsuite/script_test_15c.sh: New shell script.
+	* testsuite/script_test_15c.t: New linker script.
+
+2016-12-08  Alan Modra  <amodra@gmail.com>
+
+	* powerpc.cc (Powerpc_relobj::stub_table): Return NULL rather
+	then asserting.
+
+2016-12-08  Alan Modra  <amodra@gmail.com>
+
+	* options.h (--stub-group-multi): Fix typo.
+
+2016-12-07  Alan Modra  <amodra@gmail.com>
+
+	* options.h (--stub-group-multi): New PowerPC option.
+	* powerpc.cc (Stub_control): Add multi_os_ var and param
+	to constructor.  Sort start_ var later.  Comment State.
+	(Stub_control::can_add_to_stub_group): Heed multi_os_.
+	(Target_powerpc::group_sections): Update.
+
+2016-12-07  Alan Modra  <amodra@gmail.com>
+
+	PR gold/20878
+	* powerpc.cc (Stub_control): Replace stubs_always_before_branch_
+	with stubs_always_after_branch_, group_end_addr_ with
+	group_start_addr_.
+	(Stub_control::can_add_to_stub_group): Rewrite to suit scanning
+	sections by increasing address.
+	(Target_powerpc::group_sections): Scan that way.  Delete corner
+	case.
+	* options.h (--stub-group-size): Update help string.
+
+2016-12-07  Alan Modra  <amodra@gmail.com>
+
+	* powerpc.cc (Stub_table_owner): Provide constructor.
+	(Powerpc_relobj::set_stub_table): Resize fill with -1.
+	(Target_powerpc::Branch_info::make_stub): Provide target debug
+	output on returning false.
+
+2016-12-05  Cary Coutant  <ccoutant@gmail.com>
+	    Tristan Gingold  <gingold@adacore.com>
+
+	* object.cc (Sized_relobj_file::do_count_local_symbols): Check
+	is_ordinary before using shndx.
+	* testsuite/Makefile.am (file_in_many_sections_test.sh): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/file_in_many_sections.c: New source file.
+	* testsuite/file_in_many_sections_test.sh: New script.
+
+2016-12-01  Cary Coutant  <ccoutant@gmail.com>
+	    Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	PR gold/20717
+	* script-sections.cc (Script_sections): Set *keep to false when
+	no match.
+
+2016-12-01  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20834
+	* target.h (Target::default_text_segment_address): Bump default
+	start address up to ABI page size.
+
+2016-12-01  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/18989
+	* options.cc (General_options::object_format_to_string): New function.
+	(General_options::copy_from_posdep_options): New function.
+	(General_options::parse_push_state): New function.
+	(General_options::parse_pop_state): New function.
+	* options.h (--push-state, --pop-state): New options.
+	(General_options::object_format_to_string): New method.
+	(General_options::set_incremental_disposition): New method.
+	(General_options::copy_from_posdep_options): New method.
+	(General_options::options_stack_): New data member.
+
+2016-12-01  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20807
+	* aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Handle
+	section symbols correctly.
+	* arm.cc (Target_arm): Likewise.
+	* powerpc.cc (Target_powerpc): Likewise.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* aarch64-reloc.def: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* aarch64.cc: Fix spelling in comments.
+	* arm.cc: Fix spelling in comments.
+	* icf.cc: Fix spelling in comments.
+	* layout.cc: Fix spelling in comments.
+	* layout.h: Fix spelling in comments.
+	* mips.cc: Fix spelling in comments.
+	* output.h: Fix spelling in comments.
+	* plugin.h: Fix spelling in comments.
+	* script-sections.h: Fix spelling in comments.
+	* script.h: Fix spelling in comments.
+	* stringpool.h: Fix spelling in comments.
+	* tilegx.cc: Fix spelling in comments.
+
+2016-11-22  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20346
+	* options.cc (One_option::print): Print "(default)" when appropriate.
+	* options.h: Clean up and re-sort options.
+	(One_option::is_default): New data member.
+	(One_option::One_option): Add is_default parameter; adjust all calls.
+	(DEFINE_var): Add is_default__ parameter; adjust all calls.
+	(DEFINE_bool): Set is_default based on default_value__.
+	(DEFINE_bool_ignore): New macro.
+	(--no-eh-frame-hdr): New option.
+	(--enable-new-dtags): Remove mention of DT_FLAGS.
+
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* configure: Regenerate.
+
+2016-11-21  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20693
+	* gold.cc (queue_middle_tasks): Force valid target earlier.
+
+2016-11-21  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* layout.cc: Include windows.h and rpcdce.h (for MinGW32).
+	(Layout::create_build_id): Generate uuid using UuidCreate().
+
+2016-11-04  Loïc Yhuel <loic.yhuel@softathome.com>
+
+	* configure.ac: add missing '$'.
+	* configure: Regenerate.
+
+2016-10-21  Gergely Nagy  <ngg@tresorit.com>
+
+	PR gold/17704
+	* icf.cc (match_sections): Add new parameter section_addraligns.
+	Check section alignment and keep the section with the strictest
+	alignment.
+	(find_identical_sections): New local variable section_addraligns.
+	Store each section's alignment.
+	* testsuite/pr17704a_test.s: New file.
+	* testsuite/Makefile.am (pr17704a_test): New test.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* powerpc.cc (Target_powerpc::Relocate::relocate): Add fall
+	through comment.
+	* tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* aarch64.cc: Spell fall through comments as "// Fall through.".
+	* arm.cc: Likewise.
+	* mips.cc: Likewise.
+	* powerpc.cc: Likewise.
+	* s390.cc: Likewise.
+	* sparc.cc: Likewise.
+	* x86_64.cc: Likewise.
+	* powerpc.cc (Target_powerpc::Relocate::relocate): Add missing
+	fall through comments.
+	* sparc.cc: (Target_sparc::Scan::global): Likewise.
+	(Target_sparc::Relocate::relocate): Likewise.
+	* tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
+	* resolve.cc (symbol_to_bits): Add missing break.
+
+2016-09-26  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20238
+	* symtab.cc (Symbol_table::define_default_version): Check that
+	unversioned symbol is defined.
+
+2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
+
+	* Makefile.in: Regenerate.
+	* configure: Likewise.
+	* testsuite/Makefile.in: Likewise.
+
+2016-09-26  Alan Modra  <amodra@gmail.com>
+
+	* aarch64.cc (Target_aarch64::is_erratum_835769_sequence): Avoid
+	compiler warning.
+	* output.cc (Output_segment::set_section_addresses): Likewise.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-09-02  Doug Kwan  <dougkwan@google.com>
+
+	* arm.cc (Target_arm::Target_arm): Move method definition outside of
+	class definition.  Add code to handle --target1-rel, --target1-abs
+	and --target2= options.
+	(Target_arm::get_reloc_reloc_type): Change method to be non-static
+	and const.
+	(Target_arm::target1_is_rel_, Target_arm::target2_reloc_): New data
+	member declaration.
+	(Target_arm::Scan::local, Target_arm::Scan::global,
+	Target_arm::Relocate::relocate,
+	Target_arm::Relocatable_size_for_reloc::get_size_for_reloc): Adjust
+	call to Target_arm::get_real_reloc_type.
+	(Target_arm::get_real_reloc_type): Use command line options to
+	determine real types of R_ARM_TARGET1 and R_ARM_TARGET2.
+	* options.h (--target1-rel, --target1-abs, --target2): New ARM-only
+	options.
+
+2016-08-31  Alan Modra  <amodra@gmail.com>
+
+	* powerpc.cc (class Stub_control): Delete stub14_group_size_
+	and has14_.  Add group_size_.
+	(Stub_control::can_add_to_stub_group): Adjust to suit.  Print
+	debug info when switching to adding sections before stubs.
+
+2016-08-31  Alan Modra  <amodra@gmail.com>
+
+	* debug.h (DEBUG_TARGET): New.
+	(DEBUG_ALL): Add DEBUG_TARGET.
+	(gold_debug): Delete FORMAT param.
+	* powerpc.cc (Stub_control::can_add_to_stub_group): Print debug ourput.
+
+2016-08-30  Alan Modra  <amodra@gmail.com>
+
+	PR 20523
+	* powerpc.cc (class Stub_control): Add has14_.  Comment owner_.
+	(Stub_control::can_add_to_stub_group): Correct grouping of
+	sections containing 14-bit external branches.  When returning
+	false, set state_ to reflect the fact that we have one section
+	for the next group.  Rewrite most of function for clarity.
+	Add and expand comments.
+	(Target_powerpc::do_relax): Print stub group size retry in hex.
+
+2016-08-26  Han Shen  <shenhan@google.com>
+
+	PR gold/20529 - relaxing loop never ends.
+
+	* powerpc.cc (Stub_table::min_size_threshold_): New member to
+	limit size.
+	(Stub_table::set_min_size_threshold): New member function.
+	(Stub_table::set_address_and_size): Add code to only allow size
+	increase.
+	(Target_powerpc::do_relax): Add code to record last size.
+
+2016-08-23  Roland McGrath  <roland@hack.frob.com>
+
+	* options.h (General_options): Grok -z stack-size.
+	* output.h (Output_segment::set_size): New method.
+	* layout.cc (Layout::create_executable_stack_info): Renamed to ...
+	(Layout::create_stack_segment): ... this.  Always create the
+	segment if -z stack-size was used.
+	(Layout::set_segment_offsets): Don't call ->set_offset on the
+	PT_GNU_STACK segment.
+
+2016-08-15  Bharathi Seshadri  <bseshadr@cisco.com>
+
+	* options.h (General_options): Add --be8 option.
+	* arm.cc (Arm_relobj::do_relocate_sections): Add code to swap for be8.
+	(Output_data_plt_arm_standard::do_fill_first_plt_entry): Likewise.
+	(Output_data_plt_arm_short::do_fill_plt_entry): Likewise.
+	(Output_data_plt_arm_long::do_fill_plt_entry): Likewise.
+	(Target_arm::do_adjust_elf_header): Do EF_ARM_BE8 adjustment.
+
+2016-08-17  Cary Coutant  <ccoutant@gmail.com>
+
+	* i386.cc (Target_i386): Reset skip_call_tls_get_addr_ after printing
+	error message.
+	* testsuite/Makefile.am (pr20216a): Add missing dependencies.
+	(pr20308a): Add -Bgcctestdir/ to compile rules.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-08-12  Roland McGrath  <roland@hack.frob.com>
+
+	PR gold/20462
+	* script-sections.cc (Script_sections::release_segments):
+	Reset this->segments_created_.
+
+2016-08-12  Roland McGrath  <roland@hack.frob.com>
+
+	* yyscript.y (HIDDEN): New %token.
+	(assignment): Handle HIDDEN(string = expr) syntax.
+	* script.cc (script_keyword_parsecodes): Add HIDDEN.
+
+2016-08-10  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20216
+	* x86_64.cc (Target_x86_64::Relocate::relocate): Add check for
+	R_X86_64_GOTPCREL. Reset skip_call_tls_get_addr_ after printing
+	error message.
+	* testsuite/Makefile.am (pr20216_gd.o): Add -Bgcctestdir/.
+	(pr20216_ld.o): Likewise.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-08-10  James Clarke  <jrtc27@jrtc27.com>
+
+	PR gold/20443
+	* symtab.cc (Symbol_table::add_from_relobj): Handle NULL symbols,
+	which will be present for STT_SPARC_REGISTER.
+	(Symbol_table::add_from_pluginobj): Likewise.
+	(Symbol_table::add_from_dynobj): Likewise.
+	(Symbol_table::add_from_incrobj): Removed dead code.
+
+2016-08-10  James Clarke  <jrtc27@jrtc27.com>
+
+	PR gold/20442
+	* sparc.cc (Target_sparc::Relocate::relocate): R_SPARC_GOTDATA_OP_LOX10
+	should fall back on R_SPARC_GOT10, not R_SPARC_GOT13.
+
+2016-08-10  James Clarke  <jrtc27@jrtc27.com>
+
+	PR gold/20441
+	* sparc.cc (Target_sparc::Scan::check_non_pic): Allow R_SPARC_32 on
+	sparc64.
+
+2016-06-29  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/20310
+	* testsuite/dynamic_list.sh: Remove check for _ZdlPv.
+
+2016-06-29  Cary Coutant  <ccoutant@gmail.com>
+
+	* testsuite/Makefile.am (MOSTLYCLEANFILES): Add eh_test_2.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-06-30  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/Makefile.am (memory_test, memory_test_2): Pass
+	-Wl,-z to gcc, not plain -z.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-06-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gold/20308
+	* i386.cc (Target_i386::Relocate::relocate): Allow
+	R_386_GOT32X relocation against ___tls_get_addr.
+	(Target_i386::Relocate::tls_gd_to_ie): Support indirect
+	call to __tls_get_addr.
+	(Target_i386::Relocate::tls_gd_to_le): Likewise.
+	(Target_i386::Relocate::tls_ld_to_le): Likewise.
+	* testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test,
+	pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test.
+	(pr20308a_test_SOURCES): New.
+	(pr20308a_test_DEPENDENCIES): Likewise.
+	(pr20308a_test_CFLAGS): Likewise.
+	(pr20308a_test_LDFLAGS): Likewise.
+	(pr20308a_test_LDADD): Likewise.
+	(pr20308b_test_SOURCES): Likewise.
+	(pr20308b_test_DEPENDENCIES): Likewise.
+	(pr20308b_test_CFLAGS): Likewise.
+	(pr20308b_test_LDFLAGS): Likewise.
+	(pr20308b_test_LDADD): Likewise.
+	(pr20308c_test_SOURCES): Likewise.
+	(pr20308c_test_DEPENDENCIES): Likewise.
+	(pr20308c_test_CFLAGS): Likewise.
+	(pr20308c_test_LDFLAGS): Likewise.
+	(pr20308c_test_LDADD): Likewise.
+	(pr20308d_test_SOURCES): Likewise.
+	(pr20308d_test_DEPENDENCIES): Likewise.
+	(pr20308d_test_CFLAGS): Likewise.
+	(pr20308d_test_LDFLAGS): Likewise.
+	(pr20308d_test_LDADD): Likewise.
+	(pr20308e_test_SOURCES): Likewise.
+	(pr20308e_test_DEPENDENCIES): Likewise.
+	(pr20308e_test_CFLAGS): Likewise.
+	(pr20308e_test_LDFLAGS): Likewise.
+	(pr20308e_test_LDADD): Likewise.
+	(pr20308a.so): Likewise.
+	(pr20308b.so): Likewise.
+	(pr20308_gd.o): Likewise.
+	(pr20308_ld.o): Likewise.
+	(MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so.
+	* testsuite/Makefile.in: Regenerated.
+	* testsuite/pr20308_def.c: New file.
+	* testsuite/pr20308_gd.S: Likewise.
+	* testsuite/pr20308_ld.S: Likewise.
+	* testsuite/pr20308_main.c: Likewise.
+
+2016-06-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gold/20216
+	* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
+	AM_CONDITIONAL.
+	* configure: Regenerated.
+	* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
+	R_X86_64_GOTPCRELX relocation against __tls_get_addr.
+	(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
+	call to __tls_get_addr.
+	(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
+	(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
+	* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
+	pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
+	(pr20216a_test_SOURCES): New.
+	(pr20216a_test_DEPENDENCIES): Likewise.
+	(pr20216a_test_CFLAGS): Likewise.
+	(pr20216a_test_LDFLAGS): Likewise.
+	(pr20216a_test_LDADD): Likewise.
+	(pr20216b_test_SOURCES): Likewise.
+	(pr20216b_test_DEPENDENCIES): Likewise.
+	(pr20216b_test_CFLAGS): Likewise.
+	(pr20216b_test_LDFLAGS): Likewise.
+	(pr20216b_test_LDADD): Likewise.
+	(pr20216c_test_SOURCES): Likewise.
+	(pr20216c_test_DEPENDENCIES): Likewise.
+	(pr20216c_test_CFLAGS): Likewise.
+	(pr20216c_test_LDFLAGS): Likewise.
+	(pr20216c_test_LDADD): Likewise.
+	(pr20216d_test_SOURCES): Likewise.
+	(pr20216d_test_DEPENDENCIES): Likewise.
+	(pr20216d_test_CFLAGS): Likewise.
+	(pr20216d_test_LDFLAGS): Likewise.
+	(pr20216d_test_LDADD): Likewise.
+	(pr20216e_test_SOURCES): Likewise.
+	(pr20216e_test_DEPENDENCIES): Likewise.
+	(pr20216e_test_CFLAGS): Likewise.
+	(pr20216e_test_LDFLAGS): Likewise.
+	(pr20216e_test_LDADD): Likewise.
+	(pr20216a.so): Likewise.
+	(pr20216b.so): Likewise.
+	(pr20216_gd.o): Likewise.
+	(pr20216_ld.o): Likewise.
+	(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
+	* testsuite/Makefile.in: Regenerated.
+	* testsuite/pr20216_def.c: New file.
+	* testsuite/pr20216_gd.S: Likewise.
+	* testsuite/pr20216_ld.S: Likewise.
+	* testsuite/pr20216_main.c: Likewise.
+
+2016-06-29  Alan Modra  <amodra@gmail.com>
+
+	* script_test_12.t: Delete .plt, specify 64k page size.
+	* script_test_12i.t: Likewise.
+
+2016-06-29  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/plugin_layout_with_alignment.c: Explicitly align all
+	variables.
+
+2016-06-29  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/Makefile.am (copy_test_protected): Disable for powerpc.
+	* testsuite/Makefile.in: Regenerate.
+
+2016-06-28  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* aarch64-reloc.def (NONE): New relocation.
+	* aarch64.cc (Target_aarch64::Scan::local): Handle R_AARCH64_NONE.
+	(Target_aarch64::Scan::global): Likewise.
+	* testsuite/Makefile.am (aarch64_reloc_none): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/aarch64_reloc_none.s: New test source file.
+	* testsuite/aarch64_reloc_none.sh: New test script.
+
+2016-06-28  Sriraman Tallam  <tmsriram@google.com>
+
+	* x86_64.cc (Lazy_view): New class.
+	(can_convert_mov_to_lea): Templatize function.  Make the function
+	check for appropriate relocation types and use the view parameter
+	to get section contents.
+	(can_convert_callq_to_direct): New function.
+	(Target_x86_64<size>::Scan::global): Refactor.
+	(Target_x86_64<size>::Relocate::relocate): Refactor. Change any indirect
+	call via GOT that can be converted.
+	* testsuite/Makefile.am (x86_64_indirect_call_to_direct.sh): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/x86_64_indirect_call_to_direct1.s: New file.
+	* testsuite/x86_64_indirect_jump_to_direct1.s: New file.
+
+2016-06-28  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* aarch64.cc (Target_aarch64::Scan::local): Move the call to got_section
+	from the top level to the places of its use.
+
+2016-06-28  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	PR gold/18098
+	* script-c.h (Sort_wildcard): Add SORT_WILDCARD_BY_INIT_PRIORITY.
+	* script-sections.cc (Input_section_sorter::get_init_priority): New method.
+	(Input_section_sorter::operator()): Handle SORT_WILDCARD_BY_INIT_PRIORITY.
+	(Output_section_element_input::print): Likewise.
+	* script.cc (script_keyword_parsecodes): Add entry SORT_BY_INIT_PRIORITY.
+	* yyscript.y (SORT_BY_INIT_PRIORITY): New token.
+	(wildcard_section): Handle SORT_BY_INIT_PRIORITY.
+
+	* testsuite/Makefile.am (script_test_14): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/script_test_14.s: New test source file.
+	* testsuite/script_test_14.sh: New test script.
+	* testsuite/script_test_14.t: New test linker script.
+
+2016-06-28  James Clarke  <jrtc27@jrtc27.com>
+
+	* sparc.cc (Target_sparc::Scan::local): Don't convert R_SPARC_32
+	to R_SPARC_RELATIVE if class is ELFCLASS64.
+	(Target_sparc::Scan::global): Likewise.
+
+2016-06-23  Cary Coutant  <ccoutant@gmail.com>
+	    Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	PR gold/15370
+	* script-sections.cc
+	(Output_section_element_input::set_section_addresses): Keep bin_count
+	separate from input_pattern_count.
+	* testsuite/script_test_12.t: Add another section .x4.
+	* testsuite/script_test_12i.t: Likewise.
+	* testsuite/script_test_12a.c: Likewise.
+	* testsuite/script_test_12b.c: Likewise.
+
+2016-06-23  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* gold-threads.cc (impl_threads::Lock_impl_threads): Fix typos.
+
+2016-06-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20283
+	* NEWS: Mention --enable-relro.
+	* configure.ac: Add --enable-relro.
+	(DEFAULT_LD_Z_RELRO): New.  Set by --enable-relro and default
+	to 1.
+	* config.in: Regenerated.
+	* configure: Likewise.
+	* options.h (General_options::relro): Default to
+	DEFAULT_LD_Z_RELRO.
+
+2016-06-20  Cary Coutant  <ccoutant@gmail.com>
+
+	* NEWS: Add new features in 1.12.
+	* version.cc (version_string): Bump to 1.12.
+
+2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gold/20245
+	* i386.cc (Target_i386::first_plt_entry_offset): Return 0 if
+	plt_ is NULL.
+	(Target_i386::plt_entry_size): Likewise.
+	(Target_x86_64<size>::first_plt_entry_offset): Likewise.
+	(Target_x86_64<size>::plt_entry_size): Likewise.
+
+2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+	* mips.cc (Target_mips::Target_mips): Initialize rld_map_.
+	(Target_mips::rld_map_): New data member.
+	(Target_mips::do_finalize_sections): Add support for
+	DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags,
+	.rld_map section, and __RLD_MAP symbol.
+	(Target_mips::do_dynamic_tag_custom_value): Add support for
+	DT_MIPS_RLD_MAP_REL dynamic tag.
+	* output.cc (Output_data_dynamic::get_entry_offset): New method
+	definition.
+	* output.h (Output_data_dynamic::get_entry_offset): New method
+	declaration.
+
+2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+	* mips.cc (Mips_relocate_functions::relpc16): Add unaligned check.
+
+2016-06-20  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+	* mips.cc (relocation_needs_la25_stub): Add support for relocs:
+	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
+	(hi16_reloc): Add support for R_MIPS_PCHI16 relocation.
+	(is_matching_lo16_reloc): Likewise.
+	(lo16_reloc): Add support for R_MIPS_PCLO16 relocation.
+	(Mips_output_data_plt::plt_entry_r6): New static data member for
+	R6 PLT entry.
+	(Target_mips::is_output_r6): New method.
+	(Target_mips::Mips_mach): Add new enum constants.
+	(Mips_relocate_functions::Status): Likewise.
+	(Mips_relocate_functions::pchi16_relocs): New static data member.
+	(Mips_relocate_functions::relpc21): New method.
+	(Mips_relocate_functions::relpc26): Likewise.
+	(Mips_relocate_functions::relpc18): Likewise.
+	(Mips_relocate_functions::relpc19): Likewise.
+	(Mips_relocate_functions::relpchi16): Likewise.
+	(Mips_relocate_functions::do_relpchi16): Likewise.
+	(Mips_relocate_functions::relpclo16): Likewise.
+	(Mips_output_data_plt::do_write): Add support for Mips r6 plt
+	entry.
+	(Target_mips::mips_32bit_flags): Add E_MIPS_ARCH_32R6 support.
+	(Target_mips::elf_mips_mach): Add E_MIPS_ARCH_32R6 and
+	E_MIPS_ARCH_64R6 support.
+	(Target_mips::update_abiflags_isa): Likewise.
+	(mips_get_size_for_reloc): Add support for relocs: R_MIPS_PCHI16,
+	R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3 and
+	R_MIPS_PC19_S2.
+	(Target_mips::Scan::local): Add support for relocs: R_MIPS_PCHI16
+	and R_MIPS_PCLO16.
+	(Target_mips::Scan::global): Add support for relocs:
+	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
+	(Target_mips::Relocate::relocate): Call functions for resolving
+	Mips32r6 and Mips64r6 relocations, and print error message for
+	STATUS_PCREL_UNALIGNED.
+	(Target_mips::Scan::get_reference_flags): Add support for relocs:
+	R_MIPS_PCHI16, R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2,
+	R_MIPS_PC18_S3 and R_MIPS_PC19_S2.
+	(Target_mips::elf_mips_mach_name): Add E_MIPS_ARCH_32R6 and
+	E_MIPS_ARCH_64R6 support.
+
+2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gold/20246
+	* testsuite/script_test_2.t: Add .got.plt after .got.
+
+2016-06-10  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+	* mips.cc (struct Mips_abiflags): New struct.
+	(Mips_relobj::Mips_relobj): Initialize attributes_section_data_
+	and abiflags_.
+	(Mips_relobj::~Mips_relobj): Delete object pointed by
+	attributes_section_data_.
+	(Mips_relobj::abiflags): New method.
+	(Mips_relobj::attributes_section_data): Likewise.
+	(Mips_relobj::attributes_section_data_): New data member.
+	(Mips_relobj::abiflags_): Likewise.
+	(class Mips_output_section_abiflags): New class.
+	(Target_mips::Target_mips): Initialize attributes_section_data_,
+	abiflags_ and has_abiflags_section_.
+	(Target_mips::do_should_include_section): Don't emit input
+	.MIPS.abiflags sections to output .MIPS.abiflags.
+	(Target_mips::Mips_mach): Add new enum constants.
+	(Target_mips::mips_isa_ext_mach): New method.
+	(Target_mips::mips_isa_ext): Likewise.
+	(Target_mips::update_abiflags_isa): Likewise.
+	(Target_mips::infer_abiflags): Likewise.
+	(Target_mips::create_abiflags): Likewise.
+	(Target_mips::fp_abi_string): Likewise.
+	(Target_mips::select_fp_abi): Likewise.
+	(Target_mips::merge_obj_attributes): Likewise.
+	(Target_mips::merge_obj_abiflags): Likewise.
+	(Target_mips::level_rev): Likewise.
+	(Target_mips::merge_obj_e_flags): Rename from
+	merge_processor_specific_flags. Remove dyn_obj argument,
+	call update_abiflags_isa when needed, compare NaN encodings and
+	compare FP64 state.
+	(Target_mips::add_machine_extensions): Add two machine extensions
+	and fix one.
+	(Target_mips::attributes_section_data_): New data member.
+	(Target_mips::abiflags_): Likewise.
+	(Target_mips::has_abiflags_section_): Likewise.
+	(Mips_relobj::do_read_symbols): Read .gnu.attributes and
+	.MIPS.abiflags sections if they exists.
+	(Target_mips::elf_mips_mach): Add E_MIPS_MACH_5900 and
+	E_MIPS_MACH_OCTEON3 support.
+	(Target_mips::do_adjust_elf_header): Setup EI_ABIVERSION flag.
+	(Target_mips::do_finalize_sections): Merge .gnu.attributes and
+	.MIPS.abiflags sections from input. Create these sections if
+	needed.
+	(Target_mips::elf_mips_mach_name): Add E_MIPS_MACH_5900 and
+	E_MIPS_MACH_OCTEON3 support, and change strings for
+	E_MIPS_MACH_LS2E, E_MIPS_MACH_LS2F and E_MIPS_MACH_LS3A just
+	to match bfd.
+
+2016-06-10  Vladimir Radosavljevic  <Vladimir.Radosavljevic@imgtec.com>
+
+	* mips.cc (Mips_relobj::Mips_relobj): Initialize
+	has_reginfo_section_.
+	(Mips_relobj::has_reginfo_section_): New data member.
+	(Mips_relobj::has_reginfo_section): New method.
+	(class Mips_output_section_reginfo): Change base class to
+	Output_section_data, and set masks of the output .reginfo section
+	in constructor.
+	(Mips_output_section_reginfo::as_mips_output_section_reginfo):
+	Remove.
+	(Mips_output_section_reginfo::set_masks): Likewise.
+	(Mips_output_section_reginfo::set_final_data_size): Likewise.
+	(Mips_output_section_reginfo::do_print_to_mapfile): New method.
+	(Target_mips::do_make_output_section): Remove.
+	(Mips_relobj::do_read_symbols): Set has_reginfo_section_ to true
+	if the object contains a .reginfo section.
+	(Target_mips::do_finalize_sections): Create a .reginfo output
+	section if needed.
+
+2016-06-09  Artemiy Volkov  <artemiyv@acm.org>
+
+	* mips.cc (Mips_output_data_got::do_write): Add missing template
+	args via typedef.
+
+2016-05-30  Marcin Kościelnicki  <koriakin@0x04.net>
+
+	PR/19960
+	* s390.cc (Target_s390::ss_code_st_r14): Removed.
+	(Target_s390::ss_code_l_r14): Removed.
+	(Target_s390::ss_code_ear): Removed.
+	(Target_s390::ss_code_c): Removed.
+	(Target_s390::ss_match_st_r14): New function.
+	(Target_s390::ss_match_l_r14): New function.
+	(Target_s390::ss_match_mcount): Call ss_match_{l,st}_r14 instead
+	of matching code directly.
+	(Target_s390::ss_match_ear): New function.
+	(Target_s390::ss_match_c): New function.
+	(Target_s390::do_calls_non_split): Call ss_match_{ear,c} instead
+	of matching code directly.
+
+2016-05-19  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19823
+	* copy-relocs.cc (Copy_relocs::make_copy_reloc): Add object
+	parameter; check for protected symbol.
+	* copy-relocs.h (Copy_relocs::make_copy_reloc): Add object parameter.
+	* mips.cc (Mips_copy_relocs): Adjust call to make_copy_reloc.
+	* symtab.cc (Symbol::init_fields): Initialize is_protected_.
+	(Symbol_table::add_from_dynobj): Mark protected symbols.
+	* symtab.h (Symbol::is_protected): New method.
+	(Symbol::set_is_protected): New method.
+	(Symbol::is_protected_): New data member.
+
+	* testsuite/Makefile.am (copy_test_protected): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/copy_test.cc (main): Add legal reference to protected
+	symbol.
+	* testsuite/copy_test_v1.cc (main): Likewise.
+	* testsuite/copy_test_2.cc (ip): Add protected symbol.
+	* testsuite/copy_test_protected.cc: New test source file.
+	* testsuite/copy_test_protected.sh: New test script.
+
+2016-05-19  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
+
+	* mips.cc (Mips_got_entry::Mips_got_entry): Remove object argument
+	for global got symbols, and set addend to 0.
+	(Mips_got_entry::hash): Change hash algorithm.
+	(Mips_got_entry::equals): Refactor.
+	(Mips_got_entry::object): Return input object for local got symbols
+	from union d.
+	(Mips_got_entry::addend): Change return of the relocation addend.
+	(Mips_got_entry::addend_): Move from union d.
+	(Mips_got_entry::object_): Move into union d.
+	(class Mips_symbol_hash): New class.
+	(Mips_got_info::Global_got_entry_set): New type.
+	(Mips_got_info::global_got_symbols): Change return type to
+	Global_got_entry_set.
+	(Mips_got_info::global_got_symbols_): Change type to
+	Global_got_entry_set.
+	(Mips_symbol::hash): New method.
+	(Mips_output_data_la25_stub::symbols_): Change type to std::vector.
+	(Mips_output_data_mips_stubs::Mips_stubs_entry_set): New type.
+	(Mips_output_data_mips_stubs::symbols_): Change type to
+	Mips_stubs_entry_set.
+	(Mips_got_info::record_global_got_symbol): Don't pass object
+	argument when creating global got symbol.
+	(Mips_got_info::record_got_entry): Remove find before inserting
+	got entries.
+	(Mips_got_info::add_reloc_only_entries): Change type of iterator
+	to Global_got_entry_set.
+	(Mips_got_info::count_got_symbols): Likewise.
+	(Mips_output_data_la25_stub::create_la25_stub): Use push_back
+	for adding entries to symbols_.
+	(Mips_output_data_la25_stub::do_write): Change type of iterator
+	to std::vector.
+	(Mips_output_data_mips_stubs::set_lazy_stub_offsets): Change type
+	of iterator to Mips_stubs_entry_set.
+	(Mips_output_data_mips_stubs::set_needs_dynsym_value): Likewise.
+	(Mips_output_data_mips_stubs::do_write): Likewise.
+
+2016-05-06  Han Shen  <shenhan@google.com>
+
+	PR gold/19987.
+
+	* aarch64-reloc.def: New relocation type.
+	* aarch64.cc (AArch64_relocate_functions::Page): Changed to public.
+	(Target_aarch64::Scan::local): Add R_AARCH64_LD64_GOTPAGE_LO15.
+	(Target_aarch64::Scan::global): Add R_AARCH64_LD64_GOTPAGE_LO15.
+	(Target_aarch64::Relocate::relocate): Implement R_AARCH64_LD64_GOTPAGE_LO15.
+
+2016-04-28  Nick Clifton  <nickc@redhat.com>
+
+	* po/zh_CN.po: Updated Chinese (simplified) translation.
+
+2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated with automake 1.11.6.
+	* aclocal.m4: Likewise.
+	* testsuite/Makefile.in: Likewise.
+
+2016-03-30  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/16979
+	* symtab.cc (Symbol_table::define_default_version): Check for case
+	where symbols are both in different shared objects.
+
+2016-03-27  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/16111
+	* i386.cc (Target_i386): Add check for fully-resolved symbol for
+	R_386_GOTOFF.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	* configure: Regenerate.
+
+2016-03-21  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19842
+	* errors.cc (Errors::undefined_symbol): Add info message when
+	symbol should have been provided by a plugin.
+	* target-reloc.h (issue_undefined_symbol_error): Check for
+	placeholder symbols defined in discarded sections.
+	* testsuite/Makefile.am (plugin_test_9b): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/plugin_test_9b_elf.cc: New test source file.
+	* testsuite/plugin_test_9b_ir.cc: New test source file.
+
+2016-03-20  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19002
+	* ehframe.cc (Eh_frame::read_fde): Check for dropped functions.
+	* testsuite/Makefile.am (eh_test_2): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/eh_test_2.sh: New test script.
+	* testsuite/eh_test_a.cc (bar): Make it comdat.
+	* testsuite/eh_test_b.cc (bar): Add a duplicate copy.
+
+2016-03-18  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
+
+	* mips.cc (Mips_relobj::is_n64_): Remove.
+	(Target_mips::ei_class_): Likewise.
+	(Mips_relobj::is_newabi): Call methods.
+	(Mips_relobj::is_n64): Change checking for N64 ABI.
+	(Target_mips::is_output_n64): Likewise.
+	(Target_mips::merge_processor_specific_flags): Remove ei_class
+	argument, and remove comparing ei_class.
+	(Target_mips::do_adjust_elf_header): Remove setting EI_CLASS field
+	of the ELF header.
+	(Target_mips::do_finalize_sections): Don't pass ei_class argument
+	to merge_processor_specific_flags.
+	(Target_mips::elf_mips_abi_name): Remove ei_class argument, and
+	change checking for N64 ABI.
+
+2016-03-17  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
+
+	* mips.cc (enum Special_relocation_symbol): New enum type.
+	(is_readonly_section): New function.
+	(eh_reloc): Likewise.
+	(Mips_got_entry::is_section_symbol_): New member.
+	(Mips_got_entry::is_section_symbol): New method.
+	(Mips_got_info::record_local_got_symbol): Add is_section_symbol
+	argument.
+	(Mips_relobj::mips_elf_options_section_name): New method.
+	(Mips_output_data_got::record_local_got_symbol): Add
+	is_section_symbol argument, and pass it to
+	Mips_got_info::record_local_got_symbol.
+	(Mips_output_data_got::got_offset): Add addend argument, and pass
+	it to Relobj::local_got_offset.
+	(struct Mips_output_reloc_writer): New type.
+	(class Mips_output_data_reloc): New class.
+	(Mips_output_data_plt::Reloc_section): Change type to
+	Mips_output_data_reloc.
+	(Target_mips::Reloc_section): Likewise.
+	(Mips_reloc_types::get_r_addend): Remove unsigned from return type.
+	(Mips_classify_reloc::get_r_type2): New method.
+	(Mips_classify_reloc::get_r_type3): Likewise.
+	(Mips_classify_reloc::get_r_ssym): Likewise.
+	(Target_mips::Reloca_section): Remove.
+	(Relocate::should_apply_static_reloc): Rename from
+	should_apply_r_mips_32_reloc.
+	(Target_mips::copy_reloc): Replace Reltype parameter with r_type
+	and r_offset.
+	(Mips_relocate_functions::Valtype): New type.
+	(Mips_relocate_functions::Valtype64): New type.
+	(Mips_relocate_functions::check_overflow): New method.
+	(Mips_relocate_functions::mips_reloc_unshuffle): Move to public
+	interface.
+	(Mips_relocate_functions::mips_reloc_shuffle): Likewise.
+	(Mips_relocate_functions::rel16): Add support for resolving
+	relocations for Mips64.
+	(Mips_relocate_functions::rel32): Likewise.
+	(Mips_relocate_functions::reljalr): Likewise.
+	(Mips_relocate_functions::relpc32): Likewise.
+	(Mips_relocate_functions::rel26): Likewise.
+	(Mips_relocate_functions::relpc16): Likewise.
+	(Mips_relocate_functions::relmicromips_pc7_s1): Likewise.
+	(Mips_relocate_functions::relmicromips_pc10_s1): Likewise.
+	(Mips_relocate_functions::relmicromips_pc16_s1): Likewise.
+	(Mips_relocate_functions::do_relhi16): Likewise.
+	(Mips_relocate_functions::do_relgot16_local): Likewise.
+	(Mips_relocate_functions::rello16): Likewise.
+	(Mips_relocate_functions::relgot): Likewise.
+	(Mips_relocate_functions::relgotpage): Likewise.
+	(Mips_relocate_functions::relgotofst): Likewise.
+	(Mips_relocate_functions::relgot_hi16): Likewise.
+	(Mips_relocate_functions::relgot_lo16): Likewise.
+	(Mips_relocate_functions::relgprel): Likewise.
+	(Mips_relocate_functions::relgprel32): Likewise.
+	(Mips_relocate_functions::tlsrelhi16): Likewise.
+	(Mips_relocate_functions::tlsrello16): Likewise.
+	(Mips_relocate_functions::tlsrel32): Likewise.
+	(Mips_relocate_functions::relsub): Likewise.
+	(Mips_relocate_functions::releh): New method.
+	(Mips_relocate_functions::rel64): Likewise.
+	(Mips_got_info::record_local_got_symbol): Add is_section_symbol and
+	pass it to Mips_got_entry.
+	(Mips_got_info::add_local_entries): Pass addend argument
+	to code functions, and for STT_SECTION symbols call
+	add_symbolless_local_addend.
+	(Mips_got_info::add_tls_entries): Pass addend argument to code
+	functions.
+	(Mips_relobj::do_read_symbols): Read gp value that was used to
+	create object.
+	(Mips_output_data_plt::plt_entry): Remove opcode from l[wd]
+	instruction. Opcode for instruction will be selected later.
+	(Target_mips::gc_process_relocs): Add case for SHT_RELA.
+	(Target_mips::scan_relocatable_relocs): Likewise.
+	(Target_mips::emit_relocs_scan): Likewise.
+	(Target_mips::relocate_relocs): Likewise.
+	(Target_mips::do_finalize_sections): Skip objects for merging
+	processor specific flags in which all input sections will be
+	discarded.
+	(mips_get_size_for_reloc): Add case for R_MIPS_EH.
+	(Target_mips::Scan::get_reference_flags): Likewise.
+	(Target_mips::relocate_special_relocatable): Call rel26 method with
+	calculate_only and calculated_value arguments.
+	(Target_mips::Scan::local): Add case for R_MIPS_EH. Don't create a
+	dynamic relocation against a readonly sections, and pass
+	is_section_symbol to Mips_got_info::record_local_got_symbol.
+	(Target_mips::Scan::global): Add case for R_MIPS_EH. Don't create a
+	dynamic relocation against a readonly sections, and pass r_type
+	and r_offset to Target_mips::copy_reloc.
+	(Target_mips::Relocate::relocate): Add support for resolving
+	relocations for Mips64.
+	(Target_mips::mips_info): Add case for Mips64 default dynamic
+	linker name.
+	(Target_selector_mips): Correct emulation names.
+
+2016-03-17  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
+
+	* mips.cc (class Mips_output_data_la25_stub): Add
+	do_print_to_mapfile function.
+
+2016-03-17  Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
+
+	* mips.cc (Mips_classify_reloc::put_r_info): Call 32bit version of
+	elf_r_info.
+
+2016-03-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/plugin_layout_with_alignment.cc: Renamed to ..
+	* testsuite/plugin_layout_with_alignment.c: This.
+	* testsuite/Makefile.am (plugin_layout_with_alignment.o): Updated.
+	(plugin_layout_with_alignment): Likewise.
+	* testsuite/Makefile.in: Regenerated.
+
+2016-03-08  Cary Coutant  <ccoutant@gmail.com>
+
+	PR 19751
+	* testsuite/Makefile.am (retain_symbols_file_test): Remove check
+	for constructor.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/dynamic_list.sh: Likewise.
+	* testsuite/retain_symbols_file_test.sh: Likewise.
+
+2016-03-08  Cary Coutant  <ccoutant@gmail.com>
+
+	PR 19751
+	* arm.cc (Reloc_stub::Key::name): Add unused attribute.
+	* dirsearch.cc (Dir_caches::~Dir_caches): Likewise.
+
+2016-03-08  Cary Coutant  <ccoutant@gmail.com>
+	    Vladimir Radosavljevic  <vladimir.radosavljevic@imgtec.com>
+
+	* output.cc (Output_reloc_writer): New type.
+	(Output_data_reloc_base::do_write): Move implementation to template
+	in output.h and replace with invocation of template.
+	* output.h (Output_file): Move to top of file.
+	(Output_reloc::get_symbol_index): Move to public interface.
+	(Output_reloc::get_address): Likewise.
+	(Output_data_reloc_base::do_write_generic): New function template.
+
+2016-03-04  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19019
+	PR gold/19763
+	* symtab.cc: Instantiate Sized_symbol::init_constant and
+	Sized_symbol::init_undefined.
+
+2016-03-03  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19019
+	* layout.h (Layout::add_target_specific_dynamic_tag): New function.
+	* layout.cc (Layout::add_target_specific_dynamic_tag): New function.
+	* mips.cc (Target_mips::make_symbol): Adjust function signature.
+	* sparc.cc (Target_sparc::Target_sparc): Initialize register_syms_.
+	(Target_sparc::do_is_defined_by_abi): Remove test for
+	STT_SPARC_REGISTER.
+	(Target_sparc::Register_symbol): New struct type.
+	(Target_sparc::register_syms_): New data member.
+	(Target_sparc<64, true>::sparc_info): Set has_make_symbol to true.
+	(Target_sparc::make_symbol): New function.
+	(Target_sparc::do_finalize_sections): Add register symbols and new
+	dynamic table entries.
+	* symtab.h (Sized_symbol::init_undefined): Add value parameter.
+	(Symbol_table::add_target_global_symbol): New function.
+	(Symbol_table::target_symbols_): New data member.
+	* symtab.cc (Sized_symbol::init_undefined): Add value parameter.
+	(Symbol_table::Symbol_table): Initialize target_symbols_.
+	(Symbol_table::add_from_object): Pass additional parameters to
+	Target::make_symbol.
+	(Symbol_table::define_special_symbol): Likewise.
+	(Symbol_table::add_undefined_symbol_from_command_line): Pass 0 for
+	undefined symbol value.
+	(Symbol_table::set_dynsym_indexes): Process target-specific symbols.
+	(Symbol_table::sized_finalize): Likewise.
+	(Symbol_table::sized_write_globals): Likewise.
+	* target.h (Sized_target::make_symbol): Add name, st_type, object,
+	st_shndx, and value parameters.
+
+2016-03-03  Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
+
+	* plugin.cc (do_should_include_member): Ignore LDPK_UNDEF and
+	LDPK_WEAKUNDEF symbols.
+
+2016-03-03  Than McIntosh  <thanm@google.com>
+
+	* plugin.cc (Plugin::load): Include hooks for get_input_section_size
+	and get_input_section_alignment in transfer vector.
+	(get_input_section_alignment): New function.
+	(get_input_section_size): New function.
+	* testsuite/Makefile.am: Add plugin_layout_with_alignment.sh test.
+	* testsuite/Makefile.in: [Regenerate.]
+	* testsuite/plugin_section_alignment.cc: New test file.
+	* testsuite/plugin_layout_with_alignment.cc: New test file.
+	* testsuite/plugin_layout_with_alignment.sh: New test file.
+
+2016-03-03  Evgenii Stepanov  <eugenis@google.com>
+
+	* plugin.h (Pluginobj::get_symbol_resolution_info): Add version
+	parameter.
+	* plugin.cc (get_symbols_v3): New function.
+	(Plugin::load): Add LDPT_GET_SYMBOLS_V3.
+	(Pluginobj::get_symbol_resolution_info): Return LDPS_NO_SYMS when using
+	new version.
+
+2016-02-26  Egor Kochetov  <egor.kochetov@intel.com>
+	    Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19735
+	* ehframe.h (Cie::fde_encoding): New method.
+	* ehframe.cc (Eh_frame::read_fde): Discard FDEs for zero-length
+	address ranges.
+
+2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/Makefile.am (x86_64_mov_to_lea5.o): Pass
+	-mrelax-relocations=yes to $(TEST_AS).
+	(x86_64_mov_to_lea6.o): Likewise.
+	(x86_64_overflow_pc32.o): Remove duplicated target.
+	* testsuite/Makefile.in: Regenerated.
+
+2016-02-15  Marcin Kościelnicki  <koriakin@0x04.net>
+
+	* s390.cc (Target_s390::match_view_u): New helper method.
+	(Target_s390::do_is_call_to_non_split): New method.
+	(Target_s390::ss_code_st_r14): New const.
+	(Target_s390::ss_code_l_r14): New const.
+	(Target_s390::ss_code_bras_8): New const.
+	(Target_s390::ss_code_l_basr): New const.
+	(Target_s390::ss_code_a_basr): New const.
+	(Target_s390::ss_code_ear): New const.
+	(Target_s390::ss_code_c): New const.
+	(Target_s390::ss_code_larl): New const.
+	(Target_s390::ss_code_brasl): New const.
+	(Target_s390::ss_code_jg): New const.
+	(Target_s390::ss_code_jgl): New const.
+	(Target_s390::ss_match_mcount): New helper method.
+	(Target_s390::ss_match_l): New helper method.
+	(Target_s390::ss_match_ahi): New helper method.
+	(Target_s390::ss_match_alfi): New helper method.
+	(Target_s390::ss_match_cr): New helper method.
+	(Target_s390::do_calls_non_split): New method.
+	* testsuite/Makefile.am: Added new tests.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/split_s390.sh: New test.
+	* testsuite/split_s390_1_a1.s: New test.
+	* testsuite/split_s390_1_a2.s: New test.
+	* testsuite/split_s390_1_n1.s: New test.
+	* testsuite/split_s390_1_n2.s: New test.
+	* testsuite/split_s390_1_z1.s: New test.
+	* testsuite/split_s390_1_z2.s: New test.
+	* testsuite/split_s390_1_z3.s: New test.
+	* testsuite/split_s390_1_z4.s: New test.
+	* testsuite/split_s390_2_ns.s: New test.
+	* testsuite/split_s390_2_s.s: New test.
+	* testsuite/split_s390x_1_a1.s: New test.
+	* testsuite/split_s390x_1_a2.s: New test.
+	* testsuite/split_s390x_1_n1.s: New test.
+	* testsuite/split_s390x_1_n2.s: New test.
+	* testsuite/split_s390x_1_z1.s: New test.
+	* testsuite/split_s390x_1_z2.s: New test.
+	* testsuite/split_s390x_1_z3.s: New test.
+	* testsuite/split_s390x_1_z4.s: New test.
+	* testsuite/split_s390x_2_ns.s: New test.
+	* testsuite/split_s390x_2_s.s: New test.
+
+2016-02-11 Rahul Chaudhry  <rahulchaudhry@google.com>
+
+	* aarch64.cc (Target_aarch64::scan_erratum_843419_span): Remove
+	info message for every erratum 843419 found and fixed.
+
+2016-02-07  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/18695
+	* x86_64.cc (Target_x86_64::Relocate::relocate): Add additional
+	information to relocation overflow errors.
+
+2016-02-06  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/18695
+	* x86_64.cc (X86_64_relocate_functions::pcrela32_check): Fix x32
+	overflow checking when symbol value + addend < 0.
+
+2016-02-06  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19577
+	* reloc.h (Limits): New class.
+	(Bits::has_overflow32): Use min/max values from Limits.
+	(Bits::has_unsigned_overflow32): Likewise.
+	(Bits::has_signed_unsigned_overflow32): Likewise.
+	(Bits::has_overflow): Likewise.
+	(Bits::has_unsigned_overflow): Likewise.
+	(Bits::has_signed_unsigned_overflow64): Likewise.
+
+2016-02-06  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19567
+	* reloc.h (Relocate_functions::Overflow_check): Add comments.
+	* x86_64.cc (X86_64_relocate_functions): New class.
+	(Target_x86_64::Relocate::relocate): Use the new class.
+	* testsuite/Makefile.am (x86_64_overflow_pc32): Add -Tdata option.
+	(x32_overflow_pc32): New test case.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/x32_overflow_pc32.sh: New script.
+	* testsuite/x86_64_overflow_pc32.s: Remove .space directive.
+
+2016-02-06  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19577
+	* reloc.h (Bits::has_unsigned_overflow32): Fix static_cast.
+	(Bits::has_unsigned_overflow): Remove unnecessary static_cast.
+
+2016-02-06  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19577
+	* reloc.h (Bits::has_unsigned_overflow32): Fix unsigned/signed
+	comparison.
+	(Bits::has_unsigned_overflow): Likewise.
+
+2016-02-06  Marcin Kościelnicki  <koriakin@0x04.net>
+
+	* i386.cc (Target_i386::is_call_to_non_split): Add view and view_size
+	parameters.
+	* reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Pass view
+	and view_size to is_call_to_non_split.
+	* target.cc (Target::is_call_to_non_split): Add view and view_size
+	parameters.
+	* target.h (class Target): Likewise.
+
+2016-02-05  Sriraman Tallam  <tmsriram@google.com>
+
+	* icf.cc (get_rel_addend): New function.
+	(get_section_contents):  Move merge section addend computation to a
+	new function.  Ignore negative values for SHT_REL and SHT_RELA addends.
+	Fix bug to not read past the length of the section.
+
+2016-02-05  Cary Coutant  <ccoutant@gmail.com>
+	    Andrew Senkevich  <andrew.senkevich@intel.com>
+
+	PR gold/18695
+	* x86_64.cc (Target_x86_64::Relocate::relocate): Add overflow
+	checking for R_X86_64_32, R_X86_64_32S, R_X86_64_PC32, and
+	R_X86_64_PLT32.
+	* testsuite/Makefile.am (x86_64_overflow_pc32): New test.
+	* testsuite/x86_64_overflow_pc32.sh: New test script.
+	* testsuite/x86_64_overflow_pc32.s: New source file.
+
+2016-02-05  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/18695
+	* reloc.h (Relocate_functions::Address): New typedef.
+	(Relocate_functions::Addendtype): New typedef.
+	(Relocate_functions::Overflow_check): New enum type.
+	(Relocate_functions::Reloc_status): New enum type.
+	(Relocate_functions::check_overflow): New function template.
+	(Relocate_functions::rel): Add check parameter; check for overflow.
+	(Relocate_functions::rel_unaligned): Likewise.
+	(Relocate_functions::rela): Likewise.
+	(Relocate_functions::pcrel): Likewise.
+	(Relocate_functions::pcrel_unaligned): Likewise.
+	(Relocate_functions::pcrela): Likewise.
+	(Relocate_functions::rel8): Adjust parameter types.
+	(Relocate_functions::rela8): Likewise.
+	(Relocate_functions::pcrel8): Likewise.
+	(Relocate_functions::pcrela8): Likewise.
+	(Relocate_functions::rel16): Likewise.
+	(Relocate_functions::rela168): Likewise.
+	(Relocate_functions::pcrel16): Likewise.
+	(Relocate_functions::pcrela16): Likewise.
+	(Relocate_functions::rel32): Likewise.
+	(Relocate_functions::rel32_unaligned): Likewise.
+	(Relocate_functions::rela32): Likewise.
+	(Relocate_functions::pcrel32): Likewise.
+	(Relocate_functions::pcrel32_unaligned): Likewise.
+	(Relocate_functions::pcrela32): Likewise.
+	(Relocate_functions::rel8_check): New function.
+	(Relocate_functions::rela8_check): New function.
+	(Relocate_functions::pcrel8_check): New function.
+	(Relocate_functions::pcrela8_check): New function.
+	(Relocate_functions::rel16_check): New function.
+	(Relocate_functions::rela168_check): New function.
+	(Relocate_functions::pcrel16_check): New function.
+	(Relocate_functions::pcrela16_check): New function.
+	(Relocate_functions::rel32_check): New function.
+	(Relocate_functions::rel32_unaligned_check): New function.
+	(Relocate_functions::rela32_check): New function.
+	(Relocate_functions::pcrel32_check): New function.
+	(Relocate_functions::pcrel32_unaligned_check): New function.
+	(Relocate_functions::pcrela32_check): New function.
+	(Bits::has_unsigned_overflow32): New function.
+	(Bits::has_unsigned_overflow): New function.
+	* testsuite/Makefile.am (overflow_unittest): New test.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/overflow_unittest.cc: New source file.
+
+2016-02-04  Alan Modra  <amodra@gmail.com>
+
+	* powerpc.cc (relocate): Adjust last patch for big-endian.
+
+2016-02-02  Alan Modra  <amodra@gmail.com>
+
+	* powerpc.cc (relocate): Further restrict ELFv2 entry optimization.
+
+2016-01-15 Han Shen  <shenhan@google.com>
+
+	PR gold/19472 - need pc-relative stubs.
+
+	* aarch64.cc (Reloc_stub::stub_type_for_reloc): Return PC-relative
+	stub type for DSOs and pie executables.
+
+2016-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386.cc (Target_i386::Classify_reloc::get_r_addend): Remove
+	'typename'.
+
+2016-01-12  Cary Coutant  <ccoutant@gmail.com>
+
+	* arm.cc (Target_arm::Classify_reloc::get_r_addend): New method.
+	* i386.cc (Target_i386::Classify_reloc::get_r_addend): New method.
+	* mips.cc (Target_arm::Mips_classify_reloc::get_r_addend): (Both
+	specializations) New method.
+
+2016-01-11  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19353
+	* aarch64.cc (Target_aarch64::relocate_tls): Don't insist that
+	we have a TLS segment for GD-to-IE optimization.
+	* i386.cc (Target_i386::tls_gd_to_ie): Remove tls_segment parameter.
+	Adjust all calls.
+	(Target_i386::tls_desc_gd_to_ie): Likewise.
+	(Target_i386::relocate_tls): Don't insist that we have a TLS segment
+	for TLSDESC GD-to-IE optimizations.
+	* x86_64.cc (Target_x86_64::tls_gd_to_ie): Remove tls_segment parameter.
+	Adjust all calls.
+	(Target_x86_64::tls_desc_gd_to_ie): Likewise.
+	(Target_x86_64::relocate_tls): Don't insist that we have a TLS segment
+	for TLSDESC GD-to-IE optimizations.
+
+2016-01-11  Cary Coutant  <ccoutant@gmail.com>
+
+	Refactor gold to enable support for MIPS-64 relocation format.
+
+	* gc.h (get_embedded_addend_size): Remove sh_type parameter.
+	(gc_process_relocs): Remove sh_type template parameter.
+	Use Classify_reloc to access r_sym, r_type, and r_addend fields.
+	* object.h (Sized_relobj_file::split_stack_adjust): Add target
+	parameter.
+	(Sized_relobj_file::split_stack_adjust_reltype): Likewise.
+	* reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA
+	specializations) Remove.
+	* reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h.
+	(Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan().
+	(Sized_relobj_file::emit_relocs_scan_reltype): Remove.
+	(Sized_relobj_file::split_stack_adjust): Add target parameter.
+	Adjust all callers.
+	(Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call
+	Target::get_r_sym() to get r_sym field from relocations.
+	(Track_relocs::next_symndx): Call Target::get_r_sym().
+	* target-reloc.h (scan_relocs): Remove sh_type template parameter;
+	add Classify_reloc template parameter.  Use for accessing r_sym and
+	r_type.
+	(relocate_section): Likewise.
+	(Default_classify_reloc): New class (renamed and moved from reloc.cc).
+	(Default_scan_relocatable_relocs): Remove sh_type template parameter.
+	(Default_scan_relocatable_relocs::Reltype): New typedef.
+	(Default_scan_relocatable_relocs::reloc_size): New const.
+	(Default_scan_relocatable_relocs::sh_type): New const.
+	(Default_scan_relocatable_relocs::get_r_sym): New method.
+	(Default_scan_relocatable_relocs::get_r_type): New method.
+	(Default_emit_relocs_strategy): New class.
+	(scan_relocatable_relocs): Replace sh_type template parameter with
+	Scan_relocatable_relocs class.  Use it to access r_sym and r_type
+	fields.
+	(relocate_relocs): Replace sh_type template parameter with
+	Classify_reloc class.  Use it to access r_sym and r_type fields.
+	* target.h (Target::is_call_to_non_split): Replace r_type parameter
+	with pointer to relocation. Adjust all callers.
+	(Target::do_is_call_to_non_split): Likewise.
+	(Target::emit_relocs_scan): New virtual method.
+	(Sized_target::get_r_sym): New virtual method.
+	* target.cc (Target::do_is_call_to_non_split): Replace r_type parameter
+	with pointer to relocation.
+
+	* aarch64.cc (Target_aarch64::emit_relocs_scan): New method.
+	(Target_aarch64::Relocatable_size_for_reloc): Remove.
+	(Target_aarch64::gc_process_relocs): Use Default_classify_reloc.
+	(Target_aarch64::scan_relocs): Likewise.
+	(Target_aarch64::relocate_section): Likewise.
+	(Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc):
+	Remove.
+	(Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc.
+	(Target_aarch64::relocate_relocs): Use Default_classify_reloc.
+	* arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type
+	template parameter.
+	(Target_arm::emit_relocs_scan): New method.
+	(Target_arm::Relocatable_size_for_reloc): Replace with...
+	(Target_arm::Classify_reloc): ...this.
+	(Target_arm::gc_process_relocs): Use Classify_reloc.
+	(Target_arm::scan_relocs): Likewise.
+	(Target_arm::relocate_section): Likewise.
+	(Target_arm::scan_relocatable_relocs): Likewise.
+	(Target_arm::relocate_relocs): Likewise.
+	* i386.cc (Target_i386::emit_relocs_scan): New method.
+	(Target_i386::Relocatable_size_for_reloc): Replace with...
+	(Target_i386::Classify_reloc): ...this.
+	(Target_i386::gc_process_relocs): Use Classify_reloc.
+	(Target_i386::scan_relocs): Likewise.
+	(Target_i386::relocate_section): Likewise.
+	(Target_i386::scan_relocatable_relocs): Likewise.
+	(Target_i386::relocate_relocs): Likewise.
+	* mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template
+	parameter.
+	(Mips_reloc_types): New class template.
+	(Mips_classify_reloc): New class template.
+	(Target_mips::Reltype): New typedef.
+	(Target_mips::Relatype): New typedef.
+	(Target_mips::emit_relocs_scan): New method.
+	(Target_mips::get_r_sym): New method.
+	(Target_mips::Relocatable_size_for_reloc): Replace with
+	Mips_classify_reloc.
+	(Target_mips::copy_reloc): Use Mips_classify_reloc.
+	(Target_mips::gc_process_relocs): Likewise.
+	(Target_mips::scan_relocs): Likewise.
+	(Target_mips::relocate_section): Likewise.
+	(Target_mips::scan_relocatable_relocs): Likewise.
+	(Target_mips::relocate_relocs): Likewise.
+	(mips_get_size_for_reloc): New function, factored out from
+	Relocatable_size_for_reloc::get_size_for_reloc.
+	(Target_mips::Scan::local): Use Mips_classify_reloc.
+	(Target_mips::Scan::global): Likewise.
+	(Target_mips::Relocate::relocate): Likewise.
+	* powerpc.cc (Target_powerpc::emit_relocs_scan): New method.
+	(Target_powerpc::Relocatable_size_for_reloc): Remove.
+	(Target_powerpc::gc_process_relocs): Use Default_classify_reloc.
+	(Target_powerpc::scan_relocs): Likewise.
+	(Target_powerpc::relocate_section): Likewise.
+	(Powerpc_scan_relocatable_reloc): Convert to class template.
+	(Powerpc_scan_relocatable_reloc::Reltype): New typedef.
+	(Powerpc_scan_relocatable_reloc::reloc_size): New const.
+	(Powerpc_scan_relocatable_reloc::sh_type): New const.
+	(Powerpc_scan_relocatable_reloc::get_r_sym): New method.
+	(Powerpc_scan_relocatable_reloc::get_r_type): New method.
+	(Target_powerpc::scan_relocatable_relocs): Use
+	Powerpc_scan_relocatable_reloc.
+	(Target_powerpc::relocate_relocs): Use Default_classify_reloc.
+	* s390.cc (Target_s390::emit_relocs_scan): New method.
+	(Target_s390::Relocatable_size_for_reloc): Remove.
+	(Target_s390::gc_process_relocs): Use Default_classify_reloc.
+	(Target_s390::scan_relocs): Likewise.
+	(Target_s390::relocate_section): Likewise.
+	(Target_s390::Relocatable_size_for_reloc::get_size_for_reloc):
+	Remove.
+	(Target_s390::scan_relocatable_relocs): Use Default_classify_reloc.
+	(Target_s390::relocate_relocs): Use Default_classify_reloc.
+	* sparc.cc (Target_sparc::emit_relocs_scan): New method.
+	(Target_sparc::Relocatable_size_for_reloc): Remove.
+	(Target_sparc::gc_process_relocs): Use Default_classify_reloc.
+	(Target_sparc::scan_relocs): Likewise.
+	(Target_sparc::relocate_section): Likewise.
+	(Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc):
+	Remove.
+	(Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc.
+	(Target_sparc::relocate_relocs): Use Default_classify_reloc.
+	* tilegx.cc (Target_tilegx::emit_relocs_scan): New method.
+	(Target_tilegx::Relocatable_size_for_reloc): Remove.
+	(Target_tilegx::gc_process_relocs): Use Default_classify_reloc.
+	(Target_tilegx::scan_relocs): Likewise.
+	(Target_tilegx::relocate_section): Likewise.
+	(Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc):
+	Remove.
+	(Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc.
+	(Target_tilegx::relocate_relocs): Use Default_classify_reloc.
+	* x86_64.cc (Target_x86_64::emit_relocs_scan): New method.
+	(Target_x86_64::Relocatable_size_for_reloc): Remove.
+	(Target_x86_64::gc_process_relocs): Use Default_classify_reloc.
+	(Target_x86_64::scan_relocs): Likewise.
+	(Target_x86_64::relocate_section): Likewise.
+	(Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc):
+	Remove.
+	(Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc.
+	(Target_x86_64::relocate_relocs): Use Default_classify_reloc.
+
+	* testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-0815
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/gprof/ChangeLog b/gprof/ChangeLog
index c66add4..e33ce1b 100644
--- a/gprof/ChangeLog
+++ b/gprof/ChangeLog
@@ -1,99 +1,6 @@
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* configure: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* po/gprof.pot: Regenerate.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* basic_blocks.c: Fix spelling in comments.
-	* cg_arcs.c: Fix spelling in comments.
-	* cg_print.c: Fix spelling in comments.
-	* corefile.c: Fix spelling in comments.
-
-2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-        * configure: Regenerate.
-
-2016-10-06  Tom Tromey  <tromey@sourceware.org>
-
-	PR gprof/20656
-	* source.c (annotate_source): Delete redundant assignment to
-	new_line.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* gprof.c: Add missing fall through comments.
-
-2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
-
-	* Makefile.in: Regenerate.
-	* configure: Likewise.
-
-2016-08-30  Nick Clifton  <nickc@redhat.com>
-
-	PR gprof/20499
-	* corefile.c (num_of_syms_in): Return an unsigned int.
-	Fail if the count exceeds the maximum possible allocatable size.
-	(core_create_syms_from): Exit early if num_of_syms_in returns a
-	failure code.
-
-2016-08-23  Nick Clifton  <nickc@redhat.com>
-
-	PR gprof/20499
-	* corefile.c (BUFSIZE): Define.
-	(STR_BUFSIZE): Define.
-	(read_function_mappings): Use BUFSIZE and STR)BUFSIZE.
-	(num_of_syms_in): Move buf, address and name arrays out of
-	function and declare as static BUFSIZE arrays.
-	Use STR_BUFSIZE when scanning for name and address.
-	(core_create_syms_from): Revert previous delta.  Instead
-	short circuit the parsing of a symbol if all three fields
-	could not be found.
-
-2016-08-22  Nick Clifton  <nickc@redhat.com>
-
-	PR gprof/20499
-	* corefile.c (core_create_syms_from): Avoid walking off the end of
-	the symbol table.
-
-2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* configure: Regenerated.
-
-2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* basic_blocks.c: Update old style function definitions.
-	* cg_arcs.c: Likewise.
-	* cg_print.c: Likewise.
-	* gen-c-prog.awk: Likewise.
-	* gmon_io.c: Likewise.
-	* hertz.c: Likewise.
-	* hist.c: Likewise.
-	* sym_ids.c: Likewise.
-
-2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.in: Regenerated with automake 1.11.6.
-	* aclocal.m4: Likewise.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	* configure: Regenerate.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-2015
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/gprof/ChangeLog-2016 b/gprof/ChangeLog-2016
new file mode 100644
index 0000000..c66add4
--- /dev/null
+++ b/gprof/ChangeLog-2016
@@ -0,0 +1,107 @@
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* configure: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* po/gprof.pot: Regenerate.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* basic_blocks.c: Fix spelling in comments.
+	* cg_arcs.c: Fix spelling in comments.
+	* cg_print.c: Fix spelling in comments.
+	* corefile.c: Fix spelling in comments.
+
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+        * configure: Regenerate.
+
+2016-10-06  Tom Tromey  <tromey@sourceware.org>
+
+	PR gprof/20656
+	* source.c (annotate_source): Delete redundant assignment to
+	new_line.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* gprof.c: Add missing fall through comments.
+
+2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
+
+	* Makefile.in: Regenerate.
+	* configure: Likewise.
+
+2016-08-30  Nick Clifton  <nickc@redhat.com>
+
+	PR gprof/20499
+	* corefile.c (num_of_syms_in): Return an unsigned int.
+	Fail if the count exceeds the maximum possible allocatable size.
+	(core_create_syms_from): Exit early if num_of_syms_in returns a
+	failure code.
+
+2016-08-23  Nick Clifton  <nickc@redhat.com>
+
+	PR gprof/20499
+	* corefile.c (BUFSIZE): Define.
+	(STR_BUFSIZE): Define.
+	(read_function_mappings): Use BUFSIZE and STR)BUFSIZE.
+	(num_of_syms_in): Move buf, address and name arrays out of
+	function and declare as static BUFSIZE arrays.
+	Use STR_BUFSIZE when scanning for name and address.
+	(core_create_syms_from): Revert previous delta.  Instead
+	short circuit the parsing of a symbol if all three fields
+	could not be found.
+
+2016-08-22  Nick Clifton  <nickc@redhat.com>
+
+	PR gprof/20499
+	* corefile.c (core_create_syms_from): Avoid walking off the end of
+	the symbol table.
+
+2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* configure: Regenerated.
+
+2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* basic_blocks.c: Update old style function definitions.
+	* cg_arcs.c: Likewise.
+	* cg_print.c: Likewise.
+	* gen-c-prog.awk: Likewise.
+	* gmon_io.c: Likewise.
+	* hertz.c: Likewise.
+	* hist.c: Likewise.
+	* sym_ids.c: Likewise.
+
+2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated with automake 1.11.6.
+	* aclocal.m4: Likewise.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	* configure: Regenerate.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-2015
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/include/ChangeLog b/include/ChangeLog
index 42cf3d8..e33ce1b 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,833 +1,6 @@
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* elf/common.h: Add PRU ELF.
-	* elf/pru.h: New file.
-	* opcode/pru.h: New file.
-	* dis-asm.h (print_insn_pru): Declare.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* opcode/mips.h: Document `0', `1', `2', `3', `4' and `s'
-	operand codes.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* opcode/mips.h: Replace `0' and `4' operand codes with `.' and
-	`F' respectively.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* opcode/mips.h (INSN2_SHORT_ONLY): New macro.
-
-2016-12-21  Alan Modra  <amodra@gmail.com>
-
-	* coff/pe.h: Fix comment chars with high bit set.
-	* opcode/xgate.h: Likewise.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* opcode/mips.h (mips_opcode_32bit_p): New inline function.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
-	(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
-	(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
-	(EF_RISCV_FLOAT_ABI_QUAD): Define.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-	    Kuan-Lin Chen  <kuanlinchentw@gmail.com>
-
-	* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
-
-2016-12-16  fincs  <fincs.alt1@gmail.com>
-
-	* bfdlink.h (struct bfd_link_info): Add gc_keep_exported.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
-	typedef as `elf_internal_abiflags_v0'.
-
-2016-12-13 Renlin Li <renlin.li@arm.com>
-
-	* opcode/aarch64.h (aarch64_operand_class): Remove
-	AARCH64_OPND_CLASS_CP_REG.
-	(enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
-	AARCH64_OPND_Cm to AARCH64_OPND_CRm.
-	(aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.
-
-2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* opcode/mips.h: Remove references to `>' operand code.
-
-2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
-
-2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
-
-    	* opcode/mips.h (ASE_DSPR3): Add a comment.
-
-2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
-	(ARM_ARCH_V8_3A): New.
-
-2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
-	instruction classes.
-
-2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
-	hwcaps2.
-
-2016-11-22  Alan Modra  <amodra@gmail.com>
-
-	PR 20744
-	* opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
-
-2016-11-03  David Tolnay <dtolnay@gmail.com>
-	    Mark Wielaard  <mark@klomp.org>
-
-	* demangle.h (DMGL_RUST): New macro.
-	(DMGL_STYLE_MASK): Add DMGL_RUST.
-	(demangling_styles): Add dlang_rust.
-	(RUST_DEMANGLING_STYLE_STRING): New macro.
-	(RUST_DEMANGLING): New macro.
-	(rust_demangle): New prototype.
-	(rust_is_mangled): Likewise.
-	(rust_demangle_sym): Likewise.
-
-2016-11-07  Jason Merrill  <jason@redhat.com>
-
-	* demangle.h (enum demangle_component_type): Add
-	DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
-	AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
-	(enum aarch64_op): Add OP_FCMLA_ELEM.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
-	(enum aarch64_insn_class): Add ldst_imm10.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
-	(AARCH64_ARCH_V8_3): Define.
-	(AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
-
-2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
-	(ARM_AEXT2_V8M_MAIN_DSP): Likewise.
-	(ARM_ARCH_V8M_MAIN_DSP): Likewise.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
-
-2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcode/arc.h (struct arc_opcode): Change type of opcode and mask
-	fields.
-	(struct arc_long_opcode): Delete.
-	(struct arc_operand): Change types for insert and extract
-	handlers.
-
-2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcode/arc.h: Make macros 64-bit safe.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* opcode/arc.h (arc_opcode_len): Declare.
-	(ARC_SHORT): Delete.
-
-2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
-	    Andrew Waterman <andrew@sifive.com>
-
-	Add support for RISC-V architecture.
-	* dis-asm.h: Add prototypes for print_insn_riscv and
-	print_riscv_disassembler_options.
-	* elf/riscv.h: New file.
-	* opcode/riscv-opc.h: New file.
-	* opcode/riscv.h: New file.
-
-2016-10-17  Nick Clifton  <nickc@redhat.com>
-
-	* elf/common.h (DT_SYMTAB_SHNDX): Define.
-	(EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
-	(EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
-	(EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
-	(EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
-	(EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
-	(ELFOSABI_OPENVOS): Define.
-	(GRP_MASKOS, GRP_MASKPROC): Define.
-
-2016-10-14  Pedro Alves  <palves@redhat.com>
-
-	* ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
-	OVERRIDE): Define as empty.
-	[__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
-	__final.
-	[__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
-	empty.
-
-2016-10-14  Pedro Alves  <palves@redhat.com>
-
-	* ansidecl.h (GCC_FINAL): Delete.
-	(OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
-
-2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (ARC_OPCODE_ARCV2): New define.
-
-2016-09-29  Alan Modra  <amodra@gmail.com>
-
-	* opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
-
-2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (insn_class_t): Add two new classes.
-
-2016-09-26  Alan Modra  <amodra@gmail.com>
-
-	* elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (aarch64_cond): Bump array size to 4.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
-	(OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
-	(OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
-	(OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
-	(sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
-	(sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
-	aarch64_insn_classes.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
-	(AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
-	(AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
-	(AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
-	(AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
-	(AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
-	(AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
-	(AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
-	(AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
-	(AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
-	(AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
-	(AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
-	(AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
-	(AARCH64_OPND_SVE_UIMM8_53): Likewise.
-	(aarch64_sve_dupm_mov_immediate_p): Declare.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
-	(AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
-	(AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
-	(AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
-	(AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
-	(AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
-	(AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
-	(AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
-	(AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
-	(AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
-	(AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
-	(AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
-	(AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
-	(AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
-	(AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
-	(AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
-	(AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
-	(AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
-	(AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
-	(AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
-	Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
-	aarch64_opnd.
-	(AARCH64_MOD_MUL): New aarch64_modifier_kind.
-	(aarch64_opnd_info): Make shifter.amount an int64_t and
-	rearrange the fields.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
-	(AARCH64_OPND_SVE_PRFOP): Likewise.
-	(aarch64_sve_pattern_array): Declare.
-	(aarch64_sve_prfop_array): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
-	(AARCH64_OPND_QLF_P_M): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
-	aarch64_operand_class.
-	(AARCH64_OPND_CLASS_PRED_REG): Likewise.
-	(AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
-	(AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
-	(AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
-	(AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
-	(AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
-	(AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
-	(AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
-	(AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (F_STRICT): New flag.
-
-2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
-
-	* opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
-	* elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
-	SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
-	* opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
-	relocation.
-
-2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
-	(ARM_SET_SYM_CMSE_SPCL): Likewise.
-
-2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
-
-	* opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
-
-2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
-
-	* libiberty.h (MAX_ALLOCA_SIZE): New macro.
-
-2016-07-27  Graham Markall  <graham.markall@embecosm.com>
-
-        * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
-        ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
-        ARC_NUM_ADDRTYPES.
-        * opcode/arc.h: Add BMU to insn_class_t enum.
-        * opcode/arc.h: Add PMU to insn_class_t enum.
-
-2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* dis-asm.h: Declare print_arc_disassembler_options.
-
-2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
-	out_implib_bfd fields.
-
-2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
-
-2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
-
-	* include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
-	(SHF_ARM_PURECODE): ... this.
-
-2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
-	(AARCH64_CPU_HAS_ANY_FEATURES): New.
-	(AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
-	(AARCH64_OPCODE_HAS_FEATURE): Remove.
-
-2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
-	of enabled FPU features.
-
-2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* opcode/sparc.h (enum sparc_opcode_arch_val): Move
-	SPARC_OPCODE_ARCH_MAX into the enum.
-
-2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
-
-2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* elf/mips.h (R_MIPS16_PC16_S1): New relocation.
-
-2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf/xtensa.h (xtensa_make_property_section): New prototype.
-
-2016-06-24  John Baldwin  <jhb@FreeBSD.org>
-
-	* elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
-	(AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
-	(AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
-	(AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
-
-2016-06-23  Graham Markall  <graham.markall@embecosm.com>
-
-	* opcode/arc.h: Make insn_class_t alphabetical again.
-
-2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf/dlx.h: Wrap in extern C.
-	* elf/xtensa.h: Likewise.
-	* opcode/arc.h: Likewise.
-
-2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
-	tilegx_pipeline.
-
-2016-06-21  Graham Markall  <graham.markall@embecosm.com>
-
-	* opcode/arc.h: Add nps400 extension and instruction
-	subclass.
-	Remove ARC_OPCODE_NPS400
-	* elf/arc.h: Remove E_ARC_MACH_NPS400
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* opcode/sparc.h (enum sparc_opcode_arch_val): Add
-	SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
-	SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
-	SPARC_OPCODE_ARCH_V9M.
-
-2016-06-14  John Baldwin  <jhb@FreeBSD.org>
-
-	* opcode/msp430-decode.h (MSP430_Size): Remove.
-	(Msp430_Opcode_Decoded): Change type of size to int.
-
-2016-06-11  Alan Modra  <amodra@gmail.com>
-
-	* coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
-
-2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* opcode/sparc.h: Add missing documentation for hyperprivileged
-	registers in rd (%) and rs1 ($).
-
-2016-06-07  Alan Modra  <amodra@gmail.com>
-
-	* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
-	PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
-	PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
-	PPC_APUINFO_VLE: Define.
-
-2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
-	entries.
-	(ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
-
-2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
-	(struct arc_long_opcode): New structure.
-	(arc_long_opcodes): Declare.
-	(arc_num_long_opcodes): Declare.
-
-2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* elf/mips.h: Add extern "C".
-	* elf/sh.h: Likewise.
-	* opcode/d10v.h: Likewise.
-	* opcode/d30v.h: Likewise.
-	* opcode/ia64.h: Likewise.
-	* opcode/mips.h: Likewise.
-	* opcode/ppc.h: Likewise.
-	* opcode/sparc.h: Likewise.
-	* opcode/tic6x.h: Likewise.
-	* opcode/v850.h: Likewise.
-
-2016-05-28  Alan Modra  <amodra@gmail.com>
-
-	* bfdlink.h (struct bfd_link_callbacks): Update comments.
-	Return void from multiple_definition, multiple_common,
-	add_to_set, constructor, warning, undefined_symbol,
-	reloc_overflow, reloc_dangerous and unattached_reloc.
-
-2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* opcode/metag.h: wrap declarations in extern "C".
-
-2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (insn_subclass_t): Add COND.
-	(flag_class_t): Add F_CLASS_EXTEND.
-
-2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* opcode/arc.h (struct arc_opcode): Renamed attribute class to
-	insn_class.
-	(struct arc_flag_class): Renamed attribute class to flag_class.
-
-2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
-	plain symbol.
-
-2016-04-29  Tom Tromey  <tom@tromey.com>
-
-	* dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
-	DW_LANG_Rust_old>: New constants.
-
-2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
-
-	* elf/mips.h (AFL_ASE_DSPR3): New macro.
-	(AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
-	* opcode/mips.h (ASE_DSPR3): New macro.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-	    Nick Clifton  <nickc@redhat.com>
-
-	* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
-	enumerator.
-	(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
-	(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
-	(ARM_SYM_BRANCH_TYPE): Replace by ...
-	(ARM_GET_SYM_BRANCH_TYPE): This and ...
-	(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
-	BFD_ASSERT is defined or not.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* elf/arm.h (Tag_DSP_extension): Define.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* arm.h (ARM_FSET_CPU_SUBSET): Define macro.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
-	(ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
-	(ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
-	for the high core bits.
-
-2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (ARC_SYNTAX_1OP): Declare
-	(ARC_SYNTAX_NOP): Likewsie.
-	(ARC_OP1_MUST_BE_IMM): Update defined value.
-	(ARC_OP1_IMM_IMPLIED): Likewise.
-	(arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
-
-2016-04-28  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19722
-	* opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
-
-2016-04-27  Alan Modra  <amodra@gmail.com>
-
-	* bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
-	undef.  Formatting.
-
-2016-04-21  Nick Clifton  <nickc@redhat.com>
-
-	* bfdlink.h: Add prototype for bfd_link_check_relocs.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
-
-2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
-
-2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
-
-2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcode/arc.h (insn_class_t): Add NET and ACL class.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
-	* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (flag_class_t): Update.
-	(ARC_OPCODE_NONE): Define.
-	(ARC_OPCODE_ARCALL): Likewise.
-	(ARC_OPCODE_ARCFPX): Likewise.
-	(ARC_REGISTER_READONLY): Likewise.
-	(ARC_REGISTER_WRITEONLY): Likewise.
-	(ARC_REGISTER_NOSHORT_CUT): Likewise.
-	(arc_aux_reg): Add cpu.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (arc_num_opcodes): Remove.
-	(ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
-	(ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
-	(ARC_SUFFIX_FLAG): Define.
-	(flags_none, flags_f, flags_cc, flags_ccf): Declare.
-	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
-	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
-	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
-	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
-	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
-	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
-	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
-	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
-	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
-
-2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (DPA, DPX, SPX): New subclass enums.
-	(ARC_FPUDA): Define.
-	(arc_aux_reg): Add new field.
-
-2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* opcode/arc-func.h (replace_bits24): Changed.
-	(replace_bits24_be): Created.
-
-2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
-	(FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
-	(INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
-	(INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
-	(INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
-	(INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
-	(INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
-	(MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
-	(MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
-	(MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
-	(MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
-	(MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
-	(INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
-	(MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
-
-2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* opcode/i960.h: Add const qualifiers.
-	* opcode/tic4x.h (struct tic4x_inst): Likewise.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcodes/arc.h (insn_class_t): Add BITOP type.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
-	new classes instead.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf/arc.h (E_ARC_MACH_NPS400): Define.
-	* opcode/arc.h (ARC_OPCODE_NPS400): Define.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf/arc.h (EF_ARC_MACH): Delete.
-	(EF_ARC_MACH_MSK): Remove out of date comment.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* opcode/arc.h (ARC_OPCODE_BASE): Delete.
-
-2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19807
-	* bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
-
-2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
-	    Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* elf/arc-reloc.def: Add a call to ME within the formula for each
-	relocation that requires middle-endian correction.
-
-2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
-	* opcode/h8300.h (struct h8_opcode): Likewise.
-	* opcode/hppa.h (struct pa_opcode): Likewise.
-	* opcode/msp430.h: Likewise.
-	* opcode/spu.h (struct spu_opcode): Likewise.
-	* opcode/tic30.h (struct _register): Likewise.
-	* opcode/tic4x.h (struct tic4x_register): Likewise.
-	(struct tic4x_cond): Likewise.
-	(struct tic4x_indirect): Likewise.
-	(struct tic4x_inst): Likewise.
-	* opcode/visium.h (struct reg_entry): Likewise.
-
-2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
-	(ARM_CPU_HAS_FEATURE): Add comment.
-
-2016-03-03  Than McIntosh <thanm@google.com>
-
-	* plugin-api.h: Add new hooks to the plugin transfer vector to
-	to support querying section alignment and section size.
-	(ld_plugin_get_input_section_alignment): New hook.
-	(ld_plugin_get_input_section_size): New hook.
-	(ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
-	and LDPT_GET_INPUT_SECTION_SIZE.
-	(ld_plugin_tv): Add tv_get_input_section_alignment and
-	tv_get_input_section_size.
-
-2016-03-03  Evgenii Stepanov  <eugenis@google.com>
-
-	* plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19645
-	* bfdlink.h (bfd_link_elf_stt_common): New enum.
-	(bfd_link_info): Add elf_stt_common.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19636
-	PR ld/19704
-	PR ld/19719
-	* bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
-
-2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
-	    Jiong Wang  <jiong.wang@arm.com>
-
-	* opcode/arm.h (ARM_EXT2_FP16_INSN): New.
-
-2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
-	    Janek van Oirschot  <jvanoirs@synopsys.com>
-
-	* opcode/arc.h (arc_opcode arc_relax_opcodes)
-	(arc_num_relax_opcodes): Declare.
-
-2016-02-09  Nick Clifton  <nickc@redhat.com>
-
-	* opcode/metag.h (metag_scondtab): Mark as possibly unused.
-	* opcode/nds32.h (nds32_r45map): Likewise.
-	(nds32_r54map): Likewise.
-	* opcode/visium.h (gen_reg_table): Likewise.
-	(fp_reg_table, cc_table, opcode_table): Likewise.
-
-2016-02-09  Alan Modra  <amodra@gmail.com>
-
-	PR 16583
-	* elf/common.h (AT_SUN_HWCAP): Undef before defining.
-
-2016-02-04  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19561
-	* opcode/msp430.h (IGNORE_CARRY_BIT): New define.
-	(RRUX): Synthesise using case 2 rather than 7.
-
-2016-01-19  John Baldwin  <jhb@FreeBSD.org>
-
-	* elf/common.h (NT_FREEBSD_THRMISC): Define.
-	(NT_FREEBSD_PROCSTAT_PROC): Define.
-	(NT_FREEBSD_PROCSTAT_FILES): Define.
-	(NT_FREEBSD_PROCSTAT_VMMAP): Define.
-	(NT_FREEBSD_PROCSTAT_GROUPS): Define.
-	(NT_FREEBSD_PROCSTAT_UMASK): Define.
-	(NT_FREEBSD_PROCSTAT_RLIMIT): Define.
-	(NT_FREEBSD_PROCSTAT_OSREL): Define.
-	(NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
-	(NT_FREEBSD_PROCSTAT_AUXV): Define.
-
-2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
-	    Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
-
-	* elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
-	(ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
-	(ARC_TLS_LE_32): Fixed formula.
-	(ARC_TLS_GD_LD): Use new special function.
-	* opcode/arc-func.h: Changed all the replacement
-	functions to clear the patching bits before doing an or it with the value
-	argument.
-
-2016-01-18  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/19440
-	* coff/internal.h (internal_syment): Use int to hold section
-	number.
-	(N_UNDEF): Cast to int not short.
-	(N_ABS): Likewise.
-	(N_DEBUG): Likewise.
-	(N_TV): Likewise.
-	(P_TV): Likewise.
-
-2016-01-11  Nick Clifton  <nickc@redhat.com>
-
-	Import this change from GCC mainline:
-
-	2016-01-07  Mike Frysinger  <vapier@gentoo.org>
-
-	* longlong.h: Change !__SHMEDIA__ to
-	(!defined (__SHMEDIA__) || !__SHMEDIA__).
-	Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
-
-2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* opcode/mips.h: Add a summary of MIPS16 operand codes.
-
-2016-01-05  Mike Frysinger  <vapier@gentoo.org>
-
-	* libiberty.h (dupargv): Change arg to char * const *.
-	(writeargv, countargv): Likewise.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-0415, aout/ChangeLog-9115,
-cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
-mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
-som/ChangeLog-1015, and vms/ChangeLog-1015
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/include/ChangeLog-2016 b/include/ChangeLog-2016
new file mode 100644
index 0000000..42cf3d8
--- /dev/null
+++ b/include/ChangeLog-2016
@@ -0,0 +1,841 @@
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* elf/common.h: Add PRU ELF.
+	* elf/pru.h: New file.
+	* opcode/pru.h: New file.
+	* dis-asm.h (print_insn_pru): Declare.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* opcode/mips.h: Document `0', `1', `2', `3', `4' and `s'
+	operand codes.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* opcode/mips.h: Replace `0' and `4' operand codes with `.' and
+	`F' respectively.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* opcode/mips.h (INSN2_SHORT_ONLY): New macro.
+
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	* coff/pe.h: Fix comment chars with high bit set.
+	* opcode/xgate.h: Likewise.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* opcode/mips.h (mips_opcode_32bit_p): New inline function.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
+	(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
+	(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
+	(EF_RISCV_FLOAT_ABI_QUAD): Define.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+	    Kuan-Lin Chen  <kuanlinchentw@gmail.com>
+
+	* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
+
+2016-12-16  fincs  <fincs.alt1@gmail.com>
+
+	* bfdlink.h (struct bfd_link_info): Add gc_keep_exported.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
+	typedef as `elf_internal_abiflags_v0'.
+
+2016-12-13 Renlin Li <renlin.li@arm.com>
+
+	* opcode/aarch64.h (aarch64_operand_class): Remove
+	AARCH64_OPND_CLASS_CP_REG.
+	(enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
+	AARCH64_OPND_Cm to AARCH64_OPND_CRm.
+	(aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* opcode/mips.h: Remove references to `>' operand code.
+
+2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
+
+2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
+
+    	* opcode/mips.h (ASE_DSPR3): Add a comment.
+
+2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
+	(ARM_ARCH_V8_3A): New.
+
+2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
+	instruction classes.
+
+2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
+	hwcaps2.
+
+2016-11-22  Alan Modra  <amodra@gmail.com>
+
+	PR 20744
+	* opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
+
+2016-11-03  David Tolnay <dtolnay@gmail.com>
+	    Mark Wielaard  <mark@klomp.org>
+
+	* demangle.h (DMGL_RUST): New macro.
+	(DMGL_STYLE_MASK): Add DMGL_RUST.
+	(demangling_styles): Add dlang_rust.
+	(RUST_DEMANGLING_STYLE_STRING): New macro.
+	(RUST_DEMANGLING): New macro.
+	(rust_demangle): New prototype.
+	(rust_is_mangled): Likewise.
+	(rust_demangle_sym): Likewise.
+
+2016-11-07  Jason Merrill  <jason@redhat.com>
+
+	* demangle.h (enum demangle_component_type): Add
+	DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
+	AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
+	(enum aarch64_op): Add OP_FCMLA_ELEM.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
+	(enum aarch64_insn_class): Add ldst_imm10.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
+	(AARCH64_ARCH_V8_3): Define.
+	(AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
+
+2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
+	(ARM_AEXT2_V8M_MAIN_DSP): Likewise.
+	(ARM_ARCH_V8M_MAIN_DSP): Likewise.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
+
+2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcode/arc.h (struct arc_opcode): Change type of opcode and mask
+	fields.
+	(struct arc_long_opcode): Delete.
+	(struct arc_operand): Change types for insert and extract
+	handlers.
+
+2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcode/arc.h: Make macros 64-bit safe.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* opcode/arc.h (arc_opcode_len): Declare.
+	(ARC_SHORT): Delete.
+
+2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
+	    Andrew Waterman <andrew@sifive.com>
+
+	Add support for RISC-V architecture.
+	* dis-asm.h: Add prototypes for print_insn_riscv and
+	print_riscv_disassembler_options.
+	* elf/riscv.h: New file.
+	* opcode/riscv-opc.h: New file.
+	* opcode/riscv.h: New file.
+
+2016-10-17  Nick Clifton  <nickc@redhat.com>
+
+	* elf/common.h (DT_SYMTAB_SHNDX): Define.
+	(EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
+	(EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
+	(EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
+	(EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
+	(EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
+	(ELFOSABI_OPENVOS): Define.
+	(GRP_MASKOS, GRP_MASKPROC): Define.
+
+2016-10-14  Pedro Alves  <palves@redhat.com>
+
+	* ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
+	OVERRIDE): Define as empty.
+	[__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
+	__final.
+	[__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
+	empty.
+
+2016-10-14  Pedro Alves  <palves@redhat.com>
+
+	* ansidecl.h (GCC_FINAL): Delete.
+	(OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
+
+2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (ARC_OPCODE_ARCV2): New define.
+
+2016-09-29  Alan Modra  <amodra@gmail.com>
+
+	* opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
+
+2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (insn_class_t): Add two new classes.
+
+2016-09-26  Alan Modra  <amodra@gmail.com>
+
+	* elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (aarch64_cond): Bump array size to 4.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
+	(OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
+	(OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
+	(OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
+	(sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
+	(sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
+	aarch64_insn_classes.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
+	(AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
+	(AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
+	(AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
+	(AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
+	(AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
+	(AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
+	(AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
+	(AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
+	(AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
+	(AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
+	(AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
+	(AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
+	(AARCH64_OPND_SVE_UIMM8_53): Likewise.
+	(aarch64_sve_dupm_mov_immediate_p): Declare.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
+	(AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
+	(AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
+	(AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
+	(AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
+	(AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
+	(AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
+	(AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
+	(AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
+	(AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
+	(AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
+	(AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
+	(AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
+	(AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
+	(AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
+	(AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
+	(AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
+	(AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
+	(AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
+	(AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
+	Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
+	aarch64_opnd.
+	(AARCH64_MOD_MUL): New aarch64_modifier_kind.
+	(aarch64_opnd_info): Make shifter.amount an int64_t and
+	rearrange the fields.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
+	(AARCH64_OPND_SVE_PRFOP): Likewise.
+	(aarch64_sve_pattern_array): Declare.
+	(aarch64_sve_prfop_array): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
+	(AARCH64_OPND_QLF_P_M): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
+	aarch64_operand_class.
+	(AARCH64_OPND_CLASS_PRED_REG): Likewise.
+	(AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
+	(AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
+	(AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
+	(AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
+	(AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
+	(AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
+	(AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
+	(AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (F_STRICT): New flag.
+
+2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
+
+	* opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
+	* elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
+	SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
+	* opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
+	relocation.
+
+2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
+	(ARM_SET_SYM_CMSE_SPCL): Likewise.
+
+2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
+
+	* opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
+
+2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
+
+	* libiberty.h (MAX_ALLOCA_SIZE): New macro.
+
+2016-07-27  Graham Markall  <graham.markall@embecosm.com>
+
+        * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
+        ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
+        ARC_NUM_ADDRTYPES.
+        * opcode/arc.h: Add BMU to insn_class_t enum.
+        * opcode/arc.h: Add PMU to insn_class_t enum.
+
+2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* dis-asm.h: Declare print_arc_disassembler_options.
+
+2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
+	out_implib_bfd fields.
+
+2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
+
+2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
+
+	* include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
+	(SHF_ARM_PURECODE): ... this.
+
+2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
+	(AARCH64_CPU_HAS_ANY_FEATURES): New.
+	(AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
+	(AARCH64_OPCODE_HAS_FEATURE): Remove.
+
+2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
+	of enabled FPU features.
+
+2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* opcode/sparc.h (enum sparc_opcode_arch_val): Move
+	SPARC_OPCODE_ARCH_MAX into the enum.
+
+2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
+
+2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* elf/mips.h (R_MIPS16_PC16_S1): New relocation.
+
+2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf/xtensa.h (xtensa_make_property_section): New prototype.
+
+2016-06-24  John Baldwin  <jhb@FreeBSD.org>
+
+	* elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
+	(AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
+	(AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
+	(AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
+
+2016-06-23  Graham Markall  <graham.markall@embecosm.com>
+
+	* opcode/arc.h: Make insn_class_t alphabetical again.
+
+2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf/dlx.h: Wrap in extern C.
+	* elf/xtensa.h: Likewise.
+	* opcode/arc.h: Likewise.
+
+2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
+	tilegx_pipeline.
+
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+	* opcode/arc.h: Add nps400 extension and instruction
+	subclass.
+	Remove ARC_OPCODE_NPS400
+	* elf/arc.h: Remove E_ARC_MACH_NPS400
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* opcode/sparc.h (enum sparc_opcode_arch_val): Add
+	SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
+	SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
+	SPARC_OPCODE_ARCH_V9M.
+
+2016-06-14  John Baldwin  <jhb@FreeBSD.org>
+
+	* opcode/msp430-decode.h (MSP430_Size): Remove.
+	(Msp430_Opcode_Decoded): Change type of size to int.
+
+2016-06-11  Alan Modra  <amodra@gmail.com>
+
+	* coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
+
+2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* opcode/sparc.h: Add missing documentation for hyperprivileged
+	registers in rd (%) and rs1 ($).
+
+2016-06-07  Alan Modra  <amodra@gmail.com>
+
+	* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
+	PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
+	PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
+	PPC_APUINFO_VLE: Define.
+
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
+	entries.
+	(ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
+
+2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
+	(struct arc_long_opcode): New structure.
+	(arc_long_opcodes): Declare.
+	(arc_num_long_opcodes): Declare.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* elf/mips.h: Add extern "C".
+	* elf/sh.h: Likewise.
+	* opcode/d10v.h: Likewise.
+	* opcode/d30v.h: Likewise.
+	* opcode/ia64.h: Likewise.
+	* opcode/mips.h: Likewise.
+	* opcode/ppc.h: Likewise.
+	* opcode/sparc.h: Likewise.
+	* opcode/tic6x.h: Likewise.
+	* opcode/v850.h: Likewise.
+
+2016-05-28  Alan Modra  <amodra@gmail.com>
+
+	* bfdlink.h (struct bfd_link_callbacks): Update comments.
+	Return void from multiple_definition, multiple_common,
+	add_to_set, constructor, warning, undefined_symbol,
+	reloc_overflow, reloc_dangerous and unattached_reloc.
+
+2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* opcode/metag.h: wrap declarations in extern "C".
+
+2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (insn_subclass_t): Add COND.
+	(flag_class_t): Add F_CLASS_EXTEND.
+
+2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* opcode/arc.h (struct arc_opcode): Renamed attribute class to
+	insn_class.
+	(struct arc_flag_class): Renamed attribute class to flag_class.
+
+2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
+	plain symbol.
+
+2016-04-29  Tom Tromey  <tom@tromey.com>
+
+	* dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
+	DW_LANG_Rust_old>: New constants.
+
+2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* elf/mips.h (AFL_ASE_DSPR3): New macro.
+	(AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
+	* opcode/mips.h (ASE_DSPR3): New macro.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+	    Nick Clifton  <nickc@redhat.com>
+
+	* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
+	enumerator.
+	(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
+	(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
+	(ARM_SYM_BRANCH_TYPE): Replace by ...
+	(ARM_GET_SYM_BRANCH_TYPE): This and ...
+	(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
+	BFD_ASSERT is defined or not.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* elf/arm.h (Tag_DSP_extension): Define.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* arm.h (ARM_FSET_CPU_SUBSET): Define macro.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
+	(ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
+	(ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
+	for the high core bits.
+
+2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (ARC_SYNTAX_1OP): Declare
+	(ARC_SYNTAX_NOP): Likewsie.
+	(ARC_OP1_MUST_BE_IMM): Update defined value.
+	(ARC_OP1_IMM_IMPLIED): Likewise.
+	(arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
+
+2016-04-28  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19722
+	* opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
+
+2016-04-27  Alan Modra  <amodra@gmail.com>
+
+	* bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
+	undef.  Formatting.
+
+2016-04-21  Nick Clifton  <nickc@redhat.com>
+
+	* bfdlink.h: Add prototype for bfd_link_check_relocs.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
+
+2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
+
+2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
+
+2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcode/arc.h (insn_class_t): Add NET and ACL class.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
+	* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (flag_class_t): Update.
+	(ARC_OPCODE_NONE): Define.
+	(ARC_OPCODE_ARCALL): Likewise.
+	(ARC_OPCODE_ARCFPX): Likewise.
+	(ARC_REGISTER_READONLY): Likewise.
+	(ARC_REGISTER_WRITEONLY): Likewise.
+	(ARC_REGISTER_NOSHORT_CUT): Likewise.
+	(arc_aux_reg): Add cpu.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (arc_num_opcodes): Remove.
+	(ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
+	(ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
+	(ARC_SUFFIX_FLAG): Define.
+	(flags_none, flags_f, flags_cc, flags_ccf): Declare.
+	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
+	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
+	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
+	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
+	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
+	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
+	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
+	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
+	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
+
+2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (DPA, DPX, SPX): New subclass enums.
+	(ARC_FPUDA): Define.
+	(arc_aux_reg): Add new field.
+
+2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* opcode/arc-func.h (replace_bits24): Changed.
+	(replace_bits24_be): Created.
+
+2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
+	(FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
+	(INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
+	(INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
+	(INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
+	(INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
+	(INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
+	(MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
+	(MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
+	(MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
+	(MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
+	(MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
+	(INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
+	(MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
+
+2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* opcode/i960.h: Add const qualifiers.
+	* opcode/tic4x.h (struct tic4x_inst): Likewise.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcodes/arc.h (insn_class_t): Add BITOP type.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
+	new classes instead.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf/arc.h (E_ARC_MACH_NPS400): Define.
+	* opcode/arc.h (ARC_OPCODE_NPS400): Define.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf/arc.h (EF_ARC_MACH): Delete.
+	(EF_ARC_MACH_MSK): Remove out of date comment.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* opcode/arc.h (ARC_OPCODE_BASE): Delete.
+
+2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19807
+	* bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
+
+2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
+	    Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* elf/arc-reloc.def: Add a call to ME within the formula for each
+	relocation that requires middle-endian correction.
+
+2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
+	* opcode/h8300.h (struct h8_opcode): Likewise.
+	* opcode/hppa.h (struct pa_opcode): Likewise.
+	* opcode/msp430.h: Likewise.
+	* opcode/spu.h (struct spu_opcode): Likewise.
+	* opcode/tic30.h (struct _register): Likewise.
+	* opcode/tic4x.h (struct tic4x_register): Likewise.
+	(struct tic4x_cond): Likewise.
+	(struct tic4x_indirect): Likewise.
+	(struct tic4x_inst): Likewise.
+	* opcode/visium.h (struct reg_entry): Likewise.
+
+2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
+	(ARM_CPU_HAS_FEATURE): Add comment.
+
+2016-03-03  Than McIntosh <thanm@google.com>
+
+	* plugin-api.h: Add new hooks to the plugin transfer vector to
+	to support querying section alignment and section size.
+	(ld_plugin_get_input_section_alignment): New hook.
+	(ld_plugin_get_input_section_size): New hook.
+	(ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
+	and LDPT_GET_INPUT_SECTION_SIZE.
+	(ld_plugin_tv): Add tv_get_input_section_alignment and
+	tv_get_input_section_size.
+
+2016-03-03  Evgenii Stepanov  <eugenis@google.com>
+
+	* plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19645
+	* bfdlink.h (bfd_link_elf_stt_common): New enum.
+	(bfd_link_info): Add elf_stt_common.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19636
+	PR ld/19704
+	PR ld/19719
+	* bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
+
+2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
+	    Jiong Wang  <jiong.wang@arm.com>
+
+	* opcode/arm.h (ARM_EXT2_FP16_INSN): New.
+
+2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
+	    Janek van Oirschot  <jvanoirs@synopsys.com>
+
+	* opcode/arc.h (arc_opcode arc_relax_opcodes)
+	(arc_num_relax_opcodes): Declare.
+
+2016-02-09  Nick Clifton  <nickc@redhat.com>
+
+	* opcode/metag.h (metag_scondtab): Mark as possibly unused.
+	* opcode/nds32.h (nds32_r45map): Likewise.
+	(nds32_r54map): Likewise.
+	* opcode/visium.h (gen_reg_table): Likewise.
+	(fp_reg_table, cc_table, opcode_table): Likewise.
+
+2016-02-09  Alan Modra  <amodra@gmail.com>
+
+	PR 16583
+	* elf/common.h (AT_SUN_HWCAP): Undef before defining.
+
+2016-02-04  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19561
+	* opcode/msp430.h (IGNORE_CARRY_BIT): New define.
+	(RRUX): Synthesise using case 2 rather than 7.
+
+2016-01-19  John Baldwin  <jhb@FreeBSD.org>
+
+	* elf/common.h (NT_FREEBSD_THRMISC): Define.
+	(NT_FREEBSD_PROCSTAT_PROC): Define.
+	(NT_FREEBSD_PROCSTAT_FILES): Define.
+	(NT_FREEBSD_PROCSTAT_VMMAP): Define.
+	(NT_FREEBSD_PROCSTAT_GROUPS): Define.
+	(NT_FREEBSD_PROCSTAT_UMASK): Define.
+	(NT_FREEBSD_PROCSTAT_RLIMIT): Define.
+	(NT_FREEBSD_PROCSTAT_OSREL): Define.
+	(NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
+	(NT_FREEBSD_PROCSTAT_AUXV): Define.
+
+2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
+	    Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
+
+	* elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
+	(ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
+	(ARC_TLS_LE_32): Fixed formula.
+	(ARC_TLS_GD_LD): Use new special function.
+	* opcode/arc-func.h: Changed all the replacement
+	functions to clear the patching bits before doing an or it with the value
+	argument.
+
+2016-01-18  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/19440
+	* coff/internal.h (internal_syment): Use int to hold section
+	number.
+	(N_UNDEF): Cast to int not short.
+	(N_ABS): Likewise.
+	(N_DEBUG): Likewise.
+	(N_TV): Likewise.
+	(P_TV): Likewise.
+
+2016-01-11  Nick Clifton  <nickc@redhat.com>
+
+	Import this change from GCC mainline:
+
+	2016-01-07  Mike Frysinger  <vapier@gentoo.org>
+
+	* longlong.h: Change !__SHMEDIA__ to
+	(!defined (__SHMEDIA__) || !__SHMEDIA__).
+	Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
+
+2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* opcode/mips.h: Add a summary of MIPS16 operand codes.
+
+2016-01-05  Mike Frysinger  <vapier@gentoo.org>
+
+	* libiberty.h (dupargv): Change arg to char * const *.
+	(writeargv, countargv): Likewise.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-0415, aout/ChangeLog-9115,
+cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
+mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
+som/ChangeLog-1015, and vms/ChangeLog-1015
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/ld/ChangeLog b/ld/ChangeLog
index f55272c..e33ce1b 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,4116 +1,6 @@
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* NEWS: Mention new PRU target.
-	* Makefile.am: Add PRU target.
-	* configure.tgt: Ditto.
-	* emulparams/pruelf.sh: New file.
-	* emultempl/pruelf.em: New file.
-	* scripttempl/pru.sc: New file.
-	* Makefile.in: Regenerate.
-	* testsuite/ld-pru/emit-relocs-1.d: New PRU testcase file.
-	* testsuite/ld-pru/emit-relocs-1.ld: Ditto.
-	* testsuite/ld-pru/emit-relocs-1a.s: Ditto.
-	* testsuite/ld-pru/emit-relocs-1b.s
-	* testsuite/ld-pru/ldi32.d: Ditto.
-	* testsuite/ld-pru/ldi32.s: Ditto.
-	* testsuite/ld-pru/ldi32_symbol.s: Ditto.
-	* testsuite/ld-pru/norelax_ldi32-data.d: Ditto.
-	* testsuite/ld-pru/norelax_ldi32-dis.d: Ditto.
-	* testsuite/ld-pru/pcrel_s10.d: Ditto.
-	* testsuite/ld-pru/pcrel_s10.s: Ditto.
-	* testsuite/ld-pru/pcrel_s10_label.s: Ditto.
-	* testsuite/ld-pru/pcrel_u8-illegal.d: Ditto.
-	* testsuite/ld-pru/pcrel_u8-illegal.s: Ditto.
-	* testsuite/ld-pru/pcrel_u8-illegal2.d: Ditto.
-	* testsuite/ld-pru/pcrel_u8-illegal2.s: Ditto.
-	* testsuite/ld-pru/pcrel_u8-illegal3.d: Ditto.
-	* testsuite/ld-pru/pcrel_u8-illegal3.s: Ditto.
-	* testsuite/ld-pru/pcrel_u8.d: Ditto.
-	* testsuite/ld-pru/pcrel_u8.s: Ditto.
-	* testsuite/ld-pru/pcrel_u8_label.s: Ditto.
-	* testsuite/ld-pru/pmem.d: Ditto.
-	* testsuite/ld-pru/pmem.s: Ditto.
-	* testsuite/ld-pru/pmem_symbol.s: Ditto.
-	* testsuite/ld-pru/pru.exp: Ditto.
-	* testsuite/ld-pru/relax_ldi32-data.d: Ditto.
-	* testsuite/ld-pru/relax_ldi32-dis.d: Ditto.
-	* testsuite/ld-pru/relax_ldi32.s: Ditto.
-	* testsuite/ld-pru/relax_ldi32_symbol.s: Ditto.
-	* testsuite/ld-pru/reloc.d: Ditto.
-	* testsuite/ld-pru/reloc.s: Ditto.
-	* testsuite/ld-pru/reloc_symbol.s: Ditto.
-	* testsuite/ld-pru/u16.d: Ditto.
-	* testsuite/ld-pru/u16.s: Ditto.
-	* testsuite/ld-pru/u16_symbol.s: Ditto.
-	* testsuite/lib/ld-lib.exp (check_shared_lib_support): No shared
-	libraries are supported for PRU.
-	(check_gc_sections_available): Mark PRU as not supported.
-	* testsuite/ld-elf/eh-frame-hdr.d: Disable for PRU.
-	* testsuite/ld-elf/endsym.d: Likewise.
-	* testsuite/ld-elf/group8a.d: Likewise.
-	* testsuite/ld-elf/group8b.d: Likewise.
-	* testsuite/ld-elf/group9a.d: Likewise.
-	* testsuite/ld-elf/group9b.d: Likewise.
-	* testsuite/ld-elf/merge.d: Likewise.
-	* testsuite/ld-elf/pr12851.d: Likewise.
-	* testsuite/ld-elf/pr14926.d: Likewise.
-	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
-	* testsuite/ld-elf/sec64k.exp: Mark sec64k case as too big for PRU.
-	* testsuite/ld-srec/srec.exp (run_srec_test): Add setup for PRU.
-
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* testsuite/lib/ld-lib.exp (run_dump_test): Pass -- to send_log.
-
-2016-12-28  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20995
-	* testsuite/ld-elf/pr20995c.s: New test file.
-	* testsuite/ld-elf/pr20995-2so.r: Likewise.
-	* testsuite/ld-elf/elf.exp: Run it.
-
-2016-12-26  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20995
-	* testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed
-	stub hash table traversal caused by section id increment.  Accept
-	the previous output too.
-	* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
-	* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
-	* testsuite/ld-arm/farcall-mixed-lib.d: Likewise.
-	* testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s,
-	* testsuite/ld-elf/pr20995.r: New test.
-	* testsuite/ld-elf/elf.exp: Run it.
-
-2016-12-26  Alan Modra  <amodra@gmail.com>
-
-	* scripttempl/elf.sc: Don't use $BSS_NAME in .dynbss.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* configure: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* NEWS: Add marker for 2.28.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* po/ld.pot: Regenerate.
-
-2016-12-22  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-scripts/sysroot-prefix.exp (sysroot_prefix_test_setup):
-	Call perror rather than error on "as" or "ar" failures.
-
-2016-12-21  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* ldlang.c (size_input_section): Avoid calling insert_pad
-	if output_section_statement->ignored is set.
-
-2016-12-21  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.
-
-2016-12-16  fincs  <fincs.alt1@gmail.com>
-
-	* ld.texinfo: Document --gc-keep-exported.
-	* ldlex.h (enum option_values): Add OPTION_GC_KEEP_EXPORTED.
-	* lexsup.c (parse_args): Add handling for --gc-keep-exported.
-
-2016-12-14  Yury Norov <ynorov@caviumnetworks.com>
-
-	* ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for tiny and
-	small ld-le relaxations in ilp32 mode.
-	* ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file.
-	* ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file.
-
-2016-12-13  Jiong Wang  <jiong.wang@arm.com>
-
-	* testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_lp64_emul): New
-	function.
-	(run_dump_test_lp64): New function which pass LP64 mode options to both
-	assembler and linker when building test binary.
-	(aarch64elftests): Remove eh-frame-merge test.
-	(eh-frame-merge-lp64): Restrict eh-frame-merge test to LP64 only.
-	(run_dump_test): Migrate to run_dump_test_lp64 if the test source was
-	written for LP64 only.
-	* testsuite/ld-aarch64/erratum843419.d: Support ILP32 mode.
-	* testsuite/ld-aarch64/farcall-b-defsym.d: Likewise.
-	* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
-	* testsuite/ld-aarch64/farcall-b.d: Likewise.
-	* testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise.
-	* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
-	* testsuite/ld-aarch64/farcall-bl.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-15.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-16.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-5a-local.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-5a.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-5b-local.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-5b.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-5r-local.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-6a.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-6b.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-7a.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-7b.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-8.d: Likewise.
-	* testsuite/ld-aarch64/limit-b.d: Likewise.
-	* testsuite/ld-aarch64/limit-bl.d: Likewise.
-
-2016-12-13  Awson  <kyrab@mail.ru>
-
-	PR ld/19254
-	* scripttempl/pe.sc (.fini): KEEP this section.
-	(.gcc_except_table): Likewise.
-	(.pdata): Also accept .pdata*.
-
-2016-12-13  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-elf/nobits-1.d: Remove xfail for hppa64.
-	* testsuite/ld-elf/note-1.d: Likewise.
-	* testsuite/ld-elf/note-2.d: Likewise.
-
-2016-12-13  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-elf/flags1.d: Run for RX.
-	* testsuite/ld-scripts/phdrs.exp: Likewise.
-	* testsuite/ld-scripts/pr14962.d: Likewise.
-	* testsuite/ld-scripts/pr14962-2.d: Likewise.
-
-2016-12-08  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-12-06  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-powerpc/tocopt7.s,
-	* testsuite/ld-powerpc/tocopt7.out,
-	* testsuite/ld-powerpc/tocopt7.d: New test.
-	* testsuite/ld-powerpc/tocopt8.s,
-	* testsuite/ld-powerpc/tocopt8.d: New test.
-	* testsuite/ld-powerpc/powerpc.exp: Run them.
-
-2016-12-05  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20906
-	* ldlex.l: Check for bogus strings in linker scripts.
-
-2016-12-05  Alyssa Milburn <amilburn@zall.org>
-
-	* testsuite/ld-sparc/wdispcall.s: New file.
-	* testsuite/ld-sparc/wdispcall.dd: Likewise.
-	* testsuite/ld-sparc/sparc.exp: Run new test.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Don't call
-	ppc64_elf_restore_symbols.
-	* testsuite/ld-powerpc/dotsym1.d: New.
-	* testsuite/ld-powerpc/dotsym2.d: New.
-	* testsuite/ld-powerpc/dotsym3.d: New.
-	* testsuite/ld-powerpc/dotsym4.d: New.
-	* testsuite/ld-powerpc/dotsymref.s: New.
-	* testsuite/ld-powerpc/nodotsym.s: New.
-	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-elf/indirect1b.c: Give dot-symbol a version too.
-	* testsuite/ld-elf/indirect2.c: Likewise.
-	* testsuite/ld-elf/indirect3b.c: Likewise.
-	* testsuite/ld-elf/indirect4b.c: Likewise.
-	* testsuite/ld-elf/pr18718.c: Likewise.
-	* testsuite/ld-elf/pr18720b.c: Likewise.
-	* testsuite/ld-elf/pr19553c.c: Likewise.
-	* testsuite/ld-elfvers/vers.h (FUNC_SYMVER): Define.
-	* testsuite/ld-elfvers/vers1.c: Use FUNC_SYMVER for functions.
-	* testsuite/ld-elfvers/vers4.c: Likewise.
-	* testsuite/ld-elfvers/vers5.c: Likewise.
-	* testsuite/ld-elfvers/vers6.c: Likewise.
-	* testsuite/ld-elfvers/vers7a.c: Likewise.
-	* testsuite/ld-elfvers/vers9.c: Likewise.
-	* testsuite/ld-elfvers/vers15.c: Likewise.
-	* testsuite/ld-elfvers/vers18.c: Likewise.
-	* testsuite/ld-elfvers/vers22a.c: Likewise.
-	* testsuite/ld-elfvers/vers23a.c: Likewise.
-	* testsuite/ld-elfvers/vers27d1.c: Likewise.
-	* testsuite/ld-elfvers/vers21.c: Likewise.
-	(_old_bar): Use attribute weak rather than asm weak.
-	* testsuite/ld-ifunc/pr16467b.c: Give dot-symbol a version.
-	* testsuite/ld-plugin/pr12760b.c: Define warning on .bar rather than
-	bar for ppc64 -mcall-aixdesc.
-	* testsuite/ld-plugin/pr16746a.c: Similarly for foobar.
-	* testsuite/ld-plugin/pr16746b.c: Likewise.
-	* testsuite/ld-elf/shared.exp: Allow dot-symbol in warnings and errors.
-	* testsuite/ld-plugin/lto.exp: Likewise.
-	* testsuite/ld-plugin/plugin-6.d: Likewise.
-	* testsuite/ld-plugin/plugin-7.d: Likewise.
-	* testsuite/ld-plugin/plugin-8.d: Likewise.
-	* testsuite/ld-plugin/plugin-13.d: Likewise.
-	* testsuite/ld-plugin/plugin-14.d: Likewise.
-	* testsuite/ld-plugin/plugin-15.d: Likewise.
-	* testsuite/ld-plugin/plugin-16.d: Likewise.
-	* testsuite/ld-plugin/plugin-20.d: Likewise.
-	* testsuite/ld-plugin/plugin-21.d: Likewise.
-	* testsuite/ld-plugin/plugin-22.d: Likewise.
-	* testsuite/ld-plugin/plugin-23.d: Likewise.
-	* testsuite/ld-plugin/plugin.exp: Define .main and .puts for ppc64
-	-mcall-aixdesc.
-	* testsuite/ld-elfvers/vers.exp (test_ar): Trim dot-symbols.
-	(objdump_dynsymstuff): Likewise.
-	(objdump_symstuff): Likewise.  Pack flags to keep column count
-	consistent.
-	* testsuite/ld-elfweak/elfweak.exp (objdump_dynsymstuff,
-	objdump_symstuff): As for vers.exp.
-	* testsuite/ld-elfvers/vers6.sym: Allow dot-symbols.
-	* testsuite/ld-elfvers/vers1.sym: Allow missing F flag for
-	-mcall-aixdesc .opd syms and adjust for flag packing.
-	* testsuite/ld-elfvers/vers4.sym: Likewise.
-	* testsuite/ld-elfvers/vers4a.sym: Likewise.
-	* testsuite/ld-elfvers/vers7a.sym: Likewise.
-	* testsuite/ld-elfvers/vers9.sym: Likewise.
-	* testsuite/ld-elfvers/vers15.sym: Likewise.
-	* testsuite/ld-elfvers/vers18.sym: Likewise.
-	* testsuite/ld-elfvers/vers21.sym: Likewise.
-	* testsuite/ld-elfvers/vers22a.sym: Likewise.
-	* testsuite/ld-elfvers/vers23a.sym: Likewise.
-	* testsuite/ld-elfvers/vers27d.sym: Likewise.
-	* testsuite/ld-elfweak/strong.sym: Likewise.
-	* testsuite/ld-elfweak/strongcomm.sym: Likewise.
-	* testsuite/ld-elfweak/strongdata.sym: Likewise.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-elfvers/vers.exp (objdump_dynsymstuff): Don't abort
-	on non-empty results with empty expected.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-cdtest/cdtest-foo.cc: Test for __GNUG__ >= 2.
-
-2016-12-03  Alan Modra  <amodra@gmail.com>
-
-	* ldexp.c (try_copy_symbol_type): Remove unnecessary check.
-
-2016-12-02  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20910
-	* ldmain.c (main): Prevent evaluation of %<char> sequences when
-	printing out a linker script.
-
-	PR ld/20911
-	* ldctor.c (ldctor_build_sets): Produce alternative error message
-	if the reloc was being applied to a special section.
-
-	PR ld/20912
-	* emultempl/elf32.em (_place_orphan): Test for ELF format of the
-	orphan before looking for the SHF_EXCLUDE flag.
-
-2016-12-02  Josh Conner  <joshconner@google.com>
-
-        * Makefile.am: Add dependency information for earmelf_fuchsia.c.
-        * Makefile.in: Regenerate.
-        * configure.tgt: Add support for aarch64-*-fuchsia, arm*-*-fuchsia*, and
-        x86_64-*-fuchsia* targets.
-        * emulparams/armelf_fuchsia.sh: New file.
-        * emulparams/armelfb_fuchsia.sh: New file.
-
-2016-12-01  Rudy Y  <rudyy.id@gmail.com>
-
-	PR ld/20880
-	* pe-dll.c (make_one): Use the hint if the ordinal is -1.
-
-2016-12-01  Yury Norov  <ynorov@caviumnetworks.com>
-
-	PR ld/20868
-	* testsuite/ld-aarch64/tls-relax-gd-ie-ilp32.d: New test.
-	* testsuite/ld-aarch64/relocs-ilp32.ld: Linker script for the new
-	test.
-	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
-
-2016-11-28  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* emulparams/arclinux_prof.sh: Remove duplicate TEMPLATE_NAME.
-
-2016-11-28  Nick Clifton  <nickc@redhat.com>
-
-	PR 20815
-	* testsuite/ld-elf/loadaddr1.d: Update.
-	* testsuite/ld-powerpc/vle-multiseg-5.d: Update.
-	* testsuite/ld-scripts/phdrs3a.d: Update.
-
-2016-11-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/indirect.exp: Add a test for PR 18720.
-	* testsuite/ld-elf/pr18720.rd: New file.
-
-2016-11-27  Alan Modra  <amodra@gmail.com>
-
-	PR 20815
-	* testsuite/ld-powerpc/vle-multiseg-5.d: Update.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* deffilep.y: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* scripttempl/ia64vms.sc: Fix spelling in comments.
-	* scripttempl/ip2k.sc: Fix spelling in comments.
-	* scripttempl/v850.sc: Fix spelling in comments.
-	* scripttempl/v850_rh850.sc: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* emultempl/avrelf.em: Fix spelling in comments.
-	* emultempl/elf32.em: Fix spelling in comments.
-	* emultempl/pe.em: Fix spelling in comments.
-	* emultempl/pep.em: Fix spelling in comments.
-	* emultempl/spuelf.em: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* testsuite/ld-sh/arch/arch.exp: Fix spelling in comments.
-	* testsuite/ld-sh/rd-sh.exp: Fix spelling in comments.
-	* testsuite/ld-sh/sh64/rd-sh64.exp: Fix spelling in comments.
-	* testsuite/ld-undefined/undefined.exp: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* testsuite/ld-arm/stm32l4xx-fix-all.s: Fix spelling in comments.
-	* testsuite/ld-arm/thumb2-b-interwork.s: Fix spelling in comments.
-	* testsuite/ld-arm/thumb2-bl.s: Fix spelling in comments.
-	* testsuite/ld-s390/tlspic1.s: Fix spelling in comments.
-	* testsuite/ld-s390/tlspic1_64.s: Fix spelling in comments.
-	* testsuite/ld-scripts/section-match-1.d: Fix spelling in comments.
-
-2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-	* deffile.h: Fix spelling in comments.
-	* ld.h: Fix spelling in comments.
-	* ldlang.c: Fix spelling in comments.
-	* ldmisc.c: Fix spelling in comments.
-	* pe-dll.c: Fix spelling in comments.
-
-2016-11-24  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20737
-	* testsuite/ld-arm/pie-bind-locally-a.s: New test source.
-	* testsuite/ld-arm/pie-bind-locally-b.s: Likewise.
-	* testsuite/ld-arm/pie-bind-locally.d: New testcase.
-	* testsuite/ld-arm/arm-elf.exp: Run new testcase.
-
-2016-11-24  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20858
-	* emultempl/elf32.em (_search_needed): Allow for path separator
-	and terminating NUL byte when allocating space for new $ORIGIN
-	path.
-
-2016-11-23  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-arm/vxworks2.sd: Update expected readelf output.
-
-	PR ld/20815
-	* ld.texinfo: Note that PT_TLS can be used as a segment type.
-	* testsuite/ld-discard/discard.ld: Add space for program headers.
-	* testsuite/ld-elf/flags1.ld: Likewise.
-	* testsuite/ld-elf/maxpage3.t: Likewise.
-	* testsuite/ld-elf/noload-1.t: Likewise.
-	* testsuite/ld-elf/orphan.ld: Likewise.
-	* testsuite/ld-elf/overlay.t: Likewise.
-	* testsuite/ld-elf/pr14052.t: Likewise.
-	* testsuite/ld-elf/pr19539.t: Likewise.
-	* testsuite/ld-elf/provide-hidden-1.ld: Likewise.
-	* testsuite/ld-elf/provide-hidden-s.ld: Likewise.
-	* testsuite/ld-elf/weak-dyn-1.ld: Likewise.
-	* testsuite/ld-i386/pr19539.t: Likewise.
-	* testsuite/ld-scripts/defined.t: Likewise.
-	* testsuite/ld-scripts/defined6.t: Likewise.
-	* testsuite/ld-scripts/dynamic-sections.t: Likewise.
-	* testsuite/ld-scripts/empty-aligned.t: Likewise.
-	* testsuite/ld-scripts/provide-2.t: Likewise.
-	* testsuite/ld-scripts/provide-4.t: Likewise.
-	* testsuite/ld-vax-elf/plt-local.ld: Likewise.
-	* testsuite/ld-x86-64/pr19539.t: Likewise.
-	* testsuite/ld-elf/ehdr_start-missing.d: Do not initialise the
-	dynamic linker.
-	* testsuite/ld-elf/ehdr_start-weak.d: Likewise.
-	* testsuite/ld-elf/elf.exp (pr14170, pr17068): Likewise.
-	* testsuite/ld-elf/loadaddr1.d: Update expected readelf output.
-	* testsuite/ld-elf/noload-2.d: Likewise.
-	* testsuite/ld-powerpc/vxworks2.sd: Likewise.
-	* testsuite/ld-scripts/phdrs3a.d: Likewise.
-	* testsuite/ld-scripts/size-2.d: Likewise.
-	* testsuite/ld-elf/group.ld: Add program headers.
-	* testsuite/ld-elf/overlay.d: Skip for SPU.
-	* testsuite/ld-elf/flags1.d: Skip for RX.
-	* testsuite/ld-elf/pr19162.d: Skip for HPPA64.
-	* testsuite/ld-elf/pr19539.d: Skip for ALPHA.
-	* testsuite/ld-scripts/empty-orphan.t: Update program headers.
-	* testsuite/ld-scripts/size-2.t: Likewise.
-
-2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-        * configure: Regenerate.
-
-2016-11-22  Alan Modra  <amodra@gmail.com>
-
-	PR 20744
-	* emultempl/ppc32elf.em (params): Update initializer.  Handle
-	--vle-reloc-fixup command line arg.
-
-2016-11-15  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20789
-	* ld/testsuite/ld-avr/pr20789.d: New test.
-	* ld/testsuite/ld-avr/pr20789.s: New test.
-
-
-2016-11-14  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20800
-	* testsuite/ld-x86-64/pr20800a.S: New file.
-	* testsuite/ld-x86-64/pr20800b.S: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/20800 test.
-
-2016-11-14  Nick Clifton  <nickc@redhat.com>
-
-	* lexsup.c (parse_args): Add break at end of default case.
-
-2016-11-10  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20737
-	* testsuite/ld-aarch64/pie-bind-locally-a.s: New test source.
-	* testsuite/ld-aarch64/pie-bind-locally-b.s: Likewise.
-	* testsuite/ld-aarch64/pie-bind-locally.d: New testcase.
-	* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcase.
-
-2016-11-07  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20784
-	* emultempl/elf32.em (search_needed): Fix infinite loop when
-	unable to process a token.  Add support for curly braced enclosed
-	tokens.
-	* ld.texinfo (--rpath-link): Document supprot for $ORIGIN and
-	$LIB.
-
-2016-11-07  Nick Clifton  <nickc@redhat.com>
-
-	* ld.texinfo (--compress-debug-sections): Expand documentation of
-	this option.
-
-2016-11-04  Nick Clifton  <nickc@redhat.com>
-
-	* emultempl/elf32.em (search_needed): Remove use of getauxval and
-	inclusion of <sys/auxv.h>.  Replace support for $PLATFORM with a
-	warning message.
-	* configure.ac (AC_CHECK_FUNCS): Remove getauxval.
-	* configure: Regenerate.
-	* config.in: Regenerate.
-
-2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* ldlang.h (struct lang_wild_statement_struct): Add
-	exclude_name_list field.
-	* ldlang.c (walk_wild_file_in_exclude_list): New function.
-	(walk_wild_consider_section): Use new
-	walk_wild_file_in_exclude_list function.
-	(walk_wild_file): Add call to walk_wild_file_in_exclude_list.
-	(print_wild_statement): Print new exclude_name_list field.
-	(lang_add_wild): Initialise new exclude_name_list field.
-	* testsuite/ld-scripts/exclude-file-1.d: New file.
-	* testsuite/ld-scripts/exclude-file-1.map: New file.
-	* testsuite/ld-scripts/exclude-file-1.t: New file.
-	* testsuite/ld-scripts/exclude-file-2.d: New file.
-	* testsuite/ld-scripts/exclude-file-2.map: New file.
-	* testsuite/ld-scripts/exclude-file-2.t: New file.
-	* testsuite/ld-scripts/exclude-file-3.d: New file.
-	* testsuite/ld-scripts/exclude-file-3.map: New file.
-	* testsuite/ld-scripts/exclude-file-3.t: New file.
-	* testsuite/ld-scripts/exclude-file-4.d: New file.
-	* testsuite/ld-scripts/exclude-file-4.map: New file.
-	* testsuite/ld-scripts/exclude-file-4.t: New file.
-	* testsuite/ld-scripts/exclude-file-a.s: New file.
-	* testsuite/ld-scripts/exclude-file-b.s: New file.
-	* testsuite/ld-scripts/exclude-file.exp: New file.
-	* ld.texinfo (Input Section Basics): Update description of
-	EXCLUDE_FILE to cover the new features.
-	* NEWS: Mention new EXCLUDE_FILE usage.
-
-2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/lib/ld-lib.exp (run_dump_test): Use object file names
-	based on the original source file name.
-	* testsuite/ld-discard/extern.d: Update object file names.
-	* testsuite/ld-discard/start.d: Likewise.
-	* testsuite/ld-discard/static.d: Likewise.
-	* testsuite/ld-elf/orphan-8.map: Likewise.
-
-2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Add
-	xc16x-*-elf to the list of targets that don't support -shared.
-
-2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* ldgram.y: Rename file_NAME_list to section_NAME_list
-	throughout.
-
-2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
-	    Andrew Waterman <andrew@sifive.com>
-
-	Add support for RISC-V architecture.
-	* Makefile.am: Add riscv files.
-	* Makefile.in: Regenerate.
-	* NEWS: Mention the support for this target.
-	* configure.tgt: Add riscv entries.
-	* emulparams/elf32lriscv-defs.sh: New file.
-	* emulparams/elf32lriscv.sh: New file.
-	* emulparams/elf64lriscv-defs.sh: New file.
-	* emulparams/elf64lriscv.sh: New file.
-	* emultempl/riscvelf.em: New file.
-
-2016-10-31  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* ldmain.c (add_archive_element): Initialize input->header.type.
-	* plugin.c (plugin_maybe_claim): Assert the statement is an input
-	statement.
-
-2016-10-15  Alan Modra  <amodra@gmail.com>
-
-	* emultempl/spu_ovl.o_c: Regenerate.
-
-2016-10-14  Alan Modra  <amodra@gmail.com>
-
-	* scripttempl/DWARF.sc: Add .debug_addr.
-
-2016-10-12  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-i386/pr19636-1d-nacl.d: Adjust for objdump change.
-	* testsuite/ld-i386/pr19636-2c-nacl.d: Likewise.
-	* testsuite/ld-tic6x/shlib-1r.dd: Likewise.
-	* testsuite/ld-x86-64/plt-nacl.pd: Likewise.
-	* testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise.
-
-2016-10-11  Nick Clifton  <nickc@redhat.com>
-
-	* ld-aarch64/emit-relocs-515-be.d: Adjust output to match change
-	in objdump.
-	* ld-aarch64/emit-relocs-515.d: Likewise.
-	* ld-aarch64/emit-relocs-516-be.d: Likewise.
-	* ld-aarch64/emit-relocs-516.d: Likewise.
-	* ld-aarch64/farcall-b-plt.d: Likewise.
-	* ld-aarch64/farcall-bl-plt.d: Likewise.
-	* ld-aarch64/gc-plt-relocs.d: Likewise.
-	* ld-aarch64/tls-desc-ie.d: Likewise.
-	* ld-aarch64/tls-tiny-desc.d: Likewise.
-	* ld-aarch64/tls-tiny-gd.d: Likewise.
-	* ld-aarch64/tls-tiny-ie.d: Likewise.
-	* ld-arm/arm-app-abs32.d: Likewise.
-	* ld-arm/arm-app.d: Likewise.
-	* ld-arm/arm-lib-plt32.d: Likewise.
-	* ld-arm/arm-lib.d: Likewise.
-	* ld-arm/armthumb-lib.d: Likewise.
-	* ld-arm/cortex-a8-fix-b-plt.d: Likewise.
-	* ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
-	* ld-arm/cortex-a8-fix-bl-plt.d: Likewise.
-	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
-	* ld-arm/cortex-a8-fix-blx-plt.d: Likewise.
-	* ld-arm/farcall-mixed-app-v5.d: Likewise.
-	* ld-arm/farcall-mixed-app.d: Likewise.
-	* ld-arm/farcall-mixed-app2.d: Likewise.
-	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
-	* ld-arm/farcall-mixed-lib.d: Likewise.
-	* ld-arm/ifunc-10.dd: Likewise.
-	* ld-arm/ifunc-14.dd: Likewise.
-	* ld-arm/ifunc-15.dd: Likewise.
-	* ld-arm/ifunc-3.dd: Likewise.
-	* ld-arm/ifunc-4.dd: Likewise.
-	* ld-arm/ifunc-9.dd: Likewise.
-	* ld-arm/long-plt-format.d: Likewise.
-	* ld-arm/mixed-app-v5.d: Likewise.
-	* ld-arm/mixed-app.d: Likewise.
-	* ld-arm/mixed-lib.d: Likewise.
-	* ld-arm/tls-lib-loc.d: Likewise.
-	* ld-cris/dso-pltdis1.d: Likewise.
-	* ld-cris/dso-pltdis2.d: Likewise.
-	* ld-cris/dso12-pltdis.d: Likewise.
-	* ld-elf/symbolic-func.r: Likewise.
-	* ld-frv/fdpic-pie-1.d: Likewise.
-	* ld-frv/fdpic-pie-2.d: Likewise.
-	* ld-frv/fdpic-pie-6.d: Likewise.
-	* ld-frv/fdpic-pie-7.d: Likewise.
-	* ld-frv/fdpic-pie-8.d: Likewise.
-	* ld-frv/fdpic-shared-1.d: Likewise.
-	* ld-frv/fdpic-shared-2.d: Likewise.
-	* ld-frv/fdpic-shared-3.d: Likewise.
-	* ld-frv/fdpic-shared-4.d: Likewise.
-	* ld-frv/fdpic-shared-5.d: Likewise.
-	* ld-frv/fdpic-shared-6.d: Likewise.
-	* ld-frv/fdpic-shared-7.d: Likewise.
-	* ld-frv/fdpic-shared-8.d: Likewise.
-	* ld-frv/fdpic-shared-local-2.d: Likewise.
-	* ld-frv/fdpic-shared-local-8.d: Likewise.
-	* ld-frv/fdpic-static-1.d: Likewise.
-	* ld-frv/fdpic-static-2.d: Likewise.
-	* ld-frv/fdpic-static-6.d: Likewise.
-	* ld-frv/fdpic-static-7.d: Likewise.
-	* ld-frv/fdpic-static-8.d: Likewise.
-	* ld-frv/tls-dynamic-2.d: Likewise.
-	* ld-frv/tls-initial-shared-2.d: Likewise.
-	* ld-frv/tls-relax-shared-2.d: Likewise.
-	* ld-frv/tls-shared-2.d: Likewise.
-	* ld-i386/plt-nacl.pd: Likewise.
-	* ld-i386/plt-pic-nacl.pd: Likewise.
-	* ld-i386/plt-pic.pd: Likewise.
-	* ld-i386/plt.pd: Likewise.
-	* ld-i386/pr19636-1d-nacl.d: Likewise.
-	* ld-i386/pr19636-1d.d: Likewise.
-	* ld-i386/pr19636-2c-nacl.d: Likewise.
-	* ld-i386/pr19636-2c.d: Likewise.
-	* ld-ifunc/ifunc-21-x86-64.d: Likewise.
-	* ld-ifunc/ifunc-22-x86-64.d: Likewise.
-	* ld-ifunc/pr17154-i386.d: Likewise.
-	* ld-ifunc/pr17154-x86-64.d: Likewise.
-	* ld-m68k/plt1-68020.d: Likewise.
-	* ld-m68k/plt1-cpu32.d: Likewise.
-	* ld-m68k/plt1-isab.d: Likewise.
-	* ld-m68k/plt1-isac.d: Likewise.
-	* ld-metag/shared.d: Likewise.
-	* ld-metag/stub_pic_app.d: Likewise.
-	* ld-metag/stub_pic_shared.d: Likewise.
-	* ld-metag/stub_shared.d: Likewise.
-	* ld-s390/tlsbin_64.dd: Likewise.
-	* ld-s390/tlspic_64.dd: Likewise.
-	* ld-tic6x/shlib-1.dd: Likewise.
-	* ld-tic6x/shlib-1b.dd: Likewise.
-	* ld-tic6x/shlib-1rb.dd: Likewise.
-	* ld-tic6x/shlib-app-1.dd: Likewise.
-	* ld-tic6x/shlib-app-1b.dd: Likewise.
-	* ld-tic6x/shlib-app-1r.dd: Likewise.
-	* ld-tic6x/shlib-app-1rb.dd: Likewise.
-	* ld-tic6x/shlib-noindex.dd: Likewise.
-	* ld-vax-elf/export-class-data.dd: Likewise.
-	* ld-vax-elf/plt-local-lib.dd: Likewise.
-	* ld-vax-elf/plt-local.dd: Likewise.
-	* ld-x86-64/bnd-ifunc-2.d: Likewise.
-	* ld-x86-64/bnd-plt-1.d: Likewise.
-	* ld-x86-64/gotpcrel1.dd: Likewise.
-	* ld-x86-64/libno-plt-1b.dd: Likewise.
-	* ld-x86-64/load1c-nacl.d: Likewise.
-	* ld-x86-64/load1c.d: Likewise.
-	* ld-x86-64/load1d-nacl.d: Likewise.
-	* ld-x86-64/load1d.d: Likewise.
-	* ld-x86-64/mov1a.d: Likewise.
-	* ld-x86-64/mov1b.d: Likewise.
-	* ld-x86-64/mov1c.d: Likewise.
-	* ld-x86-64/mov1d.d: Likewise.
-	* ld-x86-64/mov2a.d: Likewise.
-	* ld-x86-64/mov2b.d: Likewise.
-	* ld-x86-64/mov2c.d: Likewise.
-	* ld-x86-64/mov2d.d: Likewise.
-	* ld-x86-64/mpx3.dd: Likewise.
-	* ld-x86-64/mpx4.dd: Likewise.
-	* ld-x86-64/no-plt-1a.dd: Likewise.
-	* ld-x86-64/no-plt-1b.dd: Likewise.
-	* ld-x86-64/no-plt-1c.dd: Likewise.
-	* ld-x86-64/no-plt-1e.dd: Likewise.
-	* ld-x86-64/no-plt-1f.dd: Likewise.
-	* ld-x86-64/no-plt-1g.dd: Likewise.
-	* ld-x86-64/plt-main-bnd.dd: Likewise.
-	* ld-x86-64/plt-nacl.pd: Likewise.
-	* ld-x86-64/plt.pd: Likewise.
-	* ld-x86-64/pr18591.d: Likewise.
-	* ld-x86-64/pr19609-1c.d: Likewise.
-	* ld-x86-64/pr19609-1e.d: Likewise.
-	* ld-x86-64/pr19609-1j.d: Likewise.
-	* ld-x86-64/pr19609-1l.d: Likewise.
-	* ld-x86-64/pr19609-1m.d: Likewise.
-	* ld-x86-64/pr19609-5b.d: Likewise.
-	* ld-x86-64/pr19609-5c.d: Likewise.
-	* ld-x86-64/pr19609-5e.d: Likewise.
-	* ld-x86-64/pr19609-6b.d: Likewise.
-	* ld-x86-64/pr19609-7b.d: Likewise.
-	* ld-x86-64/pr19609-7d.d: Likewise.
-	* ld-x86-64/pr19636-2d.d: Likewise.
-	* ld-x86-64/pr20093-1.d: Likewise.
-	* ld-x86-64/pr20093-2.d: Likewise.
-	* ld-x86-64/pr20253-1b.d: Likewise.
-	* ld-x86-64/pr20253-1d.d: Likewise.
-	* ld-x86-64/pr20253-1f.d: Likewise.
-	* ld-x86-64/pr20253-1h.d: Likewise.
-	* ld-x86-64/pr20253-1j.d: Likewise.
-	* ld-x86-64/pr20253-1l.d: Likewise.
-	* ld-x86-64/protected3.d: Likewise.
-	* ld-x86-64/tlsbin.dd: Likewise.
-	* ld-x86-64/tlsbin2.dd: Likewise.
-	* ld-x86-64/tlsbindesc.dd: Likewise.
-	* ld-x86-64/tlsdesc-nacl.pd: Likewise.
-	* ld-x86-64/tlsdesc.dd: Likewise.
-	* ld-x86-64/tlsdesc.pd: Likewise.
-	* ld-x86-64/tlsgd10.dd: Likewise.
-	* ld-x86-64/tlsgd5.dd: Likewise.
-	* ld-x86-64/tlsgd6.dd: Likewise.
-	* ld-x86-64/tlsgd8.dd: Likewise.
-	* ld-x86-64/tlsgdesc.dd: Likewise.
-	* ld-x86-64/tlspic.dd: Likewise.
-	* ld-x86-64/tlspic2.dd: Likewise.
-
-2016-10-11  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20535
-	* emultempl/elf32.em (_search_needed): Add support for pseudo
-	environment variables supported by ld.so.  Namely $ORIGIN, $LIB
-	and $PLATFORM.
-	* configure.ac: Add getauxval to list AC_CHECK_FUNCS list.
-	* config.in: Regenerate.
-	* configure: Regenerate.
-
-2016-10-11  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c (lang_do_assignments_1): Descend into output section
-	statements that do not yet have bfd sections.  Set symbol section
-	temporarily for symbols defined in such statements to the undefined
-	section.  Don't error on data or reloc statements until final phase.
-	* ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section
-	in expld.section.
-	* testsuite/ld-mmix/bpo-10.d: Adjust.
-	* testsuite/ld-mmix/bpo-11.d: Adjust.
-
-2016-10-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* emulparams/elf64_s390.sh: Move binary start to 16M.
-	* testsuite/ld-s390/tlsbin_64.dd: Adjust testcases accordingly.
-	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
-
-2016-10-07  Alan Modra  <amodra@gmail.com>
-
-	* ldexp.c (MAX): Define.
-	(exp_unop, exp_binop, exp_trinop): Alloc at least enough for
-	etree_type.value.
-
-2016-10-07  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/lib/ld-lib.exp (is_generic_elf): New, extracted from..
-	* testsuite/ld-elf/elf.exp: ..here.
-
-2016-10-06  Ludovic Courtès  <ludo@gnu.org>
-
-	* emulparams/elf32bmipn32-defs.sh: Shift quote of
-	"x$EMULATION_NAME" to the left to work around
-	<http://ftp.gnu.org/gnu/bash/bash-4.2-patches/bash42-007>.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* lexsup.c: Spell fall through comments consistently and add
-	missing fall through comments.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning
-	by adding return.
-
-2016-10-04  Alan Modra  <amodra@gmail.com>
-
-	* ld.texinfo (Expression Section): Update result of arithmetic
-	expressions.
-	* ldexp.c (arith_result_section): New function.
-	(fold_binary): Use it.
-
-2016-10-04  Alan Modra  <amodra@gmail.com>
-
-	* ldexp.c (exp_value_fold): New function.
-	(exp_unop, exp_binop, exp_trinop): Use it.
-
-2016-09-30  Alan Modra  <amodra@gmail.com>
-
-	* scripttempl/v850.sc: Don't reference __ctbp, __ep, __gp when
-	not relocating.
-	* scripttempl/v850_rh850.sc: Likewise.
-
-2016-09-30  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20528
-	* testsuite/ld-elf/pr20528a.d: xfail generic elf targets.  Allow
-	multiple .text sections for hppa-linux.
-	* testsuite/ld-elf/pr20528b.d: Likewise.
-
-2016-09-30  Alan Modra  <amodra@gmail.com>
-
-	* ldmain.c (default_bfd_error_handler): New function pointer.
-	(ld_bfd_error_handler): New function.
-	(main): Arrange to call it on bfd errors/warnings.
-	(ld_bfd_assert_handler): Enable tail call.
-
-2016-09-30  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c (ignore_bfd_errors): Update params.
-
-2016-09-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20528
-	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
-	merge 2 sections with different SHF_EXCLUDE.
-	* testsuite/ld-elf/pr20528a.d: New file.
-	* testsuite/ld-elf/pr20528a.s: Likewise.
-	* testsuite/ld-elf/pr20528b.d: Likewise.
-	* testsuite/ld-elf/pr20528b.s: Likewise.
-
-2016-09-28  Christophe Lyon  <christophe.lyon@linaro.org>
-
-	PR ld/20608
-	* testsuite/ld-arm/arm-elf.exp: Handle new testcase.
-	* testsuite/ld-arm/farcall-mixed-app2.d: New file.
-	* testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
-	* testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
-	* testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
-
-2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
-
-	* Makefile.in: Regenerate.
-	* configure: Likewise.
-
-2016-09-26  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-powerpc/attr-gnu-4-4.s: Delete.
-	* testsuite/ld-powerpc/attr-gnu-4-14.d: Delete.
-	* testsuite/ld-powerpc/attr-gnu-4-24.d: Delete.
-	* testsuite/ld-powerpc/attr-gnu-4-34.d: Delete.
-	* testsuite/ld-powerpc/attr-gnu-4-41.d: Delete.
-	* testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning.
-	* testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output.
-	* testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise.
-	* testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise.
-	* testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.
-
-2016-09-23  Akihiko Odaki  <akihiko.odaki.4i@stu.hosei.ac.jp>
-
-	PR ld/20595
-	* testsuite/ld-arm/unwind-4.d: Add -q option to linker command
-	line and -r option to objdump command line.  Match emitted relocs
-	to make sure that superflous relocs are not generated.
-
-2016-09-23  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* emulparams/elf64_s390.sh: Change TEXT_START_ADDR to 256MB.
-	* testsuite/ld-s390/tlsbin_64.dd: Adjust testcase accordingly.
-	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
-
-2016-09-22  Nick Clifton  <nickc@redhat.com>
-
-	* emultempl/elf32.em (_try_needed): In verbose mode, report failed
-	attempts to find a needed library.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* testsuite/ld-aarch64/emit-relocs-28.d: Expect spaces after ","
-	in addresses.
-	* testsuite/ld-aarch64/emit-relocs-301-be.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-301.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-302-be.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-302.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-310-be.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-310.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-313.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-515-be.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-515.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-516-be.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-516.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-531.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-532.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-533.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-535.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-536.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-537.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-538.d: Likewise.
-	* testsuite/ld-aarch64/erratum835769.d: Likewise.
-	* testsuite/ld-aarch64/erratum843419.d: Likewise.
-	* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
-	* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
-	* testsuite/ld-aarch64/gc-plt-relocs.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-21.d: Likewise.
-	* testsuite/ld-aarch64/ifunc-7c.d: Likewise.
-	* testsuite/ld-aarch64/tls-desc-ie.d: Likewise.
-	* testsuite/ld-aarch64/tls-large-desc-be.d: Likewise.
-	* testsuite/ld-aarch64/tls-large-desc.d: Likewise.
-	* testsuite/ld-aarch64/tls-large-ie-be.d: Likewise.
-	* testsuite/ld-aarch64/tls-large-ie.d: Likewise.
-	* testsuite/ld-aarch64/tls-relax-all.d: Likewise.
-	* testsuite/ld-aarch64/tls-relax-gd-ie.d: Likewise.
-	* testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d: Likewise.
-	* testsuite/ld-aarch64/tls-relax-gdesc-ie.d: Likewise.
-	* testsuite/ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise.
-	* testsuite/ld-aarch64/tls-relax-large-desc-ie.d: Likewise.
-	* testsuite/ld-aarch64/tls-tiny-desc.d: Likewise.
-	* testsuite/ld-aarch64/tls-tiny-gd.d: Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* testsuite/ld-aarch64/emit-relocs-280.d: Match branch comments.
-	* testsuite/ld-aarch64/weak-undefined.d: Likewise.
-
-2016-09-20  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* ld.texinfo (Input Section Basics): Expand the description of
-	EXCLUDE_FILE.
-
-2016-09-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security
-	Extensions entry functions in absolute section.
-	* testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
-
-2016-09-14  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/ld-arc/tls-dtpoff.dd: New file.
-	* testsuite/ld-arc/tls-dtpoff.rd: Likewise.
-	* testsuite/ld-arc/tls-dtpoff.s: Likewise.
-	* testsuite/ld-arc/tls-relocs.ld: Likewise.
-	* testsuite/ld-arc/arc.exp: Add new tdpoff test.
-
-2016-09-14  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20537
-	* emultempl/elf32.em: More OPTION_xxx values into an enum.  Add
-	OPTION_NO_EH_FRAME_HDR.
-	(_add_options): Add support for --no-eh-frame-hdr.
-	* ld.texinfo: Document new option.
-	* lexsup.c (elf_shlib_list_options): List new option.
-	* NEWS: Mention the new option.
-
-2016-09-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20550
-	* testsuite/ld-x86-64/pr20550a.s: New file.
-	* testsuite/ld-x86-64/pr20550b.s: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp (x86_64tests): Add tests for
-	PR ld/20550.
-
-2016-09-06  Nick Clifton  <nickc@redhat.com>
-
-	* Makefile.am (CFLAGS_FOR_TARGET): Define as a copy of CFLAGS but
-	without any sanitization options.
-	(CXXFLAGS_FOR_TARGET): Define as a copy of CXXFLAGS but	without
-	any sanitization options.
-	(check-DEJAGNU): Pass CFLAGS_FOR_TARGET and CXXFLAGS_FOR_TARGET
-	as CFLAGS and CXXFLAGS respectively.
-
-2016-09-02  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20545
-	* testsuite/ld-avr/avr-prop-7.d: New test.
-	* testsuite/ld-avr/avr-prop-7.s: New test.
-	* testsuite/ld-avr/avr-prop-8.d: New test.
-	* testsuite/ld-avr/avr-prop-8.s: New test.
-
-2016-09-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/pr20513c.d: Limit to *-*-linux* and *-*-gnu*
-	targets.
-	* testsuite/ld-elf/pr20513d.d: Likewise.
-
-2016-09-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20513
-	* testsuite/ld-elf/pr20513a.d: New file.
-	* testsuite/ld-elf/pr20513a.s: Likewise.
-	* testsuite/ld-elf/pr20513b.d: Likewise.
-	* testsuite/ld-elf/pr20513b.s: Likewise.
-	* testsuite/ld-elf/pr20513c.d: Likewise.
-	* testsuite/ld-elf/pr20513d.d: Likewise.
-	* testsuite/ld-elf/pr20513e.d: Likewise.
-	* testsuite/ld-elf/pr20513f.d: Likewise.
-
-2016-08-31  Alan Modra  <amodra@gmail.com>
-
-	PR 20513
-	* ldlang.c (section_already_linked): Deal with SHF_EXCLUDE sections.
-
-2016-08-31  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-powerpc/vle-multiseg-1.d: Adjust to suit segment change.
-	* testsuite/ld-powerpc/vle-multiseg-2.d: Likewise.
-	* testsuite/ld-powerpc/vle-multiseg-3.d: Likewise.
-	* testsuite/ld-powerpc/vle-multiseg-6.d: Likewise.
-	* testsuite/ld-powerpc/vle-reloc-2.d: Likewise.
-
-2016-08-30  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/ld-arc/tls_gs-01.d: Set to XFAIL on arc*-*-elf*.
-	* testsuite/ld-arc/tls_ie-01.d: Likewise.
-
-2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/19784 tests only
-	if ifunc attribute works.
-
-2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/14961
-	PR ld/20515
-	* testsuite/ld-i386/i386.exp: Run pr20515.
-	* testsuite/ld-i386/pr20515.d: New file.
-	* testsuite/ld-i386/pr20515.s: Likewise.
-	* testsuite/ld-ifunc/ifunc-14a.s: Use R_386_PLT32 to call IFUNC
-	function.
-	* testsuite/ld-ifunc/ifunc-14c.s: Likewise.
-	* testsuite/ld-ifunc/ifunc-2-i386.s: Likewise.
-	* testsuite/ld-ifunc/ifunc-2-local-i386.s: Likewise.
-	* testsuite/ld-ifunc/ifunc.exp: Move PR ld/19784 tests to ...
-	* testsuite/ld-x86-64/x86-64.exp: Here.
-	* testsuite/ld-ifunc/pr19784a.c: Moved to ...
-	* testsuite/ld-x86-64/pr19784a.c: Here.
-	* testsuite/ld-ifunc/pr19784b.c: Moved to ...
-	* testsuite/ld-x86-64/pr19784b.c: Here.
-	* testsuite/ld-ifunc/pr19784c.c: Moved to ...
-	* testsuite/ld-x86-64/pr19784c.c: Here.
-
-2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* emultempl/armelf.em (params): New static variable.
-	(thumb_entry_symbol, byteswap_code, target1_is_rel, target2_type,
-	fix_v4bx, use_blx, vfp11_denorm_fix, stm32l4xx_fix, fix_cortex_a8,
-	no_enum_size_warning, no_wchar_size_warning, pic_veneer,
-	merge_exidx_entries, fix_arm1176, cmse_implib): move as part of the
-	above new structure.
-	(arm_elf_before_allocation): Access static variable from the params
-	structure.
-	(gld${EMULATION_NAME}_finish): Likewise.
-	(arm_elf_create_output_section_statements): Likewise and pass the
-	address of that structure to bfd_elf32_arm_set_target_relocs instead
-	of the static variables.
-	(PARSE_AND_LIST_ARGS_CASES): Access static variable from the params
-	structure.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* ld/testsuite/ld-arc/tls_gd-01.s: Added a testcase for this patch.
-	* ld/testsuite/ld-arc/tls_gd-01.d: Likewise.
-
-2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/ld-arc/tls_ie-01.s: Added to verify associated fix.
-	* testsuite/ld-arc/tls_ie-01.d: Likewise
-
-2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* emultempl/armelf.em (in_implib_filename): Declare and initialize new
-	variable.
-	(arm_elf_create_output_section_statements): Open import input library
-	file for writing and pass resulting in_implib_bfd to
-	bfd_elf32_arm_set_target_relocs.
-	(PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option.
-	(PARSE_AND_LIST_LONGOPTS): Define --in-implib option.
-	(PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option.
-	(PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case.
-	* ld.texinfo (--cmse-implib): Update to mention --in-implib.
-	(--in-implib): Document new option.
-	* NEWS: Likewise.
-	* testsuite/ld-arm/arm-elf.exp
-	(Secure gateway import library generation): add --defsym VER=1 to gas
-	CLI.
-	(Secure gateway import library generation: errors): Likewise.
-	(Input secure gateway import library): New test.
-	(Input secure gateway import library: no output import library):
-	Likewise.
-	(Input secure gateway import library: not an SG input import library):
-	Likewise.
-	(Input secure gateway import library: earlier stub section base):
-	Likewise.
-	(Input secure gateway import library: later stub section base):
-	Likewise.
-	(Input secure gateway import library: veneer comeback): Likewise.
-	(Input secure gateway import library: entry function change):
-	Likewise.
-	* testsuite/ld-arm/cmse-implib.s: Add input import library testing.
-	* testsuite/ld-arm/cmse-implib.rd: Update accordingly.
-	* testsuite/ld-arm/cmse-new-implib.out: New file.
-	* testsuite/ld-arm/cmse-new-implib.rd: Likewise.
-	* testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise.
-	* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise.
-	* testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise.
-	* testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise.
-	* testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
-
-2016-08-25  Alan Modra  <amodra@gmail.com>
-
-	* configure.tgt (powerpc*-*-linux* et al): Rewrite, adding LE
-	support for BE.  First output all target endian configury
-	values, then opposite endian.  Handle more tooldirs.  Fix
-	bogus matches with strings in MANUF-OS part of target triple.
-
-2016-08-23  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/lib/ld-lib.exp (run_cc_link_tests): Don't fail tests
-	twice.
-
-2016-08-19  Nick Clifton  <nickc@redhat.com>
-
-	* emultempl/aarch64elf.em (before_parse): Initialise the relro
-	field in the link_info structure.
-	* emultempl/armelf.em (before_parse): Likewise.
-	* emultempl/linux.em (before_parse): Likewise.
-	* emultempl/scoreelf.em (before_parse): Likewise.
-
-	* testsuite/ld-alpha/tlsbin.rd: Adjust expected ordering of sections.
-	* testsuite/ld-alpha/tlsbinr.rd: Likewise.
-	* testsuite/ld-alpha/tlspic.rd: Likewise.
-	* testsuite/ld-cris/libdso-2.d: Likewise.
-	* testsuite/ld-i386/nogot1.d: Likewise.
-	* testsuite/ld-i386/pr12718.d: Likewise.
-	* testsuite/ld-i386/pr12921.d: Likewise.
-	* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsbin.rd: Likewise.
-	* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsbin2.rd: Likewise.
-	* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsbindesc.rd: Likewise.
-	* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsdesc.rd: Likewise.
-	* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsgdesc.rd: Likewise.
-	* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsnopic.rd: Likewise.
-	* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlspic.rd: Likewise.
-	* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlspic2.rd: Likewise.
-	* testsuite/ld-ia64/tlsbin.rd: Likewise.
-	* testsuite/ld-ia64/tlspic.rd: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-10.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-50.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-60.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-70.d: Likewise.
-	* testsuite/ld-mmix/bspec1.d: Likewise.
-	* testsuite/ld-mmix/bspec2.d: Likewise.
-	* testsuite/ld-mmix/local1.d: Likewise.
-	* testsuite/ld-mmix/local3.d: Likewise.
-	* testsuite/ld-mmix/local5.d: Likewise.
-	* testsuite/ld-mmix/local7.d: Likewise.
-	* testsuite/ld-mmix/undef-3.d: Likewise.
-	* testsuite/ld-powerpc/tlsexe.r: Likewise.
-	* testsuite/ld-powerpc/tlsexe32.r: Likewise.
-	* testsuite/ld-powerpc/tlsexetoc.r: Likewise.
-	* testsuite/ld-powerpc/tlsso.r: Likewise.
-	* testsuite/ld-powerpc/tlsso32.r: Likewise.
-	* testsuite/ld-powerpc/tlstocso.r: Likewise.
-	* testsuite/ld-s390/tlsbin.rd: Likewise.
-	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
-	* testsuite/ld-s390/tlspic.rd: Likewise.
-	* testsuite/ld-s390/tlspic_64.rd: Likewise.
-	* testsuite/ld-sh/sh64/crange1.rd: Likewise.
-	* testsuite/ld-sh/sh64/crange2.rd: Likewise.
-	* testsuite/ld-sh/sh64/crange3-cmpct.rd: Likewise.
-	* testsuite/ld-sh/sh64/crange3-media.rd: Likewise.
-	* testsuite/ld-sh/sh64/crange3.rd: Likewise.
-	* testsuite/ld-sh/sh64/crangerel1.rd: Likewise.
-	* testsuite/ld-sh/sh64/crangerel2.rd: Likewise.
-	* testsuite/ld-sh/tlsbin-2.d: Likewise.
-	* testsuite/ld-sh/tlspic-2.d: Likewise.
-	* testsuite/ld-sparc/gotop32.rd: Likewise.
-	* testsuite/ld-sparc/gotop64.rd: Likewise.
-	* testsuite/ld-sparc/tlssunbin32.rd: Likewise.
-	* testsuite/ld-sparc/tlssunbin64.rd: Likewise.
-	* testsuite/ld-sparc/tlssunnopic32.rd: Likewise.
-	* testsuite/ld-sparc/tlssunnopic64.rd: Likewise.
-	* testsuite/ld-sparc/tlssunpic32.rd: Likewise.
-	* testsuite/ld-sparc/tlssunpic64.rd: Likewise.
-	* testsuite/ld-tic6x/common.d: Likewise.
-	* testsuite/ld-tic6x/shlib-1.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
-	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
-	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
-	* testsuite/ld-x86-64/nogot1.d: Likewise.
-	* testsuite/ld-x86-64/pr12718.d: Likewise.
-	* testsuite/ld-x86-64/pr12921.d: Likewise.
-	* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/split-by-file.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic2.rd: Likewise.
-	* testsuite/ld-xtensa/tlsbin.rd: Likewise.
-	* testsuite/ld-xtensa/tlspic.rd: Likewise.
-
-2016-08-18  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-undefined/weak-undef.exp: Use unsupported not
-	unresolved.
-
-2016-08-12  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-tic6x/shlib-1.rd: Correct expected .dynsym sh_info.
-	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
-
-2016-08-12  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-undefined/weak-fundef.s: New.
-	* testsuite/ld-undefined/weak-undef.t: Don't specify filename.
-	* testsuite/ld-undefined/weak-undef.exp: Run new tests.  Rearrange
-	much of old code.  Use is_elf_format to select targets.
-
-2016-08-11  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20436
-	* testsuite/lib/ld-lib.exp (at_least_gcc_version): Don't ignore
-	remote_exec status.
-	(check_gcc_plugin_enabled): Likewise.  Revert previous patch.
-
-2016-08-11  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20436
-	* testsuite/lib/ld-lib.exp (check_gcc_plugin_enabled): When not
-	testing remotely, check to see if target compiler is installed
-	before trying to run it.
-
-2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
-
-	PR ld/15428
-	* testsuite/ld-mips-elf/mips-elf.exp: Un-KFAIL `__ehdr_start'
-	test 2.
-
-2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.dd: New
-	test.
-	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.nd: New
-	test.
-	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.dd: New test.
-	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.nd: New test.
-	* testsuite/ld-mips-elf/pic-and-nonpic-1a-micromips.s: New test
-	source.
-	* testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s: New test
-	source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-08-09  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20436
-	* testsuite/lib/ld-lib.exp (check_gcc_plugin_enabled): New
-	proc.
-	(check_lto_available): Return 0 if check_gcc_plugin_enabled
-	returns 0.
-	(check_lto_fat_available): Likewise.
-	(check_lto_shared_available): Likewise.
-
-2016-08-09  Roland McGrath  <roland@hack.frob.com>
-
-	* emulparams/armelf.sh (GENERATE_PIE_SCRIPT): Set to yes.
-
-2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* emultempl/armelf.em (cmse_implib): Declare and define this new
-	static variable.
-	(arm_elf_create_output_section_statements): Add new cmse_implib
-	parameter.
-	(OPTION_CMSE_IMPLIB): Define macro.
-	(PARSE_AND_LIST_LONGOPTS): Add entry for new --cmse-implib switch.
-	(PARSE_AND_LIST_OPTIONS): Likewise.
-	(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_CMSE_IMPLIB case.
-	* ld.texinfo (--cmse-implib): Document new option.
-	* testsuite/ld-arm/arm-elf.exp
-	(Secure gateway import library generation): New test.
-	(Secure gateway import library generation: errors): Likewise.
-	* testsuite/ld-arm/cmse-implib.s: New file.
-	* testsuite/ld-arm/cmse-implib-errors.out: Likewise.
-	* testsuite/ld-arm/cmse-implib.rd: Likewise.
-
-2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* ld.texinfo (Placement of SG veneers): New concept entry.
-	* testsuite/ld-arm/arm-elf.exp
-	(Secure gateway veneers: no .gnu.sgstubs section): New test.
-	(Secure gateway veneers: wrong entry functions): Likewise.
-	(Secure gateway veneers (ARMv8-M Baseline)): Likewise.
-	(Secure gateway veneers (ARMv8-M Mainline)): Likewise.
-	* testsuite/ld-arm/cmse-veneers.s: New file.
-	* testsuite/ld-arm/cmse-veneers.d: Likewise.
-	* testsuite/ld-arm/cmse-veneers.rd: Likewise.
-	* testsuite/ld-arm/cmse-veneers.sd: Likewise.
-	* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise.
-	* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
-
-2016-08-02  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/17739
-	* emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Define with
-	valye 'yes'.
-	* emulparams/shelf32.sh: Likewise.
-	* emulparams/shelf32.sh: Likewise.
-	* emulparams/shelf_nto.sh: Likewise.
-	* emulparams/shelf_nto.sh: Likewise.
-	* emulparams/shelf_vxworks.sh: Likewise.
-	* emulparams/shelf_vxworks.sh: Likewise.
-	* emulparams/shlelf32_linux.sh: Likewise.
-	* emulparams/shlelf32_linux.sh: Likewise.
-	* emulparams/shlelf_linux.sh: Likewise.
-	* emulparams/shlelf_linux.sh: Likewise.
-	* emulparams/shlelf_nto.sh: Likewise.
-	* emulparams/shlelf_nto.sh: Likewise.
-
-2016-07-27  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/micromips-branch-absolute.d: Update
-	patterns for branch compaction.
-	* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d:
-	Likewise.
-
-2016-07-27  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-gc/personality.d: Use "target cfi" to restrict the
-	test to targets which support cfi.
-
-2016-07-27  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* ldbuildid.c (generate_build_id): Warning fix.
-
-2016-07-26  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support.
-	* testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise.
-	* testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New
-	test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New
-	test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od:
-	New test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd:
-	New test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od:
-	New test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd:
-	New test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od:
-	New test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd:
-	New test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od:
-	New test.
-	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd:
-	New test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-07-26  Igor Kudrin  <ikudrin@accesssoftek.com>
-
-	* ldbuildid.c: Changes for MinGW32:
-	Include windows.h and rpcdce.h.
-	(validate_build_id_style): Allow "uuid" style.
-	(generate_build_id): Fill in id_bits using UuidCreate().
-
-2016-07-25  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-elf/sec64k.exp: Run test for arc, msp430, or1k
-	and m32r.  Correct comment.  Relax ld -r match to account for
-	msp increased number of default sections.
-
-2016-07-22  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/ld-arc/got-01.d: New file.
-	* testsuite/ld-arc/got-01.s: New file.
-
-2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* configure: Regenerated.
-
-2016-07-21  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Replace
-	"targets_to_xfail" parameter with "args".
-	* testsuite/ld-elf/compress.exp: Remove empty list of xfails on
-	all calls to run_ld_link_exec_tests.
-	* testsuite/ld-elf/dwarf.exp: Likewise.
-	* testsuite/ld-elf/indirect.exp: Likewise.
-	* testsuite/ld-elf/wrap.exp: Likewise.
-	* testsuite/ld-i386/i386.exp: Likewise.
-	* testsuite/ld-i386/no-plt.exp: Likewise.
-	* testsuite/ld-i386/tls.exp: Likewise.
-	* testsuite/ld-ifunc/ifunc.exp: Likewise.
-	* testsuite/ld-pie/pie.exp: Likewise.
-	* testsuite/ld-plugin/lto.exp: Likewise.
-	* testsuite/ld-size/size.exp: Likewise.
-	* testsuite/ld-x86-64/mpx.exp: Likewise.
-	* testsuite/ld-x86-64/no-plt.exp: Likewise.
-	* testsuite/ld-x86-64/tls.exp: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Likewise.
-	* testsuite/ld-elf/elf.exp: Likewise.  Reorder args when providing
-	xfails and simplify lists.
-	* testsuite/ld-elf/shared.exp: Likewise.
-
-2016-07-21  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/lib/ld-lib.exp (run_ld_link_tests): Add optional
-	parameter to pass list of xfails.
-	* testsuite/ld-elf/elf.exp: Add xfails for implib tests.  Tidy
-	implib test formatting.  Don't set .data start address.
-	* testsuite/ld-elf/implib.s: Remove first .bss directive and
-	replace second one with equivalent .section directive.
-	* testsuite/ld-elf/empty-implib.out: Add expected final error.
-	* testsuite/ld-elf/implib.rd: Update.
-
-2016-07-20  Alan Modra  <amodra@gmail.com>
-
-	* ldexp.c (exp_unop, exp_binop, exp_trinop, exp_nameop): Don't
-	fold expression.
-	* testsuite/ld-elf/maxpage3b.d: Expect correct maxpagesize.
-
-2016-07-19  Roland McGrath  <roland@hack.frob.com>
-
-	* emulparams/aarch64elf.sh (GENERATE_PIE_SCRIPT): Set to yes.
-	* emulparams/aarch64elf32.sh: Likewise.
-
-2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/unaligned-branch-2.d: Update error
-	messages expected.
-	* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
-	* testsuite/ld-mips-elf/bal-jalx-addend.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-local.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-pic.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test.
-	* testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-3.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test
-	source.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test
-	source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message
-	expected.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d:
-	Likewise.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d:
-	Likewise.
-	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
-	* testsuite/ld-mips-elf/undefweak-overflow.s: Add jumps,
-	microMIPS BAL and MIPS16 instructions.
-	* testsuite/ld-mips-elf/undefweak-overflow.d: Update
-	accordingly.
-	* testsuite/ld-mips-elf/unaligned-branch-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: New test.
-	* testsuite/ld-mips-elf/unaligned-branch-r6-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-branch-mips16.d: New test.
-	* testsuite/ld-mips-elf/unaligned-branch-micromips.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jump-mips16.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jump-micromips.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jump.d: New test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-07-19  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* plugin.c (plugin_call_claim_file): Restore the file offset after
-	an unsuccessful attempt to claim a file.
-	* testplug.c (bytes_to_read_before_claim): New global.
-	(record_read_length): New function, sets new global
-	bytes_to_read_before_claim.
-	(parse_option): Handle 'read:<NUMBER>' option.
-	(onclaim_file): Read file content before checking for claim.
-	* testsuite/ld-plugin/plugin-30.d: New file.
-	* testsuite/ld-plugin/plugin.exp: Add new test.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* plugin.c: Don't include libbfd.h.  Include plugin-api.h
-	before bfd/plugin.h.
-	(plugin_object_p): Use bfd_plugin_open_input.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c (open_output): Replace bfd_search_for_target with
-	bfd_iterate_over_targets.  Localize vars.
-
-2016-07-16  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c: Don't include libbfd.h.
-	* emultempl/nds32elf.em: Likewise.
-	* emultempl/ppc64elf.em: Likewise.
-	* emultempl/ppc32elf.em: Likewise.
-	(pagesize): Delete.
-	(params): Update init.
-	(ppc_after_open_output): Use params.pagesize.  Don't call bfd_log2.
-	(PARSE_AND_LIST_ARGS_CASES): Use params.pagesize.
-	* emultempl/sh64elf.em: Don't include libbfd.h.
-	(after_allocation): Use ASSERT, not BFD_ASSERT.
-	* emultempl/xtensaelf.em: Don't include libbfd.h.
-	(replace_insn_sec_with_prop_sec): Use xmalloc, not bfd_malloc.
-	* Makefile.am: Update dependencies.
-	* Makefile.in: Regenerate.
-
-2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-	    Nick Clifton  <nickc@redhat.com>
-
-	* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Open import
-	library file for writing and initialize implib_bfd field of link_info
-	structure.
-	* emultempl/pe.em (pe_implib_filename): Remove variable declaration.
-	(OPTION_IMPLIB_FILENAME): Remove macro definition.
-	(gld${EMULATION_NAME}_add_options): Remove --out-implib option.
-	(gld_${EMULATION_NAME}_list_options): Likewise.
-	(gld${EMULATION_NAME}_handle_option): Likewise.
-	(gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename
-	instead of pe_implib_filename.
-	* emultempl/pep.em (pep_implib_filename): Remove variable declaration.
-	(OPTION_IMPLIB_FILENAME): Remove enumerator.
-	(gld${EMULATION_NAME}_add_options): Remove --out-implib option.
-	(gld_${EMULATION_NAME}_list_options): Likewise.
-	(gld${EMULATION_NAME}_handle_option): Likewise.
-	(gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename
-	instead of pep_implib_filename.
-	* ld.h (args_type): Declare new out_implib_filename field.
-	* ld.texinfo (--out-implib): Move documentation to arch-independent
-	part and rephrase to apply to ELF targets.
-	* ldexp.c (exp_fold_tree_1): Set ldscript_def field to 1 for symbols
-	defined in linker scripts.
-	* ldlex.h (enum option_values): Declare new OPTION_OUT_IMPLIB
-	enumerator.
-	* lexsup.c (ld_options): Add entry for new --out-implib switch.
-	(parse_args): Handle OPTION_OUT_IMPLIB case.
-	* testsuite/ld-elf/elf.exp (Generate empty import library): New test.
-	(Generate import library): Likewise.
-	* testsuite/ld-elf/implib.s: Likewise.
-	* testsuite/ld-elf/implib.rd: New file.
-	* testsuite/ld-elf/empty-implib.out: Likewise
-
-2016-07-15  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-arc/arc.exp: Always run the sda-relocs test in
-	little endian mode.
-
-2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/mips-elf.exp: Run
-	`branch-absolute-addend', `mips16-branch-absolute',
-	`mips16-branch-absolute-addend' and
-	`micromips-branch-absolute-addend'.
-
-2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/mips16-branch-absolute.d: New test.
-	* testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test.
-	* testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test.
-	* testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New
-	test.
-	* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New
-	test.
-	* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New
-	test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
-	from `mips16-branch-absolute' and
-	`mips16-branch-absolute-addend', referred indirectly only.
-
-2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/branch-absolute.d: New test.
-	* testsuite/ld-mips-elf/branch-absolute-n32.d: New test.
-	* testsuite/ld-mips-elf/branch-absolute-n64.d: New test.
-	* testsuite/ld-mips-elf/branch-absolute-addend.d: New test.
-	* testsuite/ld-mips-elf/branch-absolute-addend-n32.d: New test.
-	* testsuite/ld-mips-elf/branch-absolute-addend-n64.d: New test.
-	* testsuite/ld-mips-elf/micromips-branch-absolute.d: New test.
-	* testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: New
-	test.
-	* testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: New
-	test.
-	* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: New
-	test.
-	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d:
-	New test.
-	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d:
-	New test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
-	from `branch-absolute-addend' and
-	`micromips-branch-absolute-addend', referred indirectly only.
-
-2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* emulparams/arcelf.sh (SDATA_START_SYMBOLS): Add offset.
-	* testsuite/ld-arc/sda-relocs.dd: New file.
-	* testsuite/ld-arc/sda-relocs.ld: Likewise.
-	* testsuite/ld-arc/sda-relocs.rd: Likewise.
-	* testsuite/ld-arc/sda-relocs.s: Likewise.
-	* testsuite/ld-arc/arc.exp: Add SDA tests.
-
-2016-07-11  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* testsuite/ld-arc/nps-1b.err: Update test to handle more
-	verbosity.
-
-2016-07-09  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-powerpc/elfv2exe.d: Update.
-
-2016-07-06  James Bowman  <james.bowman@ftdichip.com>
-
-	* scripttempl/ft32.sc (__PMSIZE): Correct __PMSIZE_.
-	(DATA): add ALIGN.
-        (BSS): add ALIGN
-
-2016-07-05  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-plugin/lto.exp: Add -flto to PR ld/20321 test.
-
-2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
-
-	* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
-	* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
-	* testsuite/ld-arm/arm-elf.exp: Run it.
-
-2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
-
-	* testsuite/ld-arm/arm_noread.ld: Renamed to ...
-	testsuite/ld-arm/arm_purecode.ld: ... this, and replaced
-	all noread's by purecode.
-
-2016-07-05  Jan Beulich  <jbeulich@suse.com>
-
-	* ldexp.c (exp_fold_tree_1): Set linker_def field based on
-	assignment line number.
-	* ldlex.l (lineno): Drop initializer.
-	(<<EOF>>): Set lineno to zero after reaching top of stack.
-
-2016-07-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20321
-	* plugin.c (plugin_opt_plugin): Warn and return if plugin has
-	been loaded already.
-	* testsuite/ld-plugin/lto.exp: Run PR ld/20321 test.
-	* testsuite/ld-plugin/pr20321.c: New file.
-
-2016-07-04  Nick Clifton  <nickc@redhat.com>
-
-	* scripttempl/ft32.sc (__PMSIZE_): If not defined, set to 256K.
-	(__RAMSIZE): If not defined, set to 64K.
-	(MEMORY): Set the flash region size to __PMSIZE and the ram region
-	size to __RAMSIZE.
-
-2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/branch-misc-2.d: New test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run it.
-
-2016-07-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
-	(Thumb-2 BL on ARMv6-M): New testcase.
-	* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
-	* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
-
-2016-07-01  Tristan Gingold  <gingold@adacore.com>
-
-	* NEWS: Add marker for 2.27.
-
-2016-06-28  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-gc/gc.exp: Run pr20306 test.
-	* ld-gc/pr20306.c: New file.
-	* ld-gc/pr20306.d: Likewise.
-
-2016-06-28  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-elf/comm-data.exp: Expect comm-data2 test to fail
-	for bfin.
-	* testsuite/ld-elf/elf.exp: Expect pr14170 and symbolic function
-	tests to fail for bfin.
-	* testsuite/ld-elf/endsym.d: Expect to fail with cr16, crx, dlx,
-	nds32 and visium.
-	* testsuite/ld-elf/var1.d: Expect to fail with d30v, dlx, ft32 and
-	microblaze.
-	* testsuite/ld-pe/pe.exp: Expect foreign symbol test to fail for
-	mcore-pe.
-
-2016-06-28  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-elf/merge.d: Add m68hc11 to list of targets that
-	expect to fail this test.
-	* testsuite/ld-scripts/overlay-size.d: Skip the entire test for
-	RX.
-	* testsuite/ld-scripts/rgn-at10.d: No longer expect this test to
-	fail for the RX.
-	* testsuite/ld-scripts/rgn-at11.d: Likewise.
-	* testsuite/ld-scripts/rgn-at2.d: Likewise.
-	* testsuite/ld-scripts/rgn-at6.d: Likewise.
-	* testsuite/ld-scripts/rgn-at7.d: Likewise.
-	* testsuite/ld-scripts/rgn-at8.d: Likewise.
-
-2016-06-28  James Clarke  <jrtc27@jrtc27.com>
-
-	* testsuite/ld-elf/symbolic-func.r: Allow non-zero offsets from
-	.text.
-
-2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/attr-gnu-4-10.d: Match any UNIX OS/ABI.
-	* testsuite/ld-mips-elf/attr-gnu-4-50.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-60.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-70.d: Likewise.
-
-2016-06-28  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20302
-	* testsuite/ld-scripts/pr20302.d: Exclude *-*-*aout.
-
-2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/mips16-branch-2.d: New test.
-	* testsuite/ld-mips-elf/mips16-branch-3.d: New test.
-	* testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test.
-	* testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test.
-	* testsuite/ld-mips-elf/mips16-branch.s: New test source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-06-27  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/20302
-	* lexsup.c (set_segment_start): If resetting the start address of
-	a section, remember to generate a new script element as well.
-	* testsuite/ld-scripts/pr20302.d: New test.
-	* testsuite/ld-scripts/scripts.exp: Run the new test.
-
-2016-06-24  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul):
-	Don't error out, always return an emulation.
-
-2016-06-24  Dilyan Palauzov <dilyan.palauzov@aegee.org>
-	    H.J. Lu  <hongjiu.lu@intel.com>
-
-	* lexsup.c (elf_shlib_list_options): Check DEFAULT_LD_Z_RELRO
-	for -z relro help message.
-
-2016-06-22  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/undefweak-overflow.d: Use wildcard
-	address matching.
-
-2016-06-22  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/mips-elf.exp: Uniquely identify
-	`undefweak-overflow' tests.
-
-2016-06-22  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20283
-	* NEWS: Mention --enable-relro.
-	* configure.ac: Add --enable-relro.
-	(DEFAULT_LD_Z_RELRO): New.  Set by --enable-relro.
-	* configure.tgt (ac_default_ld_z_relro): Default it to 1 for
-	some Linux targets.
-	* config.in: Regenerated.
-	* configure: Likewise.
-	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
-	link_info.relro to DEFAULT_LD_Z_RELRO.
-	* testsuite/config/default.exp (ld_elf_shared_opt): New.
-	* testsuite/lib/ld-lib.exp (run_dump_test): Pass
-	$ld_elf_shared_opt to ld for ELF targets with shared object
-	support.
-	(run_ld_link_tests): Likewise.
-
-2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/mode-change-error-1a.s: Trigger an error
-	twice rather than once.
-	* testsuite/ld-mips-elf/mode-change-error-1.d: Adjust
-	accordingly.  Remove the full stop from the end of the message.
-
-2016-06-21  Graham Markall  <graham.markall@embecosm.com>
-
-	* testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400.
-	* testsuite/ld-arc/nps-1b.d: Likewise.
-
-2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20267
-	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
-	PR ld/20267.
-	(lto_run_tests): Likewise.
-	* testsuite/ld-plugin/pr20267a.c: New file.
-	* testsuite/ld-plugin/pr20267b.c: Likewise.
-
-2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
-	    Alan Modra  <amodra@gmail.com>
-
-	PR ld/20276
-	* plugin.c (plugin_notice): Set non_ir_ref on common symbols.
-	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
-	PR ld/20276.
-	(lto_run_tests): Likewise.
-	* testsuite/ld-plugin/pass.out: New file.
-	* testsuite/ld-plugin/pr20276a.c: Likewise.
-	* testsuite/ld-plugin/pr20276b.c: Likewise.
-
-2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* plugin.c (plugin_object_p): Replace bfd_plugin_uknown
-	with bfd_plugin_unknown.
-
-2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20253
-	* testsuite/ld-i386/i386.exp: Run PR ld/20253 tests.
-	* testsuite/ld-i386/no-plt.exp: Likewise.
-	* testsuite/ld-x86-64/no-plt.exp: Likewise.
-	* testsuite/ld-i386/pr13302.d: Remove .rel.plt section.
-	* testsuite/ld-ifunc/ifunc-13-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-15-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-5a.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-5b.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-6a.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-6b.d: Likewise.
-	* testsuite/ld-i386/pr20244-2a.d: Remove .plt section.
-	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
-	* testsuite/ld-i386/pr20244-2b.d: Updated.
-	* testsuite/ld-i386/pr20244-2c.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
-	* testsuite/ld-i386/pr20253-1a.c: New file.
-	* testsuite/ld-i386/pr20253-1b.S: Likewise.
-	* testsuite/ld-i386/pr20253-1c.S: Likewise.
-	* testsuite/ld-i386/pr20253-1d.S: Likewise.
-	* testsuite/ld-i386/pr20253-2a.c: Likewise.
-	* testsuite/ld-i386/pr20253-2b.S: Likewise.
-	* testsuite/ld-i386/pr20253-2c.S: Likewise.
-	* testsuite/ld-i386/pr20253-2d.S: Likewise.
-	* testsuite/ld-i386/pr20253-3.d: Likewise.
-	* testsuite/ld-i386/pr20253-3.s: Likewise.
-	* testsuite/ld-i386/pr20253-4.s: Likewise.
-	* testsuite/ld-i386/pr20253-4a.d: Likewise.
-	* testsuite/ld-i386/pr20253-4b.d: Likewise.
-	* testsuite/ld-i386/pr20253-4c.d: Likewise.
-	* testsuite/ld-i386/pr20253-5.d: Likewise.
-	* testsuite/ld-i386/pr20253-5.s: Likewise.
-	* testsuite/ld-ifunc/ifunc-23-x86.s: Likewise.
-	* testsuite/ld-ifunc/ifunc-23a-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-23b-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-23c-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-24-x86.s: Likewise.
-	* testsuite/ld-ifunc/ifunc-24a-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-24b-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-24c-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-25-x86.s: Likewise.
-	* testsuite/ld-ifunc/ifunc-25a-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-25b-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1.s: Likewise.
-	* testsuite/ld-x86-64/pr20253-1a.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1b.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1c.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1e.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1f.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1g.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1i.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1j.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1k.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-1l.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-2a.c: Likewise.
-	* testsuite/ld-x86-64/pr20253-2b.S: Likewise.
-	* testsuite/ld-x86-64/pr20253-2c.S: Likewise.
-	* testsuite/ld-x86-64/pr20253-2d.S: Likewise.
-	* testsuite/ld-x86-64/pr20253-3.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-3.s: Likewise.
-	* testsuite/ld-x86-64/pr20253-4.s: Likewise.
-	* testsuite/ld-x86-64/pr20253-4a.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-4b.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-4c.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-4d.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-4e.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-4f.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-5.s: Likewise.
-	* testsuite/ld-x86-64/pr20253-5a.d: Likewise.
-	* testsuite/ld-x86-64/pr20253-5b.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18a-i386.d: Remove extra IRELATIVE
-	relocation.
-	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-18a.s: Fix a typo.
-	* testsuite/ld-x86-64/x86-64.exp: Run pr20253-1 tests.
-
-2016-06-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-	    Tony Wang  <tony.wang@arm.com>
-
-	* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
-	Assemble for ARMv6-M.
-	(Thumb2-Thumb2 farcall M profile): New testcase.
-	* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
-	* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
-	reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
-	* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
-
-2016-06-16  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.
-	* testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets.
-	Remove .rel.plt section.
-	* testsuite/ld-i386/pr19636-2e-nacl.d: New file.
-
-2016-06-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/no-plt-check1a.S (check): Test static
-	function pointer.
-	* testsuite/ld-i386/no-plt-check1b.S (check): Likewise.
-	* testsuite/ld-x86-64/no-plt-check1.S (check): Likewise.
-	* testsuite/ld-i386/no-plt-extern1a.S (func_p): New.  Static
-	function pointer.
-	* testsuite/ld-i386/no-plt-extern1b.S (func_p): Likewise.
-	* testsuite/ld-x86-64/no-plt-extern1.S (func_p): Likewise.
-	* testsuite/ld-i386/no-plt-1a.dd: Updated.
-	* testsuite/ld-i386/no-plt-1b.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1c.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1d.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1e.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1f.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1g.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1h.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1i.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1j.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
-
-2016-06-14  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20254
-	* testsuite/ld-avr/avr-prop-6.d: New test.
-	* testsuite/ld-avr/avr-prop-6.s: New test.
-
-2016-06-14  Alan Modra  <amodra@gmail.com>
-
-	* ldbuildid.c: Formatting.
-	* ldcref.c: Formatting.
-	* ldctor.c: Formatting.
-	* ldemul.c: Formatting.
-	* ldexp.c: Formatting.
-	* ldfile.c: Formatting.
-	* ldlang.c: Formatting.
-	* ldmain.c: Formatting.
-	* ldwrite.c: Formatting.
-
-2016-06-14  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c: Expand uses of bfd_my_archive.
-	* ldmain.c: Likewise.
-	* ldmisc.c: Likewise.
-	* plugin.c: Likewise.
-
-2016-06-14  Alan Modra  <amodra@gmail.com>
-
-	PR ld/20241
-	* ldmain.c (add_archive_element): Just print file name of file within
-	thin archives.
-	* ldmisc.c (vfinfo): Likewise.
-	* plugin.c (plugin_object_p): Open file within thin archives.
-	(plugin_maybe_claim): Expand comment.
-
-2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20244
-	* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
-	pr20244-2c and pr20244-2d.
-	* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
-	* testsuite/ld-i386/pr20244-2.s: New file.
-	* testsuite/ld-i386/pr20244-2a.d: Likewise.
-	* testsuite/ld-i386/pr20244-2b.d: Likewise.
-	* testsuite/ld-i386/pr20244-2c.d: Likewise.
-	* testsuite/ld-i386/pr20244-2d.d: Likewise.
-	* testsuite/ld-i386/pr20244-3a.c: Likewise.
-	* testsuite/ld-i386/pr20244-3b.S: Likewise.
-	* testsuite/ld-i386/pr20244-3c.S: Likewise.
-	* testsuite/ld-i386/pr20244-3d.S: Likewise.
-
-2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
-	* testsuite/ld-i386/ifunc-1a.c: New file.
-	* testsuite/ld-i386/ifunc-1b.S: Likewise.
-	* testsuite/ld-i386/ifunc-1c.S: Likewise.
-	* testsuite/ld-i386/ifunc-1d.S: Likewise.
-
-2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
-
-	* testsuite/ld-srec/srec.exp: Changed to XFAIL on both little and
-	big endian ARC targets.
-
-2016-06-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32.
-	* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
-
-2016-06-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20244
-	* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
-	* testsuite/ld-i386/pr20244-1.s: New file.
-	* testsuite/ld-i386/pr20244-1a.d: Likewise.
-	* testsuite/ld-i386/pr20244-1b.d: Likewise.
-	* testsuite/ld-i386/pr20244-1c.d: Likewise.
-
-2016-06-08  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	PR ld/20221
-	* testsuite/ld-avr/avr-prop-5.d: New.
-	* testsuite/ld-avr/avr-prop-5.s: New.
-
-2016-06-09  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
-
-	* testsuite/ld-avr/lds-mega.d: New test.
-	* testsuite/ld-avr/lds-mega.s: New test source.
-	* testsuite/ld-avr/lds-tiny.d: New test.
-	* testsuite/ld-avr/lds-tiny.s: New test source.
-
-2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/libno-plt-1b.dd: New file.
-	* testsuite/ld-i386/libno-plt-1b.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1a.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1a.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1b.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1b.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1c.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1c.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1d.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1d.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1e.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1e.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1f.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1f.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1g.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1g.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1h.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1h.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1i.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1i.rd: Likewise.
-	* testsuite/ld-i386/no-plt-1j.dd: Likewise.
-	* testsuite/ld-i386/no-plt-1j.rd: Likewise.
-	* testsuite/ld-i386/no-plt-check1a.S: Likewise.
-	* testsuite/ld-i386/no-plt-check1b.S: Likewise.
-	* testsuite/ld-i386/no-plt-extern1a.S: Likewise.
-	* testsuite/ld-i386/no-plt-extern1b.S: Likewise.
-	* testsuite/ld-i386/no-plt-func1.c: Likewise.
-	* testsuite/ld-i386/no-plt-main1.c: Likewise.
-	* testsuite/ld-i386/no-plt.exp: Likewise.
-
-2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/tls.exp (run_cc_link_tests): Update test
-	name.
-
-2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
-	tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
-	* testsuite/ld-i386/pass.out: New file.
-	* testsuite/ld-i386/tls-def1.c: Likewise.
-	* testsuite/ld-i386/tls-gd1.S: Likewise.
-	* testsuite/ld-i386/tls-ld1.S: Likewise.
-	* testsuite/ld-i386/tls-main1.c: Likewise.
-	* testsuite/ld-i386/tls.exp: Likewise.
-	* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsbin2.dd: Likewise.
-	* testsuite/ld-i386/tlsbin2.rd: Likewise.
-	* testsuite/ld-i386/tlsbin2.sd: Likewise.
-	* testsuite/ld-i386/tlsbin2.td: Likewise.
-	* testsuite/ld-i386/tlsbinpic2.s: Likewise.
-	* testsuite/ld-i386/tlsgd3.dd: Likewise.
-	* testsuite/ld-i386/tlsgd3.s: Likewise.
-	* testsuite/ld-i386/tlsgd4.d: Likewise.
-	* testsuite/ld-i386/tlsgd4.s: Likewise.
-	* testsuite/ld-i386/tlsld2.s: Likewise.
-	* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlspic2.dd: Likewise.
-	* testsuite/ld-i386/tlspic2.rd: Likewise.
-	* testsuite/ld-i386/tlspic2.sd: Likewise.
-	* testsuite/ld-i386/tlspic2.td: Likewise.
-	* testsuite/ld-i386/tlspic3.s: Likewise.
-	* testsuite/ld-i386/tlspie3.s: Likewise.
-	* testsuite/ld-i386/tlspie3a.d: Likewise.
-	* testsuite/ld-i386/tlspie3b.d: Likewise.
-	* testsuite/ld-i386/tlspie3c.d: Likewise.
-
-2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/no-plt-1a.rd: Support any relocation order.
-	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt.exp: Fix a typo.
-
-2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/libno-plt-1b.dd: Likewise.
-	* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
-	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
-	* testsuite/ld-x86-64/no-plt-check1.S: Likewise.
-	* testsuite/ld-x86-64/no-plt.exp: Likewise.
-	* testsuite/ld-x86-64/no-plt-extern1.S: Likewise.
-	* testsuite/ld-x86-64/no-plt-func1.c: Likewise.
-	* testsuite/ld-x86-64/no-plt-main1.c: Likewise.
-
-2016-06-07  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail.
-
-2016-06-07  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* testsuite/ld-s390/pltoffset-1.dd: New test.
-	* testsuite/ld-s390/pltoffset-1.ld: New test.
-	* testsuite/ld-s390/pltoffset-1.s: New test.
-	* testsuite/ld-s390/s390.exp: Run new test.
-
-2016-06-07  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
-	* testsuite/ld-powerpc/apuinfo-vle2.s: New.
-	* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
-
-2016-06-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/pass.out: New file.
-	* testsuite/ld-x86-64/tls-def1.c: Likewise.
-	* testsuite/ld-x86-64/tls-gd1.S: Likewise.
-	* testsuite/ld-x86-64/tls-ld1.S: Likewise.
-	* testsuite/ld-x86-64/tls-main1.c: Likewise.
-	* testsuite/ld-x86-64/tls.exp: Likewise.
-	* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
-	* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
-	* testsuite/ld-x86-64/tlsbin2.td: Likewise.
-	* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
-	* testsuite/ld-x86-64/tlsgd10.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
-	* testsuite/ld-x86-64/tlsgd11.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd12.d: Likewise.
-	* testsuite/ld-x86-64/tlsgd12.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd13.d: Likewise.
-	* testsuite/ld-x86-64/tlsgd13.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
-	* testsuite/ld-x86-64/tlsgd14.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
-	* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
-	* testsuite/ld-x86-64/tlsgd9.s: Likewise.
-	* testsuite/ld-x86-64/tlsld4.dd: Likewise.
-	* testsuite/ld-x86-64/tlsld4.s: Likewise.
-	* testsuite/ld-x86-64/tlsld5.dd: Likewise.
-	* testsuite/ld-x86-64/tlsld5.s: Likewise.
-	* testsuite/ld-x86-64/tlsld6.dd: Likewise.
-	* testsuite/ld-x86-64/tlsld6.s: Likewise.
-	* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic2.dd: Likewise.
-	* testsuite/ld-x86-64/tlspic2.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic2.sd: Likewise.
-	* testsuite/ld-x86-64/tlspic2.td: Likewise.
-	* testsuite/ld-x86-64/tlspic3.s: Likewise.
-	* testsuite/ld-x86-64/tlspie2.s: Likewise.
-	* testsuite/ld-x86-64/tlspie2a.d: Likewise.
-	* testsuite/ld-x86-64/tlspie2b.d: Likewise.
-	* testsuite/ld-x86-64/tlspie2c.d: Likewise.
-	* testsuite/ld-x86-64/tlsgd5.dd: Updated.
-	* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
-	tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
-	tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
-	tlspie2c.
-
-2016-06-04  Christian Groessler  <chris@groessler.org>
-
-	* testsuite/ld-z8k/0filler.s: New file.
-	* testsuite/ld-z8k/branch-target.s: New file.
-	* testsuite/ld-z8k/branch-target2.s: New file.
-	* testsuite/ld-z8k/calr-back-8001.d: New file.
-	* testsuite/ld-z8k/calr-back-8002.d: New file.
-	* testsuite/ld-z8k/calr-back-fail-8001.d: New file.
-	* testsuite/ld-z8k/calr-back-fail-8002.d: New file.
-	* testsuite/ld-z8k/calr-forw-8001.d: New file.
-	* testsuite/ld-z8k/calr-forw-8002.d: New file.
-	* testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
-	* testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
-	* testsuite/ld-z8k/calr-opcode.s: New file.
-	* testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
-	* testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
-	* testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
-	* testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
-	* testsuite/ld-z8k/dbjnz-opcode.s: New file.
-	* testsuite/ld-z8k/djnz-back-8001.d: New file.
-	* testsuite/ld-z8k/djnz-back-8002.d: New file.
-	* testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
-	* testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
-	* testsuite/ld-z8k/djnz-forw-8001.d: New file.
-	* testsuite/ld-z8k/djnz-forw-8002.d: New file.
-	* testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
-	* testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
-	* testsuite/ld-z8k/djnz-opcode.s: New file.
-	* testsuite/ld-z8k/filler.s: New file.
-	* testsuite/ld-z8k/jr-back-8001.d: New file.
-	* testsuite/ld-z8k/jr-back-8002.d: New file.
-	* testsuite/ld-z8k/jr-back-fail-8001.d: New file.
-	* testsuite/ld-z8k/jr-back-fail-8002.d: New file.
-	* testsuite/ld-z8k/jr-forw-8001.d: New file.
-	* testsuite/ld-z8k/jr-forw-8002.d: New file.
-	* testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
-	* testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
-	* testsuite/ld-z8k/jr-opcode.s: New file.
-	* testsuite/ld-z8k/ldr-back-8001.d: New file.
-	* testsuite/ld-z8k/ldr-back-8002.d: New file.
-	* testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
-	* testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
-	* testsuite/ld-z8k/ldr-forw-8001.d: New file.
-	* testsuite/ld-z8k/ldr-forw-8002.d: New file.
-	* testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
-	* testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
-	* testsuite/ld-z8k/ldr-opcode.s: New file.
-	* testsuite/ld-z8k/ldrb-forw-8001.d: New file.
-	* testsuite/ld-z8k/ldrb-forw-8002.d: New file.
-	* testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
-	* testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
-	* testsuite/ld-z8k/ldrb-opcode.s: New file.
-	* testsuite/ld-z8k/ldrb-opcode2.s: New file.
-	* testsuite/ld-z8k/other-file.s: New file.
-	* testsuite/ld-z8k/reloc.dd: New file.
-	* testsuite/ld-z8k/reloc.ld: New file.
-	* testsuite/ld-z8k/relocseg.dd: New file.
-	* testsuite/ld-z8k/relocseg.ld: New file.
-	* testsuite/ld-z8k/relocseg1.dd: New file.
-	* testsuite/ld-z8k/this-file.s: New file.
-	* testsuite/ld-z8k/z8k.exp: New file.
-
-2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/i386.exp: Assemble gotpc1.o and pr19319b.o
-	with -mrelax-relocations=yes.
-	* testsuite/ld-i386/lea1a.d (as): Add -mrelax-relocations=yes.
-	* testsuite/ld-i386/lea1b.d (as): Likewise.
-	* testsuite/ld-i386/lea1d.d (as): Likewise.
-	* testsuite/ld-i386/lea1e.d (as): Likewise.
-	* testsuite/ld-i386/lea1f.d (as): Likewise.
-	* testsuite/ld-i386/load7.d (as): Likewise.
-	* testsuite/ld-i386/mov1b.d (as): Likewise.
-	* testsuite/ld-i386/pr19175.d (as): Likewise.
-	* testsuite/ld-ifunc/ifunc-13-i386.d (as): Likewise.
-	* testsuite/ld-ifunc/ifunc-21-i386.d (as): Likewise.
-	* testsuite/ld-ifunc/ifunc-22-i386.d (as): Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Assemble gotpcrel1a.o,
-	gotpcrel1b.o and gotpcrel1c.o with -mrelax-relocations=yes.
-
-2016-06-02  Vineet Gupta  <Vineet.Gupta1@synopsys.com>
-
-	* configure.tgt: Replace -uclibc with *.
-
-2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/unaligned-branch.d: New test.
-	* testsuite/ld-mips-elf/unaligned-branch.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-text.s: New test source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
-
-2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/unaligned-syms.s: Rename to...
-	* testsuite/ld-mips-elf/unaligned-data.s: ... this.
-	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: Adjust accordingly.
-	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise.
-
-2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/jal-global-overflow-0.d: New test.
-	* testsuite/ld-mips-elf/jal-global-overflow-1.d: New test.
-	* testsuite/ld-mips-elf/jal-local-overflow-0.d: New test.
-	* testsuite/ld-mips-elf/jal-local-overflow-1.d: New test.
-	* testsuite/ld-mips-elf/jal-global-overflow.s: New test source.
-	* testsuite/ld-mips-elf/jal-local-overflow.s: New test source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-05-28  Alan Modra  <amodra@gmail.com>
-
-	* ldmain.c (multiple_definition, multiple_common, add_to_set,
-	constructor_callback, warning_callback, undefined_symbol,
-	reloc_overflow, reloc_dangerous, unattached_reloc): Return void.
-	* emultempl/elf32.em: Adjust callback calls.
-
-2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: New
-	test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: New
-	test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: New
-	test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: New
-	test.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-0.s: New test
-	source.
-	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.s: New test
-	source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/reloc-local-overflow.d: New test.
-	* testsuite/ld-mips-elf/reloc-local-overflow.s: Source for the
-	new test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
-
-2016-05-26  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/unaligned-jalx-0.d: Fold
-	`unaligned-jalx-2' here.
-	* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: Fold
-	`unaligned-jalx-mips16-2' here.
-	* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: Fold
-	`unaligned-jalx-micromips-2' here.
-	* testsuite/ld-mips-elf/unaligned-jalx-0.s: Update accordingly.
-	* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error
-	message.
-	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
-	* testsuite/ld-mips-elf/unaligned-jalx-2.d: Remove test.
-	* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: Remove test.
-	* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: Remove
-	test.
-	* testsuite/ld-mips-elf/unaligned-jalx-2.s: Remove test source.
-	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: Fold
-	`unaligned-lwpc-3' here.
-	* testsuite/ld-mips-elf/unaligned-lwpc-0.s: Update accordingly.
-	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Fold
-	`unaligned-lwpc-2' here.
-	* testsuite/ld-mips-elf/unaligned-lwpc-1.s: Update accordingly.
-	* testsuite/ld-mips-elf/unaligned-lwpc-2.d: Remove test.
-	* testsuite/ld-mips-elf/unaligned-lwpc-2.s: Remove test source.
-	* testsuite/ld-mips-elf/unaligned-lwpc-3.d: Remove test.
-	* testsuite/ld-mips-elf/unaligned-lwpc-3.s: Remove test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: Fold
-	`unaligned-ldpc-4' here.
-	* testsuite/ld-mips-elf/unaligned-ldpc-0.s: Update accordingly.
-	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Update error
-	message.  Fold `unaligned-ldpc-2' and `unaligned-ldpc-3' here.
-	* testsuite/ld-mips-elf/unaligned-ldpc-1.s: Update accordingly.
-	* testsuite/ld-mips-elf/unaligned-ldpc-2.d: Remove test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-2.s: Remove test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-3.d: Remove test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-3.s: Remove test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-4.d: Remove test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-4.s: Remove test source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Delete removed tests.
-
-2016-05-26  Nick Clifton  <nickc@redhat.com>
-
-	PR target/20134
-	* scripttempl/elf32msp430.sc (.bss): Provide __bssstart and
-	__bsssize.
-	* scripttempl/elf32msp430_3.sc (.bss): Likewise.
-
-2016-05-25  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/unaligned-jalx-0.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-1.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: New test.
-	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: New test.
-	* testsuite/ld-mips-elf/unaligned-lwpc-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-lwpc-3.d: New test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: New test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: New test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-2.d: New test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-3.d: New test.
-	* testsuite/ld-mips-elf/unaligned-ldpc-4.d: New test.
-	* testsuite/ld-mips-elf/unaligned-jalx-0.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-jalx-1.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-insn.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-lwpc-0.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-lwpc-1.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-lwpc-2.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-lwpc-3.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-0.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-1.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-2.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-3.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-ldpc-4.s: New test source.
-	* testsuite/ld-mips-elf/unaligned-syms.s: New test source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20103
-	* ldmain.c (add_archive_element): Don't claim new IR symbols
-	after all IR symbols have been claimed.
-	* plugin.c (plugin_call_claim_file): Remove no_more_claiming
-	check.
-	* testsuite/ld-plugin/lto.exp (pr20103): New proc.
-	Run PR ld/20103 tests.
-	* testsuite/ld-plugin/pr20103a.c: New file.
-	* testsuite/ld-plugin/pr20103b.c: Likewise.
-	* testsuite/ld-plugin/pr20103c.c: Likewise.
-
-2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/jalx-local.d: New test.
-	* testsuite/ld-mips-elf/jalx-local-n32.d: New test.
-	* testsuite/ld-mips-elf/jalx-local-n64.d: New test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-05-23  Kuba Sejdak  <jakub.sejdak@phoesys.com>
-
-	* Makefile.am: Add earmelf_phoenix.c.
-	* Makefile.in: Regenerate.
-	* configure.tgt: Add entry for arm-phoenix.
-	* emulparams/armelf_phoenix.sh: New file.
-
-2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* emultempl/armelf.em (arm_elf_before_allocation): Call
-	bfd_elf32_arm_keep_private_stub_output_sections before generic
-	before_allocation function.
-
-2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/jalx-addend.d: New test.
-	* testsuite/ld-mips-elf/jalx-addend-n32.d: New test.
-	* testsuite/ld-mips-elf/jalx-addend-n64.d: New test.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-05-19  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20117
-	* testsuite/ld-i386/i386.exp: Run pr20117.
-	* testsuite/ld-i386/pr19609-1i.d: Updated.
-	* testsuite/ld-i386/pr20117.d: New file.
-	* testsuite/ld-i386/pr20117.s: Likewise.
-
-2016-05-19  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/ld-elf/compressed1d.d: Removed from notarget.
-	* testsuite/ld-elf/group8a.d: Likewise.
-	* testsuite/ld-elf/group8b.d: Likewise.
-	* testsuite/ld-elf/group9a.d: Likewise.
-	* testsuite/ld-elf/group9b.d: Likewise.
-	* testsuite/ld-elf/pr12851.d: Likewise.
-	* testsuite/ld-elf/pr12975.d: Likewise.
-	* testsuite/ld-elf/pr13177.d: Likewise.
-	* testsuite/ld-elf/pr13195.d: Likewise.
-	* testsuite/ld-elf/pr17615.d: Likewise.
-	* testsuite/ld-elf/eh-frame-hdr.d: Removed from xfail.
-	* testsuite/ld-elf/group3b.d: Likewise.
-	* testsuite/ld-srec/srec.exp: Likewise.
-	* testsuite/lib/ld-lib.exp (check_gc_sections_available): Mark ARC
-	as supporting gc.
-	(check_shared_lib_support): Mark ARC as supporting.
-
-2016-05-19  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* emulparams/arcelf.sh: Changed.
-	* emulparams/arclinux.sh: Likewise.
-	* scripttempl/arclinux.sc: Moved to a more standard implementation
-	similar to elf.sc.
-
-2016-05-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Reorder
-	`ft32-*-*' behind `frv-*-*'.
-
-2016-05-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* configure.tgt: Remove `am34-*-linux*' support.
-
-2016-05-19  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-scripts/crossref.exp: Remove -mcall-aixdesc hack.
-	* testsuite/ld-scripts/cross2.t: Tweak .opd and .toc placement.
-	* testsuite/ld-scripts/cross3.t: Likewise.
-	* testsuite/ld-scripts/cross4.t: Likewise.
-	* testsuite/ld-scripts/cross5.t: Likewise.
-	* testsuite/ld-scripts/cross6.t: Likewise.
-	* testsuite/ld-scripts/cross7.t: Likewise.
-
-2016-05-19  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-elf/shared.exp (mix_pic_and_non_pic): Pass in
-	exe name rather than constructing testname.  Fix typo in
-	sub-test name.  Log copying.  Use -rpath rather than -R.
-
-2016-05-18  Nick Clifton  <nickc@redhat.com>
-
-	* scripttempl/ft32.sc: Use fixed constants for memory region
-	lengths.  Include DWARF debug sections.
-	(.data .bss): Do not assign locations during relocatable links.
-	* testsuite/ld-elf/compressed1d.d: Skip for FT32.
-	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
-	* testsuite/ld-elf/sec64k.exp: Likewise.
-	* testsuite/ld-elf/init-fini-array.d: XFail for FT32.
-	* testsuite/ld-elf/merge.d: Likewise.
-	* testsuite/ld-elf/orphan-region.d: Likewise.
-	* testsuite/ld-elf/orphan.s: Likewise.
-	* testsuite/ld-elf/orphan3.d: Likewise.
-	* testsuite/ld-elf/pr349.d: Likewise.
-	* testsuite/ld-elf/warn2.d: Likewise.
-	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Note
-	that the FT32 does not support shared libraries.
-
-2016-05-17  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/lib/ld-lib.exp (at_least_gcc_version): Check
-	global CC.
-
-2016-05-17  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* scripttempl/avr.sc (text): Place .progmem.data from avr-libc
-	above .progmem*.
-	* scripttempl/avrtiny.sc (text): Likewise.
-
-2016-05-17  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-unique/unique.exp: Use `is_elf_format' and
-	`supports_gnu_unique' to qualify testing.
-
-2016-05-16  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-elf/flags1.d: Update the xfail list.
-
-2016-05-15  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-elf/flags1.d: Update for `*-*-nacl*' xfail
-	removal.
-
-2016-05-14  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20097
-	* testplug2.c (onall_symbols_read): Remove redundant sizeof
-	on EXPECTED_VIEW_LENGTH.
-	* testplug4.c (onall_symbols_read): Likewise.
-
-2016-05-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20093
-	* testsuite/ld-x86-64/pr20093-1.d: New file.
-	* testsuite/ld-x86-64/pr20093-1.s: Likewise.
-	* testsuite/ld-x86-64/pr20093-2.d: Likewise.
-	* testsuite/ld-x86-64/pr20093-2.s: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run pr20093-1 and pr20093-2.
-
-2016-05-13  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-arm/arm-elf.exp: Adjust for arm-no-rel-plt now passing.
-	Use different output file name for static app without .rel.plt.
-	* testsuite/ld-arm/arm-no-rel-plt.ld: Align .rel.dyn and .rela.dyn.
-	* testsuite/ld-arm/arm-no-rel-plt.out: Delete.
-	* testsuite/ld-arm/arm-no-rel-plt.r: New.
-	* testsuite/ld-arm/arm-static-app.d: Don't check file name.
-	* testsuite/ld-arm/arm-static-app.r: Likewise.
-
-2016-05-12  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20070
-	* Makefile.am (noinst_LTLIBRARIES): Add libldtestplug4.la.
-	(libldtestplug4_la_SOURCES): New.
-	(libldtestplug4_la_CFLAGS): Likewise.
-	(libldtestplug4_la_LDFLAGS): Likewise.
-	* Makefile.in: Regenerated.
-	* plugin.c (get_symbols): Return resolution based on IR symbol
-	kinds for symbols defined/referenced only within IR.
-	* testplug4.c: New file.
-	* ld/testsuite/ld-plugin/pr20070.d: Likewise.
-	* ld/testsuite/ld-plugin/pr20070a.c: Likewise.
-	* ld/testsuite/ld-plugin/pr20070b.c: Likewise.
-	* testsuite/ld-plugin/plugin.exp (plugin4_name): New.
-	(plugin4_path): Likewise.
-	Add a test for ld/20070.
-
-2016-05-11  Alan Modra  <amodra@gmail.com>
-
-	* emultempl/hppaelf.em (hppaelf_create_output_section_statements):
-	Call elf32_hppa_init_stub_bfd.
-
-2016-05-11  Alan Modra  <amodra@gmail.com>
-
-	PR 20060
-	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
-	* testsuite/ld-powerpc/tlsdll.s: New.
-	* testsuite/ld-powerpc/tlsdll.ver: New.
-	* testsuite/ld-powerpc/tlsdll_32.s: New.
-	* testsuite/ld-powerpc/tlsopt5.d: New.
-	* testsuite/ld-powerpc/tlsopt5.s: New.
-	* testsuite/ld-powerpc/tlsopt5_32.d: New.
-	* testsuite/ld-powerpc/tlsopt5_32.s: New.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
-	ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* emultempl/armelf.em (elf32_arm_add_stub_section): Add output_section
-	parameter and rename input_section parameter to after_input_section.
-	Append input stub section to the output section if after_input_section
-	is NULL.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New
-	test.
-	* testsuite/ld-arm/attr-merge-10b-dsp.s: New file.
-	* testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
-
-2016-05-10  Christophe Lyon  <christophe.lyon@linaro.org>
-
-	* ld/testsuite/ld-elf/flags1.d (xfail): Remove *-*-nacl*".
-
-2016-05-09  Christophe Monat  <christophe.monat@st.com>
-
-	PR ld/20030
-	* testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp
-	tests. Fix misnamed stm32l4xx-fix-all.
-	* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple
-	loads with DP registers.
-	* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file.
-	* testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment.
-	* testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple
-	loads with DP registers.
-	* testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
-
-2016-05-09  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
-
-	* testsuite/ld-elf/flags1.d (readelf): Dump section header instead
-	program headers.
-	(xfail): Remove avr-*-*.
-	Update regex to check the section flags.
-	* testsuite/ld-elf/merge.d (xfail): Remove avr-*-*.
-
-2016-05-09  Alan Modra  <amodra@gmail.com>
-
-	* Makefile.am (ealphavms.c, eelf64_ia64_vms): Correct .em deps.
-	* Makefile.in: Regenerate.
-
-2016-05-09  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-scripts/pr14962-2.t: Match .text, not *.text.
-	* testsuite/ld-scripts/rgn-at5.t: Similarly, .sec not *.sec.
-	* testsuite/ld-scripts/section-match-1.t: Likewise.
-
-2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/17550
-	* testsuite/ld-elf/pr17550-1.s: New file.
-	* testsuite/ld-elf/pr17550-2.s: Likewise.
-	* testsuite/ld-elf/pr17550-3.s: Likewise.
-	* testsuite/ld-elf/pr17550-4.s: Likewise.
-	* testsuite/ld-elf/pr17550a.d: Likewise.
-	* testsuite/ld-elf/pr17550b.d: Likewise.
-	* testsuite/ld-elf/pr17550c.d: Likewise.
-	* testsuite/ld-elf/pr17550d.d: Likewise.
-
-2016-05-06  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* ld/testsuite/ld-srec/srec.exp: Mark test as XFAIL for AVR.
-
-2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/i386.exp: Run load7.
-	* testsuite/ld-i386/load7.d: New file.
-	* testsuite/ld-i386/load7.map: Likewise.
-	* testsuite/ld-i386/load7.s: Likewise.
-	* testsuite/ld-x86-64/load2.d: Likewise.
-	* testsuite/ld-x86-64/load2.map: Likewise.
-	* testsuite/ld-x86-64/load2.s: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run load2.
-
-2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* emulparams/elf_iamcu.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): New.
-	* emulparams/elf_k1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emulparams/elf_l1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-
-2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/pr18591.d: Pass --no-relax to ld.
-
-2016-05-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* ldlang.c (init_os): Pass %E to einfo when bfd_section == NULL.
-
-2016-05-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-unique/unique.d: New test.
-	* testsuite/ld-unique/unique.exp: Run the new test.  Adjust
-	messages for compiled tests.
-
-2016-05-04  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* testsuite/ld-elf/pr18735.d: Allow other symbols.
-	* testsuite/ld-elf/sec64k.exp: Skip 64ksec for avr.
-	* testsuite/ld-gc/pr14265.d: Allow other symbols.
-	* testsuite/ld-plugin/plugin.exp: Add PR ld/17973 to
-	plugin_tests only if check_shared_lib_support is true.
-	* testsuite/ld-selective/selective.exp: Add --section-start
-	flag for avr.
-
-2016-05-03  Maciej W. Rozycki  <macro@imgtec.com>
-
-	PR 10549
-	* testsuite/ld-unique/unique.exp: Also run for `mips*-*-*'.
-
-2016-05-03  Jiong Wang  <jiong.wang@arm.com>
-
-	* emultempl/aarch64elf.em (--no-apply-dynamic-relocs): New option.
-	* NEWS: Mention --no-apply-dynamic-relocs.
-	* ld.texinfo (ld and the ARM family): Document
-	--no-apply-dynamic-relocs.
-	* testsuite/ld-aarch64/rela-abs-relative.s: New test source.
-	* testsuite/ld-aarch64/rela-abs-relative.d: New expected result.
-	* testsuite/ld-aarch64/rela-abs-relative-be.d: Likewise for big-endian.
-	* estsuite/ld-aarch64/rela-abs-relative-opt.d: Likewise, but enable new
-	option.
-
-2016-05-03  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* testsuite/ld-elfcomm/elfcomm.exp: Check for shared lib support
-	before running STT_COMMON tests.
-
-2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* config/default.exp (NOPIE_CFLAGS): Download source only on
-	remote host.
-	(NOPIE_LDFLAGS): Likewise.
-	* testsuite/lib/ld-lib.exp (check_lto_available): Likewise.
-	(check_lto_fat_available): Likewise.
-	(check_lto_shared_available): Likewise.
-	(check_ifunc_available): Likewise.
-	(check_ifunc_attribute_available): Likewise.
-
-2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/compressed1b.d: Only run for Linux/GNU targets.
-
-2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/20006
-	* testsuite/ld-elfvsb/elfvsb.exp (COMPRESS_LDFLAG): New.
-	(visibility_run): Pass COMPRESS_LDFLAG to visibility_test on
-	ELF targets.
-
-2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/compressed1b.d: Pass
-	--compress-debug-sections=none to ld.
-	* testsuite/ld-elf/compressed1c.d: Likewise.
-
-2016-04-27  Alan Modra  <amodra@gmail.com>
-
-	PR target/19985
-	* configure.tgt: Don't use var+=.
-
-2016-04-25  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19985
-	* configure.tgt: Include big endian PPC64 emulations with little
-	endian PPC64 targets.
-
-2016-04-25  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* scripttempl/avrtiny.sc (.text): Do not set LMA to zero.
-
-2016-04-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/lib/ld-lib.exp (check_lto_available): Return 1 on
-	Linux with GCC 4.9 or newer.
-	(check_lto_fat_available): Likewise.
-	(check_lto_shared_available): Likewise.
-
-2016-04-21  Nick Clifton  <nickc@redhat.com>
-
-	* ldlang.c (lang_check_relocs): Use bfd_link_check_relocs in
-	prefernce to _bfd_elf_link_check_relocs.  Drop test for ELF
-	targets.  Do not stop the checks when problems are encountered.
-
-2016-04-21  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/ld-scripts/cross3.t: Add commonly used data
-	and text section names to output section statements.
-	* testsuite/ld-scripts/cross4.t: Likewise.
-	* testsuite/ld-scripts/cross5.t: Likewise.
-	* testsuite/ld-scripts/cross6.t: Likewise.
-	* testsuite/ld-scripts/cross7.t: Likewise.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* ldlang.c (lang_check_relocs): New function.
-	(lang_process): Call lang_check_relocs after lang_gc_sections.
-	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Don't
-	call _bfd_elf_link_check_relocs here.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19972
-	* testsuite/ld-elf/eh6.d: Pass -rW to readelf and check for
-	R_386_NONE or R_X86_64_NONE.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/pic1.d: New file.
-	* testsuite/ld-x86-64/pic1.s: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run pic1.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-x86-64/pie2.d: New file.
-	* testsuite/ld-x86-64/pie2.s: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run pie2.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19969
-	* testsuite/ld-x86-64/pr19969.d: New file.
-	* testsuite/ld-x86-64/pr19969a.S: Likewise.
-	* testsuite/ld-x86-64/pr19969b.S: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run pr19969 tests.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	New.
-	* emulparams/elf_i386.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
-	Likewise.
-	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse):
-	Set check_relocs_after_open_input to TRUE if
-	CHECK_RELOCS_AFTER_OPEN_INPUT is yes.
-	(gld${EMULATION_NAME}_after_open): Call
-	_bfd_elf_link_check_relocs on all inputs if
-	check_relocs_after_open_input is TRUE.
-
-2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/eh6.s: Replace .long with .dc.a on
-	my_personality_v0.
-
-2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* emultempl/scoreelf.em: Likewise.
-
-2016-04-19  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19719
-	* testsuite/ld-x86-64/pr19719.d: New file.
-	* testsuite/ld-x86-64/pr19719.s: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run pr19719.
-
-2016-04-18  Matthew Fortune  <matthew.fortune@imgtec.com>
-
-	* ld.texinfo: Document NOCROSSREFS_TO script command.
-	* ldlang.h (struct lang_nocrossrefs): Add onlyfirst field.
-	(lang_add_nocrossref_to): New prototype.
-	* ldcref.c (check_local_sym_xref): Use onlyfirst to only look for
-	symbols defined in the first section.
-	(check_nocrossref): Likewise.
-	* ldgram.y (NOCROSSREFS_TO): New script command.
-	* ldlang.c (lang_add_nocrossref): Set onlyfirst to FALSE.
-	(lang_add_nocrossref_to): New function.
-	* ldlex.l (NOCROSSREFS_TO): New token.
-	* NEWS: Mention NOCROSSREFS_TO.
-	* testsuite/ld-scripts/cross4.t: New file.
-	* testsuite/ld-scripts/cross5.t: Likewise.
-	* testsuite/ld-scripts/cross6.t: Likewise.
-	* testsuite/ld-scripts/cross7.t: Likewise.
-	* testsuite/ld-scripts/crossref.exp: Run 4 new NOCROSSREFS_TO
-	tests.
-
-2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.in: Regenerated with automake 1.11.6.
-	* aclocal.m4: Likewise.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/ld-arc/arc.exp: New file.
-	* testsuite/ld-arc/nps-1.s: New file.
-	* testsuite/ld-arc/nps-1a.d: New file.
-	* testsuite/ld-arc/nps-1b.d: New file.
-	* testsuite/ld-arc/nps-1b.err: New file.
-
-2016-04-14  Nick Clifton  <nickc@redhat.com>
-
-	PR 19457
-	* testsuite/ld-scripts/script.exp (extract_symbol_test): Add
-	exceptions for Mingw and Cygwin.
-
-2016-04-13  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/lib/ld-lib.exp (run_dump_test): Initialise
-	check_ld(terminal).
-
-2016-04-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19774
-	* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr17689b.o before
-	tmpdir/pr17689.so, fix gotpcrel1 test and add more --as-needed
-	tests.
-
-2016-04-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19939
-	* testsuite/ld-i386/i386.exp: Run PR ld/19939 tests.
-	* testsuite/ld-x86-64/x86-64.exp: Likewise.
-	* testsuite/ld-i386/pr19939.s: New file.
-	* testsuite/ld-i386/pr19939a.d: Likewise.
-	* testsuite/ld-i386/pr19939b.d: Likewise.
-	* testsuite/ld-x86-64/pr19939.s: Likewise.
-	* testsuite/ld-x86-64/pr19939a.d: Likewise.
-	* testsuite/ld-x86-64/pr19939b.d: Likewise.
-
-2016-04-09  Oleg Endo  <olegendo@gcc.gnu.org>
-
-	* emulparams/shelf.sh: Set stack area to 0x3FFFFF00.
-
-2016-04-08  Alan Modra  <amodra@gmail.com>
-
-	PR 18452
-	* ldlang.c (maybe_overlays): Delete.
-	(lang_size_sections_1): Remove code setting maybe_overlays.
-	(lang_check_section_addresses): Instead detect overlays by
-	exact match of section VMAs here.  Fix memory leak.
-
-2016-04-08  Dan Gisselquist  <dgisselq@ieee.org>
-
-	* ldlang.c (print_output_section_statement): Show minfo size
-	in target machine address units.
-	(print_reloc_statement): Likewise.
-	(print_padding_statement): Likewise.
-	(print_data_statement): Likewise.  Ensure minimum print_dot
-	increment of one address unit.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* emulparams/arc-endianness.sh: Make little endian default choice.
-
-2016-04-07  Nick Clifton  <nickc@redhat.com>
-
-	* scripttempl/elf32msp430.sc (.MSP430.attributes): Fix typo in
-	section name.
-	* scripttempl/elf32msp430_3.sc (.MSP430.attributes): Likewise.
-
-2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* emulparams/arc-endianness.sh: New file.
-	* emulparams/arcebelf.sh: Deleted.
-	* emulparams/arcebelf_prof.sh: Deleted.
-	* emulparams/arceblinux.sh: Deleted.
-	* emulparams/arceblinux_prof.sh: Deleted.
-	* emulparams/arcelf.sh: Include arc-endinness.sh.
-	* emulparams/arcelf_prof.sh: Include arc-endinness.sh.
-	* emulparams/arclinux.sh: Include arc-endinness.sh.
-	* emulparams/arclinux_prof.sh: Include arc-endinness.sh.
-	* emulparams/arcv2elf.sh: Include arc-endinness.sh.
-	* emulparams/arcv2elfx.sh: Include arc-endinness.sh.
-	* testsuite/ld-elf/compressed1d.d: Update pattern for big and
-	little endian arc targets.
-	* testsuite/ld-elf/eh-frame-hdr.d: Likewise.
-	* testsuite/ld-elf/group1.d: Likewise.
-	* testsuite/ld-elf/group3b.d: Likewise.
-	* testsuite/ld-elf/group8a.d: Likewise.
-	* testsuite/ld-elf/group8b.d: Likewise.
-	* testsuite/ld-elf/group9a.d: Likewise.
-	* testsuite/ld-elf/group9b.d: Likewise.
-	* testsuite/ld-elf/linkonce2.d: Likewise.
-	* testsuite/ld-elf/pr12851.d: Likewise.
-	* testsuite/ld-elf/pr12975.d: Likewise.
-	* testsuite/ld-elf/pr13177.d: Likewise.
-	* testsuite/ld-elf/pr13195.d: Likewise.
-	* testsuite/ld-elf/pr17615.d: Likewise.
-	* testsuite/ld-elf/pr19162.d: Likewise.
-	* testsuite/ld-elf/sec64k.exp: Likewise.
-	* testsuite/lib/ld-lib.exp: Likewise.
-
-2016-04-05  Maciej W. Rozycki  <macro@imgtec.com>
-
-	PR ld/19908
-	* testsuite/ld-cris/tls-e-20.d: Adjust for hidden symbol
-	handling fix.
-	* testsuite/ld-cris/tls-e-20a.d: Likewise.
-	* testsuite/ld-cris/tls-e-21.d: Likewise.
-	* testsuite/ld-cris/tls-e-23.d: Likewise.
-	* testsuite/ld-cris/tls-e-80.d: Likewise.
-	* testsuite/ld-cris/tls-gd-3h.d: Likewise.
-	* testsuite/ld-cris/tls-leie-19.d: Likewise.
-	* testsuite/ld-mips-elf/export-class-ref-lib.sd: New test.
-	* testsuite/ld-mips-elf/export-hidden-ref.sd: New test.
-	* testsuite/ld-mips-elf/export-internal-ref.sd: New test.
-	* testsuite/ld-mips-elf/export-protected-ref.sd: New test.
-	* testsuite/ld-mips-elf/export-class-ref-f0.s: New test source.
-	* testsuite/ld-mips-elf/export-class-ref-f1.s: New test source.
-	* testsuite/ld-mips-elf/export-class-ref-f2.s: New test source.
-	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
-
-2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/ld-discard/extern.d: Removed xfail for ARC.
-	* testsuite/ld-discard/start.d: Likewise.
-	* testsuite/ld-discard/static.d: Likewise.
-	* testsuite/ld-elf/group1.d: Likewise.
-	* testsuite/ld-elf/group3b.d: Likewise.
-	* testsuite/ld-elf/orphan-region.d: Likewise.
-	* testsuite/ld-elf/orphan.d: Likewise.
-	* testsuite/ld-elf/orphan3.d: Likewise.
-	* testsuite/ld-elf/pr349.d: Likewise.
-	* testsuite/ld-elf/warn1.d: Likewise.
-	* testsuite/ld-elf/warn2.d: Likewise.
-	* testsuite/ld-elf/warn3.d: Likewise.
-	* testsuite/ld-scripts/crossref.exp: Add __SDATA_BEGIN__ symbol
-	through linker flags.
-	* testsuite/ld-srec/srec.exp: Set as xfail.
-
-2016-04-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19827
-	* testsuite/ld-i386/pr19827-nacl.rd: New file.
-	* testsuite/ld-x86-64/pr19827-nacl.rd: Likewise.
-
-2016-04-04  Nick Clifton  <nickc@redhat.com>
-
-	PR 19803
-	* emultempl/pe.em (change_undef): New function.  Encapsulates
-	duplicated code in pe_fixup_stdcalls and adds the newly defined
-	sym to the gc root list.
-	(pe_fixup_stdcall): Use the new function.
-	* pe-dll.c (process_def_file_and_drectve); Add alias of exported
-	symbol to gc root list.
-
-2016-03-31  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c (TO_ADDR, TO_SIZE, opb_shift): Move earlier in file.
-	(lang_insert_orphan): Use TO_ADDR in __stop sym calculation.
-	(print_input_section): Don't use TO_ADDR when printing section
-	size.
-	(lang_size_sections_1): Use TO_ADDR in overlay lma calculation.
-	(lang_size_sections): Use TO_ADDR in relro end calculation.
-
-2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* testsuite/lib/ld-lib.exp (run_dump_test): Fix check of return
-	value from regexp_diff.
-	* testsuite/ld-elf/orphan-5.l: Fix expected output.
-	* testsuite/ld-elf/orphan-6.l: Likewise.
-
-2016-03-30  Alan Modra  <amodra@gmail.com>
-
-	PR 18452
-	* ldlang.c (maybe_overlays): New static var.
-	(lang_size_sections_1): Set it here.
-	(struct check_sec): New.
-	(sort_sections_by_lma): Adjust for array of structs.
-	(sort_sections_by_vma): New function.
-	(lang_check_section_addresses): Check both LMA and VMA for overlap.
-	* testsuite/ld-scripts/rgn-over7.d: Adjust.
-
-2016-03-30  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c (lang_size_sections_1): Correct code detecting a
-	backward non-overlapping move.
-
-2016-03-30  Alan Modra  <amodra@gmail.com>
-
-	* ldlang.c (IS_TBSS): New macro, extracted from..
-	(IGNORE_SECTION): ..here.
-	(lang_size_sections_1): Use IS_TBSS and IGNORE_SECTION.
-	(lang_size_sections, lang_do_assignments_1): Use IS_TBSS.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/19803
-	* ldlang.c (lang_add_gc_name): New function.  Adds the provided
-	symbol name to the list of gc symbols.
-	(lang_process): Call lang_add_gc_name with entry_symbol_default if
-	entry_symbol.name is NULL.  Use lang_add_gc_name to add the init
-	and fini function names.
-	* pe-dll.c (process_def_file_and_drectve): Add exported names to
-	the gc symbol list.
-	* testsuite/ld-pe/pr19803.s: Do not export _testval symbol.
-	* testsuite/ld-pe/pr19803.d: Tweak expected output.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	* configure: Regenerate.
-
-2016-03-21  Nick Clifton  <nickc@redhat.com>
-
-	* emultempl/msp430.em: Replace use of alloca with call to xmalloc.
-	* plugin.c: Likewise.
-	* pe-dll.c: Likewise.
-
-2016-03-18  Awson  <kyrab@mail.ru>
-
-	PR 19531
-	* scripttempl/pe.sc (.rdata_runtime_pseudo_reloc): Always KEEP
-	this section.
-	* scripttempl/pep.sc (.rdata_runtime_pseudo_reloc): Likewise.
-
-2016-03-18  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
-
-	* ld-avr/gc-section-debugline.d: Relax regex check for CU.
-
-2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19827
-	* testsuite/ld-i386/i386.exp: Run PR ld/19827 tests.
-	* testsuite/ld-x86-64/x86-64.exp: Likewise.
-	* testsuite/ld-i386/pr19827.rd: New file.
-	* testsuite/ld-i386/pr19827a.S: Likewise.
-	* testsuite/ld-i386/pr19827b.S: Likewise.
-	* testsuite/ld-x86-64/pr19827.rd: Likewise.
-	* testsuite/ld-x86-64/pr19827a.S: Likewise.
-	* testsuite/ld-x86-64/pr19827b.S: Likewise.
-
-2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19807
-	* Makefile.am (ELF_X86_DEPS): Add
-	$(srcdir)/emulparams/reloc_overflow.sh.
-	* Makefile.in: Regenerated.
-	* NEWS: Mention -z noreloc-overflow.
-	* ld.texinfo: Document -z noreloc-overflow.
-	* emulparams/elf32_x86_64.sh: Source
-	${srcdir}/emulparams/reloc_overflow.sh.
-	* emulparams/elf_x86_64.sh: Likewise.
-	* emulparams/reloc_overflow.sh: New file.
-	* testsuite/ld-x86-64/pr19807-1.s: New file.
-	* testsuite/ld-x86-64/pr19807-1a.d: Likewise.
-	* testsuite/ld-x86-64/pr19807-1b.d: Likewise.
-	* testsuite/ld-x86-64/pr19807-2.s: Likewise.
-	* testsuite/ld-x86-64/pr19807-2a.d: Likewise.
-	* testsuite/ld-x86-64/pr19807-2b.d: Likewise.
-	* testsuite/ld-x86-64/pr19807-2c.d: Likewise.
-	* testsuite/ld-x86-64/pr19807-2d.d: Likewise.
-	* testsuite/ld-x86-64/pr19807-2e.d: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/19807 tests.
-
-2016-03-13  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19539
-	* testsuite/ld-i386/i386.exp: Run pr19539.
-	* testsuite/ld-i386/pr19539.d: New file.
-	* testsuite/ld-i386/pr19539.s: Likewise.
-	* testsuite/ld-i386/pr19539.t: Likewise.
-	* testsuite/ld-x86-64/pr19539.s: Likewise.
-	* testsuite/ld-x86-64/pr19539.t: Likewise.
-	* testsuite/ld-x86-64/pr19539a.d: Likewise.
-	* testsuite/ld-x86-64/pr19539b.d: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run pr19539a and pr19539b.
-
-2016-03-10  Mickael Guene  <mickael.guene@st.com>
-
-	PR gas/19744
-	* testsuite/ld-arm/arm-elf.exp: New tests.
-	* testsuite/ld-arm/thumb1-adds-armv7-m.s: New.
-	* testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
-
-2016-03-10  Nick Clifton  <nickc@redhat.com>
-
-	* scripttempl/elf32msp430.sc (.rodata): Remove spurious LONG(0).
-
-2016-03-09  Pedro Alves  <palves@redhat.com>
-
-	* scripttempl/v850.sc: Use "v850:old-gcc-abi" as OUTPUT_ARCH.
-	* scripttempl/v850_rh850.sc: Use "v850:rh850" as OUTPUT_ARCH.
-
-2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19789
-	* testsuite/ld-elf/pr19789.d: New file.
-	* testsuite/ld-elf/pr19789.s: Likewise.
-
-2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19784
-	* testsuite/ld-i386/i386.exp: Remove pr19636-2e-nacl test.
-	* testsuite/ld-i386/pr19636-2e-nacl.d: Moved to ...
-	* testsuite/ld-i386/pr19636-2e.d: Here.  Remove notarget.
-	* testsuite/ld-ifunc/ifunc.exp: Run PR ld/19784 tests.
-	* testsuite/ld-ifunc/pass.out: New file.
-	* testsuite/ld-ifunc/pr19784a.c: Likewise.
-	* testsuite/ld-ifunc/pr19784b.c: Likewise.
-	* testsuite/ld-ifunc/pr19784c.c: Likewise.
-
-2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19774
-	* testsuite/ld-ifunc/ifunc.exp: Link tmpdir/pr18808a.o before
-	tmpdir/libpr18808.so.  Link tmpdir/pr18841a.o before
-	tmpdir/libpr18841b.so and tmpdir/libpr18841c.so.  Test
-	--as-needed for pr18841c.
-
-2016-03-07  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19774
-	* testsuite/ld-i386/i386.exp: Link tmpdir/pr18900.o before
-	tmpdir/pr18900.so and test --as-needed.  Link tmpdir/gotpc1.o
-	before tmpdir/got1d.so and test --as-needed.
-	* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr18900.o before
-	tmpdir/pr18900.so and test --as-needed.
-
-2016-03-07  Jiong Wang  <jiong.wang@arm.com>
-
-	* testsuite/ld-aarch64/implicit_got_section_1.s: New test source file.
-	* testsuite/ld-aarch64/implicit_got_section_1.d: New test expected
-	result.
-	* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
-
-2016-03-06  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-i386/i386.exp: Link tmpdir/copyreloc-main.o
-	before tmpdir/copyreloc-lib.so and test --as-needed.
-	* testsuite/ld-x86-64/x86-64.exp: Likewise.
-
-2016-03-04  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19579
-	* testsuite/ld-elf/pr19579a.c: New file.
-	* testsuite/ld-elf/pr19579b.c: Likewise.
-	* testsuite/ld-elf/shared.exp: Run PR ld/19579 test.
-
-2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/pr19162.d: Skip hppa-*-*.
-
-2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/shared.exp (mix_pic_and_non_pic): Add xfails.
-	Xfail mix_pic_and_non_pic on "arm*-*-*" "aarch64*-*-*".
-
-2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19739
-	* emultempl/mmo.em (mmo_place_orphan): Don't merge flags of other
-	input sections for relocatable link.
-	* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
-	* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
-
-2016-03-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19739
-	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
-	merge flags of other input sections for relocatable link.
-
-2016-03-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-plugin/lto.exp: Update PR ld/12365 test for GCC 6.
-
-2016-03-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/pr19162.d: Skip arc target.
-
-2016-02-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19162
-	* testsuite/ld-elf/pr19162.d: New file.
-	* testsuite/ld-elf/pr19162a.s: Likwise.
-	* testsuite/ld-elf/pr19162b.s: Likwise.
-
-2016-02-29 Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* testsuite/ld-elf/merge.d: Removed xfail for ARC.
-	* testsuite/ld-elf/merge2.d: Likewise.
-	* testsuite/ld-elf/merge3.d: Likewise.
-
-2016-02-29  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
-
-	* scripttempl/arclinux.sc: Force .tdata and .tbss to always be
-	generated.
-
-2016-02-26  Renlin Li  <renlin.li@arm.com>
-
-	* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases.
-	* testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary.
-	* testsuite/ld-aarch64/emit-relocs-271.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-272.d: Likewise.
-	* testsuite/ld-aarch64/emit-relocs-270-overflow.d: New.
-	* testsuite/ld-aarch64/emit-relocs-270-overflow.s: New.
-	* testsuite/ld-aarch64/emit-relocs-271-overflow.d: New.
-	* testsuite/ld-aarch64/emit-relocs-271-overflow.s: New.
-	* testsuite/ld-aarch64/emit-relocs-272-overflow.d: New.
-	* testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19609
-	* testsuite/ld-i386/got1.dd: Updated.
-	* testsuite/ld-i386/lea1c.d: Likewise.
-	* testsuite/ld-i386/load1-nacl.d: Likewise.
-	* testsuite/ld-i386/load1.d: Likewise.
-	* testsuite/ld-i386/load4b.d: Likewise.
-	* testsuite/ld-i386/load5b.d: Likewise.
-	* testsuite/ld-i386/mov1b.d: Likewise.
-	* testsuite/ld-x86-64/mov1b.d: Likewise.
-	* testsuite/ld-x86-64/mov1d.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
-	* testsuite/ld-x86-64/gotpcrel1.dd: Likewise.
-	* testsuite/ld-x86-64/lea1a.d: Likewise.
-	* testsuite/ld-x86-64/lea1b.d: Likewise.
-	* testsuite/ld-x86-64/lea1c.d: Likewise.
-	* testsuite/ld-x86-64/lea1d.d: Likewise.
-	* testsuite/ld-x86-64/lea1e.d: Likewise.
-	* testsuite/ld-x86-64/lea1f.d: Likewise.
-	* testsuite/ld-x86-64/mov1b.d: Likewise.
-	* testsuite/ld-x86-64/mov1d.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-3b.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-4b.d: Likewise.
-	* testsuite/ld-x86-64/lea1.s: Add tests for 32-bit registers.
-	* testsuite/ld-i386/pr19609-1.s: New file.
-	* testsuite/ld-i386/pr19609-1a.d: Likewise.
-	* testsuite/ld-i386/pr19609-1b.d: Likewise.
-	* testsuite/ld-i386/pr19609-1c.d: Likewise.
-	* testsuite/ld-i386/pr19609-1d.d: Likewise.
-	* testsuite/ld-i386/pr19609-1e.d: Likewise.
-	* testsuite/ld-i386/pr19609-1f.d: Likewise.
-	* testsuite/ld-i386/pr19609-1g.d: Likewise.
-	* testsuite/ld-i386/pr19609-1h.d: Likewise.
-	* testsuite/ld-i386/pr19609-1i.d: Likewise.
-	* testsuite/ld-i386/pr19609-2.s: Likewise.
-	* testsuite/ld-i386/pr19609-2a.d: Likewise.
-	* testsuite/ld-i386/pr19609-2b.d: Likewise.
-	* testsuite/ld-i386/pr19609-2c.d: Likewise.
-	* testsuite/ld-i386/undefweak.s: Likewise.
-	* testsuite/ld-i386/undefweaka.d: Likewise.
-	* testsuite/ld-i386/undefweakb.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-3c.d: Likewise.
-	* testsuite/ld-x86-64/pr13082-3d.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1.s: Likewise.
-	* testsuite/ld-x86-64/pr19609-1a.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1b.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1c.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1d.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1e.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1f.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1g.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1h.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1i.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1j.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1k.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1l.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-1m.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-2.s: Likewise.
-	* testsuite/ld-x86-64/pr19609-2a.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-2b.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-2c.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-2d.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-3.s: Likewise.
-	* testsuite/ld-x86-64/pr19609-3a.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-3b.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-4.s: Likewise.
-	* testsuite/ld-x86-64/pr19609-4a.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-4b.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-4c.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-4d.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-4e.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-5.s: Likewise.
-	* testsuite/ld-x86-64/pr19609-5a.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-5b.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-5c.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-5d.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-5e.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-6.s: Likewise.
-	* testsuite/ld-x86-64/pr19609-6a.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-6b.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-6c.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-6d.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-7.s: Likewise.
-	* testsuite/ld-x86-64/pr19609-7a.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-7b.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-7c.d: Likewise.
-	* testsuite/ld-x86-64/pr19609-7d.d: Likewise.
-	* testsuite/ld-i386/i386.exp: Run undefweak tests and tests for
-	PR ld/19609.
-	* testsuite/ld-x86-64/x86-64.exp: Run pr13082-3c, pr13082-3d
-	and tests for PR ld/19609.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19645
-	* NEWS: Mention -z common/-z nocommon for ELF targets.
-	* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
-	-z common and -z nocommon.
-	* ld.texinfo: Document -z common/-z nocommon.
-	* lexsup.c (elf_shlib_list_options): Add -z common/-z nocommon.
-	* testsuite/ld-elf/tls_common.exp: Test --elf-stt-common=no and
-	--elf-stt-common=yes with assembler.
-	* testsuite/ld-elfcomm/common-1.s: New file.
-	* testsuite/ld-elfcomm/common-1a.d: Likewise.
-	* testsuite/ld-elfcomm/common-1b.d: Likewise.
-	* testsuite/ld-elfcomm/common-1c.d: Likewise.
-	* testsuite/ld-elfcomm/common-1d.d: Likewise.
-	* testsuite/ld-elfcomm/common-1e.d: Likewise.
-	* testsuite/ld-elfcomm/common-1f.d: Likewise.
-	* testsuite/ld-elfcomm/common-2.s: Likewise.
-	* testsuite/ld-elfcomm/common-2a.d: Likewise.
-	* testsuite/ld-elfcomm/common-2b.d: Likewise.
-	* testsuite/ld-elfcomm/common-2c.d: Likewise.
-	* testsuite/ld-elfcomm/common-2d.d: Likewise.
-	* testsuite/ld-elfcomm/common-2e.d: Likewise.
-	* testsuite/ld-elfcomm/common-2f.d: Likewise.
-	* testsuite/ld-elfcomm/common-3a.rd: Likewise.
-	* testsuite/ld-elfcomm/common-3b.rd: Likewise.
-	* testsuite/ld-i386/pr19645.d: Likewise.
-	* testsuite/ld-i386/pr19645.s: Likewise.
-	* testsuite/ld-x86-64/largecomm-1.s: Likewise.
-	* testsuite/ld-x86-64/largecomm-1a.d: Likewise.
-	* testsuite/ld-x86-64/largecomm-1b.d: Likewise.
-	* testsuite/ld-x86-64/largecomm-1c.d: Likewise.
-	* testsuite/ld-x86-64/largecomm-1d.d: Likewise.
-	* testsuite/ld-x86-64/largecomm-1e.d: Likewise.
-	* testsuite/ld-x86-64/largecomm-1f.d: Likewise.
-	* testsuite/ld-x86-64/pr19645.d: Likewise.
-	* testsuite/ld-x86-64/pr19645.s: Likewise.
-	* testsuite/ld-elfcomm/elfcomm.exp: Test --elf-stt-common=yes
-	with assembler.
-	(assembler_generates_commons): Removed.
-	Run -z common/-z nocommon tests.  Run *.d tests.
-	* testsuite/ld-i386/i386.exp: Run pr19645.
-	* testsuite/ld-x86-64/x86-64.exp: Likewise.
-	* testsuite/ld-x86-64/dwarfreloc.exp: Test --elf-stt-common with
-	assembler.  Test STT_COMMON with readelf.
-
-2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19636
-	PR ld/19704
-	PR ld/19719
-	* Makefile.am (ELF_X86_DEPS): Add dynamic_undefined_weak.sh.
-	* Makefile.in: Regenerated.
-	* NEWS: Mention -z nodynamic-undefined-weak.
-	* ld.texinfo: Document -z nodynamic-undefined-weak.
-	* ldmain.c (main): Initialize dynamic_undefined_weak to -1.
-	* emulparams/dynamic_undefined_weak.sh: New file.
-	* emulparams/elf32_x86_64.sh: Source dynamic_undefined_weak.sh.
-	* emulparams/elf_i386.sh: Likewise.
-	* emulparams/elf_i386_be.sh: Likewise.
-	* emulparams/elf_i386_chaos.sh: Likewise.
-	* emulparams/elf_i386_ldso.sh: Likewise.
-	* emulparams/elf_i386_vxworks.sh: Likewise.
-	* emulparams/elf_iamcu.sh: Likewise.
-	* emulparams/elf_k1om.sh: Likewise.
-	* emulparams/elf_l1om.sh: Likewise.
-	* emulparams/elf_x86_64.sh: Likewise.
-	* emulparams/extern_protected_data.sh (PARSE_AND_LIST_OPTIONS):
-	Append.
-	(PARSE_AND_LIST_ARGS_CASE_Z): Likewise.
-	* testsuite/ld-elf/pr19719a.c: New file.
-	* testsuite/ld-elf/pr19719b.c: Likewise.
-	* testsuite/ld-elf/pr19719c.c: Likewise.
-	* testsuite/ld-elf/pr19719d.c: Likewise.
-	* testsuite/ld-i386/pr19636-1.s: Likewise.
-	* testsuite/ld-i386/pr19636-1a.d: Likewise.
-	* testsuite/ld-i386/pr19636-1b.d: Likewise.
-	* testsuite/ld-i386/pr19636-1c.d: Likewise.
-	* testsuite/ld-i386/pr19636-1d-nacl.d: Likewise.
-	* testsuite/ld-i386/pr19636-1d.d: Likewise.
-	* testsuite/ld-i386/pr19636-1e.d: Likewise.
-	* testsuite/ld-i386/pr19636-1f.d: Likewise.
-	* testsuite/ld-i386/pr19636-1g.d: Likewise.
-	* testsuite/ld-i386/pr19636-1h.d: Likewise.
-	* testsuite/ld-i386/pr19636-1i.d: Likewise.
-	* testsuite/ld-i386/pr19636-2.s: Likewise.
-	* testsuite/ld-i386/pr19636-2a.d: Likewise.
-	* testsuite/ld-i386/pr19636-2b.d: Likewise.
-	* testsuite/ld-i386/pr19636-2c-nacl.d: Likewise.
-	* testsuite/ld-i386/pr19636-2c.d: Likewise.
-	* testsuite/ld-i386/pr19636-2d-nacl.d: Likewise.
-	* testsuite/ld-i386/pr19636-2d.d: Likewise.
-	* testsuite/ld-i386/pr19636-2e-nacl.d: Likewise.
-	* testsuite/ld-i386/pr19636-2e.d: Likewise.
-	* testsuite/ld-i386/pr19636-3.s: Likewise.
-	* testsuite/ld-i386/pr19636-3a.d: Likewise.
-	* testsuite/ld-i386/pr19636-3b.d: Likewise.
-	* testsuite/ld-i386/pr19636-3c.d: Likewise.
-	* testsuite/ld-i386/pr19636-3d.d: Likewise.
-	* testsuite/ld-i386/pr19636-3e.d: Likewise.
-	* testsuite/ld-i386/pr19636-3f.d: Likewise.
-	* testsuite/ld-i386/pr19636-3g.d: Likewise.
-	* testsuite/ld-i386/pr19636-4.s: Likewise.
-	* testsuite/ld-i386/pr19636-4a.d: Likewise.
-	* testsuite/ld-i386/pr19636-4b.d: Likewise.
-	* testsuite/ld-i386/pr19636-4c.d: Likewise.
-	* testsuite/ld-i386/pr19636-4d.d: Likewise.
-	* testsuite/ld-i386/pr19704.out: Likewise.
-	* testsuite/ld-i386/pr19704a.c: Likewise.
-	* testsuite/ld-i386/pr19704b.c: Likewise.
-	* testsuite/ld-x86-64/pr19636-1.s: Likewise.
-	* testsuite/ld-x86-64/pr19636-1a.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-1b.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-1c.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-1d.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-1e.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-1f.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-1g.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2.s: Likewise.
-	* testsuite/ld-x86-64/pr19636-2a.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2b.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2c.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2d.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2e.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2f.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2g.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2h.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-2i.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-3.s: Likewise.
-	* testsuite/ld-x86-64/pr19636-3a.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-3b.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-3c.d: Likewise.
-	* testsuite/ld-x86-64/pr19636-3d.d: Likewise.
-	* testsuite/ld-x86-64/pr19704.out: Likewise.
-	* testsuite/ld-x86-64/pr19704a.c: Likewise.
-	* testsuite/ld-x86-64/pr19704b.c: Likewise.
-	* testsuite/ld-elf/shared.exp (mix_pic_and_non_pic): New.
-	Run mix_pic_and_non_pic.
-	* testsuite/ld-i386/i386.exp (undefined_weak): New.
-	Run undefined_weak and PR ld/19636 tests.
-	* testsuite/ld-x86-64/x86-64.exp: Likewise.
-	* testsuite/ld-x86-64/pr13082-3b.d: Updated.
-	* testsuite/ld-x86-64/pr13082-4b.d: Likewise.
-
-2016-02-25  Nick Clifton  <nickc@redhat.com>
-
-	* ld.h (struct ld_config_type): Remove specified_data_size field.
-
-2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19698
-	* testsuite/ld-elf/pr19698.d: New file.
-	* testsuite/ld-elf/pr19698.s: Likewise.
-	* testsuite/ld-elf/pr19698.t: Likewise.
-
-2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.am (ELF_X86_DEPS): New.
-	(eelf_i386.c): Replace $(ELF_DEPS) with $(ELF_X86_DEPS).
-	(eelf_i386_chaos.c): Likewise.
-	(eelf_i386_fbsd.c): Likewise.
-	(eelf_i386_ldso.c): Likewise.
-	(eelf_i386_nacl.c): Likewise.
-	(eelf_i386_sol2.c): Likewise.
-	(eelf_iamcu.c): Likewise.
-	(eelf32_x86_64.c): Likewise.
-	(eelf32_x86_64_nacl.c): Likewise.
-	(eelf_l1om.c): Likewise.
-	(eelf_l1om_fbsd.c): Likewise.
-	(eelf_k1om.c): Likewise.
-	(eelf_k1om_fbsd.c): Likewise.
-	(eelf_x86_64.c): Likewise.
-	(eelf_x86_64_cloudabi.c): Likewise.
-	(eelf_x86_64_fbsd.c): Likewise.
-	(eelf_x86_64_sol2.c): Likewise.
-	* Makefile.in: Regenerated.
-
-2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-frv/fdpic-pie-6.d: Updated.
-	* testsuite/ld-mips-elf/pie-n32.d: Likewise.
-	* testsuite/ld-mips-elf/pie-n64.d: Likewise.
-	* testsuite/ld-mips-elf/pie-o32.d: Likewise.
-
-2016-02-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/pr19539.d: Skip cris*-*-* targets.
-
-2016-02-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-elf/pr19617a.d: Enable only for *-*-linux*,
-	*-*-gnu* and *-*-solaris*.
-	* testsuite/ld-elf/pr19617b.d: Likewise.
-	* testsuite/ld-elf/pr19617c.d: Likewise.
-
-2016-02-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19617
-	* testsuite/ld-elf/pr19617.s: New file.
-	* testsuite/ld-elf/pr19617a.d: Likewise.
-	* testsuite/ld-elf/pr19617b.d: Likewise.
-	* testsuite/ld-elf/pr19617c.d: Likewise.
-
-2016-02-18  Nick Clifton  <nickc@redhat.com>
-
-	* Makefile.am (CXX_FOR_TARGET): Check for the presence of an
-	in-tree xg++ executable after checking for the presence of an
-	in-tree g++ executable.
-	* Makefile.in: Regenerate.
-
-2016-02-17  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
-	* testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
-
-2016-02-17  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
-	* testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
-	* testsuite/ld-ifunc/pr17154-x86-64.d: Likewise.
-	* testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise.
-	* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
-	* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
-	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
-	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
-	* testsuite/ld-x86-64/load1c-nacl.d: Likewise.
-	* testsuite/ld-x86-64/load1c.d: Likewise.
-	* testsuite/ld-x86-64/load1d-nacl.d: Likewise.
-	* testsuite/ld-x86-64/load1d.d: Likewise.
-	* testsuite/ld-x86-64/pr14207.d: Likewise.
-	* testsuite/ld-x86-64/pr19162.d: Likewise.
-	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic.rd: Likewise.
-
-2016-02-17  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-elf/eh-frame-hdr.d: Skip for ARC ELF targets.
-
-2016-02-15  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-i386/pr12718.d: Remove dependency upon the
-	description of the flags produced by readelf.
-	* testsuite/ld-i386/pr12921.d: Likewise.
-	* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsbin.rd: Likewise.
-	* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsbindesc.rd: Likewise.
-	* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsdesc.rd: Likewise.
-	* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsgdesc.rd: Likewise.
-	* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlsnopic.rd: Likewise.
-	* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
-	* testsuite/ld-i386/tlspic.rd: Likewise.
-	* testsuite/ld-s390/tlsbin.rd: Likewise.
-	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
-	* testsuite/ld-s390/tlspic.rd: Likewise.
-	* testsuite/ld-s390/tlspic_64.rd: Likewise.
-	* testsuite/ld-sh/tlsbin-2.d: Likewise.
-	* testsuite/ld-sh/tlspic-2.d: Likewise.
-	* testsuite/ld-tic6x/common.d: Likewise.
-	* testsuite/ld-tic6x/shlib-1.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
-	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
-	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
-	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
-	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
-	* testsuite/ld-x86-64/pr12718.d: Likewise.
-	* testsuite/ld-x86-64/pr12921.d: Likewise.
-	* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/split-by-file.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbin.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
-	* testsuite/ld-x86-64/tlspic.rd: Likewise.
-	* testsuite/ld-xtensa/tlsbin.rd: Likewise.
-	* testsuite/ld-xtensa/tlspic.rd: Likewise.
-
-2016-02-11  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19615
-	* ld.texinfo: Document -Bsymbolic and -Bsymbolic-functions for
-	PIE.
-	* lexsup.c (parse_args): Enable -Bsymbolic and
-	-Bsymbolic-functions for PIE.
-	* testsuite/ld-i386/i386.exp: Run pr19615.
-	* testsuite/ld-i386/pr19615.d: New file.
-	* testsuite/ld-i386/pr19615.s: Likewise.
-	* testsuite/ld-x86-64/pr19615.d: Likewise.
-	* testsuite/ld-x86-64/pr19615.s: Likewise.
-
-2016-02-09  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-aarch64/reloc-overflow-bad.d: New test.
-	* testsuite/ld-aarch64/reloc-overflow-1.s: New source file.
-	* testsuite/ld-aarch64/reloc-overflow-2.s: New source file.
-	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
-
-2016-02-04  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-arm/arm-elf.exp: Remove ARM NOREAD section tests.
-	* testsuite/ld-arm/thumb1-input-section-flag-match.d: Delete.
-	* testsuite/ld-arm/thumb1-input-section-flag-match.s: Delete.
-	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.d: Delete.
-	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s: Delete.
-	* testsuite/ld-arm/thumb1-noread-present-one-section.d: Delete.
-	* testsuite/ld-arm/thumb1-noread-present-one-section.s: Delete.
-	* testsuite/ld-arm/thumb1-noread-present-two-section.d: Delete.
-	* testsuite/ld-arm/thumb1-noread-present-two-section.s: Delete.
-
-2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/19520
-	* testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as.
-	* testsuite/ld-i386/call1.d: Likewise.
-	* testsuite/ld-i386/call2.d: Likewise.
-	* testsuite/ld-i386/call3a.d: Likewise.
-	* testsuite/ld-i386/call3b.d: Likewise.
-	* testsuite/ld-i386/call3c.d: Likewise.
-	* testsuite/ld-i386/call3d.d: Likewise.
-	* testsuite/ld-i386/call3e.d: Likewise.
-	* testsuite/ld-i386/call3f.d: Likewise.
-	* testsuite/ld-i386/call3g.d: Likewise.
-	* testsuite/ld-i386/call3h.d: Likewise.
-	* testsuite/ld-i386/jmp1.d: Likewise.
-	* testsuite/ld-i386/jmp2.d: Likewise.
-	* testsuite/ld-i386/lea1c.d: Likewise.
-	* testsuite/ld-i386/load1.d: Likewise.
-	* testsuite/ld-i386/load2.d: Likewise.
-	* testsuite/ld-i386/load3.d: Likewise.
-	* testsuite/ld-i386/load4a.d: Likewise.
-	* testsuite/ld-i386/load5a.d: Likewise.
-	* testsuite/ld-i386/mov2b.d: Likewise.
-	* testsuite/ld-i386/mov3.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
-	* testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
-	* testsuite/ld-x86-64/call1a.d: Likewise.
-	* testsuite/ld-x86-64/call1b.d: Likewise.
-	* testsuite/ld-x86-64/call1c.d: Likewise.
-	* testsuite/ld-x86-64/call1d.d: Likewise.
-	* testsuite/ld-x86-64/call1e.d: Likewise.
-	* testsuite/ld-x86-64/call1f.d: Likewise.
-	* testsuite/ld-x86-64/call1h.d: Likewise.
-	* testsuite/ld-x86-64/call1i.d: Likewise.
-	* testsuite/ld-x86-64/load1a.d: Likewise.
-	* testsuite/ld-x86-64/load1b.d: Likewise.
-	* testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it.
-	* testsuite/ld-i386/got1.dd: Updated.
-	* testsuite/ld-i386/got1d.S (1): Removed.
-	* testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes.
-	* testsuite/ld-x86-64/x86-64.exp: Likewise.
-
-2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/18591
-	* testsuite/ld-x86-64/pr18591.d: New file.
-	* testsuite/ld-x86-64/pr18591.s: Likewise.
-	* testsuite/ld-x86-64/x86-64.exp: Run pr18591.
-
-2016-02-01  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19553
-	* testsuite/ld-elf/indirect.exp: Run tests for PR ld/19553.
-	* testsuite/ld-elf/pr19553.map: New file.
-	* testsuite/ld-elf/pr19553.map: Likewise.
-	* testsuite/ld-elf/pr19553a.c: Likewise.
-	* testsuite/ld-elf/pr19553b.c: Likewise.
-	* testsuite/ld-elf/pr19553b.out: Likewise.
-	* testsuite/ld-elf/pr19553c.c: Likewise.
-	* testsuite/ld-elf/pr19553c.out: Likewise.
-	* testsuite/ld-elf/pr19553d.c: Likewise.
-	* testsuite/ld-elf/pr19553d.out: Likewise.
-
-2016-01-30  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19539
-	* testsuite/ld-elf/pr19539.d: New file.
-	* testsuite/ld-elf/pr19539.s: Likewise.
-	* testsuite/ld-elf/pr19539.t: Likewise.
-
-2016-01-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR ld/19533
-	* configure.ac (compressed_debug_sections): Replace == with =.
-	* configure: Regenerated.
-
-2016-01-22  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
-
-	* scripttempl/avr.sc (.noinit): Force .noinit VMA to end of .bss VMA.
-	* scripttempl/avrtiny.sc (.noinit): Likewise.
-
-2016-01-21  Nick Clifton  <nickc@redhat.com>
-
-	PR ld/19453
-	* testsuite/ld-arm/arm-elf.exp: Skip tests that do not work for
-	the arm-netbsdelf target.
-
-	PR ld/19455
-	* testsuite/ld-arm/vxworks1-lib.dd: Update for current
-	disassmebler output.
-	* testsuite/ld-arm/vxworks1-lib.rd: Likewise.
-	* testsuite/ld-arm/vxworks1.dd: Likewise.
-	* testsuite/ld-arm/vxworks1.rd: Likewise.
-	* testsuite/ld-arm/vxworks1.ld: Set the output format.
-
-2016-01-20  Jiong Wang  <jiong.wang@arm.com>
-
-	* testsuite/ld-aarch64/farcall-section.d: Delete.
-	* testsuite/ld-aarch64/farcall-section.s: Delete.
-	* testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
-	* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
-	* testsuite/ld-aarch64/farcall-b-section.s: New testcase.
-	* testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
-	* testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
-
-2016-01-20  Nick Clifton  <nickc@redhat.com>
-
-	PR 19457
-	* testsuite/ld-scripts/script.exp (extract_symbol_test): Stop test
-	early for PE based targets.
-	* testsuite/ld-scripts/align.t: Use 0x1000 as VMA alignment.
-	* testsuite/ld-pe/tlssec32.d: Allow for relocatable output.
-
-2016-01-20  Mickael Guene  <mickael.guene@st.com>
-
-	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s:
-	Add 'y' attribute usage.
-	* testsuite/ld-arm/thumb1-noread-present-one-section.s: Likewise.
-	* testsuite/ld-arm/thumb1-noread-present-two-section.s: Likewise.
-	* testsuite/ld-arm/thumb1-input-section-flag-match.s: Likewise.
-
-2016-01-19  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-elf/pr18735.d: Allow for extra symbols between
-	foo@FOO and bar@@FOO.
-
-2016-01-18  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-18  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-plugin/plugin.exp: Skip plugin tests if the linker
-	is not configured to support plugins.
-
-	* testsuite/ld-scripts/rgn-at11.s: New file - based on rgn-at10.s
-	but with 16 byte section alignment.
-	* testsuite/ld-scripts/rgn-at11.d: Use new source file.  Reenable
-	test for MIPS targets.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate.
-	* testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate.
-	* testsuite/ld-elf/pr14156a.d: Likewise.
-	* testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate.
-	* testsuite/ld-elf/sec64k.exp: Likewise.
-
-2016-01-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)):
-	Set address of .foo section when linking.
-	* testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc
-	in .foo section.
-	* testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected
-	output to the above changes.
-
-2016-01-13  Nick Clifton  <nickc@redhat.com>
-
-	* testsuite/ld-elf/elf.exp (-Bymsolic-functions): Expect to fail
-	for MIPS targets.
-
-	* testsuite/ld-scripts/script.exp (extract_symbol_test): Expect to
-	fail for MIPS targets.
-
-	* testsuite/ld-scripts/rgn-at11.d: Expect this test to fail for
-	MIPS targets.
-
-2016-01-12  Yury Usishchev  <y.usishchev@samsung.com>
-
-	* testsuite/ld-arm/arm-elf.exp: New test.
-	* testsuite/ld-arm/unwind-mix.d: New file.
-	* testsuite/ld-arm/unwind-mix1.s: New file.
-	* testsuite/ld-arm/unwind-mix2.s: New file.
-
-2016-01-08  Jiong Wang  <jiong.wang@arm.com>
-
-	PR ld/19368
-	* testsuite/ld-arm/ifunc-3.rd: Update expected result.
-	* testsuite/ld-arm/ifunc-4.rd: Likewise.
-	* testsuite/ld-arm/ifunc-9.rd: Likewise.
-	* testsuite/ld-arm/ifunc-10.rd: Likewise.
-	* testsuite/ld-arm/ifunc-12.rd: Likewise.
-	* testsuite/ld-arm/ifunc-13.rd: Likewise.
-
-2016-01-05  Nick Clifton  <nickc@redhat.com>
-
-	* emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the
-	MSP430 hardware multiply address range.
-	* scripttempl/elf32msp430.sc (__romdatastart): Define.
-	(__romdatacopysize): Define.
-	* scripttempl/elf32msp430_3.sc: Likewise.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* emultempl/mipself.em (PARSE_AND_LIST_PROLOGUE): Convert
-	OPTION_INSN32 and OPTION_NO_INSN32 macros to an enum.
-
-2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of
-	messages expected according to MIPS BFD private data merge
-	changes.
-	* testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise.
-	* testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-2015 and testsuite/ChangeLog-2015
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/ld/ChangeLog-2016 b/ld/ChangeLog-2016
new file mode 100644
index 0000000..f55272c
--- /dev/null
+++ b/ld/ChangeLog-2016
@@ -0,0 +1,4124 @@
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* NEWS: Mention new PRU target.
+	* Makefile.am: Add PRU target.
+	* configure.tgt: Ditto.
+	* emulparams/pruelf.sh: New file.
+	* emultempl/pruelf.em: New file.
+	* scripttempl/pru.sc: New file.
+	* Makefile.in: Regenerate.
+	* testsuite/ld-pru/emit-relocs-1.d: New PRU testcase file.
+	* testsuite/ld-pru/emit-relocs-1.ld: Ditto.
+	* testsuite/ld-pru/emit-relocs-1a.s: Ditto.
+	* testsuite/ld-pru/emit-relocs-1b.s
+	* testsuite/ld-pru/ldi32.d: Ditto.
+	* testsuite/ld-pru/ldi32.s: Ditto.
+	* testsuite/ld-pru/ldi32_symbol.s: Ditto.
+	* testsuite/ld-pru/norelax_ldi32-data.d: Ditto.
+	* testsuite/ld-pru/norelax_ldi32-dis.d: Ditto.
+	* testsuite/ld-pru/pcrel_s10.d: Ditto.
+	* testsuite/ld-pru/pcrel_s10.s: Ditto.
+	* testsuite/ld-pru/pcrel_s10_label.s: Ditto.
+	* testsuite/ld-pru/pcrel_u8-illegal.d: Ditto.
+	* testsuite/ld-pru/pcrel_u8-illegal.s: Ditto.
+	* testsuite/ld-pru/pcrel_u8-illegal2.d: Ditto.
+	* testsuite/ld-pru/pcrel_u8-illegal2.s: Ditto.
+	* testsuite/ld-pru/pcrel_u8-illegal3.d: Ditto.
+	* testsuite/ld-pru/pcrel_u8-illegal3.s: Ditto.
+	* testsuite/ld-pru/pcrel_u8.d: Ditto.
+	* testsuite/ld-pru/pcrel_u8.s: Ditto.
+	* testsuite/ld-pru/pcrel_u8_label.s: Ditto.
+	* testsuite/ld-pru/pmem.d: Ditto.
+	* testsuite/ld-pru/pmem.s: Ditto.
+	* testsuite/ld-pru/pmem_symbol.s: Ditto.
+	* testsuite/ld-pru/pru.exp: Ditto.
+	* testsuite/ld-pru/relax_ldi32-data.d: Ditto.
+	* testsuite/ld-pru/relax_ldi32-dis.d: Ditto.
+	* testsuite/ld-pru/relax_ldi32.s: Ditto.
+	* testsuite/ld-pru/relax_ldi32_symbol.s: Ditto.
+	* testsuite/ld-pru/reloc.d: Ditto.
+	* testsuite/ld-pru/reloc.s: Ditto.
+	* testsuite/ld-pru/reloc_symbol.s: Ditto.
+	* testsuite/ld-pru/u16.d: Ditto.
+	* testsuite/ld-pru/u16.s: Ditto.
+	* testsuite/ld-pru/u16_symbol.s: Ditto.
+	* testsuite/lib/ld-lib.exp (check_shared_lib_support): No shared
+	libraries are supported for PRU.
+	(check_gc_sections_available): Mark PRU as not supported.
+	* testsuite/ld-elf/eh-frame-hdr.d: Disable for PRU.
+	* testsuite/ld-elf/endsym.d: Likewise.
+	* testsuite/ld-elf/group8a.d: Likewise.
+	* testsuite/ld-elf/group8b.d: Likewise.
+	* testsuite/ld-elf/group9a.d: Likewise.
+	* testsuite/ld-elf/group9b.d: Likewise.
+	* testsuite/ld-elf/merge.d: Likewise.
+	* testsuite/ld-elf/pr12851.d: Likewise.
+	* testsuite/ld-elf/pr14926.d: Likewise.
+	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
+	* testsuite/ld-elf/sec64k.exp: Mark sec64k case as too big for PRU.
+	* testsuite/ld-srec/srec.exp (run_srec_test): Add setup for PRU.
+
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* testsuite/lib/ld-lib.exp (run_dump_test): Pass -- to send_log.
+
+2016-12-28  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20995
+	* testsuite/ld-elf/pr20995c.s: New test file.
+	* testsuite/ld-elf/pr20995-2so.r: Likewise.
+	* testsuite/ld-elf/elf.exp: Run it.
+
+2016-12-26  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20995
+	* testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed
+	stub hash table traversal caused by section id increment.  Accept
+	the previous output too.
+	* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
+	* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
+	* testsuite/ld-arm/farcall-mixed-lib.d: Likewise.
+	* testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s,
+	* testsuite/ld-elf/pr20995.r: New test.
+	* testsuite/ld-elf/elf.exp: Run it.
+
+2016-12-26  Alan Modra  <amodra@gmail.com>
+
+	* scripttempl/elf.sc: Don't use $BSS_NAME in .dynbss.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* configure: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* NEWS: Add marker for 2.28.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* po/ld.pot: Regenerate.
+
+2016-12-22  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-scripts/sysroot-prefix.exp (sysroot_prefix_test_setup):
+	Call perror rather than error on "as" or "ar" failures.
+
+2016-12-21  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* ldlang.c (size_input_section): Avoid calling insert_pad
+	if output_section_statement->ignored is set.
+
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.
+
+2016-12-16  fincs  <fincs.alt1@gmail.com>
+
+	* ld.texinfo: Document --gc-keep-exported.
+	* ldlex.h (enum option_values): Add OPTION_GC_KEEP_EXPORTED.
+	* lexsup.c (parse_args): Add handling for --gc-keep-exported.
+
+2016-12-14  Yury Norov <ynorov@caviumnetworks.com>
+
+	* ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for tiny and
+	small ld-le relaxations in ilp32 mode.
+	* ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file.
+	* ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file.
+
+2016-12-13  Jiong Wang  <jiong.wang@arm.com>
+
+	* testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_lp64_emul): New
+	function.
+	(run_dump_test_lp64): New function which pass LP64 mode options to both
+	assembler and linker when building test binary.
+	(aarch64elftests): Remove eh-frame-merge test.
+	(eh-frame-merge-lp64): Restrict eh-frame-merge test to LP64 only.
+	(run_dump_test): Migrate to run_dump_test_lp64 if the test source was
+	written for LP64 only.
+	* testsuite/ld-aarch64/erratum843419.d: Support ILP32 mode.
+	* testsuite/ld-aarch64/farcall-b-defsym.d: Likewise.
+	* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
+	* testsuite/ld-aarch64/farcall-b.d: Likewise.
+	* testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise.
+	* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
+	* testsuite/ld-aarch64/farcall-bl.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-15.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-16.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-5a-local.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-5a.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-5b-local.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-5b.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-5r-local.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-6a.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-6b.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-7a.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-7b.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-8.d: Likewise.
+	* testsuite/ld-aarch64/limit-b.d: Likewise.
+	* testsuite/ld-aarch64/limit-bl.d: Likewise.
+
+2016-12-13  Awson  <kyrab@mail.ru>
+
+	PR ld/19254
+	* scripttempl/pe.sc (.fini): KEEP this section.
+	(.gcc_except_table): Likewise.
+	(.pdata): Also accept .pdata*.
+
+2016-12-13  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-elf/nobits-1.d: Remove xfail for hppa64.
+	* testsuite/ld-elf/note-1.d: Likewise.
+	* testsuite/ld-elf/note-2.d: Likewise.
+
+2016-12-13  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-elf/flags1.d: Run for RX.
+	* testsuite/ld-scripts/phdrs.exp: Likewise.
+	* testsuite/ld-scripts/pr14962.d: Likewise.
+	* testsuite/ld-scripts/pr14962-2.d: Likewise.
+
+2016-12-08  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-12-06  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-powerpc/tocopt7.s,
+	* testsuite/ld-powerpc/tocopt7.out,
+	* testsuite/ld-powerpc/tocopt7.d: New test.
+	* testsuite/ld-powerpc/tocopt8.s,
+	* testsuite/ld-powerpc/tocopt8.d: New test.
+	* testsuite/ld-powerpc/powerpc.exp: Run them.
+
+2016-12-05  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20906
+	* ldlex.l: Check for bogus strings in linker scripts.
+
+2016-12-05  Alyssa Milburn <amilburn@zall.org>
+
+	* testsuite/ld-sparc/wdispcall.s: New file.
+	* testsuite/ld-sparc/wdispcall.dd: Likewise.
+	* testsuite/ld-sparc/sparc.exp: Run new test.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Don't call
+	ppc64_elf_restore_symbols.
+	* testsuite/ld-powerpc/dotsym1.d: New.
+	* testsuite/ld-powerpc/dotsym2.d: New.
+	* testsuite/ld-powerpc/dotsym3.d: New.
+	* testsuite/ld-powerpc/dotsym4.d: New.
+	* testsuite/ld-powerpc/dotsymref.s: New.
+	* testsuite/ld-powerpc/nodotsym.s: New.
+	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-elf/indirect1b.c: Give dot-symbol a version too.
+	* testsuite/ld-elf/indirect2.c: Likewise.
+	* testsuite/ld-elf/indirect3b.c: Likewise.
+	* testsuite/ld-elf/indirect4b.c: Likewise.
+	* testsuite/ld-elf/pr18718.c: Likewise.
+	* testsuite/ld-elf/pr18720b.c: Likewise.
+	* testsuite/ld-elf/pr19553c.c: Likewise.
+	* testsuite/ld-elfvers/vers.h (FUNC_SYMVER): Define.
+	* testsuite/ld-elfvers/vers1.c: Use FUNC_SYMVER for functions.
+	* testsuite/ld-elfvers/vers4.c: Likewise.
+	* testsuite/ld-elfvers/vers5.c: Likewise.
+	* testsuite/ld-elfvers/vers6.c: Likewise.
+	* testsuite/ld-elfvers/vers7a.c: Likewise.
+	* testsuite/ld-elfvers/vers9.c: Likewise.
+	* testsuite/ld-elfvers/vers15.c: Likewise.
+	* testsuite/ld-elfvers/vers18.c: Likewise.
+	* testsuite/ld-elfvers/vers22a.c: Likewise.
+	* testsuite/ld-elfvers/vers23a.c: Likewise.
+	* testsuite/ld-elfvers/vers27d1.c: Likewise.
+	* testsuite/ld-elfvers/vers21.c: Likewise.
+	(_old_bar): Use attribute weak rather than asm weak.
+	* testsuite/ld-ifunc/pr16467b.c: Give dot-symbol a version.
+	* testsuite/ld-plugin/pr12760b.c: Define warning on .bar rather than
+	bar for ppc64 -mcall-aixdesc.
+	* testsuite/ld-plugin/pr16746a.c: Similarly for foobar.
+	* testsuite/ld-plugin/pr16746b.c: Likewise.
+	* testsuite/ld-elf/shared.exp: Allow dot-symbol in warnings and errors.
+	* testsuite/ld-plugin/lto.exp: Likewise.
+	* testsuite/ld-plugin/plugin-6.d: Likewise.
+	* testsuite/ld-plugin/plugin-7.d: Likewise.
+	* testsuite/ld-plugin/plugin-8.d: Likewise.
+	* testsuite/ld-plugin/plugin-13.d: Likewise.
+	* testsuite/ld-plugin/plugin-14.d: Likewise.
+	* testsuite/ld-plugin/plugin-15.d: Likewise.
+	* testsuite/ld-plugin/plugin-16.d: Likewise.
+	* testsuite/ld-plugin/plugin-20.d: Likewise.
+	* testsuite/ld-plugin/plugin-21.d: Likewise.
+	* testsuite/ld-plugin/plugin-22.d: Likewise.
+	* testsuite/ld-plugin/plugin-23.d: Likewise.
+	* testsuite/ld-plugin/plugin.exp: Define .main and .puts for ppc64
+	-mcall-aixdesc.
+	* testsuite/ld-elfvers/vers.exp (test_ar): Trim dot-symbols.
+	(objdump_dynsymstuff): Likewise.
+	(objdump_symstuff): Likewise.  Pack flags to keep column count
+	consistent.
+	* testsuite/ld-elfweak/elfweak.exp (objdump_dynsymstuff,
+	objdump_symstuff): As for vers.exp.
+	* testsuite/ld-elfvers/vers6.sym: Allow dot-symbols.
+	* testsuite/ld-elfvers/vers1.sym: Allow missing F flag for
+	-mcall-aixdesc .opd syms and adjust for flag packing.
+	* testsuite/ld-elfvers/vers4.sym: Likewise.
+	* testsuite/ld-elfvers/vers4a.sym: Likewise.
+	* testsuite/ld-elfvers/vers7a.sym: Likewise.
+	* testsuite/ld-elfvers/vers9.sym: Likewise.
+	* testsuite/ld-elfvers/vers15.sym: Likewise.
+	* testsuite/ld-elfvers/vers18.sym: Likewise.
+	* testsuite/ld-elfvers/vers21.sym: Likewise.
+	* testsuite/ld-elfvers/vers22a.sym: Likewise.
+	* testsuite/ld-elfvers/vers23a.sym: Likewise.
+	* testsuite/ld-elfvers/vers27d.sym: Likewise.
+	* testsuite/ld-elfweak/strong.sym: Likewise.
+	* testsuite/ld-elfweak/strongcomm.sym: Likewise.
+	* testsuite/ld-elfweak/strongdata.sym: Likewise.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-elfvers/vers.exp (objdump_dynsymstuff): Don't abort
+	on non-empty results with empty expected.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-cdtest/cdtest-foo.cc: Test for __GNUG__ >= 2.
+
+2016-12-03  Alan Modra  <amodra@gmail.com>
+
+	* ldexp.c (try_copy_symbol_type): Remove unnecessary check.
+
+2016-12-02  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20910
+	* ldmain.c (main): Prevent evaluation of %<char> sequences when
+	printing out a linker script.
+
+	PR ld/20911
+	* ldctor.c (ldctor_build_sets): Produce alternative error message
+	if the reloc was being applied to a special section.
+
+	PR ld/20912
+	* emultempl/elf32.em (_place_orphan): Test for ELF format of the
+	orphan before looking for the SHF_EXCLUDE flag.
+
+2016-12-02  Josh Conner  <joshconner@google.com>
+
+        * Makefile.am: Add dependency information for earmelf_fuchsia.c.
+        * Makefile.in: Regenerate.
+        * configure.tgt: Add support for aarch64-*-fuchsia, arm*-*-fuchsia*, and
+        x86_64-*-fuchsia* targets.
+        * emulparams/armelf_fuchsia.sh: New file.
+        * emulparams/armelfb_fuchsia.sh: New file.
+
+2016-12-01  Rudy Y  <rudyy.id@gmail.com>
+
+	PR ld/20880
+	* pe-dll.c (make_one): Use the hint if the ordinal is -1.
+
+2016-12-01  Yury Norov  <ynorov@caviumnetworks.com>
+
+	PR ld/20868
+	* testsuite/ld-aarch64/tls-relax-gd-ie-ilp32.d: New test.
+	* testsuite/ld-aarch64/relocs-ilp32.ld: Linker script for the new
+	test.
+	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
+
+2016-11-28  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* emulparams/arclinux_prof.sh: Remove duplicate TEMPLATE_NAME.
+
+2016-11-28  Nick Clifton  <nickc@redhat.com>
+
+	PR 20815
+	* testsuite/ld-elf/loadaddr1.d: Update.
+	* testsuite/ld-powerpc/vle-multiseg-5.d: Update.
+	* testsuite/ld-scripts/phdrs3a.d: Update.
+
+2016-11-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/indirect.exp: Add a test for PR 18720.
+	* testsuite/ld-elf/pr18720.rd: New file.
+
+2016-11-27  Alan Modra  <amodra@gmail.com>
+
+	PR 20815
+	* testsuite/ld-powerpc/vle-multiseg-5.d: Update.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* deffilep.y: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* scripttempl/ia64vms.sc: Fix spelling in comments.
+	* scripttempl/ip2k.sc: Fix spelling in comments.
+	* scripttempl/v850.sc: Fix spelling in comments.
+	* scripttempl/v850_rh850.sc: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* emultempl/avrelf.em: Fix spelling in comments.
+	* emultempl/elf32.em: Fix spelling in comments.
+	* emultempl/pe.em: Fix spelling in comments.
+	* emultempl/pep.em: Fix spelling in comments.
+	* emultempl/spuelf.em: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* testsuite/ld-sh/arch/arch.exp: Fix spelling in comments.
+	* testsuite/ld-sh/rd-sh.exp: Fix spelling in comments.
+	* testsuite/ld-sh/sh64/rd-sh64.exp: Fix spelling in comments.
+	* testsuite/ld-undefined/undefined.exp: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* testsuite/ld-arm/stm32l4xx-fix-all.s: Fix spelling in comments.
+	* testsuite/ld-arm/thumb2-b-interwork.s: Fix spelling in comments.
+	* testsuite/ld-arm/thumb2-bl.s: Fix spelling in comments.
+	* testsuite/ld-s390/tlspic1.s: Fix spelling in comments.
+	* testsuite/ld-s390/tlspic1_64.s: Fix spelling in comments.
+	* testsuite/ld-scripts/section-match-1.d: Fix spelling in comments.
+
+2016-11-27  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+	* deffile.h: Fix spelling in comments.
+	* ld.h: Fix spelling in comments.
+	* ldlang.c: Fix spelling in comments.
+	* ldmisc.c: Fix spelling in comments.
+	* pe-dll.c: Fix spelling in comments.
+
+2016-11-24  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20737
+	* testsuite/ld-arm/pie-bind-locally-a.s: New test source.
+	* testsuite/ld-arm/pie-bind-locally-b.s: Likewise.
+	* testsuite/ld-arm/pie-bind-locally.d: New testcase.
+	* testsuite/ld-arm/arm-elf.exp: Run new testcase.
+
+2016-11-24  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20858
+	* emultempl/elf32.em (_search_needed): Allow for path separator
+	and terminating NUL byte when allocating space for new $ORIGIN
+	path.
+
+2016-11-23  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-arm/vxworks2.sd: Update expected readelf output.
+
+	PR ld/20815
+	* ld.texinfo: Note that PT_TLS can be used as a segment type.
+	* testsuite/ld-discard/discard.ld: Add space for program headers.
+	* testsuite/ld-elf/flags1.ld: Likewise.
+	* testsuite/ld-elf/maxpage3.t: Likewise.
+	* testsuite/ld-elf/noload-1.t: Likewise.
+	* testsuite/ld-elf/orphan.ld: Likewise.
+	* testsuite/ld-elf/overlay.t: Likewise.
+	* testsuite/ld-elf/pr14052.t: Likewise.
+	* testsuite/ld-elf/pr19539.t: Likewise.
+	* testsuite/ld-elf/provide-hidden-1.ld: Likewise.
+	* testsuite/ld-elf/provide-hidden-s.ld: Likewise.
+	* testsuite/ld-elf/weak-dyn-1.ld: Likewise.
+	* testsuite/ld-i386/pr19539.t: Likewise.
+	* testsuite/ld-scripts/defined.t: Likewise.
+	* testsuite/ld-scripts/defined6.t: Likewise.
+	* testsuite/ld-scripts/dynamic-sections.t: Likewise.
+	* testsuite/ld-scripts/empty-aligned.t: Likewise.
+	* testsuite/ld-scripts/provide-2.t: Likewise.
+	* testsuite/ld-scripts/provide-4.t: Likewise.
+	* testsuite/ld-vax-elf/plt-local.ld: Likewise.
+	* testsuite/ld-x86-64/pr19539.t: Likewise.
+	* testsuite/ld-elf/ehdr_start-missing.d: Do not initialise the
+	dynamic linker.
+	* testsuite/ld-elf/ehdr_start-weak.d: Likewise.
+	* testsuite/ld-elf/elf.exp (pr14170, pr17068): Likewise.
+	* testsuite/ld-elf/loadaddr1.d: Update expected readelf output.
+	* testsuite/ld-elf/noload-2.d: Likewise.
+	* testsuite/ld-powerpc/vxworks2.sd: Likewise.
+	* testsuite/ld-scripts/phdrs3a.d: Likewise.
+	* testsuite/ld-scripts/size-2.d: Likewise.
+	* testsuite/ld-elf/group.ld: Add program headers.
+	* testsuite/ld-elf/overlay.d: Skip for SPU.
+	* testsuite/ld-elf/flags1.d: Skip for RX.
+	* testsuite/ld-elf/pr19162.d: Skip for HPPA64.
+	* testsuite/ld-elf/pr19539.d: Skip for ALPHA.
+	* testsuite/ld-scripts/empty-orphan.t: Update program headers.
+	* testsuite/ld-scripts/size-2.t: Likewise.
+
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+        * configure: Regenerate.
+
+2016-11-22  Alan Modra  <amodra@gmail.com>
+
+	PR 20744
+	* emultempl/ppc32elf.em (params): Update initializer.  Handle
+	--vle-reloc-fixup command line arg.
+
+2016-11-15  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20789
+	* ld/testsuite/ld-avr/pr20789.d: New test.
+	* ld/testsuite/ld-avr/pr20789.s: New test.
+
+
+2016-11-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20800
+	* testsuite/ld-x86-64/pr20800a.S: New file.
+	* testsuite/ld-x86-64/pr20800b.S: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/20800 test.
+
+2016-11-14  Nick Clifton  <nickc@redhat.com>
+
+	* lexsup.c (parse_args): Add break at end of default case.
+
+2016-11-10  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20737
+	* testsuite/ld-aarch64/pie-bind-locally-a.s: New test source.
+	* testsuite/ld-aarch64/pie-bind-locally-b.s: Likewise.
+	* testsuite/ld-aarch64/pie-bind-locally.d: New testcase.
+	* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcase.
+
+2016-11-07  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20784
+	* emultempl/elf32.em (search_needed): Fix infinite loop when
+	unable to process a token.  Add support for curly braced enclosed
+	tokens.
+	* ld.texinfo (--rpath-link): Document supprot for $ORIGIN and
+	$LIB.
+
+2016-11-07  Nick Clifton  <nickc@redhat.com>
+
+	* ld.texinfo (--compress-debug-sections): Expand documentation of
+	this option.
+
+2016-11-04  Nick Clifton  <nickc@redhat.com>
+
+	* emultempl/elf32.em (search_needed): Remove use of getauxval and
+	inclusion of <sys/auxv.h>.  Replace support for $PLATFORM with a
+	warning message.
+	* configure.ac (AC_CHECK_FUNCS): Remove getauxval.
+	* configure: Regenerate.
+	* config.in: Regenerate.
+
+2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* ldlang.h (struct lang_wild_statement_struct): Add
+	exclude_name_list field.
+	* ldlang.c (walk_wild_file_in_exclude_list): New function.
+	(walk_wild_consider_section): Use new
+	walk_wild_file_in_exclude_list function.
+	(walk_wild_file): Add call to walk_wild_file_in_exclude_list.
+	(print_wild_statement): Print new exclude_name_list field.
+	(lang_add_wild): Initialise new exclude_name_list field.
+	* testsuite/ld-scripts/exclude-file-1.d: New file.
+	* testsuite/ld-scripts/exclude-file-1.map: New file.
+	* testsuite/ld-scripts/exclude-file-1.t: New file.
+	* testsuite/ld-scripts/exclude-file-2.d: New file.
+	* testsuite/ld-scripts/exclude-file-2.map: New file.
+	* testsuite/ld-scripts/exclude-file-2.t: New file.
+	* testsuite/ld-scripts/exclude-file-3.d: New file.
+	* testsuite/ld-scripts/exclude-file-3.map: New file.
+	* testsuite/ld-scripts/exclude-file-3.t: New file.
+	* testsuite/ld-scripts/exclude-file-4.d: New file.
+	* testsuite/ld-scripts/exclude-file-4.map: New file.
+	* testsuite/ld-scripts/exclude-file-4.t: New file.
+	* testsuite/ld-scripts/exclude-file-a.s: New file.
+	* testsuite/ld-scripts/exclude-file-b.s: New file.
+	* testsuite/ld-scripts/exclude-file.exp: New file.
+	* ld.texinfo (Input Section Basics): Update description of
+	EXCLUDE_FILE to cover the new features.
+	* NEWS: Mention new EXCLUDE_FILE usage.
+
+2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/lib/ld-lib.exp (run_dump_test): Use object file names
+	based on the original source file name.
+	* testsuite/ld-discard/extern.d: Update object file names.
+	* testsuite/ld-discard/start.d: Likewise.
+	* testsuite/ld-discard/static.d: Likewise.
+	* testsuite/ld-elf/orphan-8.map: Likewise.
+
+2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Add
+	xc16x-*-elf to the list of targets that don't support -shared.
+
+2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* ldgram.y: Rename file_NAME_list to section_NAME_list
+	throughout.
+
+2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
+	    Andrew Waterman <andrew@sifive.com>
+
+	Add support for RISC-V architecture.
+	* Makefile.am: Add riscv files.
+	* Makefile.in: Regenerate.
+	* NEWS: Mention the support for this target.
+	* configure.tgt: Add riscv entries.
+	* emulparams/elf32lriscv-defs.sh: New file.
+	* emulparams/elf32lriscv.sh: New file.
+	* emulparams/elf64lriscv-defs.sh: New file.
+	* emulparams/elf64lriscv.sh: New file.
+	* emultempl/riscvelf.em: New file.
+
+2016-10-31  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* ldmain.c (add_archive_element): Initialize input->header.type.
+	* plugin.c (plugin_maybe_claim): Assert the statement is an input
+	statement.
+
+2016-10-15  Alan Modra  <amodra@gmail.com>
+
+	* emultempl/spu_ovl.o_c: Regenerate.
+
+2016-10-14  Alan Modra  <amodra@gmail.com>
+
+	* scripttempl/DWARF.sc: Add .debug_addr.
+
+2016-10-12  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-i386/pr19636-1d-nacl.d: Adjust for objdump change.
+	* testsuite/ld-i386/pr19636-2c-nacl.d: Likewise.
+	* testsuite/ld-tic6x/shlib-1r.dd: Likewise.
+	* testsuite/ld-x86-64/plt-nacl.pd: Likewise.
+	* testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise.
+
+2016-10-11  Nick Clifton  <nickc@redhat.com>
+
+	* ld-aarch64/emit-relocs-515-be.d: Adjust output to match change
+	in objdump.
+	* ld-aarch64/emit-relocs-515.d: Likewise.
+	* ld-aarch64/emit-relocs-516-be.d: Likewise.
+	* ld-aarch64/emit-relocs-516.d: Likewise.
+	* ld-aarch64/farcall-b-plt.d: Likewise.
+	* ld-aarch64/farcall-bl-plt.d: Likewise.
+	* ld-aarch64/gc-plt-relocs.d: Likewise.
+	* ld-aarch64/tls-desc-ie.d: Likewise.
+	* ld-aarch64/tls-tiny-desc.d: Likewise.
+	* ld-aarch64/tls-tiny-gd.d: Likewise.
+	* ld-aarch64/tls-tiny-ie.d: Likewise.
+	* ld-arm/arm-app-abs32.d: Likewise.
+	* ld-arm/arm-app.d: Likewise.
+	* ld-arm/arm-lib-plt32.d: Likewise.
+	* ld-arm/arm-lib.d: Likewise.
+	* ld-arm/armthumb-lib.d: Likewise.
+	* ld-arm/cortex-a8-fix-b-plt.d: Likewise.
+	* ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
+	* ld-arm/cortex-a8-fix-bl-plt.d: Likewise.
+	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
+	* ld-arm/cortex-a8-fix-blx-plt.d: Likewise.
+	* ld-arm/farcall-mixed-app-v5.d: Likewise.
+	* ld-arm/farcall-mixed-app.d: Likewise.
+	* ld-arm/farcall-mixed-app2.d: Likewise.
+	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
+	* ld-arm/farcall-mixed-lib.d: Likewise.
+	* ld-arm/ifunc-10.dd: Likewise.
+	* ld-arm/ifunc-14.dd: Likewise.
+	* ld-arm/ifunc-15.dd: Likewise.
+	* ld-arm/ifunc-3.dd: Likewise.
+	* ld-arm/ifunc-4.dd: Likewise.
+	* ld-arm/ifunc-9.dd: Likewise.
+	* ld-arm/long-plt-format.d: Likewise.
+	* ld-arm/mixed-app-v5.d: Likewise.
+	* ld-arm/mixed-app.d: Likewise.
+	* ld-arm/mixed-lib.d: Likewise.
+	* ld-arm/tls-lib-loc.d: Likewise.
+	* ld-cris/dso-pltdis1.d: Likewise.
+	* ld-cris/dso-pltdis2.d: Likewise.
+	* ld-cris/dso12-pltdis.d: Likewise.
+	* ld-elf/symbolic-func.r: Likewise.
+	* ld-frv/fdpic-pie-1.d: Likewise.
+	* ld-frv/fdpic-pie-2.d: Likewise.
+	* ld-frv/fdpic-pie-6.d: Likewise.
+	* ld-frv/fdpic-pie-7.d: Likewise.
+	* ld-frv/fdpic-pie-8.d: Likewise.
+	* ld-frv/fdpic-shared-1.d: Likewise.
+	* ld-frv/fdpic-shared-2.d: Likewise.
+	* ld-frv/fdpic-shared-3.d: Likewise.
+	* ld-frv/fdpic-shared-4.d: Likewise.
+	* ld-frv/fdpic-shared-5.d: Likewise.
+	* ld-frv/fdpic-shared-6.d: Likewise.
+	* ld-frv/fdpic-shared-7.d: Likewise.
+	* ld-frv/fdpic-shared-8.d: Likewise.
+	* ld-frv/fdpic-shared-local-2.d: Likewise.
+	* ld-frv/fdpic-shared-local-8.d: Likewise.
+	* ld-frv/fdpic-static-1.d: Likewise.
+	* ld-frv/fdpic-static-2.d: Likewise.
+	* ld-frv/fdpic-static-6.d: Likewise.
+	* ld-frv/fdpic-static-7.d: Likewise.
+	* ld-frv/fdpic-static-8.d: Likewise.
+	* ld-frv/tls-dynamic-2.d: Likewise.
+	* ld-frv/tls-initial-shared-2.d: Likewise.
+	* ld-frv/tls-relax-shared-2.d: Likewise.
+	* ld-frv/tls-shared-2.d: Likewise.
+	* ld-i386/plt-nacl.pd: Likewise.
+	* ld-i386/plt-pic-nacl.pd: Likewise.
+	* ld-i386/plt-pic.pd: Likewise.
+	* ld-i386/plt.pd: Likewise.
+	* ld-i386/pr19636-1d-nacl.d: Likewise.
+	* ld-i386/pr19636-1d.d: Likewise.
+	* ld-i386/pr19636-2c-nacl.d: Likewise.
+	* ld-i386/pr19636-2c.d: Likewise.
+	* ld-ifunc/ifunc-21-x86-64.d: Likewise.
+	* ld-ifunc/ifunc-22-x86-64.d: Likewise.
+	* ld-ifunc/pr17154-i386.d: Likewise.
+	* ld-ifunc/pr17154-x86-64.d: Likewise.
+	* ld-m68k/plt1-68020.d: Likewise.
+	* ld-m68k/plt1-cpu32.d: Likewise.
+	* ld-m68k/plt1-isab.d: Likewise.
+	* ld-m68k/plt1-isac.d: Likewise.
+	* ld-metag/shared.d: Likewise.
+	* ld-metag/stub_pic_app.d: Likewise.
+	* ld-metag/stub_pic_shared.d: Likewise.
+	* ld-metag/stub_shared.d: Likewise.
+	* ld-s390/tlsbin_64.dd: Likewise.
+	* ld-s390/tlspic_64.dd: Likewise.
+	* ld-tic6x/shlib-1.dd: Likewise.
+	* ld-tic6x/shlib-1b.dd: Likewise.
+	* ld-tic6x/shlib-1rb.dd: Likewise.
+	* ld-tic6x/shlib-app-1.dd: Likewise.
+	* ld-tic6x/shlib-app-1b.dd: Likewise.
+	* ld-tic6x/shlib-app-1r.dd: Likewise.
+	* ld-tic6x/shlib-app-1rb.dd: Likewise.
+	* ld-tic6x/shlib-noindex.dd: Likewise.
+	* ld-vax-elf/export-class-data.dd: Likewise.
+	* ld-vax-elf/plt-local-lib.dd: Likewise.
+	* ld-vax-elf/plt-local.dd: Likewise.
+	* ld-x86-64/bnd-ifunc-2.d: Likewise.
+	* ld-x86-64/bnd-plt-1.d: Likewise.
+	* ld-x86-64/gotpcrel1.dd: Likewise.
+	* ld-x86-64/libno-plt-1b.dd: Likewise.
+	* ld-x86-64/load1c-nacl.d: Likewise.
+	* ld-x86-64/load1c.d: Likewise.
+	* ld-x86-64/load1d-nacl.d: Likewise.
+	* ld-x86-64/load1d.d: Likewise.
+	* ld-x86-64/mov1a.d: Likewise.
+	* ld-x86-64/mov1b.d: Likewise.
+	* ld-x86-64/mov1c.d: Likewise.
+	* ld-x86-64/mov1d.d: Likewise.
+	* ld-x86-64/mov2a.d: Likewise.
+	* ld-x86-64/mov2b.d: Likewise.
+	* ld-x86-64/mov2c.d: Likewise.
+	* ld-x86-64/mov2d.d: Likewise.
+	* ld-x86-64/mpx3.dd: Likewise.
+	* ld-x86-64/mpx4.dd: Likewise.
+	* ld-x86-64/no-plt-1a.dd: Likewise.
+	* ld-x86-64/no-plt-1b.dd: Likewise.
+	* ld-x86-64/no-plt-1c.dd: Likewise.
+	* ld-x86-64/no-plt-1e.dd: Likewise.
+	* ld-x86-64/no-plt-1f.dd: Likewise.
+	* ld-x86-64/no-plt-1g.dd: Likewise.
+	* ld-x86-64/plt-main-bnd.dd: Likewise.
+	* ld-x86-64/plt-nacl.pd: Likewise.
+	* ld-x86-64/plt.pd: Likewise.
+	* ld-x86-64/pr18591.d: Likewise.
+	* ld-x86-64/pr19609-1c.d: Likewise.
+	* ld-x86-64/pr19609-1e.d: Likewise.
+	* ld-x86-64/pr19609-1j.d: Likewise.
+	* ld-x86-64/pr19609-1l.d: Likewise.
+	* ld-x86-64/pr19609-1m.d: Likewise.
+	* ld-x86-64/pr19609-5b.d: Likewise.
+	* ld-x86-64/pr19609-5c.d: Likewise.
+	* ld-x86-64/pr19609-5e.d: Likewise.
+	* ld-x86-64/pr19609-6b.d: Likewise.
+	* ld-x86-64/pr19609-7b.d: Likewise.
+	* ld-x86-64/pr19609-7d.d: Likewise.
+	* ld-x86-64/pr19636-2d.d: Likewise.
+	* ld-x86-64/pr20093-1.d: Likewise.
+	* ld-x86-64/pr20093-2.d: Likewise.
+	* ld-x86-64/pr20253-1b.d: Likewise.
+	* ld-x86-64/pr20253-1d.d: Likewise.
+	* ld-x86-64/pr20253-1f.d: Likewise.
+	* ld-x86-64/pr20253-1h.d: Likewise.
+	* ld-x86-64/pr20253-1j.d: Likewise.
+	* ld-x86-64/pr20253-1l.d: Likewise.
+	* ld-x86-64/protected3.d: Likewise.
+	* ld-x86-64/tlsbin.dd: Likewise.
+	* ld-x86-64/tlsbin2.dd: Likewise.
+	* ld-x86-64/tlsbindesc.dd: Likewise.
+	* ld-x86-64/tlsdesc-nacl.pd: Likewise.
+	* ld-x86-64/tlsdesc.dd: Likewise.
+	* ld-x86-64/tlsdesc.pd: Likewise.
+	* ld-x86-64/tlsgd10.dd: Likewise.
+	* ld-x86-64/tlsgd5.dd: Likewise.
+	* ld-x86-64/tlsgd6.dd: Likewise.
+	* ld-x86-64/tlsgd8.dd: Likewise.
+	* ld-x86-64/tlsgdesc.dd: Likewise.
+	* ld-x86-64/tlspic.dd: Likewise.
+	* ld-x86-64/tlspic2.dd: Likewise.
+
+2016-10-11  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20535
+	* emultempl/elf32.em (_search_needed): Add support for pseudo
+	environment variables supported by ld.so.  Namely $ORIGIN, $LIB
+	and $PLATFORM.
+	* configure.ac: Add getauxval to list AC_CHECK_FUNCS list.
+	* config.in: Regenerate.
+	* configure: Regenerate.
+
+2016-10-11  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c (lang_do_assignments_1): Descend into output section
+	statements that do not yet have bfd sections.  Set symbol section
+	temporarily for symbols defined in such statements to the undefined
+	section.  Don't error on data or reloc statements until final phase.
+	* ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section
+	in expld.section.
+	* testsuite/ld-mmix/bpo-10.d: Adjust.
+	* testsuite/ld-mmix/bpo-11.d: Adjust.
+
+2016-10-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* emulparams/elf64_s390.sh: Move binary start to 16M.
+	* testsuite/ld-s390/tlsbin_64.dd: Adjust testcases accordingly.
+	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
+
+2016-10-07  Alan Modra  <amodra@gmail.com>
+
+	* ldexp.c (MAX): Define.
+	(exp_unop, exp_binop, exp_trinop): Alloc at least enough for
+	etree_type.value.
+
+2016-10-07  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/lib/ld-lib.exp (is_generic_elf): New, extracted from..
+	* testsuite/ld-elf/elf.exp: ..here.
+
+2016-10-06  Ludovic Courtès  <ludo@gnu.org>
+
+	* emulparams/elf32bmipn32-defs.sh: Shift quote of
+	"x$EMULATION_NAME" to the left to work around
+	<http://ftp.gnu.org/gnu/bash/bash-4.2-patches/bash42-007>.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* lexsup.c: Spell fall through comments consistently and add
+	missing fall through comments.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning
+	by adding return.
+
+2016-10-04  Alan Modra  <amodra@gmail.com>
+
+	* ld.texinfo (Expression Section): Update result of arithmetic
+	expressions.
+	* ldexp.c (arith_result_section): New function.
+	(fold_binary): Use it.
+
+2016-10-04  Alan Modra  <amodra@gmail.com>
+
+	* ldexp.c (exp_value_fold): New function.
+	(exp_unop, exp_binop, exp_trinop): Use it.
+
+2016-09-30  Alan Modra  <amodra@gmail.com>
+
+	* scripttempl/v850.sc: Don't reference __ctbp, __ep, __gp when
+	not relocating.
+	* scripttempl/v850_rh850.sc: Likewise.
+
+2016-09-30  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20528
+	* testsuite/ld-elf/pr20528a.d: xfail generic elf targets.  Allow
+	multiple .text sections for hppa-linux.
+	* testsuite/ld-elf/pr20528b.d: Likewise.
+
+2016-09-30  Alan Modra  <amodra@gmail.com>
+
+	* ldmain.c (default_bfd_error_handler): New function pointer.
+	(ld_bfd_error_handler): New function.
+	(main): Arrange to call it on bfd errors/warnings.
+	(ld_bfd_assert_handler): Enable tail call.
+
+2016-09-30  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c (ignore_bfd_errors): Update params.
+
+2016-09-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20528
+	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
+	merge 2 sections with different SHF_EXCLUDE.
+	* testsuite/ld-elf/pr20528a.d: New file.
+	* testsuite/ld-elf/pr20528a.s: Likewise.
+	* testsuite/ld-elf/pr20528b.d: Likewise.
+	* testsuite/ld-elf/pr20528b.s: Likewise.
+
+2016-09-28  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR ld/20608
+	* testsuite/ld-arm/arm-elf.exp: Handle new testcase.
+	* testsuite/ld-arm/farcall-mixed-app2.d: New file.
+	* testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
+	* testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
+	* testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
+
+2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
+
+	* Makefile.in: Regenerate.
+	* configure: Likewise.
+
+2016-09-26  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-powerpc/attr-gnu-4-4.s: Delete.
+	* testsuite/ld-powerpc/attr-gnu-4-14.d: Delete.
+	* testsuite/ld-powerpc/attr-gnu-4-24.d: Delete.
+	* testsuite/ld-powerpc/attr-gnu-4-34.d: Delete.
+	* testsuite/ld-powerpc/attr-gnu-4-41.d: Delete.
+	* testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning.
+	* testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output.
+	* testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise.
+	* testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise.
+	* testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.
+
+2016-09-23  Akihiko Odaki  <akihiko.odaki.4i@stu.hosei.ac.jp>
+
+	PR ld/20595
+	* testsuite/ld-arm/unwind-4.d: Add -q option to linker command
+	line and -r option to objdump command line.  Match emitted relocs
+	to make sure that superflous relocs are not generated.
+
+2016-09-23  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* emulparams/elf64_s390.sh: Change TEXT_START_ADDR to 256MB.
+	* testsuite/ld-s390/tlsbin_64.dd: Adjust testcase accordingly.
+	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
+
+2016-09-22  Nick Clifton  <nickc@redhat.com>
+
+	* emultempl/elf32.em (_try_needed): In verbose mode, report failed
+	attempts to find a needed library.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* testsuite/ld-aarch64/emit-relocs-28.d: Expect spaces after ","
+	in addresses.
+	* testsuite/ld-aarch64/emit-relocs-301-be.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-301.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-302-be.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-302.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-310-be.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-310.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-313.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-515-be.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-515.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-516-be.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-516.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-531.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-532.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-533.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-535.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-536.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-537.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-538.d: Likewise.
+	* testsuite/ld-aarch64/erratum835769.d: Likewise.
+	* testsuite/ld-aarch64/erratum843419.d: Likewise.
+	* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
+	* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
+	* testsuite/ld-aarch64/gc-plt-relocs.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-21.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-7c.d: Likewise.
+	* testsuite/ld-aarch64/tls-desc-ie.d: Likewise.
+	* testsuite/ld-aarch64/tls-large-desc-be.d: Likewise.
+	* testsuite/ld-aarch64/tls-large-desc.d: Likewise.
+	* testsuite/ld-aarch64/tls-large-ie-be.d: Likewise.
+	* testsuite/ld-aarch64/tls-large-ie.d: Likewise.
+	* testsuite/ld-aarch64/tls-relax-all.d: Likewise.
+	* testsuite/ld-aarch64/tls-relax-gd-ie.d: Likewise.
+	* testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d: Likewise.
+	* testsuite/ld-aarch64/tls-relax-gdesc-ie.d: Likewise.
+	* testsuite/ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise.
+	* testsuite/ld-aarch64/tls-relax-large-desc-ie.d: Likewise.
+	* testsuite/ld-aarch64/tls-tiny-desc.d: Likewise.
+	* testsuite/ld-aarch64/tls-tiny-gd.d: Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* testsuite/ld-aarch64/emit-relocs-280.d: Match branch comments.
+	* testsuite/ld-aarch64/weak-undefined.d: Likewise.
+
+2016-09-20  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* ld.texinfo (Input Section Basics): Expand the description of
+	EXCLUDE_FILE.
+
+2016-09-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security
+	Extensions entry functions in absolute section.
+	* testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
+
+2016-09-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/ld-arc/tls-dtpoff.dd: New file.
+	* testsuite/ld-arc/tls-dtpoff.rd: Likewise.
+	* testsuite/ld-arc/tls-dtpoff.s: Likewise.
+	* testsuite/ld-arc/tls-relocs.ld: Likewise.
+	* testsuite/ld-arc/arc.exp: Add new tdpoff test.
+
+2016-09-14  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20537
+	* emultempl/elf32.em: More OPTION_xxx values into an enum.  Add
+	OPTION_NO_EH_FRAME_HDR.
+	(_add_options): Add support for --no-eh-frame-hdr.
+	* ld.texinfo: Document new option.
+	* lexsup.c (elf_shlib_list_options): List new option.
+	* NEWS: Mention the new option.
+
+2016-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20550
+	* testsuite/ld-x86-64/pr20550a.s: New file.
+	* testsuite/ld-x86-64/pr20550b.s: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp (x86_64tests): Add tests for
+	PR ld/20550.
+
+2016-09-06  Nick Clifton  <nickc@redhat.com>
+
+	* Makefile.am (CFLAGS_FOR_TARGET): Define as a copy of CFLAGS but
+	without any sanitization options.
+	(CXXFLAGS_FOR_TARGET): Define as a copy of CXXFLAGS but	without
+	any sanitization options.
+	(check-DEJAGNU): Pass CFLAGS_FOR_TARGET and CXXFLAGS_FOR_TARGET
+	as CFLAGS and CXXFLAGS respectively.
+
+2016-09-02  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20545
+	* testsuite/ld-avr/avr-prop-7.d: New test.
+	* testsuite/ld-avr/avr-prop-7.s: New test.
+	* testsuite/ld-avr/avr-prop-8.d: New test.
+	* testsuite/ld-avr/avr-prop-8.s: New test.
+
+2016-09-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/pr20513c.d: Limit to *-*-linux* and *-*-gnu*
+	targets.
+	* testsuite/ld-elf/pr20513d.d: Likewise.
+
+2016-09-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20513
+	* testsuite/ld-elf/pr20513a.d: New file.
+	* testsuite/ld-elf/pr20513a.s: Likewise.
+	* testsuite/ld-elf/pr20513b.d: Likewise.
+	* testsuite/ld-elf/pr20513b.s: Likewise.
+	* testsuite/ld-elf/pr20513c.d: Likewise.
+	* testsuite/ld-elf/pr20513d.d: Likewise.
+	* testsuite/ld-elf/pr20513e.d: Likewise.
+	* testsuite/ld-elf/pr20513f.d: Likewise.
+
+2016-08-31  Alan Modra  <amodra@gmail.com>
+
+	PR 20513
+	* ldlang.c (section_already_linked): Deal with SHF_EXCLUDE sections.
+
+2016-08-31  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-powerpc/vle-multiseg-1.d: Adjust to suit segment change.
+	* testsuite/ld-powerpc/vle-multiseg-2.d: Likewise.
+	* testsuite/ld-powerpc/vle-multiseg-3.d: Likewise.
+	* testsuite/ld-powerpc/vle-multiseg-6.d: Likewise.
+	* testsuite/ld-powerpc/vle-reloc-2.d: Likewise.
+
+2016-08-30  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/ld-arc/tls_gs-01.d: Set to XFAIL on arc*-*-elf*.
+	* testsuite/ld-arc/tls_ie-01.d: Likewise.
+
+2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/19784 tests only
+	if ifunc attribute works.
+
+2016-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/14961
+	PR ld/20515
+	* testsuite/ld-i386/i386.exp: Run pr20515.
+	* testsuite/ld-i386/pr20515.d: New file.
+	* testsuite/ld-i386/pr20515.s: Likewise.
+	* testsuite/ld-ifunc/ifunc-14a.s: Use R_386_PLT32 to call IFUNC
+	function.
+	* testsuite/ld-ifunc/ifunc-14c.s: Likewise.
+	* testsuite/ld-ifunc/ifunc-2-i386.s: Likewise.
+	* testsuite/ld-ifunc/ifunc-2-local-i386.s: Likewise.
+	* testsuite/ld-ifunc/ifunc.exp: Move PR ld/19784 tests to ...
+	* testsuite/ld-x86-64/x86-64.exp: Here.
+	* testsuite/ld-ifunc/pr19784a.c: Moved to ...
+	* testsuite/ld-x86-64/pr19784a.c: Here.
+	* testsuite/ld-ifunc/pr19784b.c: Moved to ...
+	* testsuite/ld-x86-64/pr19784b.c: Here.
+	* testsuite/ld-ifunc/pr19784c.c: Moved to ...
+	* testsuite/ld-x86-64/pr19784c.c: Here.
+
+2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* emultempl/armelf.em (params): New static variable.
+	(thumb_entry_symbol, byteswap_code, target1_is_rel, target2_type,
+	fix_v4bx, use_blx, vfp11_denorm_fix, stm32l4xx_fix, fix_cortex_a8,
+	no_enum_size_warning, no_wchar_size_warning, pic_veneer,
+	merge_exidx_entries, fix_arm1176, cmse_implib): move as part of the
+	above new structure.
+	(arm_elf_before_allocation): Access static variable from the params
+	structure.
+	(gld${EMULATION_NAME}_finish): Likewise.
+	(arm_elf_create_output_section_statements): Likewise and pass the
+	address of that structure to bfd_elf32_arm_set_target_relocs instead
+	of the static variables.
+	(PARSE_AND_LIST_ARGS_CASES): Access static variable from the params
+	structure.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* ld/testsuite/ld-arc/tls_gd-01.s: Added a testcase for this patch.
+	* ld/testsuite/ld-arc/tls_gd-01.d: Likewise.
+
+2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/ld-arc/tls_ie-01.s: Added to verify associated fix.
+	* testsuite/ld-arc/tls_ie-01.d: Likewise
+
+2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* emultempl/armelf.em (in_implib_filename): Declare and initialize new
+	variable.
+	(arm_elf_create_output_section_statements): Open import input library
+	file for writing and pass resulting in_implib_bfd to
+	bfd_elf32_arm_set_target_relocs.
+	(PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option.
+	(PARSE_AND_LIST_LONGOPTS): Define --in-implib option.
+	(PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option.
+	(PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case.
+	* ld.texinfo (--cmse-implib): Update to mention --in-implib.
+	(--in-implib): Document new option.
+	* NEWS: Likewise.
+	* testsuite/ld-arm/arm-elf.exp
+	(Secure gateway import library generation): add --defsym VER=1 to gas
+	CLI.
+	(Secure gateway import library generation: errors): Likewise.
+	(Input secure gateway import library): New test.
+	(Input secure gateway import library: no output import library):
+	Likewise.
+	(Input secure gateway import library: not an SG input import library):
+	Likewise.
+	(Input secure gateway import library: earlier stub section base):
+	Likewise.
+	(Input secure gateway import library: later stub section base):
+	Likewise.
+	(Input secure gateway import library: veneer comeback): Likewise.
+	(Input secure gateway import library: entry function change):
+	Likewise.
+	* testsuite/ld-arm/cmse-implib.s: Add input import library testing.
+	* testsuite/ld-arm/cmse-implib.rd: Update accordingly.
+	* testsuite/ld-arm/cmse-new-implib.out: New file.
+	* testsuite/ld-arm/cmse-new-implib.rd: Likewise.
+	* testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise.
+	* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise.
+	* testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise.
+	* testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise.
+	* testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
+
+2016-08-25  Alan Modra  <amodra@gmail.com>
+
+	* configure.tgt (powerpc*-*-linux* et al): Rewrite, adding LE
+	support for BE.  First output all target endian configury
+	values, then opposite endian.  Handle more tooldirs.  Fix
+	bogus matches with strings in MANUF-OS part of target triple.
+
+2016-08-23  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/lib/ld-lib.exp (run_cc_link_tests): Don't fail tests
+	twice.
+
+2016-08-19  Nick Clifton  <nickc@redhat.com>
+
+	* emultempl/aarch64elf.em (before_parse): Initialise the relro
+	field in the link_info structure.
+	* emultempl/armelf.em (before_parse): Likewise.
+	* emultempl/linux.em (before_parse): Likewise.
+	* emultempl/scoreelf.em (before_parse): Likewise.
+
+	* testsuite/ld-alpha/tlsbin.rd: Adjust expected ordering of sections.
+	* testsuite/ld-alpha/tlsbinr.rd: Likewise.
+	* testsuite/ld-alpha/tlspic.rd: Likewise.
+	* testsuite/ld-cris/libdso-2.d: Likewise.
+	* testsuite/ld-i386/nogot1.d: Likewise.
+	* testsuite/ld-i386/pr12718.d: Likewise.
+	* testsuite/ld-i386/pr12921.d: Likewise.
+	* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsbin.rd: Likewise.
+	* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsbin2.rd: Likewise.
+	* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsbindesc.rd: Likewise.
+	* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsdesc.rd: Likewise.
+	* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsgdesc.rd: Likewise.
+	* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsnopic.rd: Likewise.
+	* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlspic.rd: Likewise.
+	* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlspic2.rd: Likewise.
+	* testsuite/ld-ia64/tlsbin.rd: Likewise.
+	* testsuite/ld-ia64/tlspic.rd: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-10.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-50.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-60.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-70.d: Likewise.
+	* testsuite/ld-mmix/bspec1.d: Likewise.
+	* testsuite/ld-mmix/bspec2.d: Likewise.
+	* testsuite/ld-mmix/local1.d: Likewise.
+	* testsuite/ld-mmix/local3.d: Likewise.
+	* testsuite/ld-mmix/local5.d: Likewise.
+	* testsuite/ld-mmix/local7.d: Likewise.
+	* testsuite/ld-mmix/undef-3.d: Likewise.
+	* testsuite/ld-powerpc/tlsexe.r: Likewise.
+	* testsuite/ld-powerpc/tlsexe32.r: Likewise.
+	* testsuite/ld-powerpc/tlsexetoc.r: Likewise.
+	* testsuite/ld-powerpc/tlsso.r: Likewise.
+	* testsuite/ld-powerpc/tlsso32.r: Likewise.
+	* testsuite/ld-powerpc/tlstocso.r: Likewise.
+	* testsuite/ld-s390/tlsbin.rd: Likewise.
+	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
+	* testsuite/ld-s390/tlspic.rd: Likewise.
+	* testsuite/ld-s390/tlspic_64.rd: Likewise.
+	* testsuite/ld-sh/sh64/crange1.rd: Likewise.
+	* testsuite/ld-sh/sh64/crange2.rd: Likewise.
+	* testsuite/ld-sh/sh64/crange3-cmpct.rd: Likewise.
+	* testsuite/ld-sh/sh64/crange3-media.rd: Likewise.
+	* testsuite/ld-sh/sh64/crange3.rd: Likewise.
+	* testsuite/ld-sh/sh64/crangerel1.rd: Likewise.
+	* testsuite/ld-sh/sh64/crangerel2.rd: Likewise.
+	* testsuite/ld-sh/tlsbin-2.d: Likewise.
+	* testsuite/ld-sh/tlspic-2.d: Likewise.
+	* testsuite/ld-sparc/gotop32.rd: Likewise.
+	* testsuite/ld-sparc/gotop64.rd: Likewise.
+	* testsuite/ld-sparc/tlssunbin32.rd: Likewise.
+	* testsuite/ld-sparc/tlssunbin64.rd: Likewise.
+	* testsuite/ld-sparc/tlssunnopic32.rd: Likewise.
+	* testsuite/ld-sparc/tlssunnopic64.rd: Likewise.
+	* testsuite/ld-sparc/tlssunpic32.rd: Likewise.
+	* testsuite/ld-sparc/tlssunpic64.rd: Likewise.
+	* testsuite/ld-tic6x/common.d: Likewise.
+	* testsuite/ld-tic6x/shlib-1.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
+	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
+	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
+	* testsuite/ld-x86-64/nogot1.d: Likewise.
+	* testsuite/ld-x86-64/pr12718.d: Likewise.
+	* testsuite/ld-x86-64/pr12921.d: Likewise.
+	* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/split-by-file.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic2.rd: Likewise.
+	* testsuite/ld-xtensa/tlsbin.rd: Likewise.
+	* testsuite/ld-xtensa/tlspic.rd: Likewise.
+
+2016-08-18  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-undefined/weak-undef.exp: Use unsupported not
+	unresolved.
+
+2016-08-12  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-tic6x/shlib-1.rd: Correct expected .dynsym sh_info.
+	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
+
+2016-08-12  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-undefined/weak-fundef.s: New.
+	* testsuite/ld-undefined/weak-undef.t: Don't specify filename.
+	* testsuite/ld-undefined/weak-undef.exp: Run new tests.  Rearrange
+	much of old code.  Use is_elf_format to select targets.
+
+2016-08-11  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20436
+	* testsuite/lib/ld-lib.exp (at_least_gcc_version): Don't ignore
+	remote_exec status.
+	(check_gcc_plugin_enabled): Likewise.  Revert previous patch.
+
+2016-08-11  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20436
+	* testsuite/lib/ld-lib.exp (check_gcc_plugin_enabled): When not
+	testing remotely, check to see if target compiler is installed
+	before trying to run it.
+
+2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
+
+	PR ld/15428
+	* testsuite/ld-mips-elf/mips-elf.exp: Un-KFAIL `__ehdr_start'
+	test 2.
+
+2016-08-10  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.dd: New
+	test.
+	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.nd: New
+	test.
+	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.dd: New test.
+	* testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.nd: New test.
+	* testsuite/ld-mips-elf/pic-and-nonpic-1a-micromips.s: New test
+	source.
+	* testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s: New test
+	source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-08-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20436
+	* testsuite/lib/ld-lib.exp (check_gcc_plugin_enabled): New
+	proc.
+	(check_lto_available): Return 0 if check_gcc_plugin_enabled
+	returns 0.
+	(check_lto_fat_available): Likewise.
+	(check_lto_shared_available): Likewise.
+
+2016-08-09  Roland McGrath  <roland@hack.frob.com>
+
+	* emulparams/armelf.sh (GENERATE_PIE_SCRIPT): Set to yes.
+
+2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* emultempl/armelf.em (cmse_implib): Declare and define this new
+	static variable.
+	(arm_elf_create_output_section_statements): Add new cmse_implib
+	parameter.
+	(OPTION_CMSE_IMPLIB): Define macro.
+	(PARSE_AND_LIST_LONGOPTS): Add entry for new --cmse-implib switch.
+	(PARSE_AND_LIST_OPTIONS): Likewise.
+	(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_CMSE_IMPLIB case.
+	* ld.texinfo (--cmse-implib): Document new option.
+	* testsuite/ld-arm/arm-elf.exp
+	(Secure gateway import library generation): New test.
+	(Secure gateway import library generation: errors): Likewise.
+	* testsuite/ld-arm/cmse-implib.s: New file.
+	* testsuite/ld-arm/cmse-implib-errors.out: Likewise.
+	* testsuite/ld-arm/cmse-implib.rd: Likewise.
+
+2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* ld.texinfo (Placement of SG veneers): New concept entry.
+	* testsuite/ld-arm/arm-elf.exp
+	(Secure gateway veneers: no .gnu.sgstubs section): New test.
+	(Secure gateway veneers: wrong entry functions): Likewise.
+	(Secure gateway veneers (ARMv8-M Baseline)): Likewise.
+	(Secure gateway veneers (ARMv8-M Mainline)): Likewise.
+	* testsuite/ld-arm/cmse-veneers.s: New file.
+	* testsuite/ld-arm/cmse-veneers.d: Likewise.
+	* testsuite/ld-arm/cmse-veneers.rd: Likewise.
+	* testsuite/ld-arm/cmse-veneers.sd: Likewise.
+	* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise.
+	* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
+
+2016-08-02  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/17739
+	* emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Define with
+	valye 'yes'.
+	* emulparams/shelf32.sh: Likewise.
+	* emulparams/shelf32.sh: Likewise.
+	* emulparams/shelf_nto.sh: Likewise.
+	* emulparams/shelf_nto.sh: Likewise.
+	* emulparams/shelf_vxworks.sh: Likewise.
+	* emulparams/shelf_vxworks.sh: Likewise.
+	* emulparams/shlelf32_linux.sh: Likewise.
+	* emulparams/shlelf32_linux.sh: Likewise.
+	* emulparams/shlelf_linux.sh: Likewise.
+	* emulparams/shlelf_linux.sh: Likewise.
+	* emulparams/shlelf_nto.sh: Likewise.
+	* emulparams/shlelf_nto.sh: Likewise.
+
+2016-07-27  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/micromips-branch-absolute.d: Update
+	patterns for branch compaction.
+	* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d:
+	Likewise.
+
+2016-07-27  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-gc/personality.d: Use "target cfi" to restrict the
+	test to targets which support cfi.
+
+2016-07-27  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* ldbuildid.c (generate_build_id): Warning fix.
+
+2016-07-26  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support.
+	* testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise.
+	* testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New
+	test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New
+	test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od:
+	New test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd:
+	New test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od:
+	New test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd:
+	New test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od:
+	New test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd:
+	New test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od:
+	New test.
+	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd:
+	New test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-07-26  Igor Kudrin  <ikudrin@accesssoftek.com>
+
+	* ldbuildid.c: Changes for MinGW32:
+	Include windows.h and rpcdce.h.
+	(validate_build_id_style): Allow "uuid" style.
+	(generate_build_id): Fill in id_bits using UuidCreate().
+
+2016-07-25  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-elf/sec64k.exp: Run test for arc, msp430, or1k
+	and m32r.  Correct comment.  Relax ld -r match to account for
+	msp increased number of default sections.
+
+2016-07-22  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/ld-arc/got-01.d: New file.
+	* testsuite/ld-arc/got-01.s: New file.
+
+2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* configure: Regenerated.
+
+2016-07-21  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Replace
+	"targets_to_xfail" parameter with "args".
+	* testsuite/ld-elf/compress.exp: Remove empty list of xfails on
+	all calls to run_ld_link_exec_tests.
+	* testsuite/ld-elf/dwarf.exp: Likewise.
+	* testsuite/ld-elf/indirect.exp: Likewise.
+	* testsuite/ld-elf/wrap.exp: Likewise.
+	* testsuite/ld-i386/i386.exp: Likewise.
+	* testsuite/ld-i386/no-plt.exp: Likewise.
+	* testsuite/ld-i386/tls.exp: Likewise.
+	* testsuite/ld-ifunc/ifunc.exp: Likewise.
+	* testsuite/ld-pie/pie.exp: Likewise.
+	* testsuite/ld-plugin/lto.exp: Likewise.
+	* testsuite/ld-size/size.exp: Likewise.
+	* testsuite/ld-x86-64/mpx.exp: Likewise.
+	* testsuite/ld-x86-64/no-plt.exp: Likewise.
+	* testsuite/ld-x86-64/tls.exp: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Likewise.
+	* testsuite/ld-elf/elf.exp: Likewise.  Reorder args when providing
+	xfails and simplify lists.
+	* testsuite/ld-elf/shared.exp: Likewise.
+
+2016-07-21  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/lib/ld-lib.exp (run_ld_link_tests): Add optional
+	parameter to pass list of xfails.
+	* testsuite/ld-elf/elf.exp: Add xfails for implib tests.  Tidy
+	implib test formatting.  Don't set .data start address.
+	* testsuite/ld-elf/implib.s: Remove first .bss directive and
+	replace second one with equivalent .section directive.
+	* testsuite/ld-elf/empty-implib.out: Add expected final error.
+	* testsuite/ld-elf/implib.rd: Update.
+
+2016-07-20  Alan Modra  <amodra@gmail.com>
+
+	* ldexp.c (exp_unop, exp_binop, exp_trinop, exp_nameop): Don't
+	fold expression.
+	* testsuite/ld-elf/maxpage3b.d: Expect correct maxpagesize.
+
+2016-07-19  Roland McGrath  <roland@hack.frob.com>
+
+	* emulparams/aarch64elf.sh (GENERATE_PIE_SCRIPT): Set to yes.
+	* emulparams/aarch64elf32.sh: Likewise.
+
+2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/unaligned-branch-2.d: Update error
+	messages expected.
+	* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
+	* testsuite/ld-mips-elf/bal-jalx-addend.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-local.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-pic.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test.
+	* testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-3.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test
+	source.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test
+	source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message
+	expected.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d:
+	Likewise.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d:
+	Likewise.
+	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
+	* testsuite/ld-mips-elf/undefweak-overflow.s: Add jumps,
+	microMIPS BAL and MIPS16 instructions.
+	* testsuite/ld-mips-elf/undefweak-overflow.d: Update
+	accordingly.
+	* testsuite/ld-mips-elf/unaligned-branch-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: New test.
+	* testsuite/ld-mips-elf/unaligned-branch-r6-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-branch-mips16.d: New test.
+	* testsuite/ld-mips-elf/unaligned-branch-micromips.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jump-mips16.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jump-micromips.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jump.d: New test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-07-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* plugin.c (plugin_call_claim_file): Restore the file offset after
+	an unsuccessful attempt to claim a file.
+	* testplug.c (bytes_to_read_before_claim): New global.
+	(record_read_length): New function, sets new global
+	bytes_to_read_before_claim.
+	(parse_option): Handle 'read:<NUMBER>' option.
+	(onclaim_file): Read file content before checking for claim.
+	* testsuite/ld-plugin/plugin-30.d: New file.
+	* testsuite/ld-plugin/plugin.exp: Add new test.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* plugin.c: Don't include libbfd.h.  Include plugin-api.h
+	before bfd/plugin.h.
+	(plugin_object_p): Use bfd_plugin_open_input.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c (open_output): Replace bfd_search_for_target with
+	bfd_iterate_over_targets.  Localize vars.
+
+2016-07-16  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c: Don't include libbfd.h.
+	* emultempl/nds32elf.em: Likewise.
+	* emultempl/ppc64elf.em: Likewise.
+	* emultempl/ppc32elf.em: Likewise.
+	(pagesize): Delete.
+	(params): Update init.
+	(ppc_after_open_output): Use params.pagesize.  Don't call bfd_log2.
+	(PARSE_AND_LIST_ARGS_CASES): Use params.pagesize.
+	* emultempl/sh64elf.em: Don't include libbfd.h.
+	(after_allocation): Use ASSERT, not BFD_ASSERT.
+	* emultempl/xtensaelf.em: Don't include libbfd.h.
+	(replace_insn_sec_with_prop_sec): Use xmalloc, not bfd_malloc.
+	* Makefile.am: Update dependencies.
+	* Makefile.in: Regenerate.
+
+2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+	    Nick Clifton  <nickc@redhat.com>
+
+	* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Open import
+	library file for writing and initialize implib_bfd field of link_info
+	structure.
+	* emultempl/pe.em (pe_implib_filename): Remove variable declaration.
+	(OPTION_IMPLIB_FILENAME): Remove macro definition.
+	(gld${EMULATION_NAME}_add_options): Remove --out-implib option.
+	(gld_${EMULATION_NAME}_list_options): Likewise.
+	(gld${EMULATION_NAME}_handle_option): Likewise.
+	(gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename
+	instead of pe_implib_filename.
+	* emultempl/pep.em (pep_implib_filename): Remove variable declaration.
+	(OPTION_IMPLIB_FILENAME): Remove enumerator.
+	(gld${EMULATION_NAME}_add_options): Remove --out-implib option.
+	(gld_${EMULATION_NAME}_list_options): Likewise.
+	(gld${EMULATION_NAME}_handle_option): Likewise.
+	(gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename
+	instead of pep_implib_filename.
+	* ld.h (args_type): Declare new out_implib_filename field.
+	* ld.texinfo (--out-implib): Move documentation to arch-independent
+	part and rephrase to apply to ELF targets.
+	* ldexp.c (exp_fold_tree_1): Set ldscript_def field to 1 for symbols
+	defined in linker scripts.
+	* ldlex.h (enum option_values): Declare new OPTION_OUT_IMPLIB
+	enumerator.
+	* lexsup.c (ld_options): Add entry for new --out-implib switch.
+	(parse_args): Handle OPTION_OUT_IMPLIB case.
+	* testsuite/ld-elf/elf.exp (Generate empty import library): New test.
+	(Generate import library): Likewise.
+	* testsuite/ld-elf/implib.s: Likewise.
+	* testsuite/ld-elf/implib.rd: New file.
+	* testsuite/ld-elf/empty-implib.out: Likewise
+
+2016-07-15  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-arc/arc.exp: Always run the sda-relocs test in
+	little endian mode.
+
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/mips-elf.exp: Run
+	`branch-absolute-addend', `mips16-branch-absolute',
+	`mips16-branch-absolute-addend' and
+	`micromips-branch-absolute-addend'.
+
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/mips16-branch-absolute.d: New test.
+	* testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test.
+	* testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test.
+	* testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New
+	test.
+	* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New
+	test.
+	* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New
+	test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
+	from `mips16-branch-absolute' and
+	`mips16-branch-absolute-addend', referred indirectly only.
+
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/branch-absolute.d: New test.
+	* testsuite/ld-mips-elf/branch-absolute-n32.d: New test.
+	* testsuite/ld-mips-elf/branch-absolute-n64.d: New test.
+	* testsuite/ld-mips-elf/branch-absolute-addend.d: New test.
+	* testsuite/ld-mips-elf/branch-absolute-addend-n32.d: New test.
+	* testsuite/ld-mips-elf/branch-absolute-addend-n64.d: New test.
+	* testsuite/ld-mips-elf/micromips-branch-absolute.d: New test.
+	* testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: New
+	test.
+	* testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: New
+	test.
+	* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: New
+	test.
+	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d:
+	New test.
+	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d:
+	New test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
+	from `branch-absolute-addend' and
+	`micromips-branch-absolute-addend', referred indirectly only.
+
+2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* emulparams/arcelf.sh (SDATA_START_SYMBOLS): Add offset.
+	* testsuite/ld-arc/sda-relocs.dd: New file.
+	* testsuite/ld-arc/sda-relocs.ld: Likewise.
+	* testsuite/ld-arc/sda-relocs.rd: Likewise.
+	* testsuite/ld-arc/sda-relocs.s: Likewise.
+	* testsuite/ld-arc/arc.exp: Add SDA tests.
+
+2016-07-11  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/ld-arc/nps-1b.err: Update test to handle more
+	verbosity.
+
+2016-07-09  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-powerpc/elfv2exe.d: Update.
+
+2016-07-06  James Bowman  <james.bowman@ftdichip.com>
+
+	* scripttempl/ft32.sc (__PMSIZE): Correct __PMSIZE_.
+	(DATA): add ALIGN.
+        (BSS): add ALIGN
+
+2016-07-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-plugin/lto.exp: Add -flto to PR ld/20321 test.
+
+2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
+
+	* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
+	* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
+	* testsuite/ld-arm/arm-elf.exp: Run it.
+
+2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
+
+	* testsuite/ld-arm/arm_noread.ld: Renamed to ...
+	testsuite/ld-arm/arm_purecode.ld: ... this, and replaced
+	all noread's by purecode.
+
+2016-07-05  Jan Beulich  <jbeulich@suse.com>
+
+	* ldexp.c (exp_fold_tree_1): Set linker_def field based on
+	assignment line number.
+	* ldlex.l (lineno): Drop initializer.
+	(<<EOF>>): Set lineno to zero after reaching top of stack.
+
+2016-07-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20321
+	* plugin.c (plugin_opt_plugin): Warn and return if plugin has
+	been loaded already.
+	* testsuite/ld-plugin/lto.exp: Run PR ld/20321 test.
+	* testsuite/ld-plugin/pr20321.c: New file.
+
+2016-07-04  Nick Clifton  <nickc@redhat.com>
+
+	* scripttempl/ft32.sc (__PMSIZE_): If not defined, set to 256K.
+	(__RAMSIZE): If not defined, set to 64K.
+	(MEMORY): Set the flash region size to __PMSIZE and the ram region
+	size to __RAMSIZE.
+
+2016-07-02  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/branch-misc-2.d: New test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run it.
+
+2016-07-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
+	(Thumb-2 BL on ARMv6-M): New testcase.
+	* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
+	* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
+
+2016-07-01  Tristan Gingold  <gingold@adacore.com>
+
+	* NEWS: Add marker for 2.27.
+
+2016-06-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-gc/gc.exp: Run pr20306 test.
+	* ld-gc/pr20306.c: New file.
+	* ld-gc/pr20306.d: Likewise.
+
+2016-06-28  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-elf/comm-data.exp: Expect comm-data2 test to fail
+	for bfin.
+	* testsuite/ld-elf/elf.exp: Expect pr14170 and symbolic function
+	tests to fail for bfin.
+	* testsuite/ld-elf/endsym.d: Expect to fail with cr16, crx, dlx,
+	nds32 and visium.
+	* testsuite/ld-elf/var1.d: Expect to fail with d30v, dlx, ft32 and
+	microblaze.
+	* testsuite/ld-pe/pe.exp: Expect foreign symbol test to fail for
+	mcore-pe.
+
+2016-06-28  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-elf/merge.d: Add m68hc11 to list of targets that
+	expect to fail this test.
+	* testsuite/ld-scripts/overlay-size.d: Skip the entire test for
+	RX.
+	* testsuite/ld-scripts/rgn-at10.d: No longer expect this test to
+	fail for the RX.
+	* testsuite/ld-scripts/rgn-at11.d: Likewise.
+	* testsuite/ld-scripts/rgn-at2.d: Likewise.
+	* testsuite/ld-scripts/rgn-at6.d: Likewise.
+	* testsuite/ld-scripts/rgn-at7.d: Likewise.
+	* testsuite/ld-scripts/rgn-at8.d: Likewise.
+
+2016-06-28  James Clarke  <jrtc27@jrtc27.com>
+
+	* testsuite/ld-elf/symbolic-func.r: Allow non-zero offsets from
+	.text.
+
+2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/attr-gnu-4-10.d: Match any UNIX OS/ABI.
+	* testsuite/ld-mips-elf/attr-gnu-4-50.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-60.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-70.d: Likewise.
+
+2016-06-28  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20302
+	* testsuite/ld-scripts/pr20302.d: Exclude *-*-*aout.
+
+2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/mips16-branch-2.d: New test.
+	* testsuite/ld-mips-elf/mips16-branch-3.d: New test.
+	* testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test.
+	* testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test.
+	* testsuite/ld-mips-elf/mips16-branch.s: New test source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-06-27  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/20302
+	* lexsup.c (set_segment_start): If resetting the start address of
+	a section, remember to generate a new script element as well.
+	* testsuite/ld-scripts/pr20302.d: New test.
+	* testsuite/ld-scripts/scripts.exp: Run the new test.
+
+2016-06-24  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul):
+	Don't error out, always return an emulation.
+
+2016-06-24  Dilyan Palauzov <dilyan.palauzov@aegee.org>
+	    H.J. Lu  <hongjiu.lu@intel.com>
+
+	* lexsup.c (elf_shlib_list_options): Check DEFAULT_LD_Z_RELRO
+	for -z relro help message.
+
+2016-06-22  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/undefweak-overflow.d: Use wildcard
+	address matching.
+
+2016-06-22  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/mips-elf.exp: Uniquely identify
+	`undefweak-overflow' tests.
+
+2016-06-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20283
+	* NEWS: Mention --enable-relro.
+	* configure.ac: Add --enable-relro.
+	(DEFAULT_LD_Z_RELRO): New.  Set by --enable-relro.
+	* configure.tgt (ac_default_ld_z_relro): Default it to 1 for
+	some Linux targets.
+	* config.in: Regenerated.
+	* configure: Likewise.
+	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
+	link_info.relro to DEFAULT_LD_Z_RELRO.
+	* testsuite/config/default.exp (ld_elf_shared_opt): New.
+	* testsuite/lib/ld-lib.exp (run_dump_test): Pass
+	$ld_elf_shared_opt to ld for ELF targets with shared object
+	support.
+	(run_ld_link_tests): Likewise.
+
+2016-06-21  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/mode-change-error-1a.s: Trigger an error
+	twice rather than once.
+	* testsuite/ld-mips-elf/mode-change-error-1.d: Adjust
+	accordingly.  Remove the full stop from the end of the message.
+
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+	* testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400.
+	* testsuite/ld-arc/nps-1b.d: Likewise.
+
+2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20267
+	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
+	PR ld/20267.
+	(lto_run_tests): Likewise.
+	* testsuite/ld-plugin/pr20267a.c: New file.
+	* testsuite/ld-plugin/pr20267b.c: Likewise.
+
+2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+	    Alan Modra  <amodra@gmail.com>
+
+	PR ld/20276
+	* plugin.c (plugin_notice): Set non_ir_ref on common symbols.
+	* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
+	PR ld/20276.
+	(lto_run_tests): Likewise.
+	* testsuite/ld-plugin/pass.out: New file.
+	* testsuite/ld-plugin/pr20276a.c: Likewise.
+	* testsuite/ld-plugin/pr20276b.c: Likewise.
+
+2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* plugin.c (plugin_object_p): Replace bfd_plugin_uknown
+	with bfd_plugin_unknown.
+
+2016-06-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20253
+	* testsuite/ld-i386/i386.exp: Run PR ld/20253 tests.
+	* testsuite/ld-i386/no-plt.exp: Likewise.
+	* testsuite/ld-x86-64/no-plt.exp: Likewise.
+	* testsuite/ld-i386/pr13302.d: Remove .rel.plt section.
+	* testsuite/ld-ifunc/ifunc-13-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-15-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-5a.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-5b.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-6a.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-6b.d: Likewise.
+	* testsuite/ld-i386/pr20244-2a.d: Remove .plt section.
+	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
+	* testsuite/ld-i386/pr20244-2b.d: Updated.
+	* testsuite/ld-i386/pr20244-2c.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
+	* testsuite/ld-i386/pr20253-1a.c: New file.
+	* testsuite/ld-i386/pr20253-1b.S: Likewise.
+	* testsuite/ld-i386/pr20253-1c.S: Likewise.
+	* testsuite/ld-i386/pr20253-1d.S: Likewise.
+	* testsuite/ld-i386/pr20253-2a.c: Likewise.
+	* testsuite/ld-i386/pr20253-2b.S: Likewise.
+	* testsuite/ld-i386/pr20253-2c.S: Likewise.
+	* testsuite/ld-i386/pr20253-2d.S: Likewise.
+	* testsuite/ld-i386/pr20253-3.d: Likewise.
+	* testsuite/ld-i386/pr20253-3.s: Likewise.
+	* testsuite/ld-i386/pr20253-4.s: Likewise.
+	* testsuite/ld-i386/pr20253-4a.d: Likewise.
+	* testsuite/ld-i386/pr20253-4b.d: Likewise.
+	* testsuite/ld-i386/pr20253-4c.d: Likewise.
+	* testsuite/ld-i386/pr20253-5.d: Likewise.
+	* testsuite/ld-i386/pr20253-5.s: Likewise.
+	* testsuite/ld-ifunc/ifunc-23-x86.s: Likewise.
+	* testsuite/ld-ifunc/ifunc-23a-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-23b-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-23c-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-24-x86.s: Likewise.
+	* testsuite/ld-ifunc/ifunc-24a-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-24b-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-24c-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-25-x86.s: Likewise.
+	* testsuite/ld-ifunc/ifunc-25a-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-25b-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1.s: Likewise.
+	* testsuite/ld-x86-64/pr20253-1a.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1b.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1c.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1e.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1f.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1g.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1i.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1j.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1k.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-1l.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-2a.c: Likewise.
+	* testsuite/ld-x86-64/pr20253-2b.S: Likewise.
+	* testsuite/ld-x86-64/pr20253-2c.S: Likewise.
+	* testsuite/ld-x86-64/pr20253-2d.S: Likewise.
+	* testsuite/ld-x86-64/pr20253-3.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-3.s: Likewise.
+	* testsuite/ld-x86-64/pr20253-4.s: Likewise.
+	* testsuite/ld-x86-64/pr20253-4a.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-4b.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-4c.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-4d.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-4e.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-4f.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-5.s: Likewise.
+	* testsuite/ld-x86-64/pr20253-5a.d: Likewise.
+	* testsuite/ld-x86-64/pr20253-5b.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18a-i386.d: Remove extra IRELATIVE
+	relocation.
+	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-18a.s: Fix a typo.
+	* testsuite/ld-x86-64/x86-64.exp: Run pr20253-1 tests.
+
+2016-06-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+	    Tony Wang  <tony.wang@arm.com>
+
+	* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
+	Assemble for ARMv6-M.
+	(Thumb2-Thumb2 farcall M profile): New testcase.
+	* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
+	* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
+	reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
+	* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
+
+2016-06-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.
+	* testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets.
+	Remove .rel.plt section.
+	* testsuite/ld-i386/pr19636-2e-nacl.d: New file.
+
+2016-06-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/no-plt-check1a.S (check): Test static
+	function pointer.
+	* testsuite/ld-i386/no-plt-check1b.S (check): Likewise.
+	* testsuite/ld-x86-64/no-plt-check1.S (check): Likewise.
+	* testsuite/ld-i386/no-plt-extern1a.S (func_p): New.  Static
+	function pointer.
+	* testsuite/ld-i386/no-plt-extern1b.S (func_p): Likewise.
+	* testsuite/ld-x86-64/no-plt-extern1.S (func_p): Likewise.
+	* testsuite/ld-i386/no-plt-1a.dd: Updated.
+	* testsuite/ld-i386/no-plt-1b.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1c.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1d.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1e.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1f.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1g.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1h.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1i.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1j.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
+
+2016-06-14  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20254
+	* testsuite/ld-avr/avr-prop-6.d: New test.
+	* testsuite/ld-avr/avr-prop-6.s: New test.
+
+2016-06-14  Alan Modra  <amodra@gmail.com>
+
+	* ldbuildid.c: Formatting.
+	* ldcref.c: Formatting.
+	* ldctor.c: Formatting.
+	* ldemul.c: Formatting.
+	* ldexp.c: Formatting.
+	* ldfile.c: Formatting.
+	* ldlang.c: Formatting.
+	* ldmain.c: Formatting.
+	* ldwrite.c: Formatting.
+
+2016-06-14  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c: Expand uses of bfd_my_archive.
+	* ldmain.c: Likewise.
+	* ldmisc.c: Likewise.
+	* plugin.c: Likewise.
+
+2016-06-14  Alan Modra  <amodra@gmail.com>
+
+	PR ld/20241
+	* ldmain.c (add_archive_element): Just print file name of file within
+	thin archives.
+	* ldmisc.c (vfinfo): Likewise.
+	* plugin.c (plugin_object_p): Open file within thin archives.
+	(plugin_maybe_claim): Expand comment.
+
+2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20244
+	* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
+	pr20244-2c and pr20244-2d.
+	* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
+	* testsuite/ld-i386/pr20244-2.s: New file.
+	* testsuite/ld-i386/pr20244-2a.d: Likewise.
+	* testsuite/ld-i386/pr20244-2b.d: Likewise.
+	* testsuite/ld-i386/pr20244-2c.d: Likewise.
+	* testsuite/ld-i386/pr20244-2d.d: Likewise.
+	* testsuite/ld-i386/pr20244-3a.c: Likewise.
+	* testsuite/ld-i386/pr20244-3b.S: Likewise.
+	* testsuite/ld-i386/pr20244-3c.S: Likewise.
+	* testsuite/ld-i386/pr20244-3d.S: Likewise.
+
+2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
+	* testsuite/ld-i386/ifunc-1a.c: New file.
+	* testsuite/ld-i386/ifunc-1b.S: Likewise.
+	* testsuite/ld-i386/ifunc-1c.S: Likewise.
+	* testsuite/ld-i386/ifunc-1d.S: Likewise.
+
+2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>
+
+	* testsuite/ld-srec/srec.exp: Changed to XFAIL on both little and
+	big endian ARC targets.
+
+2016-06-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32.
+	* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
+
+2016-06-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20244
+	* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
+	* testsuite/ld-i386/pr20244-1.s: New file.
+	* testsuite/ld-i386/pr20244-1a.d: Likewise.
+	* testsuite/ld-i386/pr20244-1b.d: Likewise.
+	* testsuite/ld-i386/pr20244-1c.d: Likewise.
+
+2016-06-08  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR ld/20221
+	* testsuite/ld-avr/avr-prop-5.d: New.
+	* testsuite/ld-avr/avr-prop-5.s: New.
+
+2016-06-09  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	* testsuite/ld-avr/lds-mega.d: New test.
+	* testsuite/ld-avr/lds-mega.s: New test source.
+	* testsuite/ld-avr/lds-tiny.d: New test.
+	* testsuite/ld-avr/lds-tiny.s: New test source.
+
+2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/libno-plt-1b.dd: New file.
+	* testsuite/ld-i386/libno-plt-1b.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1a.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1a.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1b.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1b.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1c.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1c.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1d.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1d.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1e.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1e.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1f.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1f.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1g.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1g.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1h.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1h.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1i.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1i.rd: Likewise.
+	* testsuite/ld-i386/no-plt-1j.dd: Likewise.
+	* testsuite/ld-i386/no-plt-1j.rd: Likewise.
+	* testsuite/ld-i386/no-plt-check1a.S: Likewise.
+	* testsuite/ld-i386/no-plt-check1b.S: Likewise.
+	* testsuite/ld-i386/no-plt-extern1a.S: Likewise.
+	* testsuite/ld-i386/no-plt-extern1b.S: Likewise.
+	* testsuite/ld-i386/no-plt-func1.c: Likewise.
+	* testsuite/ld-i386/no-plt-main1.c: Likewise.
+	* testsuite/ld-i386/no-plt.exp: Likewise.
+
+2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/tls.exp (run_cc_link_tests): Update test
+	name.
+
+2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
+	tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
+	* testsuite/ld-i386/pass.out: New file.
+	* testsuite/ld-i386/tls-def1.c: Likewise.
+	* testsuite/ld-i386/tls-gd1.S: Likewise.
+	* testsuite/ld-i386/tls-ld1.S: Likewise.
+	* testsuite/ld-i386/tls-main1.c: Likewise.
+	* testsuite/ld-i386/tls.exp: Likewise.
+	* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsbin2.dd: Likewise.
+	* testsuite/ld-i386/tlsbin2.rd: Likewise.
+	* testsuite/ld-i386/tlsbin2.sd: Likewise.
+	* testsuite/ld-i386/tlsbin2.td: Likewise.
+	* testsuite/ld-i386/tlsbinpic2.s: Likewise.
+	* testsuite/ld-i386/tlsgd3.dd: Likewise.
+	* testsuite/ld-i386/tlsgd3.s: Likewise.
+	* testsuite/ld-i386/tlsgd4.d: Likewise.
+	* testsuite/ld-i386/tlsgd4.s: Likewise.
+	* testsuite/ld-i386/tlsld2.s: Likewise.
+	* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlspic2.dd: Likewise.
+	* testsuite/ld-i386/tlspic2.rd: Likewise.
+	* testsuite/ld-i386/tlspic2.sd: Likewise.
+	* testsuite/ld-i386/tlspic2.td: Likewise.
+	* testsuite/ld-i386/tlspic3.s: Likewise.
+	* testsuite/ld-i386/tlspie3.s: Likewise.
+	* testsuite/ld-i386/tlspie3a.d: Likewise.
+	* testsuite/ld-i386/tlspie3b.d: Likewise.
+	* testsuite/ld-i386/tlspie3c.d: Likewise.
+
+2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/no-plt-1a.rd: Support any relocation order.
+	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt.exp: Fix a typo.
+
+2016-06-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/libno-plt-1b.dd: Likewise.
+	* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
+	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
+	* testsuite/ld-x86-64/no-plt-check1.S: Likewise.
+	* testsuite/ld-x86-64/no-plt.exp: Likewise.
+	* testsuite/ld-x86-64/no-plt-extern1.S: Likewise.
+	* testsuite/ld-x86-64/no-plt-func1.c: Likewise.
+	* testsuite/ld-x86-64/no-plt-main1.c: Likewise.
+
+2016-06-07  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail.
+
+2016-06-07  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* testsuite/ld-s390/pltoffset-1.dd: New test.
+	* testsuite/ld-s390/pltoffset-1.ld: New test.
+	* testsuite/ld-s390/pltoffset-1.s: New test.
+	* testsuite/ld-s390/s390.exp: Run new test.
+
+2016-06-07  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
+	* testsuite/ld-powerpc/apuinfo-vle2.s: New.
+	* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
+
+2016-06-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/pass.out: New file.
+	* testsuite/ld-x86-64/tls-def1.c: Likewise.
+	* testsuite/ld-x86-64/tls-gd1.S: Likewise.
+	* testsuite/ld-x86-64/tls-ld1.S: Likewise.
+	* testsuite/ld-x86-64/tls-main1.c: Likewise.
+	* testsuite/ld-x86-64/tls.exp: Likewise.
+	* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
+	* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
+	* testsuite/ld-x86-64/tlsbin2.td: Likewise.
+	* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
+	* testsuite/ld-x86-64/tlsgd10.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
+	* testsuite/ld-x86-64/tlsgd11.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd12.d: Likewise.
+	* testsuite/ld-x86-64/tlsgd12.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd13.d: Likewise.
+	* testsuite/ld-x86-64/tlsgd13.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
+	* testsuite/ld-x86-64/tlsgd14.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
+	* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
+	* testsuite/ld-x86-64/tlsgd9.s: Likewise.
+	* testsuite/ld-x86-64/tlsld4.dd: Likewise.
+	* testsuite/ld-x86-64/tlsld4.s: Likewise.
+	* testsuite/ld-x86-64/tlsld5.dd: Likewise.
+	* testsuite/ld-x86-64/tlsld5.s: Likewise.
+	* testsuite/ld-x86-64/tlsld6.dd: Likewise.
+	* testsuite/ld-x86-64/tlsld6.s: Likewise.
+	* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic2.dd: Likewise.
+	* testsuite/ld-x86-64/tlspic2.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic2.sd: Likewise.
+	* testsuite/ld-x86-64/tlspic2.td: Likewise.
+	* testsuite/ld-x86-64/tlspic3.s: Likewise.
+	* testsuite/ld-x86-64/tlspie2.s: Likewise.
+	* testsuite/ld-x86-64/tlspie2a.d: Likewise.
+	* testsuite/ld-x86-64/tlspie2b.d: Likewise.
+	* testsuite/ld-x86-64/tlspie2c.d: Likewise.
+	* testsuite/ld-x86-64/tlsgd5.dd: Updated.
+	* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
+	tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
+	tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
+	tlspie2c.
+
+2016-06-04  Christian Groessler  <chris@groessler.org>
+
+	* testsuite/ld-z8k/0filler.s: New file.
+	* testsuite/ld-z8k/branch-target.s: New file.
+	* testsuite/ld-z8k/branch-target2.s: New file.
+	* testsuite/ld-z8k/calr-back-8001.d: New file.
+	* testsuite/ld-z8k/calr-back-8002.d: New file.
+	* testsuite/ld-z8k/calr-back-fail-8001.d: New file.
+	* testsuite/ld-z8k/calr-back-fail-8002.d: New file.
+	* testsuite/ld-z8k/calr-forw-8001.d: New file.
+	* testsuite/ld-z8k/calr-forw-8002.d: New file.
+	* testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
+	* testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
+	* testsuite/ld-z8k/calr-opcode.s: New file.
+	* testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
+	* testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
+	* testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
+	* testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
+	* testsuite/ld-z8k/dbjnz-opcode.s: New file.
+	* testsuite/ld-z8k/djnz-back-8001.d: New file.
+	* testsuite/ld-z8k/djnz-back-8002.d: New file.
+	* testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
+	* testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
+	* testsuite/ld-z8k/djnz-forw-8001.d: New file.
+	* testsuite/ld-z8k/djnz-forw-8002.d: New file.
+	* testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
+	* testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
+	* testsuite/ld-z8k/djnz-opcode.s: New file.
+	* testsuite/ld-z8k/filler.s: New file.
+	* testsuite/ld-z8k/jr-back-8001.d: New file.
+	* testsuite/ld-z8k/jr-back-8002.d: New file.
+	* testsuite/ld-z8k/jr-back-fail-8001.d: New file.
+	* testsuite/ld-z8k/jr-back-fail-8002.d: New file.
+	* testsuite/ld-z8k/jr-forw-8001.d: New file.
+	* testsuite/ld-z8k/jr-forw-8002.d: New file.
+	* testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
+	* testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
+	* testsuite/ld-z8k/jr-opcode.s: New file.
+	* testsuite/ld-z8k/ldr-back-8001.d: New file.
+	* testsuite/ld-z8k/ldr-back-8002.d: New file.
+	* testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
+	* testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
+	* testsuite/ld-z8k/ldr-forw-8001.d: New file.
+	* testsuite/ld-z8k/ldr-forw-8002.d: New file.
+	* testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
+	* testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
+	* testsuite/ld-z8k/ldr-opcode.s: New file.
+	* testsuite/ld-z8k/ldrb-forw-8001.d: New file.
+	* testsuite/ld-z8k/ldrb-forw-8002.d: New file.
+	* testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
+	* testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
+	* testsuite/ld-z8k/ldrb-opcode.s: New file.
+	* testsuite/ld-z8k/ldrb-opcode2.s: New file.
+	* testsuite/ld-z8k/other-file.s: New file.
+	* testsuite/ld-z8k/reloc.dd: New file.
+	* testsuite/ld-z8k/reloc.ld: New file.
+	* testsuite/ld-z8k/relocseg.dd: New file.
+	* testsuite/ld-z8k/relocseg.ld: New file.
+	* testsuite/ld-z8k/relocseg1.dd: New file.
+	* testsuite/ld-z8k/this-file.s: New file.
+	* testsuite/ld-z8k/z8k.exp: New file.
+
+2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/i386.exp: Assemble gotpc1.o and pr19319b.o
+	with -mrelax-relocations=yes.
+	* testsuite/ld-i386/lea1a.d (as): Add -mrelax-relocations=yes.
+	* testsuite/ld-i386/lea1b.d (as): Likewise.
+	* testsuite/ld-i386/lea1d.d (as): Likewise.
+	* testsuite/ld-i386/lea1e.d (as): Likewise.
+	* testsuite/ld-i386/lea1f.d (as): Likewise.
+	* testsuite/ld-i386/load7.d (as): Likewise.
+	* testsuite/ld-i386/mov1b.d (as): Likewise.
+	* testsuite/ld-i386/pr19175.d (as): Likewise.
+	* testsuite/ld-ifunc/ifunc-13-i386.d (as): Likewise.
+	* testsuite/ld-ifunc/ifunc-21-i386.d (as): Likewise.
+	* testsuite/ld-ifunc/ifunc-22-i386.d (as): Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Assemble gotpcrel1a.o,
+	gotpcrel1b.o and gotpcrel1c.o with -mrelax-relocations=yes.
+
+2016-06-02  Vineet Gupta  <Vineet.Gupta1@synopsys.com>
+
+	* configure.tgt: Replace -uclibc with *.
+
+2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/unaligned-branch.d: New test.
+	* testsuite/ld-mips-elf/unaligned-branch.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-text.s: New test source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
+
+2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/unaligned-syms.s: Rename to...
+	* testsuite/ld-mips-elf/unaligned-data.s: ... this.
+	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: Adjust accordingly.
+	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise.
+
+2016-05-28  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/jal-global-overflow-0.d: New test.
+	* testsuite/ld-mips-elf/jal-global-overflow-1.d: New test.
+	* testsuite/ld-mips-elf/jal-local-overflow-0.d: New test.
+	* testsuite/ld-mips-elf/jal-local-overflow-1.d: New test.
+	* testsuite/ld-mips-elf/jal-global-overflow.s: New test source.
+	* testsuite/ld-mips-elf/jal-local-overflow.s: New test source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-05-28  Alan Modra  <amodra@gmail.com>
+
+	* ldmain.c (multiple_definition, multiple_common, add_to_set,
+	constructor_callback, warning_callback, undefined_symbol,
+	reloc_overflow, reloc_dangerous, unattached_reloc): Return void.
+	* emultempl/elf32.em: Adjust callback calls.
+
+2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: New
+	test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: New
+	test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: New
+	test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: New
+	test.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-0.s: New test
+	source.
+	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.s: New test
+	source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-05-27  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/reloc-local-overflow.d: New test.
+	* testsuite/ld-mips-elf/reloc-local-overflow.s: Source for the
+	new test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
+
+2016-05-26  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/unaligned-jalx-0.d: Fold
+	`unaligned-jalx-2' here.
+	* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: Fold
+	`unaligned-jalx-mips16-2' here.
+	* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: Fold
+	`unaligned-jalx-micromips-2' here.
+	* testsuite/ld-mips-elf/unaligned-jalx-0.s: Update accordingly.
+	* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error
+	message.
+	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
+	* testsuite/ld-mips-elf/unaligned-jalx-2.d: Remove test.
+	* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: Remove test.
+	* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: Remove
+	test.
+	* testsuite/ld-mips-elf/unaligned-jalx-2.s: Remove test source.
+	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: Fold
+	`unaligned-lwpc-3' here.
+	* testsuite/ld-mips-elf/unaligned-lwpc-0.s: Update accordingly.
+	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Fold
+	`unaligned-lwpc-2' here.
+	* testsuite/ld-mips-elf/unaligned-lwpc-1.s: Update accordingly.
+	* testsuite/ld-mips-elf/unaligned-lwpc-2.d: Remove test.
+	* testsuite/ld-mips-elf/unaligned-lwpc-2.s: Remove test source.
+	* testsuite/ld-mips-elf/unaligned-lwpc-3.d: Remove test.
+	* testsuite/ld-mips-elf/unaligned-lwpc-3.s: Remove test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: Fold
+	`unaligned-ldpc-4' here.
+	* testsuite/ld-mips-elf/unaligned-ldpc-0.s: Update accordingly.
+	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Update error
+	message.  Fold `unaligned-ldpc-2' and `unaligned-ldpc-3' here.
+	* testsuite/ld-mips-elf/unaligned-ldpc-1.s: Update accordingly.
+	* testsuite/ld-mips-elf/unaligned-ldpc-2.d: Remove test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-2.s: Remove test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-3.d: Remove test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-3.s: Remove test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-4.d: Remove test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-4.s: Remove test source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Delete removed tests.
+
+2016-05-26  Nick Clifton  <nickc@redhat.com>
+
+	PR target/20134
+	* scripttempl/elf32msp430.sc (.bss): Provide __bssstart and
+	__bsssize.
+	* scripttempl/elf32msp430_3.sc (.bss): Likewise.
+
+2016-05-25  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/unaligned-jalx-0.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-1.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-lwpc-0.d: New test.
+	* testsuite/ld-mips-elf/unaligned-lwpc-1.d: New test.
+	* testsuite/ld-mips-elf/unaligned-lwpc-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-lwpc-3.d: New test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-0.d: New test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-1.d: New test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-2.d: New test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-3.d: New test.
+	* testsuite/ld-mips-elf/unaligned-ldpc-4.d: New test.
+	* testsuite/ld-mips-elf/unaligned-jalx-0.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-jalx-1.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-insn.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-lwpc-0.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-lwpc-1.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-lwpc-2.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-lwpc-3.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-0.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-1.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-2.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-3.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-ldpc-4.s: New test source.
+	* testsuite/ld-mips-elf/unaligned-syms.s: New test source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20103
+	* ldmain.c (add_archive_element): Don't claim new IR symbols
+	after all IR symbols have been claimed.
+	* plugin.c (plugin_call_claim_file): Remove no_more_claiming
+	check.
+	* testsuite/ld-plugin/lto.exp (pr20103): New proc.
+	Run PR ld/20103 tests.
+	* testsuite/ld-plugin/pr20103a.c: New file.
+	* testsuite/ld-plugin/pr20103b.c: Likewise.
+	* testsuite/ld-plugin/pr20103c.c: Likewise.
+
+2016-05-24  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/jalx-local.d: New test.
+	* testsuite/ld-mips-elf/jalx-local-n32.d: New test.
+	* testsuite/ld-mips-elf/jalx-local-n64.d: New test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-05-23  Kuba Sejdak  <jakub.sejdak@phoesys.com>
+
+	* Makefile.am: Add earmelf_phoenix.c.
+	* Makefile.in: Regenerate.
+	* configure.tgt: Add entry for arm-phoenix.
+	* emulparams/armelf_phoenix.sh: New file.
+
+2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* emultempl/armelf.em (arm_elf_before_allocation): Call
+	bfd_elf32_arm_keep_private_stub_output_sections before generic
+	before_allocation function.
+
+2016-05-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/jalx-addend.d: New test.
+	* testsuite/ld-mips-elf/jalx-addend-n32.d: New test.
+	* testsuite/ld-mips-elf/jalx-addend-n64.d: New test.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-05-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20117
+	* testsuite/ld-i386/i386.exp: Run pr20117.
+	* testsuite/ld-i386/pr19609-1i.d: Updated.
+	* testsuite/ld-i386/pr20117.d: New file.
+	* testsuite/ld-i386/pr20117.s: Likewise.
+
+2016-05-19  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/ld-elf/compressed1d.d: Removed from notarget.
+	* testsuite/ld-elf/group8a.d: Likewise.
+	* testsuite/ld-elf/group8b.d: Likewise.
+	* testsuite/ld-elf/group9a.d: Likewise.
+	* testsuite/ld-elf/group9b.d: Likewise.
+	* testsuite/ld-elf/pr12851.d: Likewise.
+	* testsuite/ld-elf/pr12975.d: Likewise.
+	* testsuite/ld-elf/pr13177.d: Likewise.
+	* testsuite/ld-elf/pr13195.d: Likewise.
+	* testsuite/ld-elf/pr17615.d: Likewise.
+	* testsuite/ld-elf/eh-frame-hdr.d: Removed from xfail.
+	* testsuite/ld-elf/group3b.d: Likewise.
+	* testsuite/ld-srec/srec.exp: Likewise.
+	* testsuite/lib/ld-lib.exp (check_gc_sections_available): Mark ARC
+	as supporting gc.
+	(check_shared_lib_support): Mark ARC as supporting.
+
+2016-05-19  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* emulparams/arcelf.sh: Changed.
+	* emulparams/arclinux.sh: Likewise.
+	* scripttempl/arclinux.sc: Moved to a more standard implementation
+	similar to elf.sc.
+
+2016-05-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Reorder
+	`ft32-*-*' behind `frv-*-*'.
+
+2016-05-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* configure.tgt: Remove `am34-*-linux*' support.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-scripts/crossref.exp: Remove -mcall-aixdesc hack.
+	* testsuite/ld-scripts/cross2.t: Tweak .opd and .toc placement.
+	* testsuite/ld-scripts/cross3.t: Likewise.
+	* testsuite/ld-scripts/cross4.t: Likewise.
+	* testsuite/ld-scripts/cross5.t: Likewise.
+	* testsuite/ld-scripts/cross6.t: Likewise.
+	* testsuite/ld-scripts/cross7.t: Likewise.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-elf/shared.exp (mix_pic_and_non_pic): Pass in
+	exe name rather than constructing testname.  Fix typo in
+	sub-test name.  Log copying.  Use -rpath rather than -R.
+
+2016-05-18  Nick Clifton  <nickc@redhat.com>
+
+	* scripttempl/ft32.sc: Use fixed constants for memory region
+	lengths.  Include DWARF debug sections.
+	(.data .bss): Do not assign locations during relocatable links.
+	* testsuite/ld-elf/compressed1d.d: Skip for FT32.
+	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
+	* testsuite/ld-elf/sec64k.exp: Likewise.
+	* testsuite/ld-elf/init-fini-array.d: XFail for FT32.
+	* testsuite/ld-elf/merge.d: Likewise.
+	* testsuite/ld-elf/orphan-region.d: Likewise.
+	* testsuite/ld-elf/orphan.s: Likewise.
+	* testsuite/ld-elf/orphan3.d: Likewise.
+	* testsuite/ld-elf/pr349.d: Likewise.
+	* testsuite/ld-elf/warn2.d: Likewise.
+	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Note
+	that the FT32 does not support shared libraries.
+
+2016-05-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/lib/ld-lib.exp (at_least_gcc_version): Check
+	global CC.
+
+2016-05-17  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* scripttempl/avr.sc (text): Place .progmem.data from avr-libc
+	above .progmem*.
+	* scripttempl/avrtiny.sc (text): Likewise.
+
+2016-05-17  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-unique/unique.exp: Use `is_elf_format' and
+	`supports_gnu_unique' to qualify testing.
+
+2016-05-16  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-elf/flags1.d: Update the xfail list.
+
+2016-05-15  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-elf/flags1.d: Update for `*-*-nacl*' xfail
+	removal.
+
+2016-05-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20097
+	* testplug2.c (onall_symbols_read): Remove redundant sizeof
+	on EXPECTED_VIEW_LENGTH.
+	* testplug4.c (onall_symbols_read): Likewise.
+
+2016-05-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20093
+	* testsuite/ld-x86-64/pr20093-1.d: New file.
+	* testsuite/ld-x86-64/pr20093-1.s: Likewise.
+	* testsuite/ld-x86-64/pr20093-2.d: Likewise.
+	* testsuite/ld-x86-64/pr20093-2.s: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run pr20093-1 and pr20093-2.
+
+2016-05-13  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-arm/arm-elf.exp: Adjust for arm-no-rel-plt now passing.
+	Use different output file name for static app without .rel.plt.
+	* testsuite/ld-arm/arm-no-rel-plt.ld: Align .rel.dyn and .rela.dyn.
+	* testsuite/ld-arm/arm-no-rel-plt.out: Delete.
+	* testsuite/ld-arm/arm-no-rel-plt.r: New.
+	* testsuite/ld-arm/arm-static-app.d: Don't check file name.
+	* testsuite/ld-arm/arm-static-app.r: Likewise.
+
+2016-05-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20070
+	* Makefile.am (noinst_LTLIBRARIES): Add libldtestplug4.la.
+	(libldtestplug4_la_SOURCES): New.
+	(libldtestplug4_la_CFLAGS): Likewise.
+	(libldtestplug4_la_LDFLAGS): Likewise.
+	* Makefile.in: Regenerated.
+	* plugin.c (get_symbols): Return resolution based on IR symbol
+	kinds for symbols defined/referenced only within IR.
+	* testplug4.c: New file.
+	* ld/testsuite/ld-plugin/pr20070.d: Likewise.
+	* ld/testsuite/ld-plugin/pr20070a.c: Likewise.
+	* ld/testsuite/ld-plugin/pr20070b.c: Likewise.
+	* testsuite/ld-plugin/plugin.exp (plugin4_name): New.
+	(plugin4_path): Likewise.
+	Add a test for ld/20070.
+
+2016-05-11  Alan Modra  <amodra@gmail.com>
+
+	* emultempl/hppaelf.em (hppaelf_create_output_section_statements):
+	Call elf32_hppa_init_stub_bfd.
+
+2016-05-11  Alan Modra  <amodra@gmail.com>
+
+	PR 20060
+	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
+	* testsuite/ld-powerpc/tlsdll.s: New.
+	* testsuite/ld-powerpc/tlsdll.ver: New.
+	* testsuite/ld-powerpc/tlsdll_32.s: New.
+	* testsuite/ld-powerpc/tlsopt5.d: New.
+	* testsuite/ld-powerpc/tlsopt5.s: New.
+	* testsuite/ld-powerpc/tlsopt5_32.d: New.
+	* testsuite/ld-powerpc/tlsopt5_32.s: New.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
+	ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* emultempl/armelf.em (elf32_arm_add_stub_section): Add output_section
+	parameter and rename input_section parameter to after_input_section.
+	Append input stub section to the output section if after_input_section
+	is NULL.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New
+	test.
+	* testsuite/ld-arm/attr-merge-10b-dsp.s: New file.
+	* testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
+
+2016-05-10  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* ld/testsuite/ld-elf/flags1.d (xfail): Remove *-*-nacl*".
+
+2016-05-09  Christophe Monat  <christophe.monat@st.com>
+
+	PR ld/20030
+	* testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp
+	tests. Fix misnamed stm32l4xx-fix-all.
+	* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple
+	loads with DP registers.
+	* testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file.
+	* testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment.
+	* testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple
+	loads with DP registers.
+	* testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
+
+2016-05-09  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	* testsuite/ld-elf/flags1.d (readelf): Dump section header instead
+	program headers.
+	(xfail): Remove avr-*-*.
+	Update regex to check the section flags.
+	* testsuite/ld-elf/merge.d (xfail): Remove avr-*-*.
+
+2016-05-09  Alan Modra  <amodra@gmail.com>
+
+	* Makefile.am (ealphavms.c, eelf64_ia64_vms): Correct .em deps.
+	* Makefile.in: Regenerate.
+
+2016-05-09  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-scripts/pr14962-2.t: Match .text, not *.text.
+	* testsuite/ld-scripts/rgn-at5.t: Similarly, .sec not *.sec.
+	* testsuite/ld-scripts/section-match-1.t: Likewise.
+
+2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/17550
+	* testsuite/ld-elf/pr17550-1.s: New file.
+	* testsuite/ld-elf/pr17550-2.s: Likewise.
+	* testsuite/ld-elf/pr17550-3.s: Likewise.
+	* testsuite/ld-elf/pr17550-4.s: Likewise.
+	* testsuite/ld-elf/pr17550a.d: Likewise.
+	* testsuite/ld-elf/pr17550b.d: Likewise.
+	* testsuite/ld-elf/pr17550c.d: Likewise.
+	* testsuite/ld-elf/pr17550d.d: Likewise.
+
+2016-05-06  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* ld/testsuite/ld-srec/srec.exp: Mark test as XFAIL for AVR.
+
+2016-05-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/i386.exp: Run load7.
+	* testsuite/ld-i386/load7.d: New file.
+	* testsuite/ld-i386/load7.map: Likewise.
+	* testsuite/ld-i386/load7.s: Likewise.
+	* testsuite/ld-x86-64/load2.d: Likewise.
+	* testsuite/ld-x86-64/load2.map: Likewise.
+	* testsuite/ld-x86-64/load2.s: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run load2.
+
+2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* emulparams/elf_iamcu.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): New.
+	* emulparams/elf_k1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emulparams/elf_l1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+
+2016-05-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/pr18591.d: Pass --no-relax to ld.
+
+2016-05-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* ldlang.c (init_os): Pass %E to einfo when bfd_section == NULL.
+
+2016-05-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-unique/unique.d: New test.
+	* testsuite/ld-unique/unique.exp: Run the new test.  Adjust
+	messages for compiled tests.
+
+2016-05-04  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* testsuite/ld-elf/pr18735.d: Allow other symbols.
+	* testsuite/ld-elf/sec64k.exp: Skip 64ksec for avr.
+	* testsuite/ld-gc/pr14265.d: Allow other symbols.
+	* testsuite/ld-plugin/plugin.exp: Add PR ld/17973 to
+	plugin_tests only if check_shared_lib_support is true.
+	* testsuite/ld-selective/selective.exp: Add --section-start
+	flag for avr.
+
+2016-05-03  Maciej W. Rozycki  <macro@imgtec.com>
+
+	PR 10549
+	* testsuite/ld-unique/unique.exp: Also run for `mips*-*-*'.
+
+2016-05-03  Jiong Wang  <jiong.wang@arm.com>
+
+	* emultempl/aarch64elf.em (--no-apply-dynamic-relocs): New option.
+	* NEWS: Mention --no-apply-dynamic-relocs.
+	* ld.texinfo (ld and the ARM family): Document
+	--no-apply-dynamic-relocs.
+	* testsuite/ld-aarch64/rela-abs-relative.s: New test source.
+	* testsuite/ld-aarch64/rela-abs-relative.d: New expected result.
+	* testsuite/ld-aarch64/rela-abs-relative-be.d: Likewise for big-endian.
+	* estsuite/ld-aarch64/rela-abs-relative-opt.d: Likewise, but enable new
+	option.
+
+2016-05-03  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* testsuite/ld-elfcomm/elfcomm.exp: Check for shared lib support
+	before running STT_COMMON tests.
+
+2016-04-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/default.exp (NOPIE_CFLAGS): Download source only on
+	remote host.
+	(NOPIE_LDFLAGS): Likewise.
+	* testsuite/lib/ld-lib.exp (check_lto_available): Likewise.
+	(check_lto_fat_available): Likewise.
+	(check_lto_shared_available): Likewise.
+	(check_ifunc_available): Likewise.
+	(check_ifunc_attribute_available): Likewise.
+
+2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/compressed1b.d: Only run for Linux/GNU targets.
+
+2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/20006
+	* testsuite/ld-elfvsb/elfvsb.exp (COMPRESS_LDFLAG): New.
+	(visibility_run): Pass COMPRESS_LDFLAG to visibility_test on
+	ELF targets.
+
+2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/compressed1b.d: Pass
+	--compress-debug-sections=none to ld.
+	* testsuite/ld-elf/compressed1c.d: Likewise.
+
+2016-04-27  Alan Modra  <amodra@gmail.com>
+
+	PR target/19985
+	* configure.tgt: Don't use var+=.
+
+2016-04-25  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19985
+	* configure.tgt: Include big endian PPC64 emulations with little
+	endian PPC64 targets.
+
+2016-04-25  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* scripttempl/avrtiny.sc (.text): Do not set LMA to zero.
+
+2016-04-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/lib/ld-lib.exp (check_lto_available): Return 1 on
+	Linux with GCC 4.9 or newer.
+	(check_lto_fat_available): Likewise.
+	(check_lto_shared_available): Likewise.
+
+2016-04-21  Nick Clifton  <nickc@redhat.com>
+
+	* ldlang.c (lang_check_relocs): Use bfd_link_check_relocs in
+	prefernce to _bfd_elf_link_check_relocs.  Drop test for ELF
+	targets.  Do not stop the checks when problems are encountered.
+
+2016-04-21  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-scripts/cross3.t: Add commonly used data
+	and text section names to output section statements.
+	* testsuite/ld-scripts/cross4.t: Likewise.
+	* testsuite/ld-scripts/cross5.t: Likewise.
+	* testsuite/ld-scripts/cross6.t: Likewise.
+	* testsuite/ld-scripts/cross7.t: Likewise.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* ldlang.c (lang_check_relocs): New function.
+	(lang_process): Call lang_check_relocs after lang_gc_sections.
+	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Don't
+	call _bfd_elf_link_check_relocs here.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19972
+	* testsuite/ld-elf/eh6.d: Pass -rW to readelf and check for
+	R_386_NONE or R_X86_64_NONE.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/pic1.d: New file.
+	* testsuite/ld-x86-64/pic1.s: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run pic1.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-x86-64/pie2.d: New file.
+	* testsuite/ld-x86-64/pie2.s: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run pie2.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19969
+	* testsuite/ld-x86-64/pr19969.d: New file.
+	* testsuite/ld-x86-64/pr19969a.S: Likewise.
+	* testsuite/ld-x86-64/pr19969b.S: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run pr19969 tests.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	New.
+	* emulparams/elf_i386.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
+	Likewise.
+	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse):
+	Set check_relocs_after_open_input to TRUE if
+	CHECK_RELOCS_AFTER_OPEN_INPUT is yes.
+	(gld${EMULATION_NAME}_after_open): Call
+	_bfd_elf_link_check_relocs on all inputs if
+	check_relocs_after_open_input is TRUE.
+
+2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/eh6.s: Replace .long with .dc.a on
+	my_personality_v0.
+
+2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* emultempl/scoreelf.em: Likewise.
+
+2016-04-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19719
+	* testsuite/ld-x86-64/pr19719.d: New file.
+	* testsuite/ld-x86-64/pr19719.s: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run pr19719.
+
+2016-04-18  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* ld.texinfo: Document NOCROSSREFS_TO script command.
+	* ldlang.h (struct lang_nocrossrefs): Add onlyfirst field.
+	(lang_add_nocrossref_to): New prototype.
+	* ldcref.c (check_local_sym_xref): Use onlyfirst to only look for
+	symbols defined in the first section.
+	(check_nocrossref): Likewise.
+	* ldgram.y (NOCROSSREFS_TO): New script command.
+	* ldlang.c (lang_add_nocrossref): Set onlyfirst to FALSE.
+	(lang_add_nocrossref_to): New function.
+	* ldlex.l (NOCROSSREFS_TO): New token.
+	* NEWS: Mention NOCROSSREFS_TO.
+	* testsuite/ld-scripts/cross4.t: New file.
+	* testsuite/ld-scripts/cross5.t: Likewise.
+	* testsuite/ld-scripts/cross6.t: Likewise.
+	* testsuite/ld-scripts/cross7.t: Likewise.
+	* testsuite/ld-scripts/crossref.exp: Run 4 new NOCROSSREFS_TO
+	tests.
+
+2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated with automake 1.11.6.
+	* aclocal.m4: Likewise.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/ld-arc/arc.exp: New file.
+	* testsuite/ld-arc/nps-1.s: New file.
+	* testsuite/ld-arc/nps-1a.d: New file.
+	* testsuite/ld-arc/nps-1b.d: New file.
+	* testsuite/ld-arc/nps-1b.err: New file.
+
+2016-04-14  Nick Clifton  <nickc@redhat.com>
+
+	PR 19457
+	* testsuite/ld-scripts/script.exp (extract_symbol_test): Add
+	exceptions for Mingw and Cygwin.
+
+2016-04-13  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/lib/ld-lib.exp (run_dump_test): Initialise
+	check_ld(terminal).
+
+2016-04-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19774
+	* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr17689b.o before
+	tmpdir/pr17689.so, fix gotpcrel1 test and add more --as-needed
+	tests.
+
+2016-04-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19939
+	* testsuite/ld-i386/i386.exp: Run PR ld/19939 tests.
+	* testsuite/ld-x86-64/x86-64.exp: Likewise.
+	* testsuite/ld-i386/pr19939.s: New file.
+	* testsuite/ld-i386/pr19939a.d: Likewise.
+	* testsuite/ld-i386/pr19939b.d: Likewise.
+	* testsuite/ld-x86-64/pr19939.s: Likewise.
+	* testsuite/ld-x86-64/pr19939a.d: Likewise.
+	* testsuite/ld-x86-64/pr19939b.d: Likewise.
+
+2016-04-09  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	* emulparams/shelf.sh: Set stack area to 0x3FFFFF00.
+
+2016-04-08  Alan Modra  <amodra@gmail.com>
+
+	PR 18452
+	* ldlang.c (maybe_overlays): Delete.
+	(lang_size_sections_1): Remove code setting maybe_overlays.
+	(lang_check_section_addresses): Instead detect overlays by
+	exact match of section VMAs here.  Fix memory leak.
+
+2016-04-08  Dan Gisselquist  <dgisselq@ieee.org>
+
+	* ldlang.c (print_output_section_statement): Show minfo size
+	in target machine address units.
+	(print_reloc_statement): Likewise.
+	(print_padding_statement): Likewise.
+	(print_data_statement): Likewise.  Ensure minimum print_dot
+	increment of one address unit.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* emulparams/arc-endianness.sh: Make little endian default choice.
+
+2016-04-07  Nick Clifton  <nickc@redhat.com>
+
+	* scripttempl/elf32msp430.sc (.MSP430.attributes): Fix typo in
+	section name.
+	* scripttempl/elf32msp430_3.sc (.MSP430.attributes): Likewise.
+
+2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* emulparams/arc-endianness.sh: New file.
+	* emulparams/arcebelf.sh: Deleted.
+	* emulparams/arcebelf_prof.sh: Deleted.
+	* emulparams/arceblinux.sh: Deleted.
+	* emulparams/arceblinux_prof.sh: Deleted.
+	* emulparams/arcelf.sh: Include arc-endinness.sh.
+	* emulparams/arcelf_prof.sh: Include arc-endinness.sh.
+	* emulparams/arclinux.sh: Include arc-endinness.sh.
+	* emulparams/arclinux_prof.sh: Include arc-endinness.sh.
+	* emulparams/arcv2elf.sh: Include arc-endinness.sh.
+	* emulparams/arcv2elfx.sh: Include arc-endinness.sh.
+	* testsuite/ld-elf/compressed1d.d: Update pattern for big and
+	little endian arc targets.
+	* testsuite/ld-elf/eh-frame-hdr.d: Likewise.
+	* testsuite/ld-elf/group1.d: Likewise.
+	* testsuite/ld-elf/group3b.d: Likewise.
+	* testsuite/ld-elf/group8a.d: Likewise.
+	* testsuite/ld-elf/group8b.d: Likewise.
+	* testsuite/ld-elf/group9a.d: Likewise.
+	* testsuite/ld-elf/group9b.d: Likewise.
+	* testsuite/ld-elf/linkonce2.d: Likewise.
+	* testsuite/ld-elf/pr12851.d: Likewise.
+	* testsuite/ld-elf/pr12975.d: Likewise.
+	* testsuite/ld-elf/pr13177.d: Likewise.
+	* testsuite/ld-elf/pr13195.d: Likewise.
+	* testsuite/ld-elf/pr17615.d: Likewise.
+	* testsuite/ld-elf/pr19162.d: Likewise.
+	* testsuite/ld-elf/sec64k.exp: Likewise.
+	* testsuite/lib/ld-lib.exp: Likewise.
+
+2016-04-05  Maciej W. Rozycki  <macro@imgtec.com>
+
+	PR ld/19908
+	* testsuite/ld-cris/tls-e-20.d: Adjust for hidden symbol
+	handling fix.
+	* testsuite/ld-cris/tls-e-20a.d: Likewise.
+	* testsuite/ld-cris/tls-e-21.d: Likewise.
+	* testsuite/ld-cris/tls-e-23.d: Likewise.
+	* testsuite/ld-cris/tls-e-80.d: Likewise.
+	* testsuite/ld-cris/tls-gd-3h.d: Likewise.
+	* testsuite/ld-cris/tls-leie-19.d: Likewise.
+	* testsuite/ld-mips-elf/export-class-ref-lib.sd: New test.
+	* testsuite/ld-mips-elf/export-hidden-ref.sd: New test.
+	* testsuite/ld-mips-elf/export-internal-ref.sd: New test.
+	* testsuite/ld-mips-elf/export-protected-ref.sd: New test.
+	* testsuite/ld-mips-elf/export-class-ref-f0.s: New test source.
+	* testsuite/ld-mips-elf/export-class-ref-f1.s: New test source.
+	* testsuite/ld-mips-elf/export-class-ref-f2.s: New test source.
+	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
+
+2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/ld-discard/extern.d: Removed xfail for ARC.
+	* testsuite/ld-discard/start.d: Likewise.
+	* testsuite/ld-discard/static.d: Likewise.
+	* testsuite/ld-elf/group1.d: Likewise.
+	* testsuite/ld-elf/group3b.d: Likewise.
+	* testsuite/ld-elf/orphan-region.d: Likewise.
+	* testsuite/ld-elf/orphan.d: Likewise.
+	* testsuite/ld-elf/orphan3.d: Likewise.
+	* testsuite/ld-elf/pr349.d: Likewise.
+	* testsuite/ld-elf/warn1.d: Likewise.
+	* testsuite/ld-elf/warn2.d: Likewise.
+	* testsuite/ld-elf/warn3.d: Likewise.
+	* testsuite/ld-scripts/crossref.exp: Add __SDATA_BEGIN__ symbol
+	through linker flags.
+	* testsuite/ld-srec/srec.exp: Set as xfail.
+
+2016-04-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19827
+	* testsuite/ld-i386/pr19827-nacl.rd: New file.
+	* testsuite/ld-x86-64/pr19827-nacl.rd: Likewise.
+
+2016-04-04  Nick Clifton  <nickc@redhat.com>
+
+	PR 19803
+	* emultempl/pe.em (change_undef): New function.  Encapsulates
+	duplicated code in pe_fixup_stdcalls and adds the newly defined
+	sym to the gc root list.
+	(pe_fixup_stdcall): Use the new function.
+	* pe-dll.c (process_def_file_and_drectve); Add alias of exported
+	symbol to gc root list.
+
+2016-03-31  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c (TO_ADDR, TO_SIZE, opb_shift): Move earlier in file.
+	(lang_insert_orphan): Use TO_ADDR in __stop sym calculation.
+	(print_input_section): Don't use TO_ADDR when printing section
+	size.
+	(lang_size_sections_1): Use TO_ADDR in overlay lma calculation.
+	(lang_size_sections): Use TO_ADDR in relro end calculation.
+
+2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* testsuite/lib/ld-lib.exp (run_dump_test): Fix check of return
+	value from regexp_diff.
+	* testsuite/ld-elf/orphan-5.l: Fix expected output.
+	* testsuite/ld-elf/orphan-6.l: Likewise.
+
+2016-03-30  Alan Modra  <amodra@gmail.com>
+
+	PR 18452
+	* ldlang.c (maybe_overlays): New static var.
+	(lang_size_sections_1): Set it here.
+	(struct check_sec): New.
+	(sort_sections_by_lma): Adjust for array of structs.
+	(sort_sections_by_vma): New function.
+	(lang_check_section_addresses): Check both LMA and VMA for overlap.
+	* testsuite/ld-scripts/rgn-over7.d: Adjust.
+
+2016-03-30  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c (lang_size_sections_1): Correct code detecting a
+	backward non-overlapping move.
+
+2016-03-30  Alan Modra  <amodra@gmail.com>
+
+	* ldlang.c (IS_TBSS): New macro, extracted from..
+	(IGNORE_SECTION): ..here.
+	(lang_size_sections_1): Use IS_TBSS and IGNORE_SECTION.
+	(lang_size_sections, lang_do_assignments_1): Use IS_TBSS.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/19803
+	* ldlang.c (lang_add_gc_name): New function.  Adds the provided
+	symbol name to the list of gc symbols.
+	(lang_process): Call lang_add_gc_name with entry_symbol_default if
+	entry_symbol.name is NULL.  Use lang_add_gc_name to add the init
+	and fini function names.
+	* pe-dll.c (process_def_file_and_drectve): Add exported names to
+	the gc symbol list.
+	* testsuite/ld-pe/pr19803.s: Do not export _testval symbol.
+	* testsuite/ld-pe/pr19803.d: Tweak expected output.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	* configure: Regenerate.
+
+2016-03-21  Nick Clifton  <nickc@redhat.com>
+
+	* emultempl/msp430.em: Replace use of alloca with call to xmalloc.
+	* plugin.c: Likewise.
+	* pe-dll.c: Likewise.
+
+2016-03-18  Awson  <kyrab@mail.ru>
+
+	PR 19531
+	* scripttempl/pe.sc (.rdata_runtime_pseudo_reloc): Always KEEP
+	this section.
+	* scripttempl/pep.sc (.rdata_runtime_pseudo_reloc): Likewise.
+
+2016-03-18  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	* ld-avr/gc-section-debugline.d: Relax regex check for CU.
+
+2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19827
+	* testsuite/ld-i386/i386.exp: Run PR ld/19827 tests.
+	* testsuite/ld-x86-64/x86-64.exp: Likewise.
+	* testsuite/ld-i386/pr19827.rd: New file.
+	* testsuite/ld-i386/pr19827a.S: Likewise.
+	* testsuite/ld-i386/pr19827b.S: Likewise.
+	* testsuite/ld-x86-64/pr19827.rd: Likewise.
+	* testsuite/ld-x86-64/pr19827a.S: Likewise.
+	* testsuite/ld-x86-64/pr19827b.S: Likewise.
+
+2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19807
+	* Makefile.am (ELF_X86_DEPS): Add
+	$(srcdir)/emulparams/reloc_overflow.sh.
+	* Makefile.in: Regenerated.
+	* NEWS: Mention -z noreloc-overflow.
+	* ld.texinfo: Document -z noreloc-overflow.
+	* emulparams/elf32_x86_64.sh: Source
+	${srcdir}/emulparams/reloc_overflow.sh.
+	* emulparams/elf_x86_64.sh: Likewise.
+	* emulparams/reloc_overflow.sh: New file.
+	* testsuite/ld-x86-64/pr19807-1.s: New file.
+	* testsuite/ld-x86-64/pr19807-1a.d: Likewise.
+	* testsuite/ld-x86-64/pr19807-1b.d: Likewise.
+	* testsuite/ld-x86-64/pr19807-2.s: Likewise.
+	* testsuite/ld-x86-64/pr19807-2a.d: Likewise.
+	* testsuite/ld-x86-64/pr19807-2b.d: Likewise.
+	* testsuite/ld-x86-64/pr19807-2c.d: Likewise.
+	* testsuite/ld-x86-64/pr19807-2d.d: Likewise.
+	* testsuite/ld-x86-64/pr19807-2e.d: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/19807 tests.
+
+2016-03-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19539
+	* testsuite/ld-i386/i386.exp: Run pr19539.
+	* testsuite/ld-i386/pr19539.d: New file.
+	* testsuite/ld-i386/pr19539.s: Likewise.
+	* testsuite/ld-i386/pr19539.t: Likewise.
+	* testsuite/ld-x86-64/pr19539.s: Likewise.
+	* testsuite/ld-x86-64/pr19539.t: Likewise.
+	* testsuite/ld-x86-64/pr19539a.d: Likewise.
+	* testsuite/ld-x86-64/pr19539b.d: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run pr19539a and pr19539b.
+
+2016-03-10  Mickael Guene  <mickael.guene@st.com>
+
+	PR gas/19744
+	* testsuite/ld-arm/arm-elf.exp: New tests.
+	* testsuite/ld-arm/thumb1-adds-armv7-m.s: New.
+	* testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
+
+2016-03-10  Nick Clifton  <nickc@redhat.com>
+
+	* scripttempl/elf32msp430.sc (.rodata): Remove spurious LONG(0).
+
+2016-03-09  Pedro Alves  <palves@redhat.com>
+
+	* scripttempl/v850.sc: Use "v850:old-gcc-abi" as OUTPUT_ARCH.
+	* scripttempl/v850_rh850.sc: Use "v850:rh850" as OUTPUT_ARCH.
+
+2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19789
+	* testsuite/ld-elf/pr19789.d: New file.
+	* testsuite/ld-elf/pr19789.s: Likewise.
+
+2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19784
+	* testsuite/ld-i386/i386.exp: Remove pr19636-2e-nacl test.
+	* testsuite/ld-i386/pr19636-2e-nacl.d: Moved to ...
+	* testsuite/ld-i386/pr19636-2e.d: Here.  Remove notarget.
+	* testsuite/ld-ifunc/ifunc.exp: Run PR ld/19784 tests.
+	* testsuite/ld-ifunc/pass.out: New file.
+	* testsuite/ld-ifunc/pr19784a.c: Likewise.
+	* testsuite/ld-ifunc/pr19784b.c: Likewise.
+	* testsuite/ld-ifunc/pr19784c.c: Likewise.
+
+2016-03-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19774
+	* testsuite/ld-ifunc/ifunc.exp: Link tmpdir/pr18808a.o before
+	tmpdir/libpr18808.so.  Link tmpdir/pr18841a.o before
+	tmpdir/libpr18841b.so and tmpdir/libpr18841c.so.  Test
+	--as-needed for pr18841c.
+
+2016-03-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19774
+	* testsuite/ld-i386/i386.exp: Link tmpdir/pr18900.o before
+	tmpdir/pr18900.so and test --as-needed.  Link tmpdir/gotpc1.o
+	before tmpdir/got1d.so and test --as-needed.
+	* testsuite/ld-x86-64/x86-64.exp: Link tmpdir/pr18900.o before
+	tmpdir/pr18900.so and test --as-needed.
+
+2016-03-07  Jiong Wang  <jiong.wang@arm.com>
+
+	* testsuite/ld-aarch64/implicit_got_section_1.s: New test source file.
+	* testsuite/ld-aarch64/implicit_got_section_1.d: New test expected
+	result.
+	* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
+
+2016-03-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-i386/i386.exp: Link tmpdir/copyreloc-main.o
+	before tmpdir/copyreloc-lib.so and test --as-needed.
+	* testsuite/ld-x86-64/x86-64.exp: Likewise.
+
+2016-03-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19579
+	* testsuite/ld-elf/pr19579a.c: New file.
+	* testsuite/ld-elf/pr19579b.c: Likewise.
+	* testsuite/ld-elf/shared.exp: Run PR ld/19579 test.
+
+2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/pr19162.d: Skip hppa-*-*.
+
+2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/shared.exp (mix_pic_and_non_pic): Add xfails.
+	Xfail mix_pic_and_non_pic on "arm*-*-*" "aarch64*-*-*".
+
+2016-03-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19739
+	* emultempl/mmo.em (mmo_place_orphan): Don't merge flags of other
+	input sections for relocatable link.
+	* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
+	* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
+
+2016-03-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19739
+	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
+	merge flags of other input sections for relocatable link.
+
+2016-03-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-plugin/lto.exp: Update PR ld/12365 test for GCC 6.
+
+2016-03-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/pr19162.d: Skip arc target.
+
+2016-02-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19162
+	* testsuite/ld-elf/pr19162.d: New file.
+	* testsuite/ld-elf/pr19162a.s: Likwise.
+	* testsuite/ld-elf/pr19162b.s: Likwise.
+
+2016-02-29 Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* testsuite/ld-elf/merge.d: Removed xfail for ARC.
+	* testsuite/ld-elf/merge2.d: Likewise.
+	* testsuite/ld-elf/merge3.d: Likewise.
+
+2016-02-29  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
+
+	* scripttempl/arclinux.sc: Force .tdata and .tbss to always be
+	generated.
+
+2016-02-26  Renlin Li  <renlin.li@arm.com>
+
+	* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases.
+	* testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary.
+	* testsuite/ld-aarch64/emit-relocs-271.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-272.d: Likewise.
+	* testsuite/ld-aarch64/emit-relocs-270-overflow.d: New.
+	* testsuite/ld-aarch64/emit-relocs-270-overflow.s: New.
+	* testsuite/ld-aarch64/emit-relocs-271-overflow.d: New.
+	* testsuite/ld-aarch64/emit-relocs-271-overflow.s: New.
+	* testsuite/ld-aarch64/emit-relocs-272-overflow.d: New.
+	* testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19609
+	* testsuite/ld-i386/got1.dd: Updated.
+	* testsuite/ld-i386/lea1c.d: Likewise.
+	* testsuite/ld-i386/load1-nacl.d: Likewise.
+	* testsuite/ld-i386/load1.d: Likewise.
+	* testsuite/ld-i386/load4b.d: Likewise.
+	* testsuite/ld-i386/load5b.d: Likewise.
+	* testsuite/ld-i386/mov1b.d: Likewise.
+	* testsuite/ld-x86-64/mov1b.d: Likewise.
+	* testsuite/ld-x86-64/mov1d.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
+	* testsuite/ld-x86-64/gotpcrel1.dd: Likewise.
+	* testsuite/ld-x86-64/lea1a.d: Likewise.
+	* testsuite/ld-x86-64/lea1b.d: Likewise.
+	* testsuite/ld-x86-64/lea1c.d: Likewise.
+	* testsuite/ld-x86-64/lea1d.d: Likewise.
+	* testsuite/ld-x86-64/lea1e.d: Likewise.
+	* testsuite/ld-x86-64/lea1f.d: Likewise.
+	* testsuite/ld-x86-64/mov1b.d: Likewise.
+	* testsuite/ld-x86-64/mov1d.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-3b.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-4b.d: Likewise.
+	* testsuite/ld-x86-64/lea1.s: Add tests for 32-bit registers.
+	* testsuite/ld-i386/pr19609-1.s: New file.
+	* testsuite/ld-i386/pr19609-1a.d: Likewise.
+	* testsuite/ld-i386/pr19609-1b.d: Likewise.
+	* testsuite/ld-i386/pr19609-1c.d: Likewise.
+	* testsuite/ld-i386/pr19609-1d.d: Likewise.
+	* testsuite/ld-i386/pr19609-1e.d: Likewise.
+	* testsuite/ld-i386/pr19609-1f.d: Likewise.
+	* testsuite/ld-i386/pr19609-1g.d: Likewise.
+	* testsuite/ld-i386/pr19609-1h.d: Likewise.
+	* testsuite/ld-i386/pr19609-1i.d: Likewise.
+	* testsuite/ld-i386/pr19609-2.s: Likewise.
+	* testsuite/ld-i386/pr19609-2a.d: Likewise.
+	* testsuite/ld-i386/pr19609-2b.d: Likewise.
+	* testsuite/ld-i386/pr19609-2c.d: Likewise.
+	* testsuite/ld-i386/undefweak.s: Likewise.
+	* testsuite/ld-i386/undefweaka.d: Likewise.
+	* testsuite/ld-i386/undefweakb.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-3c.d: Likewise.
+	* testsuite/ld-x86-64/pr13082-3d.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1.s: Likewise.
+	* testsuite/ld-x86-64/pr19609-1a.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1b.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1c.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1d.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1e.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1f.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1g.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1h.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1i.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1j.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1k.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1l.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-1m.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-2.s: Likewise.
+	* testsuite/ld-x86-64/pr19609-2a.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-2b.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-2c.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-2d.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-3.s: Likewise.
+	* testsuite/ld-x86-64/pr19609-3a.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-3b.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-4.s: Likewise.
+	* testsuite/ld-x86-64/pr19609-4a.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-4b.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-4c.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-4d.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-4e.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-5.s: Likewise.
+	* testsuite/ld-x86-64/pr19609-5a.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-5b.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-5c.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-5d.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-5e.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-6.s: Likewise.
+	* testsuite/ld-x86-64/pr19609-6a.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-6b.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-6c.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-6d.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-7.s: Likewise.
+	* testsuite/ld-x86-64/pr19609-7a.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-7b.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-7c.d: Likewise.
+	* testsuite/ld-x86-64/pr19609-7d.d: Likewise.
+	* testsuite/ld-i386/i386.exp: Run undefweak tests and tests for
+	PR ld/19609.
+	* testsuite/ld-x86-64/x86-64.exp: Run pr13082-3c, pr13082-3d
+	and tests for PR ld/19609.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19645
+	* NEWS: Mention -z common/-z nocommon for ELF targets.
+	* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
+	-z common and -z nocommon.
+	* ld.texinfo: Document -z common/-z nocommon.
+	* lexsup.c (elf_shlib_list_options): Add -z common/-z nocommon.
+	* testsuite/ld-elf/tls_common.exp: Test --elf-stt-common=no and
+	--elf-stt-common=yes with assembler.
+	* testsuite/ld-elfcomm/common-1.s: New file.
+	* testsuite/ld-elfcomm/common-1a.d: Likewise.
+	* testsuite/ld-elfcomm/common-1b.d: Likewise.
+	* testsuite/ld-elfcomm/common-1c.d: Likewise.
+	* testsuite/ld-elfcomm/common-1d.d: Likewise.
+	* testsuite/ld-elfcomm/common-1e.d: Likewise.
+	* testsuite/ld-elfcomm/common-1f.d: Likewise.
+	* testsuite/ld-elfcomm/common-2.s: Likewise.
+	* testsuite/ld-elfcomm/common-2a.d: Likewise.
+	* testsuite/ld-elfcomm/common-2b.d: Likewise.
+	* testsuite/ld-elfcomm/common-2c.d: Likewise.
+	* testsuite/ld-elfcomm/common-2d.d: Likewise.
+	* testsuite/ld-elfcomm/common-2e.d: Likewise.
+	* testsuite/ld-elfcomm/common-2f.d: Likewise.
+	* testsuite/ld-elfcomm/common-3a.rd: Likewise.
+	* testsuite/ld-elfcomm/common-3b.rd: Likewise.
+	* testsuite/ld-i386/pr19645.d: Likewise.
+	* testsuite/ld-i386/pr19645.s: Likewise.
+	* testsuite/ld-x86-64/largecomm-1.s: Likewise.
+	* testsuite/ld-x86-64/largecomm-1a.d: Likewise.
+	* testsuite/ld-x86-64/largecomm-1b.d: Likewise.
+	* testsuite/ld-x86-64/largecomm-1c.d: Likewise.
+	* testsuite/ld-x86-64/largecomm-1d.d: Likewise.
+	* testsuite/ld-x86-64/largecomm-1e.d: Likewise.
+	* testsuite/ld-x86-64/largecomm-1f.d: Likewise.
+	* testsuite/ld-x86-64/pr19645.d: Likewise.
+	* testsuite/ld-x86-64/pr19645.s: Likewise.
+	* testsuite/ld-elfcomm/elfcomm.exp: Test --elf-stt-common=yes
+	with assembler.
+	(assembler_generates_commons): Removed.
+	Run -z common/-z nocommon tests.  Run *.d tests.
+	* testsuite/ld-i386/i386.exp: Run pr19645.
+	* testsuite/ld-x86-64/x86-64.exp: Likewise.
+	* testsuite/ld-x86-64/dwarfreloc.exp: Test --elf-stt-common with
+	assembler.  Test STT_COMMON with readelf.
+
+2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19636
+	PR ld/19704
+	PR ld/19719
+	* Makefile.am (ELF_X86_DEPS): Add dynamic_undefined_weak.sh.
+	* Makefile.in: Regenerated.
+	* NEWS: Mention -z nodynamic-undefined-weak.
+	* ld.texinfo: Document -z nodynamic-undefined-weak.
+	* ldmain.c (main): Initialize dynamic_undefined_weak to -1.
+	* emulparams/dynamic_undefined_weak.sh: New file.
+	* emulparams/elf32_x86_64.sh: Source dynamic_undefined_weak.sh.
+	* emulparams/elf_i386.sh: Likewise.
+	* emulparams/elf_i386_be.sh: Likewise.
+	* emulparams/elf_i386_chaos.sh: Likewise.
+	* emulparams/elf_i386_ldso.sh: Likewise.
+	* emulparams/elf_i386_vxworks.sh: Likewise.
+	* emulparams/elf_iamcu.sh: Likewise.
+	* emulparams/elf_k1om.sh: Likewise.
+	* emulparams/elf_l1om.sh: Likewise.
+	* emulparams/elf_x86_64.sh: Likewise.
+	* emulparams/extern_protected_data.sh (PARSE_AND_LIST_OPTIONS):
+	Append.
+	(PARSE_AND_LIST_ARGS_CASE_Z): Likewise.
+	* testsuite/ld-elf/pr19719a.c: New file.
+	* testsuite/ld-elf/pr19719b.c: Likewise.
+	* testsuite/ld-elf/pr19719c.c: Likewise.
+	* testsuite/ld-elf/pr19719d.c: Likewise.
+	* testsuite/ld-i386/pr19636-1.s: Likewise.
+	* testsuite/ld-i386/pr19636-1a.d: Likewise.
+	* testsuite/ld-i386/pr19636-1b.d: Likewise.
+	* testsuite/ld-i386/pr19636-1c.d: Likewise.
+	* testsuite/ld-i386/pr19636-1d-nacl.d: Likewise.
+	* testsuite/ld-i386/pr19636-1d.d: Likewise.
+	* testsuite/ld-i386/pr19636-1e.d: Likewise.
+	* testsuite/ld-i386/pr19636-1f.d: Likewise.
+	* testsuite/ld-i386/pr19636-1g.d: Likewise.
+	* testsuite/ld-i386/pr19636-1h.d: Likewise.
+	* testsuite/ld-i386/pr19636-1i.d: Likewise.
+	* testsuite/ld-i386/pr19636-2.s: Likewise.
+	* testsuite/ld-i386/pr19636-2a.d: Likewise.
+	* testsuite/ld-i386/pr19636-2b.d: Likewise.
+	* testsuite/ld-i386/pr19636-2c-nacl.d: Likewise.
+	* testsuite/ld-i386/pr19636-2c.d: Likewise.
+	* testsuite/ld-i386/pr19636-2d-nacl.d: Likewise.
+	* testsuite/ld-i386/pr19636-2d.d: Likewise.
+	* testsuite/ld-i386/pr19636-2e-nacl.d: Likewise.
+	* testsuite/ld-i386/pr19636-2e.d: Likewise.
+	* testsuite/ld-i386/pr19636-3.s: Likewise.
+	* testsuite/ld-i386/pr19636-3a.d: Likewise.
+	* testsuite/ld-i386/pr19636-3b.d: Likewise.
+	* testsuite/ld-i386/pr19636-3c.d: Likewise.
+	* testsuite/ld-i386/pr19636-3d.d: Likewise.
+	* testsuite/ld-i386/pr19636-3e.d: Likewise.
+	* testsuite/ld-i386/pr19636-3f.d: Likewise.
+	* testsuite/ld-i386/pr19636-3g.d: Likewise.
+	* testsuite/ld-i386/pr19636-4.s: Likewise.
+	* testsuite/ld-i386/pr19636-4a.d: Likewise.
+	* testsuite/ld-i386/pr19636-4b.d: Likewise.
+	* testsuite/ld-i386/pr19636-4c.d: Likewise.
+	* testsuite/ld-i386/pr19636-4d.d: Likewise.
+	* testsuite/ld-i386/pr19704.out: Likewise.
+	* testsuite/ld-i386/pr19704a.c: Likewise.
+	* testsuite/ld-i386/pr19704b.c: Likewise.
+	* testsuite/ld-x86-64/pr19636-1.s: Likewise.
+	* testsuite/ld-x86-64/pr19636-1a.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-1b.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-1c.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-1d.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-1e.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-1f.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-1g.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2.s: Likewise.
+	* testsuite/ld-x86-64/pr19636-2a.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2b.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2c.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2d.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2e.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2f.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2g.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2h.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-2i.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-3.s: Likewise.
+	* testsuite/ld-x86-64/pr19636-3a.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-3b.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-3c.d: Likewise.
+	* testsuite/ld-x86-64/pr19636-3d.d: Likewise.
+	* testsuite/ld-x86-64/pr19704.out: Likewise.
+	* testsuite/ld-x86-64/pr19704a.c: Likewise.
+	* testsuite/ld-x86-64/pr19704b.c: Likewise.
+	* testsuite/ld-elf/shared.exp (mix_pic_and_non_pic): New.
+	Run mix_pic_and_non_pic.
+	* testsuite/ld-i386/i386.exp (undefined_weak): New.
+	Run undefined_weak and PR ld/19636 tests.
+	* testsuite/ld-x86-64/x86-64.exp: Likewise.
+	* testsuite/ld-x86-64/pr13082-3b.d: Updated.
+	* testsuite/ld-x86-64/pr13082-4b.d: Likewise.
+
+2016-02-25  Nick Clifton  <nickc@redhat.com>
+
+	* ld.h (struct ld_config_type): Remove specified_data_size field.
+
+2016-02-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19698
+	* testsuite/ld-elf/pr19698.d: New file.
+	* testsuite/ld-elf/pr19698.s: Likewise.
+	* testsuite/ld-elf/pr19698.t: Likewise.
+
+2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am (ELF_X86_DEPS): New.
+	(eelf_i386.c): Replace $(ELF_DEPS) with $(ELF_X86_DEPS).
+	(eelf_i386_chaos.c): Likewise.
+	(eelf_i386_fbsd.c): Likewise.
+	(eelf_i386_ldso.c): Likewise.
+	(eelf_i386_nacl.c): Likewise.
+	(eelf_i386_sol2.c): Likewise.
+	(eelf_iamcu.c): Likewise.
+	(eelf32_x86_64.c): Likewise.
+	(eelf32_x86_64_nacl.c): Likewise.
+	(eelf_l1om.c): Likewise.
+	(eelf_l1om_fbsd.c): Likewise.
+	(eelf_k1om.c): Likewise.
+	(eelf_k1om_fbsd.c): Likewise.
+	(eelf_x86_64.c): Likewise.
+	(eelf_x86_64_cloudabi.c): Likewise.
+	(eelf_x86_64_fbsd.c): Likewise.
+	(eelf_x86_64_sol2.c): Likewise.
+	* Makefile.in: Regenerated.
+
+2016-02-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-frv/fdpic-pie-6.d: Updated.
+	* testsuite/ld-mips-elf/pie-n32.d: Likewise.
+	* testsuite/ld-mips-elf/pie-n64.d: Likewise.
+	* testsuite/ld-mips-elf/pie-o32.d: Likewise.
+
+2016-02-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/pr19539.d: Skip cris*-*-* targets.
+
+2016-02-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-elf/pr19617a.d: Enable only for *-*-linux*,
+	*-*-gnu* and *-*-solaris*.
+	* testsuite/ld-elf/pr19617b.d: Likewise.
+	* testsuite/ld-elf/pr19617c.d: Likewise.
+
+2016-02-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19617
+	* testsuite/ld-elf/pr19617.s: New file.
+	* testsuite/ld-elf/pr19617a.d: Likewise.
+	* testsuite/ld-elf/pr19617b.d: Likewise.
+	* testsuite/ld-elf/pr19617c.d: Likewise.
+
+2016-02-18  Nick Clifton  <nickc@redhat.com>
+
+	* Makefile.am (CXX_FOR_TARGET): Check for the presence of an
+	in-tree xg++ executable after checking for the presence of an
+	in-tree g++ executable.
+	* Makefile.in: Regenerate.
+
+2016-02-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
+	* testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
+
+2016-02-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
+	* testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
+	* testsuite/ld-ifunc/pr17154-x86-64.d: Likewise.
+	* testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise.
+	* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
+	* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
+	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
+	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
+	* testsuite/ld-x86-64/load1c-nacl.d: Likewise.
+	* testsuite/ld-x86-64/load1c.d: Likewise.
+	* testsuite/ld-x86-64/load1d-nacl.d: Likewise.
+	* testsuite/ld-x86-64/load1d.d: Likewise.
+	* testsuite/ld-x86-64/pr14207.d: Likewise.
+	* testsuite/ld-x86-64/pr19162.d: Likewise.
+	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic.rd: Likewise.
+
+2016-02-17  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-elf/eh-frame-hdr.d: Skip for ARC ELF targets.
+
+2016-02-15  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-i386/pr12718.d: Remove dependency upon the
+	description of the flags produced by readelf.
+	* testsuite/ld-i386/pr12921.d: Likewise.
+	* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsbin.rd: Likewise.
+	* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsbindesc.rd: Likewise.
+	* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsdesc.rd: Likewise.
+	* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsgdesc.rd: Likewise.
+	* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlsnopic.rd: Likewise.
+	* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
+	* testsuite/ld-i386/tlspic.rd: Likewise.
+	* testsuite/ld-s390/tlsbin.rd: Likewise.
+	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
+	* testsuite/ld-s390/tlspic.rd: Likewise.
+	* testsuite/ld-s390/tlspic_64.rd: Likewise.
+	* testsuite/ld-sh/tlsbin-2.d: Likewise.
+	* testsuite/ld-sh/tlspic-2.d: Likewise.
+	* testsuite/ld-tic6x/common.d: Likewise.
+	* testsuite/ld-tic6x/shlib-1.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
+	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
+	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
+	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
+	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
+	* testsuite/ld-x86-64/pr12718.d: Likewise.
+	* testsuite/ld-x86-64/pr12921.d: Likewise.
+	* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/split-by-file.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbin.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
+	* testsuite/ld-x86-64/tlspic.rd: Likewise.
+	* testsuite/ld-xtensa/tlsbin.rd: Likewise.
+	* testsuite/ld-xtensa/tlspic.rd: Likewise.
+
+2016-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19615
+	* ld.texinfo: Document -Bsymbolic and -Bsymbolic-functions for
+	PIE.
+	* lexsup.c (parse_args): Enable -Bsymbolic and
+	-Bsymbolic-functions for PIE.
+	* testsuite/ld-i386/i386.exp: Run pr19615.
+	* testsuite/ld-i386/pr19615.d: New file.
+	* testsuite/ld-i386/pr19615.s: Likewise.
+	* testsuite/ld-x86-64/pr19615.d: Likewise.
+	* testsuite/ld-x86-64/pr19615.s: Likewise.
+
+2016-02-09  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-aarch64/reloc-overflow-bad.d: New test.
+	* testsuite/ld-aarch64/reloc-overflow-1.s: New source file.
+	* testsuite/ld-aarch64/reloc-overflow-2.s: New source file.
+	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
+
+2016-02-04  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-arm/arm-elf.exp: Remove ARM NOREAD section tests.
+	* testsuite/ld-arm/thumb1-input-section-flag-match.d: Delete.
+	* testsuite/ld-arm/thumb1-input-section-flag-match.s: Delete.
+	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.d: Delete.
+	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s: Delete.
+	* testsuite/ld-arm/thumb1-noread-present-one-section.d: Delete.
+	* testsuite/ld-arm/thumb1-noread-present-one-section.s: Delete.
+	* testsuite/ld-arm/thumb1-noread-present-two-section.d: Delete.
+	* testsuite/ld-arm/thumb1-noread-present-two-section.s: Delete.
+
+2016-02-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/19520
+	* testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as.
+	* testsuite/ld-i386/call1.d: Likewise.
+	* testsuite/ld-i386/call2.d: Likewise.
+	* testsuite/ld-i386/call3a.d: Likewise.
+	* testsuite/ld-i386/call3b.d: Likewise.
+	* testsuite/ld-i386/call3c.d: Likewise.
+	* testsuite/ld-i386/call3d.d: Likewise.
+	* testsuite/ld-i386/call3e.d: Likewise.
+	* testsuite/ld-i386/call3f.d: Likewise.
+	* testsuite/ld-i386/call3g.d: Likewise.
+	* testsuite/ld-i386/call3h.d: Likewise.
+	* testsuite/ld-i386/jmp1.d: Likewise.
+	* testsuite/ld-i386/jmp2.d: Likewise.
+	* testsuite/ld-i386/lea1c.d: Likewise.
+	* testsuite/ld-i386/load1.d: Likewise.
+	* testsuite/ld-i386/load2.d: Likewise.
+	* testsuite/ld-i386/load3.d: Likewise.
+	* testsuite/ld-i386/load4a.d: Likewise.
+	* testsuite/ld-i386/load5a.d: Likewise.
+	* testsuite/ld-i386/mov2b.d: Likewise.
+	* testsuite/ld-i386/mov3.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
+	* testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
+	* testsuite/ld-x86-64/call1a.d: Likewise.
+	* testsuite/ld-x86-64/call1b.d: Likewise.
+	* testsuite/ld-x86-64/call1c.d: Likewise.
+	* testsuite/ld-x86-64/call1d.d: Likewise.
+	* testsuite/ld-x86-64/call1e.d: Likewise.
+	* testsuite/ld-x86-64/call1f.d: Likewise.
+	* testsuite/ld-x86-64/call1h.d: Likewise.
+	* testsuite/ld-x86-64/call1i.d: Likewise.
+	* testsuite/ld-x86-64/load1a.d: Likewise.
+	* testsuite/ld-x86-64/load1b.d: Likewise.
+	* testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it.
+	* testsuite/ld-i386/got1.dd: Updated.
+	* testsuite/ld-i386/got1d.S (1): Removed.
+	* testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes.
+	* testsuite/ld-x86-64/x86-64.exp: Likewise.
+
+2016-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/18591
+	* testsuite/ld-x86-64/pr18591.d: New file.
+	* testsuite/ld-x86-64/pr18591.s: Likewise.
+	* testsuite/ld-x86-64/x86-64.exp: Run pr18591.
+
+2016-02-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19553
+	* testsuite/ld-elf/indirect.exp: Run tests for PR ld/19553.
+	* testsuite/ld-elf/pr19553.map: New file.
+	* testsuite/ld-elf/pr19553.map: Likewise.
+	* testsuite/ld-elf/pr19553a.c: Likewise.
+	* testsuite/ld-elf/pr19553b.c: Likewise.
+	* testsuite/ld-elf/pr19553b.out: Likewise.
+	* testsuite/ld-elf/pr19553c.c: Likewise.
+	* testsuite/ld-elf/pr19553c.out: Likewise.
+	* testsuite/ld-elf/pr19553d.c: Likewise.
+	* testsuite/ld-elf/pr19553d.out: Likewise.
+
+2016-01-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19539
+	* testsuite/ld-elf/pr19539.d: New file.
+	* testsuite/ld-elf/pr19539.s: Likewise.
+	* testsuite/ld-elf/pr19539.t: Likewise.
+
+2016-01-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/19533
+	* configure.ac (compressed_debug_sections): Replace == with =.
+	* configure: Regenerated.
+
+2016-01-22  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	* scripttempl/avr.sc (.noinit): Force .noinit VMA to end of .bss VMA.
+	* scripttempl/avrtiny.sc (.noinit): Likewise.
+
+2016-01-21  Nick Clifton  <nickc@redhat.com>
+
+	PR ld/19453
+	* testsuite/ld-arm/arm-elf.exp: Skip tests that do not work for
+	the arm-netbsdelf target.
+
+	PR ld/19455
+	* testsuite/ld-arm/vxworks1-lib.dd: Update for current
+	disassmebler output.
+	* testsuite/ld-arm/vxworks1-lib.rd: Likewise.
+	* testsuite/ld-arm/vxworks1.dd: Likewise.
+	* testsuite/ld-arm/vxworks1.rd: Likewise.
+	* testsuite/ld-arm/vxworks1.ld: Set the output format.
+
+2016-01-20  Jiong Wang  <jiong.wang@arm.com>
+
+	* testsuite/ld-aarch64/farcall-section.d: Delete.
+	* testsuite/ld-aarch64/farcall-section.s: Delete.
+	* testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
+	* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
+	* testsuite/ld-aarch64/farcall-b-section.s: New testcase.
+	* testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
+	* testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
+
+2016-01-20  Nick Clifton  <nickc@redhat.com>
+
+	PR 19457
+	* testsuite/ld-scripts/script.exp (extract_symbol_test): Stop test
+	early for PE based targets.
+	* testsuite/ld-scripts/align.t: Use 0x1000 as VMA alignment.
+	* testsuite/ld-pe/tlssec32.d: Allow for relocatable output.
+
+2016-01-20  Mickael Guene  <mickael.guene@st.com>
+
+	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s:
+	Add 'y' attribute usage.
+	* testsuite/ld-arm/thumb1-noread-present-one-section.s: Likewise.
+	* testsuite/ld-arm/thumb1-noread-present-two-section.s: Likewise.
+	* testsuite/ld-arm/thumb1-input-section-flag-match.s: Likewise.
+
+2016-01-19  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-elf/pr18735.d: Allow for extra symbols between
+	foo@FOO and bar@@FOO.
+
+2016-01-18  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-18  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-plugin/plugin.exp: Skip plugin tests if the linker
+	is not configured to support plugins.
+
+	* testsuite/ld-scripts/rgn-at11.s: New file - based on rgn-at10.s
+	but with 16 byte section alignment.
+	* testsuite/ld-scripts/rgn-at11.d: Use new source file.  Reenable
+	test for MIPS targets.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate.
+	* testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate.
+	* testsuite/ld-elf/pr14156a.d: Likewise.
+	* testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate.
+	* testsuite/ld-elf/sec64k.exp: Likewise.
+
+2016-01-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)):
+	Set address of .foo section when linking.
+	* testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc
+	in .foo section.
+	* testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected
+	output to the above changes.
+
+2016-01-13  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/ld-elf/elf.exp (-Bymsolic-functions): Expect to fail
+	for MIPS targets.
+
+	* testsuite/ld-scripts/script.exp (extract_symbol_test): Expect to
+	fail for MIPS targets.
+
+	* testsuite/ld-scripts/rgn-at11.d: Expect this test to fail for
+	MIPS targets.
+
+2016-01-12  Yury Usishchev  <y.usishchev@samsung.com>
+
+	* testsuite/ld-arm/arm-elf.exp: New test.
+	* testsuite/ld-arm/unwind-mix.d: New file.
+	* testsuite/ld-arm/unwind-mix1.s: New file.
+	* testsuite/ld-arm/unwind-mix2.s: New file.
+
+2016-01-08  Jiong Wang  <jiong.wang@arm.com>
+
+	PR ld/19368
+	* testsuite/ld-arm/ifunc-3.rd: Update expected result.
+	* testsuite/ld-arm/ifunc-4.rd: Likewise.
+	* testsuite/ld-arm/ifunc-9.rd: Likewise.
+	* testsuite/ld-arm/ifunc-10.rd: Likewise.
+	* testsuite/ld-arm/ifunc-12.rd: Likewise.
+	* testsuite/ld-arm/ifunc-13.rd: Likewise.
+
+2016-01-05  Nick Clifton  <nickc@redhat.com>
+
+	* emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the
+	MSP430 hardware multiply address range.
+	* scripttempl/elf32msp430.sc (__romdatastart): Define.
+	(__romdatacopysize): Define.
+	* scripttempl/elf32msp430_3.sc: Likewise.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* emultempl/mipself.em (PARSE_AND_LIST_PROLOGUE): Convert
+	OPTION_INSN32 and OPTION_NO_INSN32 macros to an enum.
+
+2016-01-04  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of
+	messages expected according to MIPS BFD private data merge
+	changes.
+	* testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise.
+	* testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-2015 and testsuite/ChangeLog-2015
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End:
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fd78dd3..e33ce1b 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,2171 +1,6 @@
-2016-12-31  Alan Modra  <amodra@gmail.com>
-
-	* disassemble.c (disassembler): Add break accidentally removed
-	by PRU patch.
-
-2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
-
-	* Makefile.am: Add PRU source files.
-	* configure.ac: Add PRU target.
-	* disassemble.c (disassembler): Register PRU arch.
-	* pru-dis.c: New file.
-	* pru-opc.c: New file.
-	* Makefile.in: Regenerate.
-	* configure: Regenerate.
-
-2016-12-29  Yao Qi  <yao.qi@linaro.org>
-
-	* avr-dis.c: Include "bfd_stdint.h"
-	(avrdis_opcode): Change return type to int, add argument
-	insn.  Set *INSN on success.
-	(print_insn_avr): Check return value of avrdis_opcode, and
-	return -1 on error.
-
-2016-12-28  Alan Modra  <amodra@gmail.com>
-
-	* configure.ac: Revert 2016-12-23.
-	* Makefile.am: Likewise.
-	(MIPS_DEFS): Define.
-	(mips-dis.lo): Add rule.
-	* Makefile.in: Regenerate.
-	* aclocal.m4: Regenerate.
-	* config.in: Regenerate.
-	* configure: Regenerate.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (decode_mips16_operand): Add `0', `1', `2', `3',
-	`4' and `s' operand codes.
-	(mips16_opcodes): Add "asmacro" entry.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_mips16_insn_arg): Simplify processing of
-	extended operands.
-	* mips16-opc.c (decode_mips16_operand): Switch the extended
-	form of the `<' operand type to LSB position 22.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (decode_mips16_operand): Replace `0' and `4'
-	operand codes with `.' and `F' respectively.
-	(mips16_opcodes): Likewise.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_insn_mips16): Disallow EXTEND prefix
-	matching for INSN2_SHORT_ONLY opcode table entries.
-	* mips16-opc.c (SH): New macro.
-	(mips16_opcodes): Set SH in `pinfo2' for non-extensible
-	instruction entries: "nop", "addu", "and", "break", "cmp",
-	"daddu", "ddiv", "ddivu", "div", "divu", "dmult", "dmultu",
-	"drem", "dremu", "dsllv", "dsll", "dsrav", "dsra", "dsrlv",
-	"dsrl", "dsubu", "exit", "entry", "jalr", "jal", "jr", "j",
-	"jalrc", "jrc", "mfhi", "mflo", "move", "mult", "multu", "neg",
-	"not", "or", "rem", "remu", "sllv", "sll", "slt", "sltu",
-	"srav", "sra", "srlv", "srl", "subu", "xor", "sdbbp", "seb",
-	"seh", "sew", "zeb", "zeh", "zew" and "extend".
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (decode_mips16_operand) <'6'>: Remove extended
-	encoding support.
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (mips16_opcodes): Set NODS in `pinfo' for
-	"extend".
-
-2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (set_default_mips_dis_options): Use
-	HAVE_BFD_MIPS_ELF_GET_ABIFLAGS rather than BFD64 to guard the
-	call to `bfd_mips_elf_get_abiflags'.
-	* configure.ac: Check for `bfd_mips_elf_get_abiflags' in BFD.
-	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add `libbfd.la'.
-	* aclocal.m4: Regenerate.
-	* configure: Regenerate.
-	* config.in: Regenerate.
-	* Makefile.in: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* configure: Regenerate.
-
-2016-12-23  Tristan Gingold  <gingold@adacore.com>
-
-	* po/opcodes.pot: Regenerate.
-
-2016-12-21  Andrew Waterman  <andrew@sifive.com>
-
-	* riscv-opc.c (riscv_opcodes): Reorder jal and call entries.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (mips_arch_choices): Use ISA_MIPS64 rather than
-	ISA_MIPS3 as the `isa' selection in the `bfd_mach_mips16' entry.
-	(print_insn_mips16): Check opcode entries for validity against
-	the ISA level and ASE set selected.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_mips16_insn_arg): Always handle `extend' and
-	`insn' together, with `extend' as the high-order 16 bits.
-	(match_kind): New enum.
-	(print_insn_mips16): Rework for 32-bit instruction matching.
-	Do not dump EXTEND prefixes here.
-	* mips16-opc.c (mips16_opcodes): Move "extend" entry to the end.
-	Recode `match' and `mask' fields as 32-bit in absolute "jal" and
-	"jalx" entries.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
-	than I1 for the "ddiv", "ddivu", "drem", "dremu" and "dsubu"
-	INSN_MACRO entries.
-
-2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
-	than I1 for the SP-relative "sd"/$ra entry (SDRASP minor
-	opcode).
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* riscv-opc.c (riscv_opcodes): Rename the "*.sc" instructions to
-	"*.aqrl".
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* riscv-opc.c (riscv_opcodes): Mark the rd* and csr* aliases as
-	INSN_ALIAS.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* riscv-opc.c (riscv_opcodes): Change jr and jalr to "o(s)"
-	format.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
-	XLEN when none is provided.
-
-2016-12-20  Andrew Waterman  <andrew@sifive.com>
-
-	* riscv-opc.c: Formatting fixes.
-
-2016-12-20  Alan Modra  <amodra@gmail.com>
-
-	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add riscv files.
-	* Makefile.in: Regenerate.
-	* po/POTFILES.in: Regenerate.
-
-2016-12-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (set_default_mips_dis_options) [SYMTAB_AVAILABLE]:
-	Only examine ELF file structures here.
-
-2016-12-19  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (set_default_mips_dis_options) [BFD64]: Only call
-	`bfd_mips_elf_get_abiflags' here.
-
-2016-12-16  Nick Clifton  <nickc@redhat.com>
-
-	* arm-dis.c (print_insn_thumb32): Fix compile time warning
-	computing value_in_comment.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (mips_convert_abiflags_ases): New function.
-	(set_default_mips_dis_options): Also infer ASE flags from ELF
-	file structures.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (set_default_mips_dis_options): Reorder ELF file
-	header flag interpretation code.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (mips16_opcodes): Set RD_SP rather than RD_PC in
-	`pinfo2' with SP-relative "sd" entries.
-
-2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (mips16_opcodes): Update comments on MIPS16e
-	compact jumps.
-
-2016-12-13 Renlin Li <renlin.li@arm.com>
-
-	* aarch64-opc.c (aarch64_opnd_qualifiers): New CR value range
-	qualifier.
-	(operand_general_constraint_met_p): Remove case for CP_REG.
-	(aarch64_print_operand): Print CRn, CRm operand using imm field.
-	* aarch64-tbl.h (QL_SYS): Use CR qualifier.
-	(QL_SYSL): Likewise.
-	(aarch64_opcode_table): Change CRn, CRm operand class and type.
-	* aarch64-opc-2.c : Regenerate.
-	* aarch64-asm-2.c : Likewise.
-	* aarch64-dis-2.c : Likewise.
-
-2016-12-12  Yao Qi  <yao.qi@linaro.org>
-
-	* rx-dis.c: Include <setjmp.h>
-	(struct private): New.
-	(rx_get_byte): Check return value of read_memory_func, and
-	call memory_error_func and OPCODES_SIGLONGJMP on error.
-	(print_insn_rx): Call OPCODES_SIGSETJMP.
-
-2016-12-12  Yao Qi  <yao.qi@linaro.org>
-
-	* rl78-dis.c: Include <setjmp.h>.
-	(struct private): New.
-	(rl78_get_byte): Check return value of read_memory_func, and
-	call memory_error_func and OPCODES_SIGLONGJMP on error.
-	(print_insn_rl78_common): Call OPCODES_SIGJMP.
-
-2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (decode_mips16_operand) <'>'>: Remove cases.
-
-2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (decode_mips16_operand) <'e'>: Use HINT rather
-	than UINT.
-
-2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_insn_mips16): Use a tab rather than a space
-	to separate `extend' and its uninterpreted argument output.
-	Separate hexadecimal halves of undecoded extended instructions
-	output.
-
-2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_mips16_insn_arg): Remove extraneous
-	indentation space across.
-
-2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_mips16_insn_arg): Avoid delay-slot
-	adjustment for PC-relative operations following MIPS16e compact
-	jumps or undefined RR/J(AL)R(C) encodings.
-
-2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* aarch64-asm.c (aarch64_ins_reglane): Rename `index' local
-	variable to `reglane_index'.
-
-2016-12-08  Luis Machado  <lgustavo@codesourcery.com>
-
-	* ppc-dis.c (get_powerpc_dialect): Check NULL info->section.
-
-2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_mips16_insn_arg): Fix comment typo.
-
-2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips16-opc.c (mips16_opcodes): Update comment naming structure
-	members.
-
-2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_mips_disassembler_options): Reformat output.
-
-2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* arm-dis.c (coprocessor_opcodes): Add vcmla and vcadd.
-	(print_insn_coprocessor): Add 'V' format for neon D or Q regs.
-
-2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* arm-dis.c (coprocessor_opcodes): Add vjcvt.
-
-2016-12-01  Nick Clifton  <nickc@redhat.com>
-
-	PR binutils/20893
-	* i386-dis.c (OP_VEX): Replace call to abort with a append of bad
-	opcode designator.
-
-2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-opc.c (insert_ra_chk): New function.
-	(insert_rb_chk): Likewise.
-	(insert_rad): Update text error message.
-	(insert_rcd): Likewise.
-	(insert_rhv2): Likewise.
-	(insert_r0): Likewise.
-	(insert_r1): Likewise.
-	(insert_r2): Likewise.
-	(insert_r3): Likewise.
-	(insert_sp): Likewise.
-	(insert_gp): Likewise.
-	(insert_pcl): Likewise.
-	(insert_blink): Likewise.
-	(insert_ilink1): Likewise.
-	(insert_ilink2): Likewise.
-	(insert_ras): Likewise.
-	(insert_rbs): Likewise.
-	(insert_rcs): Likewise.
-	(insert_simm3s): Likewise.
-	(insert_rrange): Likewise.
-	(insert_fpel): Likewise.
-	(insert_blinkel): Likewise.
-	(insert_pcel): Likewise.
-	(insert_nps_3bit_dst): Likewise.
-	(insert_nps_3bit_dst_short): Likewise.
-	(insert_nps_3bit_src2_short): Likewise.
-	(insert_nps_bitop_size_2b): Likewise.
-	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Likewise.
-	(RA_CHK): Define.
-	(RB): Adjust.
-	(RB_CHK): Define.
-	(RC): Adjust.
-	* arc-dis.c (print_insn_arc): Add LOAD and STORE class.
-	* arc-tbl.h (div, divu): All instructions are DIVREM class.
-	Change first insn argument to check for LP_COUNT usage.
-	(rem): Likewise.
-	(ld, ldd): All instructions are LOAD class.  Change first insn
-	argument to check for LP_COUNT usage.
-	(st, std): All instructions are STORE class.
-	(mac, mpy, dmac, mul, dmpy): All instructions are MPY class.
-	Change first insn argument to check for LP_COUNT usage.
-	(mov): All instructions are MOVE class.  Change first insn
-	argument to check for LP_COUNT usage.
-
-2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-dis.c (is_compatible_p): Remove function.
-	(skip_this_opcode): Don't add any decoding class to decode list.
-	Remove warning.
-	(find_format_from_table): Go through all opcodes, and warn if we
-	use a guessed mnemonic.
-
-2016-11-28  Ramiro Polla  <ramiro@hex-rays.com>
-	    Amit Pawar  <amit.pawar@amd.com>
-
-	PR binutils/20637
-	* i386-dis.c (get_valid_dis386): Ignore REX_B for 32-bit XOP
-	instructions.
-
-2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
-
-        * configure: Regenerate.
-
-2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-opc.c (HWS_V8): Definition moved from
-	gas/config/tc-sparc.c.
-	(HWS_V9): Likewise.
-	(HWS_VA): Likewise.
-	(HWS_VB): Likewise.
-	(HWS_VC): Likewise.
-	(HWS_VD): Likewise.
-	(HWS_VE): Likewise.
-	(HWS_VV): Likewise.
-	(HWS_VM): Likewise.
-	(HWS2_VM): Likewise.
-	(sparc_opcode_archs): Initialize hwcaps and hwcaps2 fields of
-	existing entries.
-
-2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-tbl.h: Reorder conditional flags with delay flags for 'b'
-	instructions.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (QL_V3SAMEHSD_ROT, QL_ELEMENT_ROT): Define.
-	(aarch64_feature_simd_v8_3, SIMD_V8_3): Define.
-	(aarch64_opcode_table): Add fcmla and fcadd.
-	(AARCH64_OPERANDS): Add IMM_ROT{1,2,3}.
-	* aarch64-asm.h (aarch64_ins_imm_rotate): Declare.
-	* aarch64-asm.c (aarch64_ins_imm_rotate): Define.
-	* aarch64-dis.h (aarch64_ext_imm_rotate): Declare.
-	* aarch64-dis.c (aarch64_ext_imm_rotate): Define.
-	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_rotate{1,2,3}.
-	* aarch64-opc.c (fields): Add FLD_rotate{1,2,3}.
-	(operand_general_constraint_met_p): Rotate and index range check.
-	(aarch64_print_operand): Handle rotate operand.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Likewise.
-	* aarch64-opc-2.c: Likewise.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (arch64_opcode_table): Add ldaprb, ldaprh, ldapr.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Regenerate.
-	* aarch64-opc-2.c: Regenerate.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (arch64_opcode_table): Add fjcvtzs.
-	(QL_FP2INT_W_D, aarch64_feature_fp_v8_3, FP_V8_3): Define.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Regenerate.
-	* aarch64-opc-2.c: Regenerate.
-
-2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (QL_X1NIL): New.
-	(arch64_opcode_table): Add ldraa, ldrab.
-	(AARCH64_OPERANDS): Add "ADDR_SIMM10".
-	* aarch64-asm.h (aarch64_ins_addr_simm10): Declare.
-	* aarch64-asm.c (aarch64_ins_addr_simm10): Define.
-	* aarch64-dis.h (aarch64_ext_addr_simm10): Declare.
-	* aarch64-dis.c (aarch64_ext_addr_simm10): Define.
-	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_S_simm10.
-	* aarch64-opc.c (fields): Add data for FLD_S_simm10.
-	(operand_general_constraint_met_p): Handle AARCH64_OPND_ADDR_SIMM10.
-	(aarch64_print_operand): Likewise.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Regenerate.
-	* aarch64-opc-2.c: Regenerate.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (arch64_opcode_table): Add braa, brab, blraa, blrab, braaz,
-	brabz, blraaz, blrabz, retaa, retab, eretaa, eretab.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Regenerate.
-	* aarch64-opc-2.c: Regenerate.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (arch64_opcode_table): Add pacga.
-	(AARCH64_OPERANDS): Add Rm_SP.
-	* aarch64-opc.c (aarch64_print_operand): Handle AARCH64_OPND_Rm_SP.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Regenerate.
-	* aarch64-opc-2.c: Regenerate.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (arch64_opcode_table): Add pacia, pacib, pacda, pacdb, autia,
-	autib, autda, autdb, paciza, pacizb, pacdza, pacdzb, autiza, autizb, autdza,
-	autdzb, xpaci, xpacd.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Regenerate.
-	* aarch64-opc-2.c: Regenerate.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-opc.c (aarch64_sys_regs): Add apiakeylo_el1, apiakeyhi_el1,
-	apibkeylo_el1, apibkeyhi_el1, apdakeylo_el1, apdakeyhi_el1,
-	apdbkeylo_el1, apdbkeyhi_el1, apgakeylo_el1 and apgakeyhi_el1.
-	(aarch64_sys_reg_supported_p): Add feature test for new registers.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-tbl.h (aarch64_feature_v8_3, ARMV8_3, V8_3_INSN): New.
-	(arch64_opcode_table): Add xpaclri, pacia1716, pacib1716, autia1716,
-	autib1716, paciaz, paciasp, pacibz, pacibsp, autiaz, autiasp, autibz,
-	autibsp.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-gen.c (find_alias_opcode): Increase max_num_aliases to 32.
-
-2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20799
-	* i386-dis-evex.h (evex_table): Replace EdqwS with Edqw.
-	* i386-dis.c (EdqwS): Removed.
-	(dqw_swap_mode): Likewise.
-	(intel_operand_size): Don't check dqw_swap_mode.
-	(OP_E_register): Likewise.
-	(OP_E_memory): Likewise.
-	(OP_G): Likewise.
-	(OP_EX): Likewise.
-	* i386-opc.tbl: Remove "S" from EVEX vpextrw.
-	* i386-tbl.h: Regerated.
-
-2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-opc.tbl: Merge AVX512F vmovq.
-	* i386-tbl.h: Regerated.
-
-2016-11-08  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20701
-	* i386-dis.c (THREE_BYTE_0F7A): Removed.
-	(dis386_twobyte): Don't use THREE_BYTE_0F7A.
-	(three_byte_table): Remove THREE_BYTE_0F7A.
-
-2016-11-07  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20775
-	* i386-dis.c (FGRPd9_2): Replace 0 with 1.
-	(FGRPd9_4): Replace 1 with 2.
-	(FGRPd9_5): Replace 2 with 3.
-	(FGRPd9_6): Replace 3 with 4.
-	(FGRPd9_7): Replace 4 with 5.
-	(FGRPda_5): Replace 5 with 6.
-	(FGRPdb_4): Replace 6 with 7.
-	(FGRPde_3): Replace 7 with 8.
-	(FGRPdf_4): Replace 8 with 9.
-	(fgrps): Add an entry for Bad_Opcode.
-
-2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-opc.c (arc_flag_operands): Add F_DI14.
-	(arc_flag_classes): Add C_DI14.
-	* arc-nps400-tbl.h: Add new exc instructions.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-dis.c (arc_insn_length): Return length 8 for instructions with
-	major opcode 0xa.
-	* arc-nps-400-tbl.h: Add dcmac instruction.
-	* arc-opc.c (arc_operands): Added operands for dcmac instruction.
-	(insert_nps_rbdouble_64): Added.
-	(extract_nps_rbdouble_64): Added.
-	(insert_nps_proto_size): Added.
-	(extract_nps_proto_size): Added.
-
-2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-dis.c (struct arc_operand_iterator): Remove all fields
-	relating to long instruction processing, add new limm field.
-	(OPCODE): Rename to...
-	(OPCODE_32BIT_INSN): ...this.
-	(OPCODE_AC): Delete.
-	(skip_this_opcode): Handle different instruction lengths, update
-	macro name.
-	(special_flag_p): Update parameter type.
-	(find_format_from_table): Update for more instruction lengths.
-	(find_format_long_instructions): Delete.
-	(find_format): Update for more instruction lengths.
-	(arc_insn_length): Likewise.
-	(extract_operand_value): Update for more instruction lengths.
-	(operand_iterator_next): Remove code relating to long
-	instructions.
-	(arc_opcode_to_insn_type): New function.
-	(print_insn_arc):Update for more instructions lengths.
-	* arc-ext.c (extInstruction_t): Change argument type.
-	* arc-ext.h (extInstruction_t): Change argument type.
-	* arc-fxi.h: Change type unsigned to unsigned long long
-	extensively throughout.
-	* arc-nps400-tbl.h: Add long instructions taken from
-	arc_long_opcodes table in arc-opc.c.
-	* arc-opc.c: Update parameter types on insert/extract handlers.
-	(arc_long_opcodes): Delete.
-	(arc_num_long_opcodes): Delete.
-	(arc_opcode_len): Update for more instruction lengths.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-dis.c (print_insn_arc): Swap highbyte and lowbyte.
-
-2016-11-03  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-dis.c (find_format_from_table): Replace use of ARC_SHORT
-	with arc_opcode_len.
-	(find_format_long_instructions): Likewise.
-	* arc-opc.c (arc_opcode_len): New function.
-
-2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: Fix some instruction masks.
-
-2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-dis.c (REG_82): Removed.
-	(X86_64_82_REG_0): Likewise.
-	(X86_64_82_REG_1): Likewise.
-	(X86_64_82_REG_2): Likewise.
-	(X86_64_82_REG_3): Likewise.
-	(X86_64_82_REG_4): Likewise.
-	(X86_64_82_REG_5): Likewise.
-	(X86_64_82_REG_6): Likewise.
-	(X86_64_82_REG_7): Likewise.
-	(X86_64_82): New.
-	(dis386): Use X86_64_82 instead of REG_82.
-	(reg_table): Remove REG_82.
-	(x86_64_table): Add X86_64_82.  Remove X86_64_82_REG_0,
-	X86_64_82_REG_1, X86_64_82_REG_2, X86_64_82_REG_3,
-	X86_64_82_REG_4, X86_64_82_REG_5, X86_64_82_REG_6 and
-	X86_64_82_REG_7.
-
-2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20754
-	* i386-dis.c (REG_82): New.
-	(X86_64_82_REG_0): Likewise.
-	(X86_64_82_REG_1): Likewise.
-	(X86_64_82_REG_2): Likewise.
-	(X86_64_82_REG_3): Likewise.
-	(X86_64_82_REG_4): Likewise.
-	(X86_64_82_REG_5): Likewise.
-	(X86_64_82_REG_6): Likewise.
-	(X86_64_82_REG_7): Likewise.
-	(dis386): Use REG_82.
-	(reg_table): Add REG_82.
-	(x86_64_table): Add X86_64_82_REG_0, X86_64_82_REG_1,
-	X86_64_82_REG_2, X86_64_82_REG_3, X86_64_82_REG_4,
-	X86_64_82_REG_5, X86_64_82_REG_6 and X86_64_82_REG_7.
-
-2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-dis.c (REG_82): Renamed to ...
-	(REG_83): This.
-	(dis386): Updated.
-	(reg_table): Likewise.
-
-2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
-
-	* i386-dis.c (enum): Add PREFIX_EVEX_0F3852, PREFIX_EVEX_0F3853.
-	* i386-dis-evex.h (evex_table): Updated.
-	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4VNNIW_FLAGS,
-	CPU_ANY_AVX512_4VNNIW_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
-	(cpu_flags): Add CpuAVX512_4VNNIW.
-	* i386-opc.h (enum): (AVX512_4VNNIW): New.
-	(i386_cpu_flags): Add cpuavx512_4vnniw.
-	* i386-opc.tbl: Add Intel AVX512_4VNNIW instructions.
-	* i386-init.h: Regenerate.
-	* i386-tbl.h: Ditto.
-
-2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
-
-	* i386-dis.c. (enum): Add PREFIX_EVEX_0F389A,
-	PREFIX_EVEX_0F389B, PREFIX_EVEX_0F38AA, PREFIX_EVEX_0F38AB.
-	* i386-dis-evex.h (evex_table): Updated.
-	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4FMAPS_FLAGS,
-	CPU_ANY_AVX512_4FMAPS_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
-	(cpu_flags): Add CpuAVX512_4FMAPS.
-	(opcode_modifiers): Add ImplicitQuadGroup modifier.
-	* i386-opc.h (AVX512_4FMAP): New.
-	(i386_cpu_flags): Add cpuavx512_4fmaps.
-	(ImplicitQuadGroup): New.
-	(i386_opcode_modifier): Add implicitquadgroup.
-	* i386-opc.tbl: Add Intel AVX512_4FMAPS instructions.
-	* i386-init.h: Regenerate.
-	* i386-tbl.h: Ditto.
-
-2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
-	    Andrew Waterman <andrew@sifive.com>
-
-	Add support for RISC-V architecture.
-	* configure.ac: Add entry for bfd_riscv_arch.
-	* configure: Regenerate.
-	* disassemble.c (disassembler): Add support for riscv.
-	(disassembler_usage): Likewise.
-	* riscv-dis.c: New file.
-	* riscv-opc.c: New file.
-
-2016-10-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-dis.c (PREFIX_RM_0_0FAE_REG_7): Removed.
-	(prefix_table): Remove the PREFIX_RM_0_0FAE_REG_7 entry.
-	(rm_table): Update the RM_0FAE_REG_7 entry.
-	* i386-gen.c (cpu_flag_init): Remove CPU_PCOMMIT_FLAGS.
-	(cpu_flags): Remove CpuPCOMMIT.
-	* i386-opc.h (CpuPCOMMIT): Removed.
-	(i386_cpu_flags): Remove cpupcommit.
-	* i386-opc.tbl: Remove pcommit.
-	* i386-init.h: Regenerated.
-	* i386-tbl.h: Likewise.
-
-2016-10-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutis/20705
-	* i386-dis.c (get_valid_dis386): Ignore the REX_B bit and
-	the highest bit in VEX.vvvv for the 3-byte VEX prefix in
-	32-bit mode.  Don't check vex.register_specifier in 32-bit
-	mode.
-	(OP_VEX): Check for invalid mask registers.
-
-2016-10-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutis/20699
-	* i386-dis.c (OP_E_memory): Check addr32flag in stead of
-	sizeflag.
-
-2016-10-18  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutis/20704
-	* i386-dis.c (three_byte_table): Remove the remaining SSE5 support.
-
-2016-10-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* aarch64-dis.c (aarch64_ext_sve_addr_rr_lsl): Rename `index'
-	local variable to `index_regno'.
-
-2016-10-17  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* arc-tbl.h: Removed any "inv.+" instructions from the table.
-
-2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-dis.c (find_format_from_table): Discriminate LIMM indicator
-	usage on ISA basis.
-
-2016-10-11  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20666
-	* aarch64-asm.c (convert_bfc_to_bfm): Fix dest index.
-
-2016-10-07  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20667
-	* aarch64-opc.c (aarch64_print_operand): Always print operand if it's
-	available.
-
-2016-10-07  Alan Modra  <amodra@gmail.com>
-
-	* sh-opc.h (sh_merge_bfd_arch): Delete prototype.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* aarch64-opc.c: Spell fall through comments consistently.
-	* i386-dis.c: Likewise.
-	* aarch64-dis.c: Add missing fall through comments.
-	* aarch64-opc.c: Likewise.
-	* arc-dis.c: Likewise.
-	* arm-dis.c: Likewise.
-	* i386-dis.c: Likewise.
-	* m68k-dis.c: Likewise.
-	* mep-asm.c: Likewise.
-	* ns32k-dis.c: Likewise.
-	* sh-dis.c: Likewise.
-	* tic4x-dis.c: Likewise.
-	* tic6x-dis.c: Likewise.
-	* vax-dis.c: Likewise.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* arc-ext.c (create_map): Add missing break.
-	* msp430-decode.opc (encode_as): Likewise.
-	* msp430-decode.c: Regenerate.
-
-2016-10-06  Alan Modra  <amodra@gmail.com>
-
-	* cr16-dis.c (print_insn_cr16): Don't use boolean OR in arithmetic.
-	* crx-dis.c (print_insn_crx): Likewise.
-
-2016-09-30  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/20657
-	* i386-dis.c (putop): Don't assign alt twice.
-
-2016-09-29  Jiong Wang  <jiong.wang@arm.com>
-
-	PR target/20553
-	* aarch64-tbl.h (fmla, fmls, fmul, fmulx): Fix opcode mask field.
-
-2016-09-29  Alan Modra  <amodra@gmail.com>
-
-	* ppc-opc.c (L): Make compulsory.
-	(LOPT): New, optional form of L.
-	(HTM_R): Define as LOPT.
-	(L0, L1): Delete.
-	(L32OPT): New, optional for 32-bit L.
-	(L2OPT): New, 2-bit L for dcbf.
-	(SVC_LEC): Update.
-	(L2): Define.
-	(insert_l0, extract_l0, insert_l1, extract_l2): Delete.
-	(powerpc_opcodes <cmpli, cmpi, cmpl, cmp>): Use L32OPT.
-	<dcbf>: Use L2OPT.
-	<tlbiel, tlbie>: Use LOPT.
-	<wclr, wclrall>: Use L2.
-
-2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
-
-	* Makefile.in: Regenerate.
-	* configure: Likewise.
-
-2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-ext-tbl.h (EXTINSN2OPF): Define.
-	(EXTINSN2OP): Use EXTINSN2OPF.
-	(bspeekm, bspop, modapp): New extension instructions.
-	* arc-opc.c (F_DNZ_ND): Define.
-	(F_DNZ_D): Likewise.
-	(F_SIZEB1): Changed.
-	(C_DNZ_D): Define.
-	(C_HARD): Changed.
-	* arc-tbl.h (dbnz): New instruction.
-	(prealloc): Allow it for ARC EM.
-	(xbfu): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (print_immediate_offset_address): Print spaces
-	after commas in addresses.
-	(aarch64_print_operand): Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (operand_general_constraint_met_p): Use "must be"
-	rather than "should be" or "expected to be" in error messages.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-dis.c (remove_dot_suffix): New function, split out from...
-	(print_mnemonic_name): ...here.
-	(print_comment): New function.
-	(print_aarch64_insn): Call it.
-	* aarch64-opc.c (aarch64_conds): Add SVE names.
-	(aarch64_print_operand): Print alternative condition names in
-	a comment.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (OP_SVE_B, OP_SVE_BB, OP_SVE_BBBU, OP_SVE_BMB)
-	(OP_SVE_BPB, OP_SVE_BUB, OP_SVE_BUBB, OP_SVE_BUU, OP_SVE_BZ)
-	(OP_SVE_BZB, OP_SVE_BZBB, OP_SVE_BZU, OP_SVE_DD, OP_SVE_DDD)
-	(OP_SVE_DMD, OP_SVE_DMH, OP_SVE_DMS, OP_SVE_DU, OP_SVE_DUD, OP_SVE_DUU)
-	(OP_SVE_DUV_BHS, OP_SVE_DUV_BHSD, OP_SVE_DZD, OP_SVE_DZU, OP_SVE_HB)
-	(OP_SVE_HMD, OP_SVE_HMS, OP_SVE_HU, OP_SVE_HUU, OP_SVE_HZU, OP_SVE_RR)
-	(OP_SVE_RURV_BHSD, OP_SVE_RUV_BHSD, OP_SVE_SMD, OP_SVE_SMH, OP_SVE_SMS)
-	(OP_SVE_SU, OP_SVE_SUS, OP_SVE_SUU, OP_SVE_SZS, OP_SVE_SZU, OP_SVE_UB)
-	(OP_SVE_UUD, OP_SVE_UUS, OP_SVE_VMR_BHSD, OP_SVE_VMU_SD)
-	(OP_SVE_VMVD_BHS, OP_SVE_VMVU_BHSD, OP_SVE_VMVU_SD, OP_SVE_VMVV_BHSD)
-	(OP_SVE_VMVV_SD, OP_SVE_VMV_BHSD, OP_SVE_VMV_HSD, OP_SVE_VMV_SD)
-	(OP_SVE_VM_SD, OP_SVE_VPU_BHSD, OP_SVE_VPV_BHSD, OP_SVE_VRR_BHSD)
-	(OP_SVE_VRU_BHSD, OP_SVE_VR_BHSD, OP_SVE_VUR_BHSD, OP_SVE_VUU_BHSD)
-	(OP_SVE_VUVV_BHSD, OP_SVE_VUVV_SD, OP_SVE_VUV_BHSD, OP_SVE_VUV_SD)
-	(OP_SVE_VU_BHSD, OP_SVE_VU_HSD, OP_SVE_VU_SD, OP_SVE_VVD_BHS)
-	(OP_SVE_VVU_BHSD, OP_SVE_VVVU_SD, OP_SVE_VVV_BHSD, OP_SVE_VVV_SD)
-	(OP_SVE_VV_BHSD, OP_SVE_VV_HSD_BHS, OP_SVE_VV_SD, OP_SVE_VWW_BHSD)
-	(OP_SVE_VXX_BHSD, OP_SVE_VZVD_BHS, OP_SVE_VZVU_BHSD, OP_SVE_VZVV_BHSD)
-	(OP_SVE_VZVV_SD, OP_SVE_VZV_SD, OP_SVE_V_SD, OP_SVE_WU, OP_SVE_WV_BHSD)
-	(OP_SVE_XU, OP_SVE_XUV_BHSD, OP_SVE_XVW_BHSD, OP_SVE_XV_BHSD)
-	(OP_SVE_XWU, OP_SVE_XXU): New macros.
-	(aarch64_feature_sve): New variable.
-	(SVE): New macro.
-	(_SVE_INSN): Likewise.
-	(aarch64_opcode_table): Add SVE instructions.
-	* aarch64-opc.h (extract_fields): Declare.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm.c (do_misc_encoding): Handle the new SVE aarch64_ops.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.c (extract_fields): Make global.
-	(do_misc_decoding): Handle the new SVE aarch64_ops.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.h (FLD_SVE_M_4, FLD_SVE_M_14, FLD_SVE_M_16)
-	(FLD_SVE_sz, FLD_SVE_tsz, FLD_SVE_tszl_8, FLD_SVE_tszl_19): New
-	aarch64_field_kinds.
-	* aarch64-opc.c (fields): Add corresponding entries.
-	* aarch64-asm.c (aarch64_get_variant): New function.
-	(aarch64_encode_variant_using_iclass): Likewise.
-	(aarch64_opcode_encode): Call it.
-	* aarch64-dis.c (aarch64_decode_variant_using_iclass): New function.
-	(aarch64_opcode_decode): Call it.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE core
-	and FP register operands.
-	* aarch64-opc.h (FLD_SVE_Rm, FLD_SVE_Rn, FLD_SVE_Vd, FLD_SVE_Vm)
-	(FLD_SVE_Vn): New aarch64_field_kinds.
-	* aarch64-opc.c (fields): Add corresponding entries.
-	(aarch64_print_operand): Handle the new SVE core and FP register
-	operands.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm-2.c: Likewise.
-	* aarch64-dis-2.c: Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE FP
-	immediate operands.
-	* aarch64-opc.h (FLD_SVE_i1): New aarch64_field_kind.
-	* aarch64-opc.c (fields): Add corresponding entry.
-	(operand_general_constraint_met_p): Handle the new SVE FP immediate
-	operands.
-	(aarch64_print_operand): Likewise.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm.h (ins_sve_float_half_one, ins_sve_float_half_two)
-	(ins_sve_float_zero_one): New inserters.
-	* aarch64-asm.c (aarch64_ins_sve_float_half_one): New function.
-	(aarch64_ins_sve_float_half_two): Likewise.
-	(aarch64_ins_sve_float_zero_one): Likewise.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.h (ext_sve_float_half_one, ext_sve_float_half_two)
-	(ext_sve_float_zero_one): New extractors.
-	* aarch64-dis.c (aarch64_ext_sve_float_half_one): New function.
-	(aarch64_ext_sve_float_half_two): Likewise.
-	(aarch64_ext_sve_float_zero_one): Likewise.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE
-	integer immediate operands.
-	* aarch64-opc.h (FLD_SVE_immN, FLD_SVE_imm3, FLD_SVE_imm5)
-	(FLD_SVE_imm5b, FLD_SVE_imm7, FLD_SVE_imm8, FLD_SVE_imm9)
-	(FLD_SVE_immr, FLD_SVE_imms, FLD_SVE_tszh): New aarch64_field_kinds.
-	* aarch64-opc.c (fields): Add corresponding entries.
-	(operand_general_constraint_met_p): Handle the new SVE integer
-	immediate operands.
-	(aarch64_print_operand): Likewise.
-	(aarch64_sve_dupm_mov_immediate_p): New function.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm.h (ins_inv_limm, ins_sve_aimm, ins_sve_asimm)
-	(ins_sve_limm_mov, ins_sve_shlimm, ins_sve_shrimm): New inserters.
-	* aarch64-asm.c (aarch64_ins_limm_1): New function, split out from...
-	(aarch64_ins_limm): ...here.
-	(aarch64_ins_inv_limm): New function.
-	(aarch64_ins_sve_aimm): Likewise.
-	(aarch64_ins_sve_asimm): Likewise.
-	(aarch64_ins_sve_limm_mov): Likewise.
-	(aarch64_ins_sve_shlimm): Likewise.
-	(aarch64_ins_sve_shrimm): Likewise.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.h (ext_inv_limm, ext_sve_aimm, ext_sve_asimm)
-	(ext_sve_limm_mov, ext_sve_shlimm, ext_sve_shrimm): New extractors.
-	* aarch64-dis.c (decode_limm): New function, split out from...
-	(aarch64_ext_limm): ...here.
-	(aarch64_ext_inv_limm): New function.
-	(decode_sve_aimm): Likewise.
-	(aarch64_ext_sve_aimm): Likewise.
-	(aarch64_ext_sve_asimm): Likewise.
-	(aarch64_ext_sve_limm_mov): Likewise.
-	(aarch64_top_bit): Likewise.
-	(aarch64_ext_sve_shlimm): Likewise.
-	(aarch64_ext_sve_shrimm): Likewise.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for new MUL VL
-	operands.
-	* aarch64-opc.c (aarch64_operand_modifiers): Initialize
-	the AARCH64_MOD_MUL_VL entry.
-	(value_aligned_p): Cope with non-power-of-two alignments.
-	(operand_general_constraint_met_p): Handle the new MUL VL addresses.
-	(print_immediate_offset_address): Likewise.
-	(aarch64_print_operand): Likewise.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm.h (ins_sve_addr_ri_s4xvl, ins_sve_addr_ri_s6xvl)
-	(ins_sve_addr_ri_s9xvl): New inserters.
-	* aarch64-asm.c (aarch64_ins_sve_addr_ri_s4xvl): New function.
-	(aarch64_ins_sve_addr_ri_s6xvl): Likewise.
-	(aarch64_ins_sve_addr_ri_s9xvl): Likewise.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.h (ext_sve_addr_ri_s4xvl, ext_sve_addr_ri_s6xvl)
-	(ext_sve_addr_ri_s9xvl): New extractors.
-	* aarch64-dis.c (aarch64_ext_sve_addr_reg_mul_vl): New function.
-	(aarch64_ext_sve_addr_ri_s4xvl): Likewise.
-	(aarch64_ext_sve_addr_ri_s6xvl): Likewise.
-	(aarch64_ext_sve_addr_ri_s9xvl): Likewise.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE
-	address operands.
-	* aarch64-opc.h (FLD_SVE_imm6, FLD_SVE_msz, FLD_SVE_xs_14)
-	(FLD_SVE_xs_22): New aarch64_field_kinds.
-	(OPD_F_OD_MASK, OPD_F_OD_LSB, OPD_F_NO_ZR): New flags.
-	(get_operand_specific_data): New function.
-	* aarch64-opc.c (fields): Add entries for FLD_SVE_imm6, FLD_SVE_msz,
-	FLD_SVE_xs_14 and FLD_SVE_xs_22.
-	(operand_general_constraint_met_p): Handle the new SVE address
-	operands.
-	(sve_reg): New array.
-	(get_addr_sve_reg_name): New function.
-	(aarch64_print_operand): Handle the new SVE address operands.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm.h (ins_sve_addr_ri_u6, ins_sve_addr_rr_lsl)
-	(ins_sve_addr_rz_xtw, ins_sve_addr_zi_u5, ins_sve_addr_zz_lsl)
-	(ins_sve_addr_zz_sxtw, ins_sve_addr_zz_uxtw): New inserters.
-	* aarch64-asm.c (aarch64_ins_sve_addr_ri_u6): New function.
-	(aarch64_ins_sve_addr_rr_lsl): Likewise.
-	(aarch64_ins_sve_addr_rz_xtw): Likewise.
-	(aarch64_ins_sve_addr_zi_u5): Likewise.
-	(aarch64_ins_sve_addr_zz): Likewise.
-	(aarch64_ins_sve_addr_zz_lsl): Likewise.
-	(aarch64_ins_sve_addr_zz_sxtw): Likewise.
-	(aarch64_ins_sve_addr_zz_uxtw): Likewise.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.h (ext_sve_addr_ri_u6, ext_sve_addr_rr_lsl)
-	(ext_sve_addr_rz_xtw, ext_sve_addr_zi_u5, ext_sve_addr_zz_lsl)
-	(ext_sve_addr_zz_sxtw, ext_sve_addr_zz_uxtw): New extractors.
-	* aarch64-dis.c (aarch64_ext_sve_add_reg_imm): New function.
-	(aarch64_ext_sve_addr_ri_u6): Likewise.
-	(aarch64_ext_sve_addr_rr_lsl): Likewise.
-	(aarch64_ext_sve_addr_rz_xtw): Likewise.
-	(aarch64_ext_sve_addr_zi_u5): Likewise.
-	(aarch64_ext_sve_addr_zz): Likewise.
-	(aarch64_ext_sve_addr_zz_lsl): Likewise.
-	(aarch64_ext_sve_addr_zz_sxtw): Likewise.
-	(aarch64_ext_sve_addr_zz_uxtw): Likewise.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add an entry for
-	AARCH64_OPND_SVE_PATTERN_SCALED.
-	* aarch64-opc.h (FLD_SVE_imm4): New aarch64_field_kind.
-	* aarch64-opc.c (fields): Add a corresponding entry.
-	(set_multiplier_out_of_range_error): New function.
-	(aarch64_operand_modifiers): Add entry for AARCH64_MOD_MUL.
-	(operand_general_constraint_met_p): Handle
-	AARCH64_OPND_SVE_PATTERN_SCALED.
-	(print_register_offset_address): Use PRIi64 to print the
-	shift amount.
-	(aarch64_print_operand): Likewise.  Handle
-	AARCH64_OPND_SVE_PATTERN_SCALED.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm.h (ins_sve_scale): New inserter.
-	* aarch64-asm.c (aarch64_ins_sve_scale): New function.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.h (ext_sve_scale): New inserter.
-	* aarch64-dis.c (aarch64_ext_sve_scale): New function.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for
-	AARCH64_OPND_SVE_PATTERN and AARCH64_OPND_SVE_PRFOP.
-	* aarch64-opc.h (FLD_SVE_pattern): New aarch64_field_kind.
-	(FLD_SVE_prfop): Likewise.
-	* aarch64-opc.c: Include libiberty.h.
-	(aarch64_sve_pattern_array): New variable.
-	(aarch64_sve_prfop_array): Likewise.
-	(fields): Add entries for FLD_SVE_pattern and FLD_SVE_prfop.
-	(aarch64_print_operand): Handle AARCH64_OPND_SVE_PATTERN and
-	AARCH64_OPND_SVE_PRFOP.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis-2.c: Likewise.
-	* aarch64-opc-2.c: Likewise.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (aarch64_opnd_qualifiers): Add entries for
-	AARCH64_OPND_QLF_P_[ZM].
-	(aarch64_print_operand): Print /z and /m where appropriate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for new SVE operands.
-	* aarch64-opc.h (FLD_SVE_Pd, FLD_SVE_Pg3, FLD_SVE_Pg4_5)
-	(FLD_SVE_Pg4_10, FLD_SVE_Pg4_16, FLD_SVE_Pm, FLD_SVE_Pn, FLD_SVE_Pt)
-	(FLD_SVE_Za_5, FLD_SVE_Za_16, FLD_SVE_Zd, FLD_SVE_Zm_5, FLD_SVE_Zm_16)
-	(FLD_SVE_Zn, FLD_SVE_Zt, FLD_SVE_tzsh): New aarch64_field_kinds.
-	* aarch64-opc.c (fields): Add corresponding entries here.
-	(operand_general_constraint_met_p): Check that SVE register lists
-	have the correct length.  Check the ranges of SVE index registers.
-	Check for cases where p8-p15 are used in 3-bit predicate fields.
-	(aarch64_print_operand): Handle the new SVE operands.
-	* aarch64-opc-2.c: Regenerate.
-	* aarch64-asm.h (ins_sve_index, ins_sve_reglist): New inserters.
-	* aarch64-asm.c (aarch64_ins_sve_index): New function.
-	(aarch64_ins_sve_reglist): Likewise.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.h (ext_sve_index, ext_sve_reglist): New extractors.
-	* aarch64-dis.c (aarch64_ext_sve_index): New function.
-	(aarch64_ext_sve_reglist): Likewise.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (CORE_INSN, __FP_INSN, SIMD_INSN, CRYP_INSN)
-	(_CRC_INSN, _LSE_INSN, _LOR_INSN, RDMA_INSN, FP16_INSN, SF16_INSN)
-	(V8_2_INSN, aarch64_opcode_table): Initialize tied_operand field.
-	* aarch64-opc.c (aarch64_match_operands_constraint): Check for
-	tied operands.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (get_offset_int_reg_name): New function.
-	(print_immediate_offset_address): Likewise.
-	(print_register_offset_address): Take the base and offset
-	registers as parameters.
-	(aarch64_print_operand): Update caller accordingly.  Use
-	print_immediate_offset_address.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (BANK): New macro.
-	(R32, R64): Take a register number as argument
-	(int_reg): Use BANK.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (print_register_list): Add a prefix parameter.
-	(aarch64_print_operand): Update accordingly.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (AARCH64_OPERNADS): Use fpimm rather than imm
-	for FPIMM.
-	* aarch64-asm.h (ins_fpimm): New inserter.
-	* aarch64-asm.c (aarch64_ins_fpimm): New function.
-	* aarch64-asm-2.c: Regenerate.
-	* aarch64-dis.h (ext_fpimm): New extractor.
-	* aarch64-dis.c (aarch64_ext_imm): Remove fpimm test.
-	(aarch64_ext_fpimm): New function.
-	* aarch64-dis-2.c: Regenerate.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-asm.c: Include libiberty.h.
-	(insert_fields): New function.
-	(aarch64_ins_imm): Use it.
-	* aarch64-dis.c (extract_fields): New function.
-	(aarch64_ext_imm): Use it.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (aarch64_logical_immediate_p): Replace is32
-	with an esize parameter.
-	(operand_general_constraint_met_p): Update accordingly.
-	Fix misindented code.
-	* aarch64-asm.c (aarch64_ins_limm): Update call to
-	aarch64_logical_immediate_p.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (match_operands_qualifier): Handle F_STRICT.
-
-2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-gen.c (indented_print): Avoid hard-coded indentation limit.
-
-2016-09-15  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-dis.c (find_format): Walk the linked list pointed by einsn.
-
-2016-09-14  Peter Bergner <bergner@vnet.ibm.com>
-
-	* ppc-opc.c (powerpc_opcodes) <slbiag>: New mnemonic.
-	<addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
-	xor3>: Delete mnemonics.
-	<cp_abort>: Rename mnemonic from ...
-	<cpabort>: ...to this.
-	<setb>: Change to a X form instruction.
-	<sync>: Change to 1 operand form.
-	<copy>: Delete mnemonic.
-	<copy_first>: Rename mnemonic from ...
-	<copy>: ...to this.
-	<paste, paste.>: Delete mnemonics.
-	<paste_last>: Rename mnemonic from ...
-	<paste.>: ...to this.
-
-2016-09-14  Anton Kolesov  <Anton.Kolesov@synopsys.com>
-
-	* arc-dis.c (arc_get_disassembler): Accept a null bfd gracefully.
-
-2016-09-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* s390-mkopc.c (main): Support alternate arch strings.
-
-2016-09-12  Patrick Steuer  <steuer@linux.vnet.ibm.com>
-
-	* s390-opc.txt: Fix kmctr instruction type.
-
-2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-gen.c (cpu_flag_init): Remove CPU_IAMCU_COMPAT_FLAGS.
-	* i386-init.h: Regenerated.
-
-2016-08-30  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* opcodes/arc-dis.c (print_insn_arc): Changed.
-
-2016-08-26  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-opc.c (sparc_opcodes): Fix typo in opcode, camellia_fi ->
-	camellia_fl.
-
-2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* arm-dis.c (psr_name): Use hex as case labels.  Add detection for
-	MSPLIM, PSPLIM, MSPLIM_NS, PSPLIM_NS, PRIMASK_NS, BASEPRI_NS,
-	FAULTMASK_NS, CONTROL_NS and SP_NS special registers.
-
-2016-08-24  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-dis.c (PREFIX_MOD_0_0FAE_REG_4): New.
-	(PREFIX_MOD_3_0FAE_REG_4): Likewise.
-	(prefix_table): Add PREFIX_MOD_0_0FAE_REG_4 and
-	PREFIX_MOD_3_0FAE_REG_4.
-	(mod_table): Use PREFIX_MOD_0_0FAE_REG_4 and
-	PREFIX_MOD_3_0FAE_REG_4.
-	* i386-gen.c (cpu_flag_init): Add CPU_PTWRITE_FLAGS.
-	(cpu_flags): Add CpuPTWRITE.
-	* i386-opc.h (CpuPTWRITE): New.
-	(i386_cpu_flags): Add cpuptwrite.
-	* i386-opc.tbl: Add ptwrite instruction.
-	* i386-init.h: Regenerated.
-	* i386-tbl.h: Likewise.
-
-2016-08-24  Anton Kolesov  <Anton.Kolesov@synopsys.com>
-
-	* arc-dis.h: Wrap around in extern "C".
-
-2016-08-23  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (V8_2_INSN): New macro.
-	(aarch64_opcode_table): Use it.
-
-2016-08-23  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (aarch64_opcode_table): Make more use of
-	CORE_INSN, __FP_INSN and SIMD_INSN.
-
-2016-08-23  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-tbl.h (CORE_INSN, __FP_INSN, SIMD_INSN): Add OP parameter.
-	(aarch64_opcode_table): Update uses accordingly.
-
-2016-07-25  Andrew Jenner  <andrew@codesourcery.com>
-	Kwok Cheung Yeung  <kcy@codesourcery.com>
-
-	opcodes/
-	* ppc-opc.c (vle_opcodes): Alias 'e_cmpwi' to 'e_cmpi' and
-	'e_cmplwi' to 'e_cmpli' instead.
-	(OPVUPRT, OPVUPRT_MASK): Define.
-	(powerpc_opcodes): Add E200Z4 insns.
-	(vle_opcodes): Add context save/restore insns.
-
-2016-07-27  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* micromips-opc.c (micromips_opcodes): Reorder "bc" next to "b",
-	"beqzc" next to "beq", "bnezc" next to "bne" and "jrc" next to
-	"j".
-
-2016-07-27  Graham Markall  <graham.markall@embecosm.com>
-
-        * arc-nps400-tbl.h: Change block comments to GNU format.
-        * arc-dis.c: Add new globals addrtypenames,
-        addrtypenames_max, and addtypeunknown.
-        (get_addrtype): New function.
-        (print_insn_arc): Print colons and address types when
-        required.
-        * arc-opc.c: Add MAKE_INSERT_NPS_ADDRTYPE macro and use to
-        define insert and extract functions for all address types.
-        (arc_operands): Add operands for colon and all address
-        types.
-        * arc-nps-400-tbl.h: Add NPS-400 BMU instructions to opcode table.
-        * arc-opc.c: Add NPS_BD_TYPE and NPS_BMU_NUM operands,
-        insert_nps_bd_num_buff and extract_nps_bd_num_buff functions.
-        * arc-nps-400-tbl.h: Add NPS-400 PMU instructions to opcode table.
-        * arc-opc.c: Add NPS_PMU_NXT_DST and NPS_PMU_NUM_JOB operands,
-        insert_nps_pmu_num_job and extract_nps_pmu_num_job functions.
-
-2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* configure: Regenerated.
-
-2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-dis.c (skipclass): New structure.
-	(decodelist): New variable.
-	(is_compatible_p): New function.
-	(new_element): Likewise.
-	(skip_class_p): Likewise.
-	(find_format_from_table): Use skip_class_p function.
-	(find_format): Decode first the extension instructions.
-	(print_insn_arc): Select either ARCEM or ARCHS based on elf
-	e_flags.
-	(parse_option): New function.
-	(parse_disassembler_options): Likewise.
-	(print_arc_disassembler_options): Likewise.
-	(print_insn_arc): Use parse_disassembler_options function.  Proper
-	select ARCv2 cpu variant.
-	* disassemble.c (disassembler_usage): Add ARC disassembler
-	options.
-
-2016-07-13  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-opc.c (mips_builtin_opcodes): Remove the INSN2_ALIAS
-	annotation from the "nal" entry and reorder it beyond "bltzal".
-
-2016-07-12  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-opc.c (ldtxa): New macro.
-	(sparc_opcodes): Use the macro defined above to add entries for
-	the LDTXA instructions.
-	(asi_table): Add the ASI_TWINX_* asis used in the LDTXA
-	instruction.
-
-2016-07-07  James Bowman  <james.bowman@ftdichip.com>
-
-	* ft32-opc.c (ft32_opc_info): Correct mask for "callc"
-	and "jmpc".
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* i386-opc.tbl (movzbl, movzbw, movzbq, movzwl, movzwq): Remove.
-	(movzb): Adjust to cover all permitted suffixes.
-	(movzw): New.
-	* i386-tbl.h: Re-generate.
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* i386-opc.tbl (jmp): Remove Disp32S from non-64-bit variant.
-	(lgdt): Remove Tbyte from non-64-bit variant.
-	(fxsave64, fxrstor64, xsave64, xrstor64, xsaveopt64, xrstors64,
-	xsaves64, xsavec64): Remove Disp16.
-	(cvtsi2ss, cvtsi2sd, invept, invvpid, invpcid, vcvtsi2sd):
-	Remove Disp32S from non-64-bit variants. Remove Disp16 from
-	64-bit variants.
-	(vcvtsi2ss, vcvtsd2si, vcvtsd2usi, vcvtsi2sd, vcvtusi2sd,
-	vcvtusi2ss, vcvtss2si, vcvtss2usi, vcvttsd2si, vcvttsd2usi,
-	vcvttss2si, vcvttss2usi, vmovd, vmovq): Remove Disp16 from
-	64-bit variants.
-	* i386-tbl.h: Re-generate.
-
-2016-07-01  Jan Beulich  <jbeulich@suse.com>
-
-	* i386-opc.tbl (xlat): Remove RepPrefixOk.
-	* i386-tbl.h: Re-generate.
-
-2016-06-30  Yao Qi  <yao.qi@linaro.org>
-
-	* arm-dis.c (print_insn): Fix typo in comment.
-
-2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
-
-	* aarch64-opc.c (operand_general_constraint_met_p): Check the
-	range of ldst_elemlist operands.
-	(print_register_list): Use PRIi64 to print the index.
-	(aarch64_print_operand): Likewise.
-
-2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* mcore-opc.h: Remove sentinal.
-	* mcore-dis.c (print_insn_mcore): Adjust.
-
-2016-06-23  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-opc.c: Correct description of availability of NPS400
-	features.
-
-2016-06-22  Peter Bergner <bergner@vnet.ibm.com>
-
-	* ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines.
-	(powerpc_opcodes) <brd, brh, brw, mffsce, mffscdrn, mffscdrni,
-	mffscrn, mffscrni, mffsl, nandxor, rldixor, setbool,
-	xor3>: New mnemonics.
-	<setb>: Change to a VX form instruction.
-	(insert_sh6): Add support for rldixor.
-	(extract_sh6): Likewise.
-
-2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* arc-ext.h: Wrap in extern C.
-
-2016-06-21  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-dis.c (arc_insn_length): Add comment on instruction length.
-	Use same method for determining	instruction length on ARC700 and
-	NPS-400.
-	(arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400.
-	* arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions
-	with the NPS400 subclass.
-	* arc-opc.c: Likewise.
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-opc.c (rdasr): New macro.
-	(wrasr): Likewise.
-	(rdpr): Likewise.
-	(wrpr): Likewise.
-	(rdhpr): Likewise.
-	(wrhpr): Likewise.
-	(sparc_opcodes): Use the macros above to fix and expand the
-	definition of read/write instructions from/to
-	asr/privileged/hyperprivileged instructions.
-	* sparc-dis.c (v9_hpriv_reg_names): Add %hmcdper, %hmcddfr and
-	%hva_mask_nz.  Prefer softint_set and softint_clear over
-	set_softint and clear_softint.
-	(print_insn_sparc): Support %ver in Rd.
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-opc.c (sparc_opcodes): Adjust instructions opcode
-	architecture according to the hardware capabilities they require.
-
-2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
-	(compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
-	bfd_mach_sparc_v9{c,d,e,v,m}.
-	* sparc-opc.c (MASK_V9C): Define.
-	(MASK_V9D): Likewise.
-	(MASK_V9E): Likewise.
-	(MASK_V9V): Likewise.
-	(MASK_V9M): Likewise.
-	(v6): Add MASK_V9{C,D,E,V,M}.
-	(v6notlet): Likewise.
-	(v7): Likewise.
-	(v8): Likewise.
-	(v9): Likewise.
-	(v9andleon): Likewise.
-	(v9a): Likewise.
-	(v9b): Likewise.
-	(v9c): Define.
-	(v9d): Likewise.
-	(v9e): Likewise.
-	(v9v): Likewise.
-	(v9m): Likewise.
-	(sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
-
-2016-06-15  Nick Clifton  <nickc@redhat.com>
-
-	* nds32-dis.c (nds32_parse_audio_ext): Change printing of integer
-	constants to match expected behaviour.
-	(nds32_parse_opcode): Likewise.  Also for whitespace.
-
-2016-06-15  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-opc.c (extract_rhv1): Extract value from insn.
-
-2016-06-14  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add ldbit instruction.
-	* arc-opc.c: Add flag classes required for ldbit.
-
-2016-06-14  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add hash, hash.p[0-3], tr, utf8, e4by, and addf
-	* arc-opc.c: Add flag classes, insert/extract functions, and operands to
-	support the above instructions.
-
-2016-06-14  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb,
-	imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms,
-	csma, cbba, zncv, and hofs.
-	* arc-opc.c: Add flag classes, insert/extract functions, and operands to
-	support the above instructions.
-
-2016-06-06  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add andab and orab instructions.
-
-2016-06-06  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add addl-like instructions.
-
-2016-06-06  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add mxb and imxb instructions.
-
-2016-06-06  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey and calcxkey
-	instructions.
-
-2016-06-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
-
-	* s390-dis.c (option_use_insn_len_bits_p): New file scope
-	variable.
-	(init_disasm): Handle new command line option "insnlength".
-	(print_s390_disassembler_options): Mention new option in help
-	output.
-	(print_insn_s390): Use the encoded insn length when dumping
-	unknown instructions.
-
-2016-06-03  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
-
-	* avr-dis.c (avr_operand): Add default data address space origin (0x800000)
-	 to the address and set as symbol address for LDS/ STS immediate operands.
-
-2016-06-07  Alan Modra  <amodra@gmail.com>
-
-	* ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
-	cpu for "vle" to e500.
-	* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
-	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
-	(PPCNONE): Delete, substitute throughout.
-	(powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
-	except for major opcode 4 and 31.
-	(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
-
-2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
-	ARM_EXT_RAS in relevant entries.
-
-2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
-
-	PR binutils/20196
-	* ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
-	opcodes for E6500.
-
-2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutis/18386
-	* i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
-	(indir_v_mode): New.
-	Add comments for '&'.
-	(reg_table): Replace "{T|}" with "{&|}" on call and jmp.
-	(putop): Handle '&'.
-	(intel_operand_size): Handle indir_v_mode.
-	(OP_E_register): Likewise.
-	* i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64.  Add
-	64-bit indirect call/jmp for AMD64.
-	* i386-tbl.h: Regenerated
-
-2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-dis.c (struct arc_operand_iterator): New structure.
-	(find_format_from_table): All the old content from find_format,
-	with some minor adjustments, and parameter renaming.
-	(find_format_long_instructions): New function.
-	(find_format): Rewritten.
-	(arc_insn_length): Add LSB parameter.
-	(extract_operand_value): New function.
-	(operand_iterator_next): New function.
-	(print_insn_arc): Use new functions to find opcode, and iterator
-	over operands.
-	* arc-opc.c (insert_nps_3bit_dst_short): New function.
-	(extract_nps_3bit_dst_short): New function.
-	(insert_nps_3bit_src2_short): New function.
-	(extract_nps_3bit_src2_short): New function.
-	(insert_nps_bitop1_size): New function.
-	(extract_nps_bitop1_size): New function.
-	(insert_nps_bitop2_size): New function.
-	(extract_nps_bitop2_size): New function.
-	(insert_nps_bitop_mod4_msb): New function.
-	(extract_nps_bitop_mod4_msb): New function.
-	(insert_nps_bitop_mod4_lsb): New function.
-	(extract_nps_bitop_mod4_lsb): New function.
-	(insert_nps_bitop_dst_pos3_pos4): New function.
-	(extract_nps_bitop_dst_pos3_pos4): New function.
-	(insert_nps_bitop_ins_ext): New function.
-	(extract_nps_bitop_ins_ext): New function.
-	(arc_operands): Add new operands.
-	(arc_long_opcodes): New global array.
-	(arc_num_long_opcodes): New global.
-	* arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
-
-2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* nds32-asm.h: Add extern "C".
-	* sh-opc.h: Likewise.
-
-2016-06-01  Graham Markall  <graham.markall@embecosm.com>
-
-	* arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and
-	0,b,limm to the rflt instruction.
-
-2016-05-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned
-	constant.
-
-2016-05-29  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20145
-	* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS,
-	CPU_ANY_AVX512CD_FLAGS, CPU_ANY_AVX512ER_FLAGS,
-	CPU_ANY_AVX512PF_FLAGS, CPU_ANY_AVX512DQ_FLAGS,
-	CPU_ANY_AVX512BW_FLAGS, CPU_ANY_AVX512VL_FLAGS,
-	CPU_ANY_AVX512IFMA_FLAGS and CPU_ANY_AVX512VBMI_FLAGS.
-	* i386-init.h: Regenerated.
-
-2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20145
-	* i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS.  Remove
-	CpuMMX from CPU_SSE_FLAGS.  Remove AVX and AVX512 bits from
-	CPU_ANY_SSE_FLAGS.  Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
-	Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
-	CpuXSAVEC.  Add CPU_AVX_FLAGS to CpuF16C.  Remove CpuMMX from
-	CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
-	CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
-	Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS.   Add CPU_ANY_287_FLAGS,
-	CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
-	CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
-	CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS.  Enable CpuRegMMX
-	for MMX.  Enable CpuRegXMM for SSE, AVX and AVX512.  Enable
-	CpuRegYMM for AVX and AVX512VL,  Enable CpuRegZMM and
-	CpuRegMask for AVX512.
-	(cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
-	and CpuRegMask.
-	(set_bitfield_from_cpu_flag_init): New function.
-	(set_bitfield): Remove const on f.  Call
-	set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
-	* i386-opc.h (CpuRegMMX): New.
-	(CpuRegXMM): Likewise.
-	(CpuRegYMM): Likewise.
-	(CpuRegZMM): Likewise.
-	(CpuRegMask): Likewise.
-	(i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
-	and cpuregmask.
-	* i386-init.h: Regenerated.
-	* i386-tbl.h: Likewise.
-
-2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20154
-	* i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
-	(opcode_modifiers): Add AMD64 and Intel64.
-	(main): Properly verify CpuMax.
-	* i386-opc.h (CpuAMD64): Removed.
-	(CpuIntel64): Likewise.
-	(CpuMax): Set to CpuNo64.
-	(i386_cpu_flags): Remove cpuamd64 and cpuintel64.
-	(AMD64): New.
-	(Intel64): Likewise.
-	(i386_opcode_modifier): Add amd64 and intel64.
-	(i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
-	on call and jmp.
-	* i386-init.h: Regenerated.
-	* i386-tbl.h: Likewise.
-
-2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20154
-	* i386-gen.c (main): Fail if CpuMax is incorrect.
-	* i386-opc.h (CpuMax): Set to CpuIntel64.
-	* i386-tbl.h: Regenerated.
-
-2016-05-27  Nick Clifton  <nickc@redhat.com>
-
-	PR target/20150
-	* msp430-dis.c (msp430dis_read_two_bytes): New function.
-	(msp430dis_opcode_unsigned): New function.
-	(msp430dis_opcode_signed): New function.
-	(msp430_singleoperand): Use the new opcode reading functions.
-	Only disassenmble bytes if they were successfully read.
-	(msp430_doubleoperand): Likewise.
-	(msp430_branchinstr): Likewise.
-	(msp430x_callx_instr): Likewise.
-	(print_insn_msp430): Check that it is safe to read bytes before
-	attempting disassembly.  Use the new opcode reading functions.
-
-2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
-
-	* ppc-opc.c (CY): New define.  Document it.
-	(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
-	CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
-	and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
-	CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
-	CPU_ANY_AVX_FLAGS.
-	* i386-init.h: Regenerated.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR gas/20141
-	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
-	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
-	* i386-init.h: Regenerated.
-
-2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
-	CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
-	* i386-init.h: Regenerated.
-
-2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
-	information.
-	(print_insn_arc): Set insn_type information.
-	* arc-opc.c (C_CC): Add F_CLASS_COND.
-	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
-	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
-	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
-	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
-	(brne, brne_s, jeq_s, jne_s): Likewise.
-
-2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-tbl.h (neg): New instruction variant.
-
-2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
-
-	* arc-dis.c (find_format, find_format, get_auxreg)
-	(print_insn_arc): Changed.
-	* arc-ext.h (INSERT_XOP): Likewise.
-
-2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* tic54x-dis.c (sprint_mmr): Adjust.
-	* tic54x-opc.c: Likewise.
-
-2016-05-19  Alan Modra  <amodra@gmail.com>
-
-	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
-
-2016-05-19  Alan Modra  <amodra@gmail.com>
-
-	* ppc-opc.c: Formatting.
-	(NSISIGNOPT): Define.
-	(powerpc_opcodes <subis>): Use NSISIGNOPT.
-
-2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
-	replacing references to `micromips_ase' throughout.
-	(_print_insn_mips): Don't use file-level microMIPS annotation to
-	determine the disassembly mode with the symbol table.
-
-2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
-
-	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
-
-2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
-
-	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
-	mips64r6.
-	* mips-opc.c (D34): New macro.
-	(mips_builtin_opcodes): Define bposge32c for DSPr3.
-
-2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
-
-	* i386-dis.c (prefix_table): Add RDPID instruction.
-	* i386-gen.c (cpu_flag_init): Add RDPID flag.
-	(cpu_flags): Add RDPID bitfield.
-	* i386-opc.h (enum): Add RDPID element.
-	(i386_cpu_flags): Add RDPID field.
-	* i386-opc.tbl: Add RDPID instruction.
-	* i386-init.h: Regenerate.
-	* i386-tbl.h: Regenerate.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
-	branch type of a symbol.
-	(print_insn): Likewise.
-
-2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
-
-	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
-	Mainline Security Extensions instructions.
-	(thumb_opcodes): Add entries for narrow ARMv8-M Security
-	Extensions instructions.
-	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
-	instructions.
-	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
-	special registers.
-
-2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
-
-2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
-	(arcExtMap_genOpcode): Likewise.
-	* arc-opc.c (arg_32bit_rc): Define new variable.
-	(arg_32bit_u6): Likewise.
-	(arg_32bit_limm): Likewise.
-
-2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
-
-	* aarch64-gen.c (VERIFIER): Define.
-	* aarch64-opc.c (VERIFIER): Define.
-	(verify_ldpsw): Use static linkage.
-	* aarch64-opc.h (verify_ldpsw): Remove.
-	* aarch64-tbl.h: Use VERIFIER for verifiers.
-
-2016-04-28  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19722
-	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
-	* aarch64-opc.c (verify_ldpsw): New function.
-	* aarch64-opc.h (verify_ldpsw): New prototype.
-	* aarch64-tbl.h: Add initialiser for verifier field.
-	(LDPSW): Set verifier to verify_ldpsw.
-
-2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
-
-	PR binutils/19983
-	PR binutils/19984
-	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
-	smaller than address size.
-
-2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* alpha-dis.c: Regenerate.
-	* crx-dis.c: Likewise.
-	* disassemble.c: Likewise.
-	* epiphany-opc.c: Likewise.
-	* fr30-opc.c: Likewise.
-	* frv-opc.c: Likewise.
-	* ip2k-opc.c: Likewise.
-	* iq2000-opc.c: Likewise.
-	* lm32-opc.c: Likewise.
-	* lm32-opinst.c: Likewise.
-	* m32c-opc.c: Likewise.
-	* m32r-opc.c: Likewise.
-	* m32r-opinst.c: Likewise.
-	* mep-opc.c: Likewise.
-	* mt-opc.c: Likewise.
-	* or1k-opc.c: Likewise.
-	* or1k-opinst.c: Likewise.
-	* tic80-opc.c: Likewise.
-	* xc16x-opc.c: Likewise.
-	* xstormy16-opc.c: Likewise.
-
-2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
-	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
-	calcsd, and calcxd instructions.
-	* arc-opc.c (insert_nps_bitop_size): Delete.
-	(extract_nps_bitop_size): Delete.
-	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
-	(extract_nps_qcmp_m3): Define.
-	(extract_nps_qcmp_m2): Define.
-	(extract_nps_qcmp_m1): Define.
-	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
-	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
-	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
-	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
-	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
-	NPS_QCMP_M3.
-
-2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
-
-2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* Makefile.in: Regenerated with automake 1.11.6.
-	* aclocal.m4: Likewise.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
-	instructions.
-	* arc-opc.c (insert_nps_cmem_uimm16): New function.
-	(extract_nps_cmem_uimm16): New function.
-	(arc_operands): Add NPS_XLDST_UIMM16 operand.
-
-2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-dis.c (arc_insn_length): New function.
-	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
-	(find_format): Change insnLen parameter to unsigned.
-
-2016-04-13  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19937
-	* v850-opc.c (v850_opcodes): Correct masks for long versions of
-	the LD.B and LD.BU instructions.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-dis.c (find_format): Check for extension flags.
-	(print_flags): New function.
-	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
-	.extAuxRegister.
-	* arc-ext.c (arcExtMap_coreRegName): Use
-	LAST_EXTENSION_CORE_REGISTER.
-	(arcExtMap_coreReadWrite): Likewise.
-	(dump_ARC_extmap): Update printing.
-	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
-	(arc_aux_regs): Add cpu field.
-	* arc-regs.h: Add cpu field, lower case name aux registers.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-tbl.h: Add rtsc, sleep with no arguments.
-
-2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
-	Initialize.
-	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
-	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
-	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
-	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
-	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
-	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
-	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
-	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
-	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
-	(arc_opcode arc_opcodes): Null terminate the array.
-	(arc_num_opcodes): Remove.
-	* arc-ext.h (INSERT_XOP): Define.
-	(extInstruction_t): Likewise.
-	(arcExtMap_instName): Delete.
-	(arcExtMap_insn): New function.
-	(arcExtMap_genOpcode): Likewise.
-	* arc-ext.c (ExtInstruction): Remove.
-	(create_map): Zero initialize instruction fields.
-	(arcExtMap_instName): Remove.
-	(arcExtMap_insn): New function.
-	(dump_ARC_extmap): More info while debuging.
-	(arcExtMap_genOpcode): New function.
-	* arc-dis.c (find_format): New function.
-	(print_insn_arc): Use find_format.
-	(arc_get_disassembler): Enable dump_ARC_extmap only when
-	debugging.
-
-2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
-	instruction bits out.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
-	* arc-opc.c (arc_flag_operands): Add new flags.
-	(arc_flag_classes): Add new classes.
-
-2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
-
-2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
-	encode1, rflt, crc16, and crc32 instructions.
-	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
-	(arc_flag_classes): Add C_NPS_R.
-	(insert_nps_bitop_size_2b): New function.
-	(extract_nps_bitop_size_2b): Likewise.
-	(insert_nps_bitop_uimm8): Likewise.
-	(extract_nps_bitop_uimm8): Likewise.
-	(arc_operands): Add new operand entries.
-
-2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-regs.h: Add a new subclass field.  Add double assist
-	accumulator register values.
-	* arc-tbl.h: Use DPA subclass to mark the double assist
-	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
-	* arc-opc.c (RSP): Define instead of SP.
-	(arc_aux_regs): Add the subclass field.
-
-2016-04-05  Jiong Wang  <jiong.wang@arm.com>
-
-	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
-
-2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
-	NPS_R_SRC1.
-
-2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
-	issues.  No functional changes.
-
-2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
-	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
-	(RTT): Remove duplicate.
-	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
-	(PCT_CONFIG*): Remove.
-	(D1L, D1H, D2H, D2L): Define.
-
-2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
-
-2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
-
-	* arc-tbl.h (invld07): Remove.
-	* arc-ext-tbl.h: New file.
-	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
-	* arc-opc.c (arc_opcodes): Add ext-tbl include.
-
-2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
-
-	Fix -Wstack-usage warnings.
-	* aarch64-dis.c (print_operands): Substitute size.
-	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
-
-2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
-
-	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
-	to get a proper diagnostic when an invalid ASR register is used.
-
-2016-03-22  Nick Clifton  <nickc@redhat.com>
-
-	* configure: Regenerate.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-nps400-tbl.h: New file.
-	* arc-opc.c: Add top level comment.
-	(insert_nps_3bit_dst): New function.
-	(extract_nps_3bit_dst): New function.
-	(insert_nps_3bit_src2): New function.
-	(extract_nps_3bit_src2): New function.
-	(insert_nps_bitop_size): New function.
-	(extract_nps_bitop_size): New function.
-	(arc_flag_operands): Add nps400 entries.
-	(arc_flag_classes): Add nps400 entries.
-	(arc_operands): Add nps400 entries.
-	(arc_opcodes): Add nps400 include.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
-	the new class enum values.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-dis.c (print_insn_arc): Handle nps400.
-
-2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* arc-opc.c (BASE): Delete.
-
-2016-03-18  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19721
-	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
-	of MOV insn that aliases an ORR insn.
-
-2016-03-16  Jiong Wang  <jiong.wang@arm.com>
-
-	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
-
-2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
-
-	* mcore-opc.h: Add const qualifiers.
-	* microblaze-opc.h (struct op_code_struct): Likewise.
-	* sh-opc.h: Likewise.
-	* tic4x-dis.c (tic4x_print_indirect): Likewise.
-	(tic4x_print_op): Likewise.
-
-2016-03-02  Alan Modra  <amodra@gmail.com>
-
-	* or1k-desc.h: Regenerate.
-	* fr30-ibld.c: Regenerate.
-	* rl78-decode.c: Regenerate.
-
-2016-03-01  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19747
-	* rl78-dis.c (print_insn_rl78_common): Fix typo.
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
-	(print_insn_coprocessor): Support fp16 instructions.
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
-	vminnm, vrint(mpna).
-
-2016-02-24  Renlin Li  <renlin.li@arm.com>
-
-	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
-	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
-
-2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
-
-	* i386-dis.c (print_insn): Parenthesize expression to prevent
-	truncated addresses.
-	(OP_J): Likewise.
-
-2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
-	    Janek van Oirschot  <jvanoirs@synopsys.com>
-
-	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
-	variable.
-
-2016-02-04  Nick Clifton  <nickc@redhat.com>
-
-	PR target/19561
-	* msp430-dis.c (print_insn_msp430): Add a special case for
-	decoding an RRC instruction with the ZC bit set in the extension
-	word.
-
-2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* cgen-ibld.in (insert_normal): Rework calculation of shift.
-	* epiphany-ibld.c: Regenerate.
-	* fr30-ibld.c: Regenerate.
-	* frv-ibld.c: Regenerate.
-	* ip2k-ibld.c: Regenerate.
-	* iq2000-ibld.c: Regenerate.
-	* lm32-ibld.c: Regenerate.
-	* m32c-ibld.c: Regenerate.
-	* m32r-ibld.c: Regenerate.
-	* mep-ibld.c: Regenerate.
-	* mt-ibld.c: Regenerate.
-	* or1k-ibld.c: Regenerate.
-	* xc16x-ibld.c: Regenerate.
-	* xstormy16-ibld.c: Regenerate.
-
-2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
-
-	* epiphany-dis.c: Regenerated from latest cpu files.
-
-2016-02-01  Michael McConville  <mmcco@mykolab.com>
-
-	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
-	test bit.
-
-2016-01-25  Renlin Li  <renlin.li@arm.com>
-
-	* arm-dis.c (mapping_symbol_for_insn): New function.
-	(find_ifthen_state): Call mapping_symbol_for_insn().
-
-2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
-	of MSR UAO immediate operand.
-
-2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
-
-	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
-	instruction support.
-
-2016-01-17  Alan Modra  <amodra@gmail.com>
-
-	* configure: Regenerate.
-
-2016-01-14  Nick Clifton  <nickc@redhat.com>
-
-	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
-	instructions that can support stack pointer operations.
-	* rl78-decode.c: Regenerate.
-	* rl78-dis.c: Fix display of stack pointer in MOVW based
-	instructions.
-
-2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
-	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
-	erxtatus_el1 and erxaddr_el1.
-
-2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
-
-	* arm-dis.c (arm_opcodes): Add "esb".
-	(thumb_opcodes): Likewise.
-
-2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
-
-	* ppc-opc.c <xscmpnedp>: Delete.
-	<xvcmpnedp>: Likewise.
-	<xvcmpnedp.>: Likewise.
-	<xvcmpnesp>: Likewise.
-	<xvcmpnesp.>: Likewise.
-
-2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
-
-	PR gas/13050
-	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
-	addition to ISA_A.
-
-2016-01-01  Alan Modra  <amodra@gmail.com>
-
-	Update year range in copyright notice of all files.
-
-For older changes see ChangeLog-2015
+For older changes see ChangeLog-2016
 
-Copyright (C) 2016 Free Software Foundation, Inc.
+Copyright (C) 2017 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright
diff --git a/opcodes/ChangeLog-2016 b/opcodes/ChangeLog-2016
new file mode 100644
index 0000000..fd78dd3
--- /dev/null
+++ b/opcodes/ChangeLog-2016
@@ -0,0 +1,2179 @@
+2016-12-31  Alan Modra  <amodra@gmail.com>
+
+	* disassemble.c (disassembler): Add break accidentally removed
+	by PRU patch.
+
+2016-12-31  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	* Makefile.am: Add PRU source files.
+	* configure.ac: Add PRU target.
+	* disassemble.c (disassembler): Register PRU arch.
+	* pru-dis.c: New file.
+	* pru-opc.c: New file.
+	* Makefile.in: Regenerate.
+	* configure: Regenerate.
+
+2016-12-29  Yao Qi  <yao.qi@linaro.org>
+
+	* avr-dis.c: Include "bfd_stdint.h"
+	(avrdis_opcode): Change return type to int, add argument
+	insn.  Set *INSN on success.
+	(print_insn_avr): Check return value of avrdis_opcode, and
+	return -1 on error.
+
+2016-12-28  Alan Modra  <amodra@gmail.com>
+
+	* configure.ac: Revert 2016-12-23.
+	* Makefile.am: Likewise.
+	(MIPS_DEFS): Define.
+	(mips-dis.lo): Add rule.
+	* Makefile.in: Regenerate.
+	* aclocal.m4: Regenerate.
+	* config.in: Regenerate.
+	* configure: Regenerate.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (decode_mips16_operand): Add `0', `1', `2', `3',
+	`4' and `s' operand codes.
+	(mips16_opcodes): Add "asmacro" entry.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips16_insn_arg): Simplify processing of
+	extended operands.
+	* mips16-opc.c (decode_mips16_operand): Switch the extended
+	form of the `<' operand type to LSB position 22.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (decode_mips16_operand): Replace `0' and `4'
+	operand codes with `.' and `F' respectively.
+	(mips16_opcodes): Likewise.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_insn_mips16): Disallow EXTEND prefix
+	matching for INSN2_SHORT_ONLY opcode table entries.
+	* mips16-opc.c (SH): New macro.
+	(mips16_opcodes): Set SH in `pinfo2' for non-extensible
+	instruction entries: "nop", "addu", "and", "break", "cmp",
+	"daddu", "ddiv", "ddivu", "div", "divu", "dmult", "dmultu",
+	"drem", "dremu", "dsllv", "dsll", "dsrav", "dsra", "dsrlv",
+	"dsrl", "dsubu", "exit", "entry", "jalr", "jal", "jr", "j",
+	"jalrc", "jrc", "mfhi", "mflo", "move", "mult", "multu", "neg",
+	"not", "or", "rem", "remu", "sllv", "sll", "slt", "sltu",
+	"srav", "sra", "srlv", "srl", "subu", "xor", "sdbbp", "seb",
+	"seh", "sew", "zeb", "zeh", "zew" and "extend".
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (decode_mips16_operand) <'6'>: Remove extended
+	encoding support.
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (mips16_opcodes): Set NODS in `pinfo' for
+	"extend".
+
+2016-12-23  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (set_default_mips_dis_options): Use
+	HAVE_BFD_MIPS_ELF_GET_ABIFLAGS rather than BFD64 to guard the
+	call to `bfd_mips_elf_get_abiflags'.
+	* configure.ac: Check for `bfd_mips_elf_get_abiflags' in BFD.
+	* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add `libbfd.la'.
+	* aclocal.m4: Regenerate.
+	* configure: Regenerate.
+	* config.in: Regenerate.
+	* Makefile.in: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* configure: Regenerate.
+
+2016-12-23  Tristan Gingold  <gingold@adacore.com>
+
+	* po/opcodes.pot: Regenerate.
+
+2016-12-21  Andrew Waterman  <andrew@sifive.com>
+
+	* riscv-opc.c (riscv_opcodes): Reorder jal and call entries.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (mips_arch_choices): Use ISA_MIPS64 rather than
+	ISA_MIPS3 as the `isa' selection in the `bfd_mach_mips16' entry.
+	(print_insn_mips16): Check opcode entries for validity against
+	the ISA level and ASE set selected.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips16_insn_arg): Always handle `extend' and
+	`insn' together, with `extend' as the high-order 16 bits.
+	(match_kind): New enum.
+	(print_insn_mips16): Rework for 32-bit instruction matching.
+	Do not dump EXTEND prefixes here.
+	* mips16-opc.c (mips16_opcodes): Move "extend" entry to the end.
+	Recode `match' and `mask' fields as 32-bit in absolute "jal" and
+	"jalx" entries.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
+	than I1 for the "ddiv", "ddivu", "drem", "dremu" and "dsubu"
+	INSN_MACRO entries.
+
+2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
+	than I1 for the SP-relative "sd"/$ra entry (SDRASP minor
+	opcode).
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* riscv-opc.c (riscv_opcodes): Rename the "*.sc" instructions to
+	"*.aqrl".
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* riscv-opc.c (riscv_opcodes): Mark the rd* and csr* aliases as
+	INSN_ALIAS.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* riscv-opc.c (riscv_opcodes): Change jr and jalr to "o(s)"
+	format.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
+	XLEN when none is provided.
+
+2016-12-20  Andrew Waterman  <andrew@sifive.com>
+
+	* riscv-opc.c: Formatting fixes.
+
+2016-12-20  Alan Modra  <amodra@gmail.com>
+
+	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add riscv files.
+	* Makefile.in: Regenerate.
+	* po/POTFILES.in: Regenerate.
+
+2016-12-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (set_default_mips_dis_options) [SYMTAB_AVAILABLE]:
+	Only examine ELF file structures here.
+
+2016-12-19  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (set_default_mips_dis_options) [BFD64]: Only call
+	`bfd_mips_elf_get_abiflags' here.
+
+2016-12-16  Nick Clifton  <nickc@redhat.com>
+
+	* arm-dis.c (print_insn_thumb32): Fix compile time warning
+	computing value_in_comment.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (mips_convert_abiflags_ases): New function.
+	(set_default_mips_dis_options): Also infer ASE flags from ELF
+	file structures.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (set_default_mips_dis_options): Reorder ELF file
+	header flag interpretation code.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (mips16_opcodes): Set RD_SP rather than RD_PC in
+	`pinfo2' with SP-relative "sd" entries.
+
+2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (mips16_opcodes): Update comments on MIPS16e
+	compact jumps.
+
+2016-12-13 Renlin Li <renlin.li@arm.com>
+
+	* aarch64-opc.c (aarch64_opnd_qualifiers): New CR value range
+	qualifier.
+	(operand_general_constraint_met_p): Remove case for CP_REG.
+	(aarch64_print_operand): Print CRn, CRm operand using imm field.
+	* aarch64-tbl.h (QL_SYS): Use CR qualifier.
+	(QL_SYSL): Likewise.
+	(aarch64_opcode_table): Change CRn, CRm operand class and type.
+	* aarch64-opc-2.c : Regenerate.
+	* aarch64-asm-2.c : Likewise.
+	* aarch64-dis-2.c : Likewise.
+
+2016-12-12  Yao Qi  <yao.qi@linaro.org>
+
+	* rx-dis.c: Include <setjmp.h>
+	(struct private): New.
+	(rx_get_byte): Check return value of read_memory_func, and
+	call memory_error_func and OPCODES_SIGLONGJMP on error.
+	(print_insn_rx): Call OPCODES_SIGSETJMP.
+
+2016-12-12  Yao Qi  <yao.qi@linaro.org>
+
+	* rl78-dis.c: Include <setjmp.h>.
+	(struct private): New.
+	(rl78_get_byte): Check return value of read_memory_func, and
+	call memory_error_func and OPCODES_SIGLONGJMP on error.
+	(print_insn_rl78_common): Call OPCODES_SIGJMP.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (decode_mips16_operand) <'>'>: Remove cases.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (decode_mips16_operand) <'e'>: Use HINT rather
+	than UINT.
+
+2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_insn_mips16): Use a tab rather than a space
+	to separate `extend' and its uninterpreted argument output.
+	Separate hexadecimal halves of undecoded extended instructions
+	output.
+
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips16_insn_arg): Remove extraneous
+	indentation space across.
+
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips16_insn_arg): Avoid delay-slot
+	adjustment for PC-relative operations following MIPS16e compact
+	jumps or undefined RR/J(AL)R(C) encodings.
+
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* aarch64-asm.c (aarch64_ins_reglane): Rename `index' local
+	variable to `reglane_index'.
+
+2016-12-08  Luis Machado  <lgustavo@codesourcery.com>
+
+	* ppc-dis.c (get_powerpc_dialect): Check NULL info->section.
+
+2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips16_insn_arg): Fix comment typo.
+
+2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips16-opc.c (mips16_opcodes): Update comment naming structure
+	members.
+
+2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips_disassembler_options): Reformat output.
+
+2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* arm-dis.c (coprocessor_opcodes): Add vcmla and vcadd.
+	(print_insn_coprocessor): Add 'V' format for neon D or Q regs.
+
+2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* arm-dis.c (coprocessor_opcodes): Add vjcvt.
+
+2016-12-01  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/20893
+	* i386-dis.c (OP_VEX): Replace call to abort with a append of bad
+	opcode designator.
+
+2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-opc.c (insert_ra_chk): New function.
+	(insert_rb_chk): Likewise.
+	(insert_rad): Update text error message.
+	(insert_rcd): Likewise.
+	(insert_rhv2): Likewise.
+	(insert_r0): Likewise.
+	(insert_r1): Likewise.
+	(insert_r2): Likewise.
+	(insert_r3): Likewise.
+	(insert_sp): Likewise.
+	(insert_gp): Likewise.
+	(insert_pcl): Likewise.
+	(insert_blink): Likewise.
+	(insert_ilink1): Likewise.
+	(insert_ilink2): Likewise.
+	(insert_ras): Likewise.
+	(insert_rbs): Likewise.
+	(insert_rcs): Likewise.
+	(insert_simm3s): Likewise.
+	(insert_rrange): Likewise.
+	(insert_fpel): Likewise.
+	(insert_blinkel): Likewise.
+	(insert_pcel): Likewise.
+	(insert_nps_3bit_dst): Likewise.
+	(insert_nps_3bit_dst_short): Likewise.
+	(insert_nps_3bit_src2_short): Likewise.
+	(insert_nps_bitop_size_2b): Likewise.
+	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Likewise.
+	(RA_CHK): Define.
+	(RB): Adjust.
+	(RB_CHK): Define.
+	(RC): Adjust.
+	* arc-dis.c (print_insn_arc): Add LOAD and STORE class.
+	* arc-tbl.h (div, divu): All instructions are DIVREM class.
+	Change first insn argument to check for LP_COUNT usage.
+	(rem): Likewise.
+	(ld, ldd): All instructions are LOAD class.  Change first insn
+	argument to check for LP_COUNT usage.
+	(st, std): All instructions are STORE class.
+	(mac, mpy, dmac, mul, dmpy): All instructions are MPY class.
+	Change first insn argument to check for LP_COUNT usage.
+	(mov): All instructions are MOVE class.  Change first insn
+	argument to check for LP_COUNT usage.
+
+2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-dis.c (is_compatible_p): Remove function.
+	(skip_this_opcode): Don't add any decoding class to decode list.
+	Remove warning.
+	(find_format_from_table): Go through all opcodes, and warn if we
+	use a guessed mnemonic.
+
+2016-11-28  Ramiro Polla  <ramiro@hex-rays.com>
+	    Amit Pawar  <amit.pawar@amd.com>
+
+	PR binutils/20637
+	* i386-dis.c (get_valid_dis386): Ignore REX_B for 32-bit XOP
+	instructions.
+
+2016-11-22  Ambrogino Modigliani  <ambrogino.modigliani@gmail.com>
+
+        * configure: Regenerate.
+
+2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-opc.c (HWS_V8): Definition moved from
+	gas/config/tc-sparc.c.
+	(HWS_V9): Likewise.
+	(HWS_VA): Likewise.
+	(HWS_VB): Likewise.
+	(HWS_VC): Likewise.
+	(HWS_VD): Likewise.
+	(HWS_VE): Likewise.
+	(HWS_VV): Likewise.
+	(HWS_VM): Likewise.
+	(HWS2_VM): Likewise.
+	(sparc_opcode_archs): Initialize hwcaps and hwcaps2 fields of
+	existing entries.
+
+2016-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-tbl.h: Reorder conditional flags with delay flags for 'b'
+	instructions.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (QL_V3SAMEHSD_ROT, QL_ELEMENT_ROT): Define.
+	(aarch64_feature_simd_v8_3, SIMD_V8_3): Define.
+	(aarch64_opcode_table): Add fcmla and fcadd.
+	(AARCH64_OPERANDS): Add IMM_ROT{1,2,3}.
+	* aarch64-asm.h (aarch64_ins_imm_rotate): Declare.
+	* aarch64-asm.c (aarch64_ins_imm_rotate): Define.
+	* aarch64-dis.h (aarch64_ext_imm_rotate): Declare.
+	* aarch64-dis.c (aarch64_ext_imm_rotate): Define.
+	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_rotate{1,2,3}.
+	* aarch64-opc.c (fields): Add FLD_rotate{1,2,3}.
+	(operand_general_constraint_met_p): Rotate and index range check.
+	(aarch64_print_operand): Handle rotate operand.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Likewise.
+	* aarch64-opc-2.c: Likewise.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (arch64_opcode_table): Add ldaprb, ldaprh, ldapr.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Regenerate.
+	* aarch64-opc-2.c: Regenerate.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (arch64_opcode_table): Add fjcvtzs.
+	(QL_FP2INT_W_D, aarch64_feature_fp_v8_3, FP_V8_3): Define.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Regenerate.
+	* aarch64-opc-2.c: Regenerate.
+
+2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (QL_X1NIL): New.
+	(arch64_opcode_table): Add ldraa, ldrab.
+	(AARCH64_OPERANDS): Add "ADDR_SIMM10".
+	* aarch64-asm.h (aarch64_ins_addr_simm10): Declare.
+	* aarch64-asm.c (aarch64_ins_addr_simm10): Define.
+	* aarch64-dis.h (aarch64_ext_addr_simm10): Declare.
+	* aarch64-dis.c (aarch64_ext_addr_simm10): Define.
+	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_S_simm10.
+	* aarch64-opc.c (fields): Add data for FLD_S_simm10.
+	(operand_general_constraint_met_p): Handle AARCH64_OPND_ADDR_SIMM10.
+	(aarch64_print_operand): Likewise.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Regenerate.
+	* aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (arch64_opcode_table): Add braa, brab, blraa, blrab, braaz,
+	brabz, blraaz, blrabz, retaa, retab, eretaa, eretab.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Regenerate.
+	* aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (arch64_opcode_table): Add pacga.
+	(AARCH64_OPERANDS): Add Rm_SP.
+	* aarch64-opc.c (aarch64_print_operand): Handle AARCH64_OPND_Rm_SP.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Regenerate.
+	* aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (arch64_opcode_table): Add pacia, pacib, pacda, pacdb, autia,
+	autib, autda, autdb, paciza, pacizb, pacdza, pacdzb, autiza, autizb, autdza,
+	autdzb, xpaci, xpacd.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Regenerate.
+	* aarch64-opc-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-opc.c (aarch64_sys_regs): Add apiakeylo_el1, apiakeyhi_el1,
+	apibkeylo_el1, apibkeyhi_el1, apdakeylo_el1, apdakeyhi_el1,
+	apdbkeylo_el1, apdbkeyhi_el1, apgakeylo_el1 and apgakeyhi_el1.
+	(aarch64_sys_reg_supported_p): Add feature test for new registers.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-tbl.h (aarch64_feature_v8_3, ARMV8_3, V8_3_INSN): New.
+	(arch64_opcode_table): Add xpaclri, pacia1716, pacib1716, autia1716,
+	autib1716, paciaz, paciasp, pacibz, pacibsp, autiaz, autiasp, autibz,
+	autibsp.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-gen.c (find_alias_opcode): Increase max_num_aliases to 32.
+
+2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20799
+	* i386-dis-evex.h (evex_table): Replace EdqwS with Edqw.
+	* i386-dis.c (EdqwS): Removed.
+	(dqw_swap_mode): Likewise.
+	(intel_operand_size): Don't check dqw_swap_mode.
+	(OP_E_register): Likewise.
+	(OP_E_memory): Likewise.
+	(OP_G): Likewise.
+	(OP_EX): Likewise.
+	* i386-opc.tbl: Remove "S" from EVEX vpextrw.
+	* i386-tbl.h: Regerated.
+
+2016-11-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.tbl: Merge AVX512F vmovq.
+	* i386-tbl.h: Regerated.
+
+2016-11-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20701
+	* i386-dis.c (THREE_BYTE_0F7A): Removed.
+	(dis386_twobyte): Don't use THREE_BYTE_0F7A.
+	(three_byte_table): Remove THREE_BYTE_0F7A.
+
+2016-11-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20775
+	* i386-dis.c (FGRPd9_2): Replace 0 with 1.
+	(FGRPd9_4): Replace 1 with 2.
+	(FGRPd9_5): Replace 2 with 3.
+	(FGRPd9_6): Replace 3 with 4.
+	(FGRPd9_7): Replace 4 with 5.
+	(FGRPda_5): Replace 5 with 6.
+	(FGRPdb_4): Replace 6 with 7.
+	(FGRPde_3): Replace 7 with 8.
+	(FGRPdf_4): Replace 8 with 9.
+	(fgrps): Add an entry for Bad_Opcode.
+
+2016-11-04  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-opc.c (arc_flag_operands): Add F_DI14.
+	(arc_flag_classes): Add C_DI14.
+	* arc-nps400-tbl.h: Add new exc instructions.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-dis.c (arc_insn_length): Return length 8 for instructions with
+	major opcode 0xa.
+	* arc-nps-400-tbl.h: Add dcmac instruction.
+	* arc-opc.c (arc_operands): Added operands for dcmac instruction.
+	(insert_nps_rbdouble_64): Added.
+	(extract_nps_rbdouble_64): Added.
+	(insert_nps_proto_size): Added.
+	(extract_nps_proto_size): Added.
+
+2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-dis.c (struct arc_operand_iterator): Remove all fields
+	relating to long instruction processing, add new limm field.
+	(OPCODE): Rename to...
+	(OPCODE_32BIT_INSN): ...this.
+	(OPCODE_AC): Delete.
+	(skip_this_opcode): Handle different instruction lengths, update
+	macro name.
+	(special_flag_p): Update parameter type.
+	(find_format_from_table): Update for more instruction lengths.
+	(find_format_long_instructions): Delete.
+	(find_format): Update for more instruction lengths.
+	(arc_insn_length): Likewise.
+	(extract_operand_value): Update for more instruction lengths.
+	(operand_iterator_next): Remove code relating to long
+	instructions.
+	(arc_opcode_to_insn_type): New function.
+	(print_insn_arc):Update for more instructions lengths.
+	* arc-ext.c (extInstruction_t): Change argument type.
+	* arc-ext.h (extInstruction_t): Change argument type.
+	* arc-fxi.h: Change type unsigned to unsigned long long
+	extensively throughout.
+	* arc-nps400-tbl.h: Add long instructions taken from
+	arc_long_opcodes table in arc-opc.c.
+	* arc-opc.c: Update parameter types on insert/extract handlers.
+	(arc_long_opcodes): Delete.
+	(arc_num_long_opcodes): Delete.
+	(arc_opcode_len): Update for more instruction lengths.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-dis.c (print_insn_arc): Swap highbyte and lowbyte.
+
+2016-11-03  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-dis.c (find_format_from_table): Replace use of ARC_SHORT
+	with arc_opcode_len.
+	(find_format_long_instructions): Likewise.
+	* arc-opc.c (arc_opcode_len): New function.
+
+2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: Fix some instruction masks.
+
+2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (REG_82): Removed.
+	(X86_64_82_REG_0): Likewise.
+	(X86_64_82_REG_1): Likewise.
+	(X86_64_82_REG_2): Likewise.
+	(X86_64_82_REG_3): Likewise.
+	(X86_64_82_REG_4): Likewise.
+	(X86_64_82_REG_5): Likewise.
+	(X86_64_82_REG_6): Likewise.
+	(X86_64_82_REG_7): Likewise.
+	(X86_64_82): New.
+	(dis386): Use X86_64_82 instead of REG_82.
+	(reg_table): Remove REG_82.
+	(x86_64_table): Add X86_64_82.  Remove X86_64_82_REG_0,
+	X86_64_82_REG_1, X86_64_82_REG_2, X86_64_82_REG_3,
+	X86_64_82_REG_4, X86_64_82_REG_5, X86_64_82_REG_6 and
+	X86_64_82_REG_7.
+
+2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20754
+	* i386-dis.c (REG_82): New.
+	(X86_64_82_REG_0): Likewise.
+	(X86_64_82_REG_1): Likewise.
+	(X86_64_82_REG_2): Likewise.
+	(X86_64_82_REG_3): Likewise.
+	(X86_64_82_REG_4): Likewise.
+	(X86_64_82_REG_5): Likewise.
+	(X86_64_82_REG_6): Likewise.
+	(X86_64_82_REG_7): Likewise.
+	(dis386): Use REG_82.
+	(reg_table): Add REG_82.
+	(x86_64_table): Add X86_64_82_REG_0, X86_64_82_REG_1,
+	X86_64_82_REG_2, X86_64_82_REG_3, X86_64_82_REG_4,
+	X86_64_82_REG_5, X86_64_82_REG_6 and X86_64_82_REG_7.
+
+2016-11-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (REG_82): Renamed to ...
+	(REG_83): This.
+	(dis386): Updated.
+	(reg_table): Likewise.
+
+2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+
+	* i386-dis.c (enum): Add PREFIX_EVEX_0F3852, PREFIX_EVEX_0F3853.
+	* i386-dis-evex.h (evex_table): Updated.
+	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4VNNIW_FLAGS,
+	CPU_ANY_AVX512_4VNNIW_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
+	(cpu_flags): Add CpuAVX512_4VNNIW.
+	* i386-opc.h (enum): (AVX512_4VNNIW): New.
+	(i386_cpu_flags): Add cpuavx512_4vnniw.
+	* i386-opc.tbl: Add Intel AVX512_4VNNIW instructions.
+	* i386-init.h: Regenerate.
+	* i386-tbl.h: Ditto.
+
+2016-11-02  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
+
+	* i386-dis.c. (enum): Add PREFIX_EVEX_0F389A,
+	PREFIX_EVEX_0F389B, PREFIX_EVEX_0F38AA, PREFIX_EVEX_0F38AB.
+	* i386-dis-evex.h (evex_table): Updated.
+	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4FMAPS_FLAGS,
+	CPU_ANY_AVX512_4FMAPS_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
+	(cpu_flags): Add CpuAVX512_4FMAPS.
+	(opcode_modifiers): Add ImplicitQuadGroup modifier.
+	* i386-opc.h (AVX512_4FMAP): New.
+	(i386_cpu_flags): Add cpuavx512_4fmaps.
+	(ImplicitQuadGroup): New.
+	(i386_opcode_modifier): Add implicitquadgroup.
+	* i386-opc.tbl: Add Intel AVX512_4FMAPS instructions.
+	* i386-init.h: Regenerate.
+	* i386-tbl.h: Ditto.
+
+2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
+	    Andrew Waterman <andrew@sifive.com>
+
+	Add support for RISC-V architecture.
+	* configure.ac: Add entry for bfd_riscv_arch.
+	* configure: Regenerate.
+	* disassemble.c (disassembler): Add support for riscv.
+	(disassembler_usage): Likewise.
+	* riscv-dis.c: New file.
+	* riscv-opc.c: New file.
+
+2016-10-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (PREFIX_RM_0_0FAE_REG_7): Removed.
+	(prefix_table): Remove the PREFIX_RM_0_0FAE_REG_7 entry.
+	(rm_table): Update the RM_0FAE_REG_7 entry.
+	* i386-gen.c (cpu_flag_init): Remove CPU_PCOMMIT_FLAGS.
+	(cpu_flags): Remove CpuPCOMMIT.
+	* i386-opc.h (CpuPCOMMIT): Removed.
+	(i386_cpu_flags): Remove cpupcommit.
+	* i386-opc.tbl: Remove pcommit.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Likewise.
+
+2016-10-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutis/20705
+	* i386-dis.c (get_valid_dis386): Ignore the REX_B bit and
+	the highest bit in VEX.vvvv for the 3-byte VEX prefix in
+	32-bit mode.  Don't check vex.register_specifier in 32-bit
+	mode.
+	(OP_VEX): Check for invalid mask registers.
+
+2016-10-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutis/20699
+	* i386-dis.c (OP_E_memory): Check addr32flag in stead of
+	sizeflag.
+
+2016-10-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutis/20704
+	* i386-dis.c (three_byte_table): Remove the remaining SSE5 support.
+
+2016-10-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* aarch64-dis.c (aarch64_ext_sve_addr_rr_lsl): Rename `index'
+	local variable to `index_regno'.
+
+2016-10-17  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* arc-tbl.h: Removed any "inv.+" instructions from the table.
+
+2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-dis.c (find_format_from_table): Discriminate LIMM indicator
+	usage on ISA basis.
+
+2016-10-11  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20666
+	* aarch64-asm.c (convert_bfc_to_bfm): Fix dest index.
+
+2016-10-07  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20667
+	* aarch64-opc.c (aarch64_print_operand): Always print operand if it's
+	available.
+
+2016-10-07  Alan Modra  <amodra@gmail.com>
+
+	* sh-opc.h (sh_merge_bfd_arch): Delete prototype.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* aarch64-opc.c: Spell fall through comments consistently.
+	* i386-dis.c: Likewise.
+	* aarch64-dis.c: Add missing fall through comments.
+	* aarch64-opc.c: Likewise.
+	* arc-dis.c: Likewise.
+	* arm-dis.c: Likewise.
+	* i386-dis.c: Likewise.
+	* m68k-dis.c: Likewise.
+	* mep-asm.c: Likewise.
+	* ns32k-dis.c: Likewise.
+	* sh-dis.c: Likewise.
+	* tic4x-dis.c: Likewise.
+	* tic6x-dis.c: Likewise.
+	* vax-dis.c: Likewise.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* arc-ext.c (create_map): Add missing break.
+	* msp430-decode.opc (encode_as): Likewise.
+	* msp430-decode.c: Regenerate.
+
+2016-10-06  Alan Modra  <amodra@gmail.com>
+
+	* cr16-dis.c (print_insn_cr16): Don't use boolean OR in arithmetic.
+	* crx-dis.c (print_insn_crx): Likewise.
+
+2016-09-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/20657
+	* i386-dis.c (putop): Don't assign alt twice.
+
+2016-09-29  Jiong Wang  <jiong.wang@arm.com>
+
+	PR target/20553
+	* aarch64-tbl.h (fmla, fmls, fmul, fmulx): Fix opcode mask field.
+
+2016-09-29  Alan Modra  <amodra@gmail.com>
+
+	* ppc-opc.c (L): Make compulsory.
+	(LOPT): New, optional form of L.
+	(HTM_R): Define as LOPT.
+	(L0, L1): Delete.
+	(L32OPT): New, optional for 32-bit L.
+	(L2OPT): New, 2-bit L for dcbf.
+	(SVC_LEC): Update.
+	(L2): Define.
+	(insert_l0, extract_l0, insert_l1, extract_l2): Delete.
+	(powerpc_opcodes <cmpli, cmpi, cmpl, cmp>): Use L32OPT.
+	<dcbf>: Use L2OPT.
+	<tlbiel, tlbie>: Use LOPT.
+	<wclr, wclrall>: Use L2.
+
+2016-09-26  Vlad Zakharov  <vzakhar@synopsys.com>
+
+	* Makefile.in: Regenerate.
+	* configure: Likewise.
+
+2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-ext-tbl.h (EXTINSN2OPF): Define.
+	(EXTINSN2OP): Use EXTINSN2OPF.
+	(bspeekm, bspop, modapp): New extension instructions.
+	* arc-opc.c (F_DNZ_ND): Define.
+	(F_DNZ_D): Likewise.
+	(F_SIZEB1): Changed.
+	(C_DNZ_D): Define.
+	(C_HARD): Changed.
+	* arc-tbl.h (dbnz): New instruction.
+	(prealloc): Allow it for ARC EM.
+	(xbfu): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (print_immediate_offset_address): Print spaces
+	after commas in addresses.
+	(aarch64_print_operand): Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (operand_general_constraint_met_p): Use "must be"
+	rather than "should be" or "expected to be" in error messages.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-dis.c (remove_dot_suffix): New function, split out from...
+	(print_mnemonic_name): ...here.
+	(print_comment): New function.
+	(print_aarch64_insn): Call it.
+	* aarch64-opc.c (aarch64_conds): Add SVE names.
+	(aarch64_print_operand): Print alternative condition names in
+	a comment.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (OP_SVE_B, OP_SVE_BB, OP_SVE_BBBU, OP_SVE_BMB)
+	(OP_SVE_BPB, OP_SVE_BUB, OP_SVE_BUBB, OP_SVE_BUU, OP_SVE_BZ)
+	(OP_SVE_BZB, OP_SVE_BZBB, OP_SVE_BZU, OP_SVE_DD, OP_SVE_DDD)
+	(OP_SVE_DMD, OP_SVE_DMH, OP_SVE_DMS, OP_SVE_DU, OP_SVE_DUD, OP_SVE_DUU)
+	(OP_SVE_DUV_BHS, OP_SVE_DUV_BHSD, OP_SVE_DZD, OP_SVE_DZU, OP_SVE_HB)
+	(OP_SVE_HMD, OP_SVE_HMS, OP_SVE_HU, OP_SVE_HUU, OP_SVE_HZU, OP_SVE_RR)
+	(OP_SVE_RURV_BHSD, OP_SVE_RUV_BHSD, OP_SVE_SMD, OP_SVE_SMH, OP_SVE_SMS)
+	(OP_SVE_SU, OP_SVE_SUS, OP_SVE_SUU, OP_SVE_SZS, OP_SVE_SZU, OP_SVE_UB)
+	(OP_SVE_UUD, OP_SVE_UUS, OP_SVE_VMR_BHSD, OP_SVE_VMU_SD)
+	(OP_SVE_VMVD_BHS, OP_SVE_VMVU_BHSD, OP_SVE_VMVU_SD, OP_SVE_VMVV_BHSD)
+	(OP_SVE_VMVV_SD, OP_SVE_VMV_BHSD, OP_SVE_VMV_HSD, OP_SVE_VMV_SD)
+	(OP_SVE_VM_SD, OP_SVE_VPU_BHSD, OP_SVE_VPV_BHSD, OP_SVE_VRR_BHSD)
+	(OP_SVE_VRU_BHSD, OP_SVE_VR_BHSD, OP_SVE_VUR_BHSD, OP_SVE_VUU_BHSD)
+	(OP_SVE_VUVV_BHSD, OP_SVE_VUVV_SD, OP_SVE_VUV_BHSD, OP_SVE_VUV_SD)
+	(OP_SVE_VU_BHSD, OP_SVE_VU_HSD, OP_SVE_VU_SD, OP_SVE_VVD_BHS)
+	(OP_SVE_VVU_BHSD, OP_SVE_VVVU_SD, OP_SVE_VVV_BHSD, OP_SVE_VVV_SD)
+	(OP_SVE_VV_BHSD, OP_SVE_VV_HSD_BHS, OP_SVE_VV_SD, OP_SVE_VWW_BHSD)
+	(OP_SVE_VXX_BHSD, OP_SVE_VZVD_BHS, OP_SVE_VZVU_BHSD, OP_SVE_VZVV_BHSD)
+	(OP_SVE_VZVV_SD, OP_SVE_VZV_SD, OP_SVE_V_SD, OP_SVE_WU, OP_SVE_WV_BHSD)
+	(OP_SVE_XU, OP_SVE_XUV_BHSD, OP_SVE_XVW_BHSD, OP_SVE_XV_BHSD)
+	(OP_SVE_XWU, OP_SVE_XXU): New macros.
+	(aarch64_feature_sve): New variable.
+	(SVE): New macro.
+	(_SVE_INSN): Likewise.
+	(aarch64_opcode_table): Add SVE instructions.
+	* aarch64-opc.h (extract_fields): Declare.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm.c (do_misc_encoding): Handle the new SVE aarch64_ops.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.c (extract_fields): Make global.
+	(do_misc_decoding): Handle the new SVE aarch64_ops.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.h (FLD_SVE_M_4, FLD_SVE_M_14, FLD_SVE_M_16)
+	(FLD_SVE_sz, FLD_SVE_tsz, FLD_SVE_tszl_8, FLD_SVE_tszl_19): New
+	aarch64_field_kinds.
+	* aarch64-opc.c (fields): Add corresponding entries.
+	* aarch64-asm.c (aarch64_get_variant): New function.
+	(aarch64_encode_variant_using_iclass): Likewise.
+	(aarch64_opcode_encode): Call it.
+	* aarch64-dis.c (aarch64_decode_variant_using_iclass): New function.
+	(aarch64_opcode_decode): Call it.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE core
+	and FP register operands.
+	* aarch64-opc.h (FLD_SVE_Rm, FLD_SVE_Rn, FLD_SVE_Vd, FLD_SVE_Vm)
+	(FLD_SVE_Vn): New aarch64_field_kinds.
+	* aarch64-opc.c (fields): Add corresponding entries.
+	(aarch64_print_operand): Handle the new SVE core and FP register
+	operands.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm-2.c: Likewise.
+	* aarch64-dis-2.c: Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE FP
+	immediate operands.
+	* aarch64-opc.h (FLD_SVE_i1): New aarch64_field_kind.
+	* aarch64-opc.c (fields): Add corresponding entry.
+	(operand_general_constraint_met_p): Handle the new SVE FP immediate
+	operands.
+	(aarch64_print_operand): Likewise.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm.h (ins_sve_float_half_one, ins_sve_float_half_two)
+	(ins_sve_float_zero_one): New inserters.
+	* aarch64-asm.c (aarch64_ins_sve_float_half_one): New function.
+	(aarch64_ins_sve_float_half_two): Likewise.
+	(aarch64_ins_sve_float_zero_one): Likewise.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.h (ext_sve_float_half_one, ext_sve_float_half_two)
+	(ext_sve_float_zero_one): New extractors.
+	* aarch64-dis.c (aarch64_ext_sve_float_half_one): New function.
+	(aarch64_ext_sve_float_half_two): Likewise.
+	(aarch64_ext_sve_float_zero_one): Likewise.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE
+	integer immediate operands.
+	* aarch64-opc.h (FLD_SVE_immN, FLD_SVE_imm3, FLD_SVE_imm5)
+	(FLD_SVE_imm5b, FLD_SVE_imm7, FLD_SVE_imm8, FLD_SVE_imm9)
+	(FLD_SVE_immr, FLD_SVE_imms, FLD_SVE_tszh): New aarch64_field_kinds.
+	* aarch64-opc.c (fields): Add corresponding entries.
+	(operand_general_constraint_met_p): Handle the new SVE integer
+	immediate operands.
+	(aarch64_print_operand): Likewise.
+	(aarch64_sve_dupm_mov_immediate_p): New function.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm.h (ins_inv_limm, ins_sve_aimm, ins_sve_asimm)
+	(ins_sve_limm_mov, ins_sve_shlimm, ins_sve_shrimm): New inserters.
+	* aarch64-asm.c (aarch64_ins_limm_1): New function, split out from...
+	(aarch64_ins_limm): ...here.
+	(aarch64_ins_inv_limm): New function.
+	(aarch64_ins_sve_aimm): Likewise.
+	(aarch64_ins_sve_asimm): Likewise.
+	(aarch64_ins_sve_limm_mov): Likewise.
+	(aarch64_ins_sve_shlimm): Likewise.
+	(aarch64_ins_sve_shrimm): Likewise.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.h (ext_inv_limm, ext_sve_aimm, ext_sve_asimm)
+	(ext_sve_limm_mov, ext_sve_shlimm, ext_sve_shrimm): New extractors.
+	* aarch64-dis.c (decode_limm): New function, split out from...
+	(aarch64_ext_limm): ...here.
+	(aarch64_ext_inv_limm): New function.
+	(decode_sve_aimm): Likewise.
+	(aarch64_ext_sve_aimm): Likewise.
+	(aarch64_ext_sve_asimm): Likewise.
+	(aarch64_ext_sve_limm_mov): Likewise.
+	(aarch64_top_bit): Likewise.
+	(aarch64_ext_sve_shlimm): Likewise.
+	(aarch64_ext_sve_shrimm): Likewise.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for new MUL VL
+	operands.
+	* aarch64-opc.c (aarch64_operand_modifiers): Initialize
+	the AARCH64_MOD_MUL_VL entry.
+	(value_aligned_p): Cope with non-power-of-two alignments.
+	(operand_general_constraint_met_p): Handle the new MUL VL addresses.
+	(print_immediate_offset_address): Likewise.
+	(aarch64_print_operand): Likewise.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm.h (ins_sve_addr_ri_s4xvl, ins_sve_addr_ri_s6xvl)
+	(ins_sve_addr_ri_s9xvl): New inserters.
+	* aarch64-asm.c (aarch64_ins_sve_addr_ri_s4xvl): New function.
+	(aarch64_ins_sve_addr_ri_s6xvl): Likewise.
+	(aarch64_ins_sve_addr_ri_s9xvl): Likewise.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.h (ext_sve_addr_ri_s4xvl, ext_sve_addr_ri_s6xvl)
+	(ext_sve_addr_ri_s9xvl): New extractors.
+	* aarch64-dis.c (aarch64_ext_sve_addr_reg_mul_vl): New function.
+	(aarch64_ext_sve_addr_ri_s4xvl): Likewise.
+	(aarch64_ext_sve_addr_ri_s6xvl): Likewise.
+	(aarch64_ext_sve_addr_ri_s9xvl): Likewise.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE
+	address operands.
+	* aarch64-opc.h (FLD_SVE_imm6, FLD_SVE_msz, FLD_SVE_xs_14)
+	(FLD_SVE_xs_22): New aarch64_field_kinds.
+	(OPD_F_OD_MASK, OPD_F_OD_LSB, OPD_F_NO_ZR): New flags.
+	(get_operand_specific_data): New function.
+	* aarch64-opc.c (fields): Add entries for FLD_SVE_imm6, FLD_SVE_msz,
+	FLD_SVE_xs_14 and FLD_SVE_xs_22.
+	(operand_general_constraint_met_p): Handle the new SVE address
+	operands.
+	(sve_reg): New array.
+	(get_addr_sve_reg_name): New function.
+	(aarch64_print_operand): Handle the new SVE address operands.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm.h (ins_sve_addr_ri_u6, ins_sve_addr_rr_lsl)
+	(ins_sve_addr_rz_xtw, ins_sve_addr_zi_u5, ins_sve_addr_zz_lsl)
+	(ins_sve_addr_zz_sxtw, ins_sve_addr_zz_uxtw): New inserters.
+	* aarch64-asm.c (aarch64_ins_sve_addr_ri_u6): New function.
+	(aarch64_ins_sve_addr_rr_lsl): Likewise.
+	(aarch64_ins_sve_addr_rz_xtw): Likewise.
+	(aarch64_ins_sve_addr_zi_u5): Likewise.
+	(aarch64_ins_sve_addr_zz): Likewise.
+	(aarch64_ins_sve_addr_zz_lsl): Likewise.
+	(aarch64_ins_sve_addr_zz_sxtw): Likewise.
+	(aarch64_ins_sve_addr_zz_uxtw): Likewise.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.h (ext_sve_addr_ri_u6, ext_sve_addr_rr_lsl)
+	(ext_sve_addr_rz_xtw, ext_sve_addr_zi_u5, ext_sve_addr_zz_lsl)
+	(ext_sve_addr_zz_sxtw, ext_sve_addr_zz_uxtw): New extractors.
+	* aarch64-dis.c (aarch64_ext_sve_add_reg_imm): New function.
+	(aarch64_ext_sve_addr_ri_u6): Likewise.
+	(aarch64_ext_sve_addr_rr_lsl): Likewise.
+	(aarch64_ext_sve_addr_rz_xtw): Likewise.
+	(aarch64_ext_sve_addr_zi_u5): Likewise.
+	(aarch64_ext_sve_addr_zz): Likewise.
+	(aarch64_ext_sve_addr_zz_lsl): Likewise.
+	(aarch64_ext_sve_addr_zz_sxtw): Likewise.
+	(aarch64_ext_sve_addr_zz_uxtw): Likewise.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add an entry for
+	AARCH64_OPND_SVE_PATTERN_SCALED.
+	* aarch64-opc.h (FLD_SVE_imm4): New aarch64_field_kind.
+	* aarch64-opc.c (fields): Add a corresponding entry.
+	(set_multiplier_out_of_range_error): New function.
+	(aarch64_operand_modifiers): Add entry for AARCH64_MOD_MUL.
+	(operand_general_constraint_met_p): Handle
+	AARCH64_OPND_SVE_PATTERN_SCALED.
+	(print_register_offset_address): Use PRIi64 to print the
+	shift amount.
+	(aarch64_print_operand): Likewise.  Handle
+	AARCH64_OPND_SVE_PATTERN_SCALED.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm.h (ins_sve_scale): New inserter.
+	* aarch64-asm.c (aarch64_ins_sve_scale): New function.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.h (ext_sve_scale): New inserter.
+	* aarch64-dis.c (aarch64_ext_sve_scale): New function.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for
+	AARCH64_OPND_SVE_PATTERN and AARCH64_OPND_SVE_PRFOP.
+	* aarch64-opc.h (FLD_SVE_pattern): New aarch64_field_kind.
+	(FLD_SVE_prfop): Likewise.
+	* aarch64-opc.c: Include libiberty.h.
+	(aarch64_sve_pattern_array): New variable.
+	(aarch64_sve_prfop_array): Likewise.
+	(fields): Add entries for FLD_SVE_pattern and FLD_SVE_prfop.
+	(aarch64_print_operand): Handle AARCH64_OPND_SVE_PATTERN and
+	AARCH64_OPND_SVE_PRFOP.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis-2.c: Likewise.
+	* aarch64-opc-2.c: Likewise.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (aarch64_opnd_qualifiers): Add entries for
+	AARCH64_OPND_QLF_P_[ZM].
+	(aarch64_print_operand): Print /z and /m where appropriate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for new SVE operands.
+	* aarch64-opc.h (FLD_SVE_Pd, FLD_SVE_Pg3, FLD_SVE_Pg4_5)
+	(FLD_SVE_Pg4_10, FLD_SVE_Pg4_16, FLD_SVE_Pm, FLD_SVE_Pn, FLD_SVE_Pt)
+	(FLD_SVE_Za_5, FLD_SVE_Za_16, FLD_SVE_Zd, FLD_SVE_Zm_5, FLD_SVE_Zm_16)
+	(FLD_SVE_Zn, FLD_SVE_Zt, FLD_SVE_tzsh): New aarch64_field_kinds.
+	* aarch64-opc.c (fields): Add corresponding entries here.
+	(operand_general_constraint_met_p): Check that SVE register lists
+	have the correct length.  Check the ranges of SVE index registers.
+	Check for cases where p8-p15 are used in 3-bit predicate fields.
+	(aarch64_print_operand): Handle the new SVE operands.
+	* aarch64-opc-2.c: Regenerate.
+	* aarch64-asm.h (ins_sve_index, ins_sve_reglist): New inserters.
+	* aarch64-asm.c (aarch64_ins_sve_index): New function.
+	(aarch64_ins_sve_reglist): Likewise.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.h (ext_sve_index, ext_sve_reglist): New extractors.
+	* aarch64-dis.c (aarch64_ext_sve_index): New function.
+	(aarch64_ext_sve_reglist): Likewise.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (CORE_INSN, __FP_INSN, SIMD_INSN, CRYP_INSN)
+	(_CRC_INSN, _LSE_INSN, _LOR_INSN, RDMA_INSN, FP16_INSN, SF16_INSN)
+	(V8_2_INSN, aarch64_opcode_table): Initialize tied_operand field.
+	* aarch64-opc.c (aarch64_match_operands_constraint): Check for
+	tied operands.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (get_offset_int_reg_name): New function.
+	(print_immediate_offset_address): Likewise.
+	(print_register_offset_address): Take the base and offset
+	registers as parameters.
+	(aarch64_print_operand): Update caller accordingly.  Use
+	print_immediate_offset_address.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (BANK): New macro.
+	(R32, R64): Take a register number as argument
+	(int_reg): Use BANK.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (print_register_list): Add a prefix parameter.
+	(aarch64_print_operand): Update accordingly.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (AARCH64_OPERNADS): Use fpimm rather than imm
+	for FPIMM.
+	* aarch64-asm.h (ins_fpimm): New inserter.
+	* aarch64-asm.c (aarch64_ins_fpimm): New function.
+	* aarch64-asm-2.c: Regenerate.
+	* aarch64-dis.h (ext_fpimm): New extractor.
+	* aarch64-dis.c (aarch64_ext_imm): Remove fpimm test.
+	(aarch64_ext_fpimm): New function.
+	* aarch64-dis-2.c: Regenerate.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-asm.c: Include libiberty.h.
+	(insert_fields): New function.
+	(aarch64_ins_imm): Use it.
+	* aarch64-dis.c (extract_fields): New function.
+	(aarch64_ext_imm): Use it.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (aarch64_logical_immediate_p): Replace is32
+	with an esize parameter.
+	(operand_general_constraint_met_p): Update accordingly.
+	Fix misindented code.
+	* aarch64-asm.c (aarch64_ins_limm): Update call to
+	aarch64_logical_immediate_p.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (match_operands_qualifier): Handle F_STRICT.
+
+2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-gen.c (indented_print): Avoid hard-coded indentation limit.
+
+2016-09-15  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-dis.c (find_format): Walk the linked list pointed by einsn.
+
+2016-09-14  Peter Bergner <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (powerpc_opcodes) <slbiag>: New mnemonic.
+	<addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
+	xor3>: Delete mnemonics.
+	<cp_abort>: Rename mnemonic from ...
+	<cpabort>: ...to this.
+	<setb>: Change to a X form instruction.
+	<sync>: Change to 1 operand form.
+	<copy>: Delete mnemonic.
+	<copy_first>: Rename mnemonic from ...
+	<copy>: ...to this.
+	<paste, paste.>: Delete mnemonics.
+	<paste_last>: Rename mnemonic from ...
+	<paste.>: ...to this.
+
+2016-09-14  Anton Kolesov  <Anton.Kolesov@synopsys.com>
+
+	* arc-dis.c (arc_get_disassembler): Accept a null bfd gracefully.
+
+2016-09-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* s390-mkopc.c (main): Support alternate arch strings.
+
+2016-09-12  Patrick Steuer  <steuer@linux.vnet.ibm.com>
+
+	* s390-opc.txt: Fix kmctr instruction type.
+
+2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (cpu_flag_init): Remove CPU_IAMCU_COMPAT_FLAGS.
+	* i386-init.h: Regenerated.
+
+2016-08-30  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* opcodes/arc-dis.c (print_insn_arc): Changed.
+
+2016-08-26  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-opc.c (sparc_opcodes): Fix typo in opcode, camellia_fi ->
+	camellia_fl.
+
+2016-08-26  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* arm-dis.c (psr_name): Use hex as case labels.  Add detection for
+	MSPLIM, PSPLIM, MSPLIM_NS, PSPLIM_NS, PRIMASK_NS, BASEPRI_NS,
+	FAULTMASK_NS, CONTROL_NS and SP_NS special registers.
+
+2016-08-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (PREFIX_MOD_0_0FAE_REG_4): New.
+	(PREFIX_MOD_3_0FAE_REG_4): Likewise.
+	(prefix_table): Add PREFIX_MOD_0_0FAE_REG_4 and
+	PREFIX_MOD_3_0FAE_REG_4.
+	(mod_table): Use PREFIX_MOD_0_0FAE_REG_4 and
+	PREFIX_MOD_3_0FAE_REG_4.
+	* i386-gen.c (cpu_flag_init): Add CPU_PTWRITE_FLAGS.
+	(cpu_flags): Add CpuPTWRITE.
+	* i386-opc.h (CpuPTWRITE): New.
+	(i386_cpu_flags): Add cpuptwrite.
+	* i386-opc.tbl: Add ptwrite instruction.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Likewise.
+
+2016-08-24  Anton Kolesov  <Anton.Kolesov@synopsys.com>
+
+	* arc-dis.h: Wrap around in extern "C".
+
+2016-08-23  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (V8_2_INSN): New macro.
+	(aarch64_opcode_table): Use it.
+
+2016-08-23  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (aarch64_opcode_table): Make more use of
+	CORE_INSN, __FP_INSN and SIMD_INSN.
+
+2016-08-23  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-tbl.h (CORE_INSN, __FP_INSN, SIMD_INSN): Add OP parameter.
+	(aarch64_opcode_table): Update uses accordingly.
+
+2016-07-25  Andrew Jenner  <andrew@codesourcery.com>
+	Kwok Cheung Yeung  <kcy@codesourcery.com>
+
+	opcodes/
+	* ppc-opc.c (vle_opcodes): Alias 'e_cmpwi' to 'e_cmpi' and
+	'e_cmplwi' to 'e_cmpli' instead.
+	(OPVUPRT, OPVUPRT_MASK): Define.
+	(powerpc_opcodes): Add E200Z4 insns.
+	(vle_opcodes): Add context save/restore insns.
+
+2016-07-27  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* micromips-opc.c (micromips_opcodes): Reorder "bc" next to "b",
+	"beqzc" next to "beq", "bnezc" next to "bne" and "jrc" next to
+	"j".
+
+2016-07-27  Graham Markall  <graham.markall@embecosm.com>
+
+        * arc-nps400-tbl.h: Change block comments to GNU format.
+        * arc-dis.c: Add new globals addrtypenames,
+        addrtypenames_max, and addtypeunknown.
+        (get_addrtype): New function.
+        (print_insn_arc): Print colons and address types when
+        required.
+        * arc-opc.c: Add MAKE_INSERT_NPS_ADDRTYPE macro and use to
+        define insert and extract functions for all address types.
+        (arc_operands): Add operands for colon and all address
+        types.
+        * arc-nps-400-tbl.h: Add NPS-400 BMU instructions to opcode table.
+        * arc-opc.c: Add NPS_BD_TYPE and NPS_BMU_NUM operands,
+        insert_nps_bd_num_buff and extract_nps_bd_num_buff functions.
+        * arc-nps-400-tbl.h: Add NPS-400 PMU instructions to opcode table.
+        * arc-opc.c: Add NPS_PMU_NXT_DST and NPS_PMU_NUM_JOB operands,
+        insert_nps_pmu_num_job and extract_nps_pmu_num_job functions.
+
+2016-07-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* configure: Regenerated.
+
+2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-dis.c (skipclass): New structure.
+	(decodelist): New variable.
+	(is_compatible_p): New function.
+	(new_element): Likewise.
+	(skip_class_p): Likewise.
+	(find_format_from_table): Use skip_class_p function.
+	(find_format): Decode first the extension instructions.
+	(print_insn_arc): Select either ARCEM or ARCHS based on elf
+	e_flags.
+	(parse_option): New function.
+	(parse_disassembler_options): Likewise.
+	(print_arc_disassembler_options): Likewise.
+	(print_insn_arc): Use parse_disassembler_options function.  Proper
+	select ARCv2 cpu variant.
+	* disassemble.c (disassembler_usage): Add ARC disassembler
+	options.
+
+2016-07-13  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-opc.c (mips_builtin_opcodes): Remove the INSN2_ALIAS
+	annotation from the "nal" entry and reorder it beyond "bltzal".
+
+2016-07-12  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-opc.c (ldtxa): New macro.
+	(sparc_opcodes): Use the macro defined above to add entries for
+	the LDTXA instructions.
+	(asi_table): Add the ASI_TWINX_* asis used in the LDTXA
+	instruction.
+
+2016-07-07  James Bowman  <james.bowman@ftdichip.com>
+
+	* ft32-opc.c (ft32_opc_info): Correct mask for "callc"
+	and "jmpc".
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* i386-opc.tbl (movzbl, movzbw, movzbq, movzwl, movzwq): Remove.
+	(movzb): Adjust to cover all permitted suffixes.
+	(movzw): New.
+	* i386-tbl.h: Re-generate.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* i386-opc.tbl (jmp): Remove Disp32S from non-64-bit variant.
+	(lgdt): Remove Tbyte from non-64-bit variant.
+	(fxsave64, fxrstor64, xsave64, xrstor64, xsaveopt64, xrstors64,
+	xsaves64, xsavec64): Remove Disp16.
+	(cvtsi2ss, cvtsi2sd, invept, invvpid, invpcid, vcvtsi2sd):
+	Remove Disp32S from non-64-bit variants. Remove Disp16 from
+	64-bit variants.
+	(vcvtsi2ss, vcvtsd2si, vcvtsd2usi, vcvtsi2sd, vcvtusi2sd,
+	vcvtusi2ss, vcvtss2si, vcvtss2usi, vcvttsd2si, vcvttsd2usi,
+	vcvttss2si, vcvttss2usi, vmovd, vmovq): Remove Disp16 from
+	64-bit variants.
+	* i386-tbl.h: Re-generate.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* i386-opc.tbl (xlat): Remove RepPrefixOk.
+	* i386-tbl.h: Re-generate.
+
+2016-06-30  Yao Qi  <yao.qi@linaro.org>
+
+	* arm-dis.c (print_insn): Fix typo in comment.
+
+2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* aarch64-opc.c (operand_general_constraint_met_p): Check the
+	range of ldst_elemlist operands.
+	(print_register_list): Use PRIi64 to print the index.
+	(aarch64_print_operand): Likewise.
+
+2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* mcore-opc.h: Remove sentinal.
+	* mcore-dis.c (print_insn_mcore): Adjust.
+
+2016-06-23  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-opc.c: Correct description of availability of NPS400
+	features.
+
+2016-06-22  Peter Bergner <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines.
+	(powerpc_opcodes) <brd, brh, brw, mffsce, mffscdrn, mffscdrni,
+	mffscrn, mffscrni, mffsl, nandxor, rldixor, setbool,
+	xor3>: New mnemonics.
+	<setb>: Change to a VX form instruction.
+	(insert_sh6): Add support for rldixor.
+	(extract_sh6): Likewise.
+
+2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* arc-ext.h: Wrap in extern C.
+
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-dis.c (arc_insn_length): Add comment on instruction length.
+	Use same method for determining	instruction length on ARC700 and
+	NPS-400.
+	(arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400.
+	* arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions
+	with the NPS400 subclass.
+	* arc-opc.c: Likewise.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-opc.c (rdasr): New macro.
+	(wrasr): Likewise.
+	(rdpr): Likewise.
+	(wrpr): Likewise.
+	(rdhpr): Likewise.
+	(wrhpr): Likewise.
+	(sparc_opcodes): Use the macros above to fix and expand the
+	definition of read/write instructions from/to
+	asr/privileged/hyperprivileged instructions.
+	* sparc-dis.c (v9_hpriv_reg_names): Add %hmcdper, %hmcddfr and
+	%hva_mask_nz.  Prefer softint_set and softint_clear over
+	set_softint and clear_softint.
+	(print_insn_sparc): Support %ver in Rd.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-opc.c (sparc_opcodes): Adjust instructions opcode
+	architecture according to the hardware capabilities they require.
+
+2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
+	(compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
+	bfd_mach_sparc_v9{c,d,e,v,m}.
+	* sparc-opc.c (MASK_V9C): Define.
+	(MASK_V9D): Likewise.
+	(MASK_V9E): Likewise.
+	(MASK_V9V): Likewise.
+	(MASK_V9M): Likewise.
+	(v6): Add MASK_V9{C,D,E,V,M}.
+	(v6notlet): Likewise.
+	(v7): Likewise.
+	(v8): Likewise.
+	(v9): Likewise.
+	(v9andleon): Likewise.
+	(v9a): Likewise.
+	(v9b): Likewise.
+	(v9c): Define.
+	(v9d): Likewise.
+	(v9e): Likewise.
+	(v9v): Likewise.
+	(v9m): Likewise.
+	(sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
+
+2016-06-15  Nick Clifton  <nickc@redhat.com>
+
+	* nds32-dis.c (nds32_parse_audio_ext): Change printing of integer
+	constants to match expected behaviour.
+	(nds32_parse_opcode): Likewise.  Also for whitespace.
+
+2016-06-15  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-opc.c (extract_rhv1): Extract value from insn.
+
+2016-06-14  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add ldbit instruction.
+	* arc-opc.c: Add flag classes required for ldbit.
+
+2016-06-14  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add hash, hash.p[0-3], tr, utf8, e4by, and addf
+	* arc-opc.c: Add flag classes, insert/extract functions, and operands to
+	support the above instructions.
+
+2016-06-14  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb,
+	imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms,
+	csma, cbba, zncv, and hofs.
+	* arc-opc.c: Add flag classes, insert/extract functions, and operands to
+	support the above instructions.
+
+2016-06-06  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add andab and orab instructions.
+
+2016-06-06  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add addl-like instructions.
+
+2016-06-06  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add mxb and imxb instructions.
+
+2016-06-06  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey and calcxkey
+	instructions.
+
+2016-06-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* s390-dis.c (option_use_insn_len_bits_p): New file scope
+	variable.
+	(init_disasm): Handle new command line option "insnlength".
+	(print_s390_disassembler_options): Mention new option in help
+	output.
+	(print_insn_s390): Use the encoded insn length when dumping
+	unknown instructions.
+
+2016-06-03  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	* avr-dis.c (avr_operand): Add default data address space origin (0x800000)
+	 to the address and set as symbol address for LDS/ STS immediate operands.
+
+2016-06-07  Alan Modra  <amodra@gmail.com>
+
+	* ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
+	cpu for "vle" to e500.
+	* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
+	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
+	(PPCNONE): Delete, substitute throughout.
+	(powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
+	except for major opcode 4 and 31.
+	(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
+
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
+	ARM_EXT_RAS in relevant entries.
+
+2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
+
+	PR binutils/20196
+	* ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
+	opcodes for E6500.
+
+2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutis/18386
+	* i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
+	(indir_v_mode): New.
+	Add comments for '&'.
+	(reg_table): Replace "{T|}" with "{&|}" on call and jmp.
+	(putop): Handle '&'.
+	(intel_operand_size): Handle indir_v_mode.
+	(OP_E_register): Likewise.
+	* i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64.  Add
+	64-bit indirect call/jmp for AMD64.
+	* i386-tbl.h: Regenerated
+
+2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-dis.c (struct arc_operand_iterator): New structure.
+	(find_format_from_table): All the old content from find_format,
+	with some minor adjustments, and parameter renaming.
+	(find_format_long_instructions): New function.
+	(find_format): Rewritten.
+	(arc_insn_length): Add LSB parameter.
+	(extract_operand_value): New function.
+	(operand_iterator_next): New function.
+	(print_insn_arc): Use new functions to find opcode, and iterator
+	over operands.
+	* arc-opc.c (insert_nps_3bit_dst_short): New function.
+	(extract_nps_3bit_dst_short): New function.
+	(insert_nps_3bit_src2_short): New function.
+	(extract_nps_3bit_src2_short): New function.
+	(insert_nps_bitop1_size): New function.
+	(extract_nps_bitop1_size): New function.
+	(insert_nps_bitop2_size): New function.
+	(extract_nps_bitop2_size): New function.
+	(insert_nps_bitop_mod4_msb): New function.
+	(extract_nps_bitop_mod4_msb): New function.
+	(insert_nps_bitop_mod4_lsb): New function.
+	(extract_nps_bitop_mod4_lsb): New function.
+	(insert_nps_bitop_dst_pos3_pos4): New function.
+	(extract_nps_bitop_dst_pos3_pos4): New function.
+	(insert_nps_bitop_ins_ext): New function.
+	(extract_nps_bitop_ins_ext): New function.
+	(arc_operands): Add new operands.
+	(arc_long_opcodes): New global array.
+	(arc_num_long_opcodes): New global.
+	* arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
+
+2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* nds32-asm.h: Add extern "C".
+	* sh-opc.h: Likewise.
+
+2016-06-01  Graham Markall  <graham.markall@embecosm.com>
+
+	* arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and
+	0,b,limm to the rflt instruction.
+
+2016-05-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned
+	constant.
+
+2016-05-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20145
+	* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS,
+	CPU_ANY_AVX512CD_FLAGS, CPU_ANY_AVX512ER_FLAGS,
+	CPU_ANY_AVX512PF_FLAGS, CPU_ANY_AVX512DQ_FLAGS,
+	CPU_ANY_AVX512BW_FLAGS, CPU_ANY_AVX512VL_FLAGS,
+	CPU_ANY_AVX512IFMA_FLAGS and CPU_ANY_AVX512VBMI_FLAGS.
+	* i386-init.h: Regenerated.
+
+2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20145
+	* i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS.  Remove
+	CpuMMX from CPU_SSE_FLAGS.  Remove AVX and AVX512 bits from
+	CPU_ANY_SSE_FLAGS.  Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
+	Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
+	CpuXSAVEC.  Add CPU_AVX_FLAGS to CpuF16C.  Remove CpuMMX from
+	CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
+	CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
+	Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS.   Add CPU_ANY_287_FLAGS,
+	CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
+	CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
+	CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS.  Enable CpuRegMMX
+	for MMX.  Enable CpuRegXMM for SSE, AVX and AVX512.  Enable
+	CpuRegYMM for AVX and AVX512VL,  Enable CpuRegZMM and
+	CpuRegMask for AVX512.
+	(cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
+	and CpuRegMask.
+	(set_bitfield_from_cpu_flag_init): New function.
+	(set_bitfield): Remove const on f.  Call
+	set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
+	* i386-opc.h (CpuRegMMX): New.
+	(CpuRegXMM): Likewise.
+	(CpuRegYMM): Likewise.
+	(CpuRegZMM): Likewise.
+	(CpuRegMask): Likewise.
+	(i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
+	and cpuregmask.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Likewise.
+
+2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20154
+	* i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
+	(opcode_modifiers): Add AMD64 and Intel64.
+	(main): Properly verify CpuMax.
+	* i386-opc.h (CpuAMD64): Removed.
+	(CpuIntel64): Likewise.
+	(CpuMax): Set to CpuNo64.
+	(i386_cpu_flags): Remove cpuamd64 and cpuintel64.
+	(AMD64): New.
+	(Intel64): Likewise.
+	(i386_opcode_modifier): Add amd64 and intel64.
+	(i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
+	on call and jmp.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Likewise.
+
+2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20154
+	* i386-gen.c (main): Fail if CpuMax is incorrect.
+	* i386-opc.h (CpuMax): Set to CpuIntel64.
+	* i386-tbl.h: Regenerated.
+
+2016-05-27  Nick Clifton  <nickc@redhat.com>
+
+	PR target/20150
+	* msp430-dis.c (msp430dis_read_two_bytes): New function.
+	(msp430dis_opcode_unsigned): New function.
+	(msp430dis_opcode_signed): New function.
+	(msp430_singleoperand): Use the new opcode reading functions.
+	Only disassenmble bytes if they were successfully read.
+	(msp430_doubleoperand): Likewise.
+	(msp430_branchinstr): Likewise.
+	(msp430x_callx_instr): Likewise.
+	(print_insn_msp430): Check that it is safe to read bytes before
+	attempting disassembly.  Use the new opcode reading functions.
+
+2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (CY): New define.  Document it.
+	(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
+	CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
+	and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
+	CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
+	CPU_ANY_AVX_FLAGS.
+	* i386-init.h: Regenerated.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR gas/20141
+	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
+	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
+	* i386-init.h: Regenerated.
+
+2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
+	CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
+	* i386-init.h: Regenerated.
+
+2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
+	information.
+	(print_insn_arc): Set insn_type information.
+	* arc-opc.c (C_CC): Add F_CLASS_COND.
+	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
+	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
+	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
+	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
+	(brne, brne_s, jeq_s, jne_s): Likewise.
+
+2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-tbl.h (neg): New instruction variant.
+
+2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
+
+	* arc-dis.c (find_format, find_format, get_auxreg)
+	(print_insn_arc): Changed.
+	* arc-ext.h (INSERT_XOP): Likewise.
+
+2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* tic54x-dis.c (sprint_mmr): Adjust.
+	* tic54x-opc.c: Likewise.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* ppc-opc.c: Formatting.
+	(NSISIGNOPT): Define.
+	(powerpc_opcodes <subis>): Use NSISIGNOPT.
+
+2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
+	replacing references to `micromips_ase' throughout.
+	(_print_insn_mips): Don't use file-level microMIPS annotation to
+	determine the disassembly mode with the symbol table.
+
+2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
+
+2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
+	mips64r6.
+	* mips-opc.c (D34): New macro.
+	(mips_builtin_opcodes): Define bposge32c for DSPr3.
+
+2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
+
+	* i386-dis.c (prefix_table): Add RDPID instruction.
+	* i386-gen.c (cpu_flag_init): Add RDPID flag.
+	(cpu_flags): Add RDPID bitfield.
+	* i386-opc.h (enum): Add RDPID element.
+	(i386_cpu_flags): Add RDPID field.
+	* i386-opc.tbl: Add RDPID instruction.
+	* i386-init.h: Regenerate.
+	* i386-tbl.h: Regenerate.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
+	branch type of a symbol.
+	(print_insn): Likewise.
+
+2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
+	Mainline Security Extensions instructions.
+	(thumb_opcodes): Add entries for narrow ARMv8-M Security
+	Extensions instructions.
+	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
+	instructions.
+	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
+	special registers.
+
+2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
+
+2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
+	(arcExtMap_genOpcode): Likewise.
+	* arc-opc.c (arg_32bit_rc): Define new variable.
+	(arg_32bit_u6): Likewise.
+	(arg_32bit_limm): Likewise.
+
+2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
+
+	* aarch64-gen.c (VERIFIER): Define.
+	* aarch64-opc.c (VERIFIER): Define.
+	(verify_ldpsw): Use static linkage.
+	* aarch64-opc.h (verify_ldpsw): Remove.
+	* aarch64-tbl.h: Use VERIFIER for verifiers.
+
+2016-04-28  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19722
+	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
+	* aarch64-opc.c (verify_ldpsw): New function.
+	* aarch64-opc.h (verify_ldpsw): New prototype.
+	* aarch64-tbl.h: Add initialiser for verifier field.
+	(LDPSW): Set verifier to verify_ldpsw.
+
+2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/19983
+	PR binutils/19984
+	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
+	smaller than address size.
+
+2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* alpha-dis.c: Regenerate.
+	* crx-dis.c: Likewise.
+	* disassemble.c: Likewise.
+	* epiphany-opc.c: Likewise.
+	* fr30-opc.c: Likewise.
+	* frv-opc.c: Likewise.
+	* ip2k-opc.c: Likewise.
+	* iq2000-opc.c: Likewise.
+	* lm32-opc.c: Likewise.
+	* lm32-opinst.c: Likewise.
+	* m32c-opc.c: Likewise.
+	* m32r-opc.c: Likewise.
+	* m32r-opinst.c: Likewise.
+	* mep-opc.c: Likewise.
+	* mt-opc.c: Likewise.
+	* or1k-opc.c: Likewise.
+	* or1k-opinst.c: Likewise.
+	* tic80-opc.c: Likewise.
+	* xc16x-opc.c: Likewise.
+	* xstormy16-opc.c: Likewise.
+
+2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
+	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
+	calcsd, and calcxd instructions.
+	* arc-opc.c (insert_nps_bitop_size): Delete.
+	(extract_nps_bitop_size): Delete.
+	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
+	(extract_nps_qcmp_m3): Define.
+	(extract_nps_qcmp_m2): Define.
+	(extract_nps_qcmp_m1): Define.
+	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
+	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
+	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
+	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
+	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
+	NPS_QCMP_M3.
+
+2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
+
+2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated with automake 1.11.6.
+	* aclocal.m4: Likewise.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
+	instructions.
+	* arc-opc.c (insert_nps_cmem_uimm16): New function.
+	(extract_nps_cmem_uimm16): New function.
+	(arc_operands): Add NPS_XLDST_UIMM16 operand.
+
+2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-dis.c (arc_insn_length): New function.
+	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
+	(find_format): Change insnLen parameter to unsigned.
+
+2016-04-13  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19937
+	* v850-opc.c (v850_opcodes): Correct masks for long versions of
+	the LD.B and LD.BU instructions.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-dis.c (find_format): Check for extension flags.
+	(print_flags): New function.
+	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
+	.extAuxRegister.
+	* arc-ext.c (arcExtMap_coreRegName): Use
+	LAST_EXTENSION_CORE_REGISTER.
+	(arcExtMap_coreReadWrite): Likewise.
+	(dump_ARC_extmap): Update printing.
+	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
+	(arc_aux_regs): Add cpu field.
+	* arc-regs.h: Add cpu field, lower case name aux registers.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-tbl.h: Add rtsc, sleep with no arguments.
+
+2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
+	Initialize.
+	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
+	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
+	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
+	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
+	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
+	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
+	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
+	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
+	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
+	(arc_opcode arc_opcodes): Null terminate the array.
+	(arc_num_opcodes): Remove.
+	* arc-ext.h (INSERT_XOP): Define.
+	(extInstruction_t): Likewise.
+	(arcExtMap_instName): Delete.
+	(arcExtMap_insn): New function.
+	(arcExtMap_genOpcode): Likewise.
+	* arc-ext.c (ExtInstruction): Remove.
+	(create_map): Zero initialize instruction fields.
+	(arcExtMap_instName): Remove.
+	(arcExtMap_insn): New function.
+	(dump_ARC_extmap): More info while debuging.
+	(arcExtMap_genOpcode): New function.
+	* arc-dis.c (find_format): New function.
+	(print_insn_arc): Use find_format.
+	(arc_get_disassembler): Enable dump_ARC_extmap only when
+	debugging.
+
+2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
+	instruction bits out.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
+	* arc-opc.c (arc_flag_operands): Add new flags.
+	(arc_flag_classes): Add new classes.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
+
+2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
+	encode1, rflt, crc16, and crc32 instructions.
+	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
+	(arc_flag_classes): Add C_NPS_R.
+	(insert_nps_bitop_size_2b): New function.
+	(extract_nps_bitop_size_2b): Likewise.
+	(insert_nps_bitop_uimm8): Likewise.
+	(extract_nps_bitop_uimm8): Likewise.
+	(arc_operands): Add new operand entries.
+
+2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-regs.h: Add a new subclass field.  Add double assist
+	accumulator register values.
+	* arc-tbl.h: Use DPA subclass to mark the double assist
+	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
+	* arc-opc.c (RSP): Define instead of SP.
+	(arc_aux_regs): Add the subclass field.
+
+2016-04-05  Jiong Wang  <jiong.wang@arm.com>
+
+	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
+
+2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
+	NPS_R_SRC1.
+
+2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
+	issues.  No functional changes.
+
+2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
+	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
+	(RTT): Remove duplicate.
+	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
+	(PCT_CONFIG*): Remove.
+	(D1L, D1H, D2H, D2L): Define.
+
+2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
+
+2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-tbl.h (invld07): Remove.
+	* arc-ext-tbl.h: New file.
+	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
+	* arc-opc.c (arc_opcodes): Add ext-tbl include.
+
+2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
+
+	Fix -Wstack-usage warnings.
+	* aarch64-dis.c (print_operands): Substitute size.
+	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
+
+2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
+	to get a proper diagnostic when an invalid ASR register is used.
+
+2016-03-22  Nick Clifton  <nickc@redhat.com>
+
+	* configure: Regenerate.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-nps400-tbl.h: New file.
+	* arc-opc.c: Add top level comment.
+	(insert_nps_3bit_dst): New function.
+	(extract_nps_3bit_dst): New function.
+	(insert_nps_3bit_src2): New function.
+	(extract_nps_3bit_src2): New function.
+	(insert_nps_bitop_size): New function.
+	(extract_nps_bitop_size): New function.
+	(arc_flag_operands): Add nps400 entries.
+	(arc_flag_classes): Add nps400 entries.
+	(arc_operands): Add nps400 entries.
+	(arc_opcodes): Add nps400 include.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
+	the new class enum values.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-dis.c (print_insn_arc): Handle nps400.
+
+2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* arc-opc.c (BASE): Delete.
+
+2016-03-18  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19721
+	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
+	of MOV insn that aliases an ORR insn.
+
+2016-03-16  Jiong Wang  <jiong.wang@arm.com>
+
+	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
+
+2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* mcore-opc.h: Add const qualifiers.
+	* microblaze-opc.h (struct op_code_struct): Likewise.
+	* sh-opc.h: Likewise.
+	* tic4x-dis.c (tic4x_print_indirect): Likewise.
+	(tic4x_print_op): Likewise.
+
+2016-03-02  Alan Modra  <amodra@gmail.com>
+
+	* or1k-desc.h: Regenerate.
+	* fr30-ibld.c: Regenerate.
+	* rl78-decode.c: Regenerate.
+
+2016-03-01  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19747
+	* rl78-dis.c (print_insn_rl78_common): Fix typo.
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
+	(print_insn_coprocessor): Support fp16 instructions.
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
+	vminnm, vrint(mpna).
+
+2016-02-24  Renlin Li  <renlin.li@arm.com>
+
+	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
+	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
+
+2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (print_insn): Parenthesize expression to prevent
+	truncated addresses.
+	(OP_J): Likewise.
+
+2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
+	    Janek van Oirschot  <jvanoirs@synopsys.com>
+
+	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
+	variable.
+
+2016-02-04  Nick Clifton  <nickc@redhat.com>
+
+	PR target/19561
+	* msp430-dis.c (print_insn_msp430): Add a special case for
+	decoding an RRC instruction with the ZC bit set in the extension
+	word.
+
+2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* cgen-ibld.in (insert_normal): Rework calculation of shift.
+	* epiphany-ibld.c: Regenerate.
+	* fr30-ibld.c: Regenerate.
+	* frv-ibld.c: Regenerate.
+	* ip2k-ibld.c: Regenerate.
+	* iq2000-ibld.c: Regenerate.
+	* lm32-ibld.c: Regenerate.
+	* m32c-ibld.c: Regenerate.
+	* m32r-ibld.c: Regenerate.
+	* mep-ibld.c: Regenerate.
+	* mt-ibld.c: Regenerate.
+	* or1k-ibld.c: Regenerate.
+	* xc16x-ibld.c: Regenerate.
+	* xstormy16-ibld.c: Regenerate.
+
+2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* epiphany-dis.c: Regenerated from latest cpu files.
+
+2016-02-01  Michael McConville  <mmcco@mykolab.com>
+
+	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
+	test bit.
+
+2016-01-25  Renlin Li  <renlin.li@arm.com>
+
+	* arm-dis.c (mapping_symbol_for_insn): New function.
+	(find_ifthen_state): Call mapping_symbol_for_insn().
+
+2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
+	of MSR UAO immediate operand.
+
+2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
+	instruction support.
+
+2016-01-17  Alan Modra  <amodra@gmail.com>
+
+	* configure: Regenerate.
+
+2016-01-14  Nick Clifton  <nickc@redhat.com>
+
+	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
+	instructions that can support stack pointer operations.
+	* rl78-decode.c: Regenerate.
+	* rl78-dis.c: Fix display of stack pointer in MOVW based
+	instructions.
+
+2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
+	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
+	erxtatus_el1 and erxaddr_el1.
+
+2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* arm-dis.c (arm_opcodes): Add "esb".
+	(thumb_opcodes): Likewise.
+
+2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
+
+	* ppc-opc.c <xscmpnedp>: Delete.
+	<xvcmpnedp>: Likewise.
+	<xvcmpnedp.>: Likewise.
+	<xvcmpnesp>: Likewise.
+	<xvcmpnesp.>: Likewise.
+
+2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
+
+	PR gas/13050
+	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
+	addition to ISA_A.
+
+2016-01-01  Alan Modra  <amodra@gmail.com>
+
+	Update year range in copyright notice of all files.
+
+For older changes see ChangeLog-2015
+
+Copyright (C) 2016 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End: