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Add zvfh and zvfhmin to the list of ISA extension supported by QEMU.
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The resulting UNRESOLVEDs have been added to the allowlists.
Tested with report-linux and report-newlib.
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Default behavior of qemu is treat tail/mask agnostic as tail/mask undisturbed,
and this may hidding some problem, one example is
[PR115725](https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115725) for
GCC.
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See this for detail:
https://www.qemu.org/docs/master/about/deprecated.html#risc-v-cpu-properties-which-start-with-capital-z-since-8-2
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RISCV: Add target_board generation for multiple arch_abi parameters
Currently this script just can handle one parameter for arch_abi,but there is more than one arch_abi in "newlib_multilib_names" which comes from the configure.
Execute the following command:
generate_target_board --sim-name riscv-sim --cmodel medany --build-arch-abi "rv32imafc-ilp32f rv64imafdc-lp64d"
Before this patch the result is:
riscv-sim/-march=rv32imafc/-mabi=ilp32f rv64imafdc/-mcmodel=medany
After this patch,the result is:
riscv-sim/-march=rv32imafc/-mabi=ilp32f/-mcmodel=medany
riscv-sim/-march=rv64imafdc/-mabi=lp64d/-mcmodel=medany
At the same time,there is small modification for Makefile.in,the
parameters of build-arch-abi should be enclosed in double quotation marks.
--build-arch-abi "$(NEWLIB_MULTILIB_NAMES)"
Signed-off-by: ff520git <wangfeng@eswincomputing.com>
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Signed-off-by: Pan Li <pan2.li@intel.com>
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According to the ISA, the zve32/zve64 xdf decides the elen of the
RVV. Thus we should pick up extension instead of xlen for spike
varch generation.
Signed-off-by: Pan Li <pan2.li@intel.com>
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The default value of subarray is the length, thus we should
take `idx` instead of `idx - 1` here.
Signed-off-by: Pan Li <pan2.li@intel.com>
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Add misaligned memory access for spike.
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The spec does not forbid the misaligned memory access. And the gcc
will generate vector load/store to access misaligned memory by
default.
Currently the QEMU supports this feature, so to support in spike
is also make sense.
Reference test case: gcc/gcc/testsuite/gcc.dg/vect/vect-align-1.c
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This patch allows you provide the flags in build flags array acts on arch-abi
__respectively__, you can use ',' to separate them. For example:
`rv64gcv-lp64d:--param=riscv-autovec-lmul=dynamic,--param=riscv-autovec-preference=fixed-vlmax`
will be consider as two target boards same as below:
```
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=dynamic
```
However, you can also leverage AND(`:`), OR(`,`) operator together but the
OR(`,`) will always have the higher priority. For example:
`rv64gcv-lp64d:--param=riscv-autovec-lmul=dynamic:--param=riscv-autovec-preference=fixed-vlmax,--param=riscv-autovec-lmul=m2`
will be consider as tow target boars same as below:
```
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=dynamic/--param=riscv-autovec-preference=fixed-vlmax
riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2
```
Signed-off-by: Pan Li <pan2.li@intel.com>
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Inject CPU options to spike run test from elf file
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Signed-off-by: Pan Li <pan2.li@intel.com>
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* Refactor CPU options for exacting common part between qemu and spike.
* Inject CPU options to spike run command line.
The below common CPU options are extracted to common part.
* xlen
* vlen
* extensions
The above CPU options will be leveraged to build the run arguments for
both the qemu and spike, for example.
QEMU: qemu-riscv64 -cpu rv64,v=true,vlen=1024,elen=64,vext_spec=v1.0
SPIKE: spike --isa=rv64imafdcv_zicsr_zifencei_zmmul --varch=vlen:1024,elen:64
Signed-off-by: Pan Li <pan2.li@intel.com>
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Recently we have add the capability to adding extra compilation options
for running GCC testsuite, but it seems not handle well on the `make report`
part, it will ignore extra compilation options, and then...combine
multiple report together.
Now it will put in two different line, and the extra compilation options
will listed in follwoing line, here is example output here:
========= Summary of gcc testsuite =========
| # of unexpected case / # of unique unexpected case
| gcc | g++ | gfortran |
rv64gc_zicfilp_zicfiss/ lp64d/ medlow |20350 / 3967 |10158 / 2583 |18374 / 3098 |
rv64gc_zicfilp_zicfiss/ lp64d/ medlow | 86 / 19 | 15 / 9 | 51 / 51 |
-static
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The `--with-extra-multilib-test` take the format like below for now.
"<arch>-<abi>-[code-model][;<arch>-<abi>-[code-model]*"
This patch would like to extend the sematic to support additional buil
options for each combination. Aka:
"<arch>-<abi>-[code-model][:opts]*[;<arch>-<abi>-[code-model][:opts]*]*"
opts can be one or more build options splited by ':'. For example as
below:
* --param=riscv-autovec-lmul=m1
* --param=riscv-autovec-lmul=dynamic:--param=riscv-autovec-preference=fixed-vlmax
Thus the full example of the option `--with-extra-multilib-test` will be:
`rv64gcv_zvl128b-lp64d:--param=riscv-autovec-lmul=m1;rv64gcv_zvl256b-lp64d:-
-param=riscv-autovec-lmul=dynamic:--param=riscv-autovec-preference=fixed-vlmax`
Signed-off-by: Pan Li <pan2.li@intel.com>
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... just as in march-to-cpu-opt
Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
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Some testcases in GCC's testsuite check stdout.
Qemu will print a warning if the vector spec is not specified which will cause those testcases to fail.
The warning:
vector version is not specified, use the default value v1.0
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
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Add ci jobs for make-report and make-report multilib
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This could help multi-lib testing, but the price is slightly increase
the testing time since it will need to extract ELF attribute from binary
before running qemu.
But I think the cost is acceptable compare to make build system more
complicate, and actually we already use this approach in our internal stuffs
for years.
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Add unittest to march-to-cpu-opt
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Support testing zdinx/zfinx/zhinx.
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https://github.com/riscv-collab/riscv-gnu-toolchain/pull/1167 has found
some bug, and I realized the testing of march-to-cpu-opt is...not well,
so spend some time to improve that a little bit, it's not complete testing,
but at least it's a start :P
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If test --with-arch=rv32imc_zve128x
NameError: name 'arch' is not defined
Signed-off-by: Kwanghoon Son <kwangson@yahoo.com>
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- We don't set correct qemu option for zdinx/zfinx/zhinx, this patch is
fixing the march-to-cpu-opt, which is a script translate -march string
to qemu options.
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- Parse that from `--with-arch=` option
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- RV32 require 5.10 which is too new for most linux distro.
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e.g.
The testcase already fail, the second XPASS is kind of false positive.
FAIL: gcc.dg/analyzer/taint-1.c
XPASS: gcc.dg/analyzer/taint-1.c
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Use items rather than iteritems for python 3 compatible
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I don't run any multilib tests here because they take too long for
Travis.
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gdb-sim accounted for nearly all test failures, so don't use it for now.
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I have no idea why, but the installed "sed" wrapper never terminates
on RHEL. If I don't use the wrappen the the tools build fine, so this
just uses the already set autoconf variables to attempt to determine
if the system sed/awk are gsed/gawk and if they are then this avoids
using the wrappers.
There's a few oddities here:
* I have no idea why the sed wrapper fails, as it seems super safe.
* I haven't run into any awk problems, but I figured I'd treat it the
same as it isn't any harder.
* We shouldn't have to support 10 year old distributions.
Hopefully this doesn't break anyone's builds...
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Tests for program presence, such as those formerly embedded in the
top-level Makefile for gawk and gsed, are better suited for autoconf.
Note that it is not sufficient to merely export AWK and SED environment
variables, as packages may still directly invoke awk(1) and sed(1) with
non-standard features independent of the autotools framework.
Wrapper scripts therefore remain necessary, although these are now
generated by the configure script to avoid hard-coded paths.
Do not assume the existence of /bin/bash on all systems.
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Eliminate bashisms; target the Bourne shell and a safer subset of POSIX
utilities. Furthermore, properly handle pathnames with whitespace.
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