aboutsummaryrefslogtreecommitdiff
path: root/sim/v850/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-1924/+0
2021-07-01sim: unify reserved instruction bits settingsMike Frysinger1-0/+6
2021-06-30sim: move default model to the runtime sim stateMike Frysinger1-0/+4
2021-06-22sim: drop configure scripts for simple portsMike Frysinger1-0/+4
2021-06-21sim: unify hardware settingsMike Frysinger1-0/+5
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger1-0/+4
2021-06-20sim: delete SIM_AC_COMMON macroMike Frysinger1-0/+5
2021-06-20sim: move sim-inline to the common codeMike Frysinger1-0/+5
2021-06-19sim: unify bfd library dependency testing logicMike Frysinger1-0/+5
2021-06-19sim: unify various library testing logicMike Frysinger1-0/+4
2021-06-18sim: unify -Werror build settingsMike Frysinger1-0/+4
2021-06-18sim: move -Werror disabling to MakefileMike Frysinger1-0/+4
2021-06-18sim: split sim-signal.h include outMike Frysinger1-0/+4
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger1-0/+6
2021-06-16sim: drop obsolete AC_EXEEXT callMike Frysinger1-0/+4
2021-06-16sim: drop arch-specific config.hMike Frysinger1-0/+5
2021-06-15sim: move dv-sockser define to CPPFLAGSMike Frysinger1-0/+4
2021-06-12sim: overhaul alignment settings managementMike Frysinger1-0/+4
2021-06-12sim: unify assert build settingsMike Frysinger1-0/+4
2021-06-12sim: unify platform function & header testsMike Frysinger1-0/+6
2021-06-08sim: igen: harmonize tool variablesMike Frysinger1-0/+5
2021-06-08sim: v850: assume chown is availableMike Frysinger1-0/+6
2021-05-29sim: v850: add pointer casts for execv on WindowsMike Frysinger1-0/+4
2021-05-17sim: fully merge sim_state_base into sim_stateMike Frysinger1-0/+4
2021-05-17sim: invert sim_state storageMike Frysinger1-0/+5
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-0/+5
2021-05-16sim: riscv: move __int128 check to configureMike Frysinger1-0/+4
2021-05-04sim: add support for build-time ar & ranlibMike Frysinger1-0/+4
2021-05-03sim: add ATTRIBUTE_PRINTF / ATTRIBUTE_NULL_PRINTF where necessarySimon Marchi1-0/+4
2021-05-01sim: nrun: add local strsignal prototypeMike Frysinger1-0/+4
2021-04-26sim: enable hardware support by defaultMike Frysinger1-0/+4
2021-04-22Do not check for sys/time.h or sys/times.hTom Tromey1-0/+4
2021-04-22Remove INCLUDE variable from some sim MakefilesTom Tromey1-0/+4
2021-04-22Remove and modernize dependencies in simTom Tromey1-0/+4
2021-04-22Require GNU makeTom Tromey1-0/+4
2021-04-21sim: regen against sim/m4/Mike Frysinger1-0/+4
2021-04-21sim: use -Werror when probing for supported warning flagsSimon Marchi1-0/+4
2021-04-18sim: switch to AC_CHECK_HEADERS_ONCEMike Frysinger1-0/+5
2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger1-0/+6
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-0/+4
2021-04-08sim: set ASAN_OPTIONS=detect_leaks=0 when running igen and opc2cSimon Marchi1-0/+4
2021-04-02sim: igen: merge build into top levelMike Frysinger1-0/+5
2021-04-02sim: unify toolchain settingsMike Frysinger1-0/+4
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger1-0/+4
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger1-0/+5
2021-02-13sim: switch to AC_CONFIG_MACRO_DIRSMike Frysinger1-0/+5
2021-02-06sim: watchpoints: use common sim_pc_getMike Frysinger1-0/+4
2021-02-06sim: drop use of bfd/configure.hostMike Frysinger1-0/+4
2021-01-31sim: v850: cleanup build warningsMike Frysinger1-0/+6
2021-01-31sim: v850: fix handling of SYS_timesMike Frysinger1-1/+4
generated by cgit v1.1 at 2024-11-08 16:10:29 +0000