Age | Commit message (Expand) | Author | Files | Lines |
2020-06-03 | Updated Serbian translation for the opcodes sub-directory | Nick Clifton | 2 | -530/+1480 |
2020-06-03 | RISC-V: Fix the error when building RISC-V linux native gdbserver. | Nelson Chu | 2 | -8/+13 |
2020-06-01 | Regen opcodes/bpf-desc.c | Alan Modra | 2 | -12/+8 |
2020-05-28 | cpu,opcodes: add instruction semantics to bpf.cpu and minor fixes | Jose E. Marchesi | 5 | -204/+243 |
2020-05-28 | ubsan: nios2: undefined shift | Alan Modra | 2 | -11/+10 |
2020-05-28 | asan: ns32k: use of uninitialized value | Alan Modra | 2 | -7/+8 |
2020-05-28 | Fix a potential use of an uninitialised value in the ns32k disassembler. | Nick Clifton | 2 | -1/+9 |
2020-05-26 | Fix extraction of signed constants in nios2 disassembler (again). | Sandra Loosemore | 2 | -8/+25 |
2020-05-26 | ChangeLog entries for f687f5f563 | Stefan Schulze Frielinghaus | 1 | -0/+6 |
2020-05-26 | S/390: z13: Accept vector alignment hints | Stefan Schulze Frielinghaus | 1 | -12/+7 |
2020-05-21 | Replace "if (x) free (x)" with "free (x)", opcodes | Alan Modra | 20 | -194/+88 |
2020-05-20 | [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions... | Nelson Chu | 4 | -63/+331 |
2020-05-19 | Power10 dcbf, sync, and wait extensions. | Peter Bergner | 2 | -26/+243 |
2020-05-19 | or1k: Regenerate opcodes after removing 32-bit support | Stafford Horne | 9 | -1648/+1195 |
2020-05-11 | Power10 VSX scalar min-max-compare quad precision operations | Alan Modra | 2 | -0/+16 |
2020-05-11 | Power10 VSX load/store rightmost element operations | Alan Modra | 2 | -0/+21 |
2020-05-11 | Power10 test lsb by byte operation | Alan Modra | 2 | -0/+5 |
2020-05-11 | Power10 string operations | Alan Modra | 2 | -0/+15 |
2020-05-11 | Power10 Set boolean extension | Peter Bergner | 2 | -0/+13 |
2020-05-11 | Power10 bit manipulation operations | Alan Modra | 2 | -1/+27 |
2020-05-11 | Power10 VSX PCV generate operations | Alan Modra | 2 | -0/+9 |
2020-05-11 | Power10 VSX Mask Manipulation Operations | Alan Modra | 2 | -1/+36 |
2020-05-11 | Power10 Reduced precision outer product operations | Alan Modra | 3 | -4/+231 |
2020-05-11 | Power10 SIMD permute class operations | Alan Modra | 2 | -3/+129 |
2020-05-11 | Power10 128-bit binary integer operations | Alan Modra | 2 | -0/+44 |
2020-05-11 | Power10 VSX 32-byte storage access | Alan Modra | 2 | -1/+44 |
2020-05-11 | Power10 vector integer multiply, divide, modulo insns | Alan Modra | 2 | -0/+23 |
2020-05-11 | Power10 byte reverse instructions | Peter Bergner | 2 | -0/+10 |
2020-05-11 | Power10 Copy/Paste Extensions | Peter Bergner | 2 | -2/+37 |
2020-05-11 | Power10 Add new L operand to the slbiag instruction | Peter Bergner | 2 | -1/+7 |
2020-05-11 | PowerPC Default disassembler to -Mpower10 | Alan Modra | 2 | -1/+5 |
2020-05-11 | PowerPC Rename powerxx to power10 | Alan Modra | 3 | -30/+41 |
2020-05-11 | Updated French translation for the ld sub-directory and an update Spanish tra... | Nick Clifton | 2 | -349/+455 |
2020-04-30 | AArch64: add GAS support for UDF instruction | Alex Coplan | 8 | -2477/+2541 |
2020-04-29 | Also use unsigned 8-bit immediate values for the LDRC and SETRC insns. | Nick Clifton | 2 | -2/+8 |
2020-04-29 | Updated Serbian translation for the binutils sub-directory, and Swedish trans... | Nick Clifton | 2 | -351/+457 |
2020-04-29 | Fix the disassmbly of SH instructions which have an unsigned 8-bit immediate ... | Nick Clifton | 3 | -18/+31 |
2020-04-21 | Disallow PC relative for CMPI on MC68000/10 | Andreas Schwab | 2 | -6/+18 |
2020-04-20 | [AArch64, Binutils] Add missing TSB instruction | Sudakshina Das | 10 | -1376/+1422 |
2020-04-20 | [AArch64, Binutils] Make hint space instructions valid for Armv8-a | Sudakshina Das | 5 | -1370/+1369 |
2020-04-17 | [PATCH v2] binutils: arm: Fix disassembly of conditional VDUPs. | Fredrik Strupe | 2 | -10/+53 |
2020-04-16 | cpu,gas,opcodes: support for eBPF JMP32 instruction class | David Faust | 5 | -13/+515 |
2020-04-07 | Add support for intel TSXLDTRK instructions$ | Cui,Lili | 7 | -4154/+4234 |
2020-04-02 | Add support for intel SERIALIZE instruction | LiliCui | 7 | -4151/+4205 |
2020-03-26 | Re: H8300 use of uninitialised value | Alan Modra | 4 | -126/+152 |
2020-03-26 | Re: ARC: Use of uninitialised value | Alan Modra | 2 | -2/+6 |
2020-03-25 | Uninitialised memory read in z80-dis.c | Alan Modra | 2 | -0/+5 |
2020-03-22 | H8300 use of uninitialised value | Alan Modra | 2 | -6/+33 |
2020-03-22 | ARC: Use of uninitialised value | Alan Modra | 2 | -3/+10 |
2020-03-22 | NS32K arg_bufs uninitialised | Alan Modra | 2 | -9/+17 |