| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-11-18 | s390: Add arch15 Concurrent-Functions Facility insns | Jens Remus | 2 | -0/+10 |
| 2024-11-18 | s390: Add arch15 instruction names | Jens Remus | 1 | -106/+114 |
| 2024-10-24 | s390: Add arch15 instructions | Andreas Krebbel | 3 | -3/+127 |
| 2024-10-24 | s390: Relax risbg[n]z, risb{h|l}gz, {rns|ros|rxs}bgt operand constraints | Jens Remus | 1 | -15/+9 |
| 2024-10-24 | s390: Simplify (dis)assembly of insn operands with const bits | Jens Remus | 2 | -23/+17 |
| 2024-10-24 | s390: Align opcodes to lower-case | Jens Remus | 1 | -1/+1 |
| 2024-10-24 | s390: Flag conditional branch relative insns as condjump | Jens Remus | 1 | -4/+4 |
| 2024-10-24 | s390: Use proper string lengths when parsing opcode table flags | Jens Remus | 1 | -3/+3 |
| 2024-10-24 | s390: Whitespace fixes in conditional branch flavor descriptions | Jens Remus | 1 | -3/+3 |
| 2024-05-16 | aarch64: Remove asserts from operand qualifier decoders | Nick Clifton | 1 | -18/+80 |
| 2024-04-03 | x86/APX: Remove KEYLOCKER and SHA promotions from EVEX MAP4 | Cui, Lili | 5 | -308/+72 |
| 2024-02-29 | aarch64: Fix the 2nd operand in gcsstr and gcssttr instructions. | Srinath Parvathaneni | 1 | -2/+2 |
| 2024-02-13 | PowerPC: Add support for Power11 options | Peter Bergner | 1 | -1/+11 |
| 2024-02-09 | x86/APX: VROUND{P,S}{S,D} encodings require AVX512{F,VL} | Jan Beulich | 2 | -6/+6 |
| 2024-01-29 | Set version number to 2.42.0 and re-enable development | Nick Clifton | 1 | -10/+10 |
| 2024-01-29 | Update version number to 2.42binutils-2_42 | Nick Clifton | 2 | -55/+55 |
| 2024-01-26 | Backport commits 969f5c0e1 (LoongArch: gas: Add support for s9 register) and ... | mengqinggang | 1 | -0/+9 |
| 2024-01-24 | aarch64: Eliminate unused variable warnings with -DNDEBUG | Andrew Carlotti | 3 | -8/+8 |
| 2024-01-22 | Updated Serbian translations for th bfd, gold and opcodes directories | Nick Clifton | 1 | -312/+371 |
| 2024-01-19 | x86/APX: VROUND{P,S}{S,D} can generally be encoded | Jan Beulich | 2 | -147/+203 |
| 2024-01-19 | x86/APX: be consistent with insn suffixes | Jan Beulich | 1 | -5/+5 |
| 2024-01-19 | x86: support APX forms of U{RD,WR}MSR | Jan Beulich | 5 | -12/+55 |
| 2024-01-18 | Updated translations for various sub-directories | Nick Clifton | 4 | -1512/+1762 |
| 2024-01-15 | Update version number and regenerate configure files | Nick Clifton | 3 | -117/+130 |
| 2024-01-15 | Add markers for 2.42 branch | Nick Clifton | 1 | -0/+4 |
| 2024-01-15 | aarch64: rcpc3: Regenerate aarch64-*-2.c files | Victor Do Nascimento | 3 | -2870/+2977 |
| 2024-01-15 | aarch64: rcpc3: Add FP load/store insns | Victor Do Nascimento | 1 | -0/+4 |
| 2024-01-15 | aarch64: rcpc3: Add integer load/store insns | Victor Do Nascimento | 1 | -0/+5 |
| 2024-01-15 | aarch64: rcpc3: Define RCPC3_INSN macro | Victor Do Nascimento | 1 | -0/+2 |
| 2024-01-15 | aarch64: rcpc3: add support in general_constraint_met_p | Victor Do Nascimento | 1 | -0/+40 |
| 2024-01-15 | aarch64: rcpc3: New RCPC3_ADDR operand types | Victor Do Nascimento | 2 | -1/+20 |
| 2024-01-15 | aarch64: rcpc3: Define address operand fields and inserter/extractors | Victor Do Nascimento | 6 | -1/+150 |
| 2024-01-15 | aarch64: rcpc3: Create implicit load/store size calc function | Victor Do Nascimento | 1 | -0/+22 |
| 2024-01-15 | aarch64: rcpc3: Add +rcpc3 architectural feature support flag | Victor Do Nascimento | 1 | -0/+4 |
| 2024-01-15 | aarch64: Fix tlbi and tlbip instructions | Andrew Carlotti | 2 | -141/+93 |
| 2024-01-15 | aarch64: Refactor aarch64_sys_ins_reg_supported_p | Andrew Carlotti | 1 | -377/+204 |
| 2024-01-15 | Add generated source files and fix thinko in aarch64-asm.c | Nick Clifton | 4 | -564/+1056 |
| 2024-01-15 | aarch64: Add SVE2.1 Contiguous load/store instructions. | Srinath Parvathaneni | 4 | -2/+59 |
| 2024-01-15 | PATCH 5/6][Binutils] aarch64: Add SVE2.1 fmin and fmax instructions. | Srinath Parvathaneni | 1 | -0/+12 |
| 2024-01-15 | aarch64: Add SVE2.1 dupq, eorqv and extq instructions. | Srinath Parvathaneni | 6 | -0/+73 |
| 2024-01-15 | aarch64: Add support for FEAT_SVE2p1. | Srinath Parvathaneni | 3 | -0/+53 |
| 2024-01-15 | aarch64: Add support for FEAT_SME2p1 instructions. | Srinath Parvathaneni | 7 | -0/+274 |
| 2024-01-15 | aarch64: Add support for FEAT_B16B16 instructions. | Srinath Parvathaneni | 1 | -0/+31 |
| 2024-01-15 | opcodes: i386-reg.tbl: Add a comment to reflect dependency on ordering | Indu Bhagat | 1 | -0/+3 |
| 2024-01-15 | opcodes: x86: new marker for insns that implicitly update stack pointer | Indu Bhagat | 3 | -104/+107 |
| 2024-01-15 | opcodes: gas: x86: define and use Rex2 as attribute not constraint | Indu Bhagat | 4 | -3890/+7777 |
| 2024-01-12 | aarch64: Remove unused code | Andrew Carlotti | 1 | -34/+0 |
| 2024-01-12 | aarch64: Make FEAT_ASMv8p2 instruction aliases always available | Andrew Carlotti | 1 | -2/+2 |
| 2024-01-12 | aarch64: Add +xs flag for existing instructions | Andrew Carlotti | 2 | -2/+7 |
| 2024-01-12 | aarch64: Add +wfxt flag for existing instructions | Andrew Carlotti | 1 | -2/+7 |
