Age | Commit message (Expand) | Author | Files | Lines |
2020-07-10 | x86: Add support for Intel AMX instructions | Lili Cui | 1 | -227/+279 |
2020-04-07 | Add support for intel TSXLDTRK instructions$ | Cui,Lili | 1 | -173/+189 |
2020-04-02 | Add support for intel SERIALIZE instruction | LiliCui | 1 | -171/+187 |
2020-03-04 | x86: support VMGEXIT | Jan Beulich | 1 | -170/+178 |
2020-02-17 | x86: Remove CpuABM and add CpuPOPCNT | H.J. Lu | 1 | -116/+124 |
2020-02-16 | x86: Don't disable SSE3 when disabling SSE4a | H.J. Lu | 1 | -1/+1 |
2020-02-16 | x86: Don't disable SSE4a when disabling SSE4 | H.J. Lu | 1 | -2/+2 |
2020-02-13 | x86: fix SSE4a dependencies of ".arch .nosse*" | Jan Beulich | 1 | -2/+10 |
2020-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2019-11-14 | x86: make JumpAbsolute an insn attribute | Jan Beulich | 1 | -61/+57 |
2019-11-12 | x86: fold EsSeg into IsString | Jan Beulich | 1 | -60/+56 |
2019-11-12 | x86: introduce operand type "instance" | Jan Beulich | 1 | -84/+84 |
2019-11-08 | x86: convert RegMask and RegBND from bitfield to enumerator | Jan Beulich | 1 | -87/+87 |
2019-11-08 | x86: convert RegSIMD and RegMMX from bitfield to enumerator | Jan Beulich | 1 | -87/+87 |
2019-11-08 | x86: convert Control/Debug/Test from bitfield to enumerator | Jan Beulich | 1 | -83/+83 |
2019-11-08 | x86: convert SReg from bitfield to enumerator | Jan Beulich | 1 | -78/+78 |
2019-11-08 | x86: introduce operand type "class" | Jan Beulich | 1 | -0/+4 |
2019-11-07 | x86: support further AMD Zen2 instructions | Jan Beulich | 1 | -166/+182 |
2019-07-16 | x86: make RegMem an opcode modifier | Jan Beulich | 1 | -48/+48 |
2019-07-16 | x86: fold SReg{2,3} | Jan Beulich | 1 | -124/+71 |
2019-07-01 | x86: drop Vec_Imm4 | Jan Beulich | 1 | -55/+50 |
2019-06-25 | x86: correct / adjust debug printing | Jan Beulich | 1 | -9/+14 |
2019-06-04 | Enable Intel AVX512_VP2INTERSECT insn | H.J. Lu | 1 | -184/+200 |
2019-06-04 | Add support for Intel ENQCMD[S] instructions | H.J. Lu | 1 | -162/+178 |
2019-04-05 | x86: Support Intel AVX512 BF16 | Xuepeng Guo | 1 | -181/+197 |
2019-03-19 | ix86: Disable AVX512F when disabling AVX2 | H.J. Lu | 1 | -6/+6 |
2019-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2018-08-11 | x86: Add CpuCMOV and CpuFXSR | H.J. Lu | 1 | -417/+449 |
2018-08-03 | x86: drop "mem" operand type attribute | Jan Beulich | 1 | -62/+62 |
2018-07-31 | x86: drop CpuVREX | Jan Beulich | 1 | -216/+216 |
2018-07-11 | x86: drop {,reg16_}inoutportreg variables | Jan Beulich | 1 | -10/+0 |
2018-05-30 | Add znver2 support. | Amit Pawar | 1 | -0/+8 |
2018-05-07 | Enable Intel MOVDIRI, MOVDIR64B instructions | H.J. Lu | 1 | -151/+183 |
2018-04-27 | Revert "Enable Intel MOVDIRI, MOVDIR64B instructions." | Igor Tsimbalist | 1 | -183/+151 |
2018-04-26 | Enable Intel MOVDIRI, MOVDIR64B instructions. | Igor Tsimbalist | 1 | -151/+183 |
2018-04-26 | x86: CpuXSAVE is a prereq for various other features | Jan Beulich | 1 | -24/+24 |
2018-04-26 | x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask | Jan Beulich | 1 | -151/+151 |
2018-04-26 | x86: x87-related adjustments | Jan Beulich | 1 | -21/+21 |
2018-04-17 | Enable Intel CLDEMOTE instruction. | Igor Tsimbalist | 1 | -174/+182 |
2018-04-11 | Enable Intel WAITPKG instructions. | Igor Tsimbalist | 1 | -204/+212 |
2018-01-23 | Enable Intel PCONFIG instruction. | Igor Tsimbalist | 1 | -203/+211 |
2018-01-23 | Enable Intel WBNOINVD instruction. | Igor Tsimbalist | 1 | -203/+211 |
2018-01-17 | Replace CET bit with IBT and SHSTK bits. | Igor Tsimbalist | 1 | -204/+228 |
2018-01-03 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2017-12-18 | x86: fold RegXMM/RegYMM/RegZMM into RegSIMD | Jan Beulich | 1 | -108/+108 |
2017-12-18 | x86: drop FloatReg and FloatAcc | Jan Beulich | 1 | -108/+108 |
2017-12-18 | x86: replace Reg8, Reg16, Reg32, and Reg64 | Jan Beulich | 1 | -116/+116 |
2017-11-30 | x86: drop Vec_Disp8 | Jan Beulich | 1 | -56/+51 |
2017-10-23 | Fix the master due to bad regenerated files | Igor Tsimbalist | 1 | -139/+318 |
2017-10-23 | Enable Intel VAES instructions. | Igor Tsimbalist | 1 | -138/+145 |