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2015-10-02Make aarch64_zero_register_p declaration starts from column oneYao Qi2-2/+7
2015-10-02[aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insnYao Qi2-0/+7
2015-09-30Resync files in the binutils repository that are maintained in the gcc reposi...Nick Clifton2-0/+20
2015-09-29Add support for extensions in the .machine pseudoop on S/390, e.g. ".machine ...Dominik Vogt2-0/+9
2015-09-28FT32: define macros for instruction recognition.jamesbowman2-0/+10
2015-09-23Fix compile time warnings generated when compiling with clang.Nick Clifton2-1/+6
2015-09-22Enhance the RX disassembler to detect and report bad instructions.Nick Clifton2-0/+6
2015-09-22Solaris PIE supportRainer Orth2-0/+6
2015-09-21Change ch_type in Elf64_External_Chdr to 4 bytesH.J. Lu2-1/+7
2015-09-20Add --no-dynamic-linker option to ld, for static PIE useRich Felker2-0/+7
2015-09-09Make register name tables in visium.h static in order to prevent multiple def...Nick Clifton2-3/+9
2015-08-23Reorder enum output_type for better code generationAlan Modra2-1/+5
2015-08-19[AArch64][3/6] GAS support TLSLD move/add relocation typesJiong Wang1-0/+4
2015-08-19[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang1-0/+1
2015-08-19Remove link_info.picAlan Modra2-11/+14
2015-08-19Add bfd_link_pde, and simplify some tests of link_info.typeAlan Modra2-0/+6
2015-08-18Add output_type to bfd_link_infoH.J. Lu2-10/+31
2015-08-12Sync ansidecl.h with GCCH.J. Lu2-0/+16
2015-08-11[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang2-0/+5
2015-08-11[AArch64][4/8] Add R_AARCH64_P32_TLSLD_ADD_LO12_NC in elf headerJiong Wang2-0/+5
2015-08-11[AArch64][1/8] Add R_AARCH64_P32_TLSLD_ADR_PAGE21 in elf headerJiong Wang2-0/+5
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu4-49/+49
2015-07-21[ARM] Support correctly spelled ARMv6KZ architecture namesMatthew Wahab2-4/+11
2015-07-16[AArch64][1/3] Add R_AARCH64_P32_TLSLD_ADR_PREL21 in elf headerJiong Wang2-0/+5
2015-07-14Sync longlong.h with GCCH.J. Lu2-0/+11
2015-07-14Sync hashtab.h, splay-tree.h with GCCH.J. Lu3-19/+18
2015-07-14Remove trailing spaces in demangle.hH.J. Lu1-3/+3
2015-07-14Sync ansidecl.h with GCCH.J. Lu2-0/+17
2015-07-092015-07-09 Catherine Moore <clm@codesourcery.com>Catherine Moore2-0/+8
2015-07-08Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.Denis Chertykov2-0/+5
2015-07-03Remove ppc860, ppc750cl, ppc7450 insns from common ppc.Alan Modra2-0/+13
2015-07-01Opcodes and assembler support for Nios II R2Sandra Loosemore3-4/+1174
2015-07-01Relocations for Nios II R2Sandra Loosemore2-1/+38
2015-07-01Add Nios II arch flags and compatibility testsSandra Loosemore2-0/+10
2015-06-26Add support for DT_MIPS_RLD_MAP_REL.Matthew Fortune2-0/+7
2015-06-24Sync libiberty from GCC, replaying updates to configure scriptsIain Buclaw2-1/+6
2015-06-22Stop "objdump -d" from disassembling past a symbolic address.Nick Clifton2-0/+12
2015-06-19Allow for optional operands with non-zero default values.Peter Bergner2-0/+18
2015-06-17sim: callback: add human readable strings for debugging to mapsMike Frysinger2-0/+16
2015-06-04[AArch64] Add support for ARMv8.1 command line optionMatthew Wahab2-0/+13
2015-06-03[ARM] Support for ARMv8.1 command line optionMatthew Wahab2-0/+25
2015-06-02[ARM] Support for ARMv8.1 Adv.SIMD extensionMatthew Wahab1-0/+6
2015-06-02[ARM] Add support for ARMv8.1 PAN extensionMatthew Wahab2-0/+8
2015-06-02[ARM] Rework CPU feature selection in the disassemblerMatthew Wahab2-0/+5
2015-06-02[AArch64] Support for ARMv8.1a Adv.SIMD instructionsMatthew Wahab2-0/+5
2015-06-02[AArch64] Support for ARMv8.1a Limited Ordering Regions extensionMatthew Wahab2-0/+5
2015-06-01[AArch64][libopcode] Add support for PAN architecture extensionMatthew Wahab2-0/+11
2015-05-29Recognize GNU_ABI_TAG_SYLLABLE and GNU_ABI_TAG_NACL.Roland McGrath2-0/+7
2015-05-28Compact EH SupportCatherine Moore2-3/+8
2015-05-12[AArch64] Add R_AARCH64_P32_LD32_GOTPAGE_LO14 to elf headerJiong Wang2-0/+5
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