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AgeCommit message (Expand)AuthorFilesLines
2021-07-02Re: Fix minor NDS32 renaming snafuAlan Modra1-2/+1
2021-07-02Fix minor NDS32 renaming snafu.Nick Clifton1-2/+2
2021-07-01opcodes: constify & scope microblaze opcodesMike Frysinger1-2/+2
2021-07-01opcodes: constify aarch64_opcode_tablesMike Frysinger1-3/+3
2021-06-24gas: update csect alignment for PPC prefixed instructions on XCOFFClément Chigot1-0/+5
2021-06-22picojava assembler and disassembler fixesAlan Modra1-4/+1
2021-06-19ubsan errors when 32-bit bfdAlan Modra1-3/+3
2021-06-17Fix an assertion failure in the AArch64 assembler triggered by incorrect inst...Nick Clifton1-3/+12
2021-06-17gas: handle csect in bss section for XCOFFClément Chigot1-3/+7
2021-06-17gas: ensure sections contents is zero for BFD_RELOC_PPC*_TLSM on XCOFF.Clément Chigot1-5/+12
2021-06-15x86: bring "gas --help" output for --32 etc in sync with realityJan Beulich1-3/+7
2021-06-15x86: simplify .dispNN settingJan Beulich1-51/+17
2021-06-15x86: slightly simplify offset_in_range()Jan Beulich1-2/+2
2021-06-15x86: harmonize disp with imm handlingJan Beulich1-23/+28
2021-06-15x86: make offset_in_range()'s warning contents useful (again)Jan Beulich1-6/+2
2021-06-15x86: off-by-1 in offset_in_range()Jan Beulich1-1/+1
2021-06-15x86: permit parenthesized expressions again as addressing scale factorJan Beulich1-2/+6
2021-06-11x86: Always define TC_PARSE_CONS_EXPRESSIONH.J. Lu2-3/+6
2021-06-11RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch.Nelson Chu1-10/+8
2021-06-10arm: avoid "shadowing" of glibc function nameJan Beulich1-16/+16
2021-06-10arm: fix array-out-of-bounds upon register parsing errorJan Beulich1-1/+2
2021-06-10x86: suppress LEA optimization in a specific 16-bit caseJan Beulich1-0/+7
2021-06-08x86: minor improvements to optimize_imm() (part II)Jan Beulich1-3/+2
2021-06-08x86: minor improvements to optimize_disp() (part II)Jan Beulich1-7/+5
2021-06-08x86-64: avoid bogus warnings with 32-bit addressingJan Beulich1-0/+2
2021-06-08x86: minor improvements to optimize_disp() (part I)Jan Beulich1-11/+13
2021-06-07x86: honor quoted figure braces in i386_att_operand()Jan Beulich1-8/+32
2021-06-07x86: better respect quotes in parse_operands()Jan Beulich1-14/+23
2021-06-07x86: allow unary operators to start a memory operandJan Beulich1-14/+3
2021-06-07x86: make symbol quotation check consistent in i386_att_operand()Jan Beulich1-7/+10
2021-06-07x86: correct absolute branch check with segment overrideJan Beulich1-9/+9
2021-06-07x86/Intel: drop unnecessary bracket matching from parse_operands()Jan Beulich1-13/+3
2021-06-07x86: remove pointless 2nd parameter from check_VecOperations()Jan Beulich2-6/+5
2021-06-07x86: immediate operands don't allow for vector operationsJan Beulich1-10/+0
2021-06-07ix86: wrap constantsJan Beulich1-6/+28
2021-05-29MIPS/opcodes: Do not use CP0 register names for control registersMaciej W. Rozycki1-4/+5
2021-05-29MIPS/GAS: Use FCSR rather than RA with CFC1/CTC1Maciej W. Rozycki1-4/+6
2021-05-28x86: Restore PC16 relocation overflow checkH.J. Lu1-37/+18
2021-05-27nds32: __builtin_strncpy bound equals destination sizeAlan Modra1-8/+8
2021-05-26x86: Propery check PC16 reloc overflow in 16-bit mode instructionsH.J. Lu1-18/+37
2021-05-26RISC-V: Allow to link the objects with unknown prefixed extensions.Nelson Chu1-0/+1
2021-05-25Arm: Fix forward thumb references [PR gas/25235]Tamar Christina1-1/+10
2021-05-24RISC-V: PR25212, Report errors for invalid march and mabi combinations.Nelson Chu1-0/+18
2021-05-22Re: Fix offset for ia64 PCREL60B relocation on HP-UXAlan Modra1-2/+8
2021-05-20Fix overflow detection in the Z80 assembler.Sergey Belyashov1-8/+24
2021-05-19Fix offset for ia64 PCREL60B relocation on HP-UXJohn David Anglin1-1/+10
2021-05-17arm: Fix bugs with MVE vmov from two GPRs to vector lanesAlex Coplan1-2/+2
2021-05-11Report illegal Z80 load instructions.Sergey Belyashov1-0/+2
2021-05-10Add support for 8-bit and 24-bit shifts in the z80 assembler.Sergey Belyashov1-0/+17
2021-05-07Add a generic .bss directive for ELF based targets.Nick Clifton2-14/+36
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