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2024-10-29gas: constify md_{short,long}opts and md_longopts_sizeJan Beulich1-3/+3
First of all make the declarations globally visible, such that producer and consumer actually share them. For the latter two simply add const (as PPC already had it,), while for the former achieve the effect by converting to an array: There's no need for the extra level of indirection.
2024-10-14gas: drop SKIP_WHITESPACE_AFTER_NAME()Jan Beulich1-4/+4
Exclusively all users should use restore_line_pointer() instead, at which point SKIP_WHITESPACE() suffices as a check afterwards.
2024-09-15MIPS/GAS: Discard redundant instruction from DDIV/DREM macrosMaciej W. Rozycki1-4/+1
A sequence such as: li at,-1 bne xx,at,0f li at,1 dsll32 at,at,0x1f is produced in the expansion of the DDIV and DREM assembly macros, where a redundant `li at,1' instruction is used to load an intermediate value of 1 into $at, which is then left-shifted by 63 with `dsll32 at,at,0x1f' yielding 0x8000000000000000. However this value likewise results from left-shifting the value of -1, already present in $at at this point. Remove the extraneous instruction then, shortening the sequence emitted. Adjust dumps in the testsuite accordingly.
2024-07-26microMIPS: Add MT ASE instruction set supportYunQiang Su1-1/+1
Add the MT ASE instruction operand types and encodings to the microMIPS opcode table and enable the assembly of these instructions in GAS from MIPSr2 onwards. Update the binutils and GAS testsuites accordingly. References: "MIPS Architecture for Programmers, Volume IV-f: The MIPS MT Module for the microMIPS32 Architecture", MIPS Technologies, Inc., Document Number: MD00768, Revision 1.12, July 16, 2013 Co-Authored-By: Maciej W. Rozycki <macro@redhat.com>
2024-07-19MIPS/GAS: Handle --trap command-line option dynamicallyMaciej W. Rozycki1-11/+25
We have an ISA check for the '--trap' command-line option that reports its incompatibility with the MIPS I architecture. It doesn't prevent trap instructions from being enabled though, so when attempt is made to emit one in an expansion of one of the division or multiplication macros an assertion failure triggers: .../gas/testsuite/gas/mips/brtr-opt.s: Assembler messages: .../gas/testsuite/gas/mips/brtr-opt.s:3: Error: trap exception not supported at ISA 1 .../gas/testsuite/gas/mips/brtr-opt.s:9: Warning: divide by zero .../gas/testsuite/gas/mips/brtr-opt.s:9: Internal error in macro_build at .../gas/config/tc-mips.c:9064. Please report this bug. The same assertion failure triggers without an earlier error message when the initial ISA is compatible with the '--trap', however at the time an attempt is made to emit a trap instruction from a division or multiplication macro the ISA has been changed by a '.set' pseudo-op to an incompatible one. With the way the situations are mishandled it seems unlikely that anyone relies on the current semantics and a sane approach is to decide on the fly according to the currently selected ISA as to whether to emit trap or breakpoint instructions in the case where '--trap' has been used. Change our code to do so then and clarify that in the manual, which is not explicit about how '--trap' is handled with a changing ISA. Mention the change in NEWS too since it's a applies to a user option.
2024-07-13Revert "MIPS/GAS: Omit LI 0 for condition trap"Maciej W. Rozycki1-8/+3
This reverts commit bfa257b407270d1c808b31fbd97da779e0fd20d2. It was applied unapproved.
2024-07-12MIPS/GAS: Omit LI 0 for condition trapYunQiang Su1-3/+8
MIPSr6 removes condition trap instructions with imm, so we expand the instruction like "tne $2,IMM" to li $at,IMM tne $2,$at While if IMM is 0, we can use tne $2,$zero only.
2024-02-29PR23877, bad value (n32r5900) for default CPUAlan Modra1-1/+3
Catching this at configure time would be nicer, but we'd need to exactly match mips_parse_cpu in configure.ac and keep it all in sync. PR 23877 * config/tc-mips.c (mips_after_parse_args): Don't assert that mips_parse_cpu returns non-NULL, call as_fatal with an informative message instead.
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-12-15ELF: drop "push" parameter from obj_elf_change_section()Jan Beulich1-1/+1
No caller outside of obj-elf.c cares about the parameter - drop it by introducing an obj-elf.c-internal wrapper. While adding the new function parameter, take the opportunity and change the adjacent boolean one to "bool".
2023-11-10MIPS: Change all E_MIPS_* to EF_MIPS_*Ying Huang1-5/+5
2023-09-20elf-attrs.c memory allocation failAlan Modra1-2/+4
Report errors rather than segfaulting. bfd/ * elf-attrs.c (elf_new_obj_attr): Return NULL on bfd_alloc fail. (bfd_elf_add_obj_attr_int): Handle NULL return from the above, and propagate return to callers. (elf_add_obj_attr_string, elf_add_obj_attr_int_string): Likewise. (bfd_elf_add_obj_attr_string): Similarly. (_bfd_elf_copy_obj_attributes): Report error on alloc fails. (_bfd_elf_parse_attributes): Likewise. * elf-bfd.h (bfd_elf_add_obj_attr_int): Update prototype. (bfd_elf_add_obj_attr_string): Likewise. (bfd_elf_add_obj_attr_int_string): Likewise. gas/ * config/obj-elf.c (obj_elf_vendor_attribute): Report fatal error on out of memory from bfd attribute functions. * config/tc-arc.c (arc_set_attribute_int): Likewise. (arc_set_attribute_string, arc_set_public_attributes): Likewise. * config/tc-arm.c (aeabi_set_attribute_int): Likewise. (aeabi_set_attribute_string): Likewise. * config/tc-mips.c (mips_md_finish): Likewise. * config/tc-msp430.c (msp430_md_finish): Likewise. * config/tc-riscv.c (riscv_write_out_attrs): Likewise. * config/tc-sparc.c (sparc_md_finish): Likewise. * config/tc-tic6x.c (tic6x_set_attribute_int): Likewise. * config/tc-csky.c (md_begin): Likewise. (set_csky_attribute): Return ok status.
2023-06-15Add rotation instructions to MIPS Allegrex CPUDavid Guillen Fandos1-1/+1
The Allegrex CPU supports bit rotation instructions as described in the MIPS32 release 2 CPU (even though it is a MIPS-2 based CPU). Signed-off-by: David Guillen Fandos <david@davidgf.net>
2023-06-15Add MIPS Allegrex CPU as a MIPS2-based CPUDavid Guillen Fandos1-2/+6
The Allegrex CPU was created by Sony Interactive Entertainment to power their portable console, the PlayStation Portable. The pspdev organization maintains all sorts of tools to create software for said device including documentation. Signed-off-by: David Guillen Fandos <david@davidgf.net>
2023-06-15Revert "MIPS: gas: alter 64 or 32 for mipsisa triples if march is implicit"Maciej W. Rozycki1-160/+120
This reverts commit 094025a30bb2da19df3990e0c0ff8167af823aa1. It was applied unapproved.
2023-06-15Revert "MIPS: add MT ASE support for micromips32"Maciej W. Rozycki1-1/+1
This reverts commit acce83dacff0ce43677410c67aaae32817afe991. It was applied unapproved.
2023-06-05MIPS: add MT ASE support for micromips32YunQiang Su1-1/+1
These instructions are descripted in MD00768. MIPS® Architecture for Programmers Volume IV-f: The MIPS® MT Module for the microMIPS32™ Architecture Document Number: MD00768 Revision 1.12 July 16, 2013 https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00768-1C-microMIPS32MT-AFP-01.12.pdf
2023-06-05Revert "MIPS: add MT ASE support for micromips32"YunQiang Su1-1/+1
This reverts commit 783a5f46b0583e9ed3a63acd3361009f46de5c17.
2023-06-05MIPS: add MT ASE support for micromips32YunQiang Su1-1/+1
These instructions are descripted in MD00768. MIPS® Architecture for Programmers Volume IV-f: The MIPS® MT Module for the microMIPS32™ Architecture Document Number: MD00768 Revision 1.12 July 16, 2013 https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00768-1C-microMIPS32MT-AFP-01.12.pdf
2023-06-05MIPS: gas: alter 64 or 32 for mipsisa triples if march is implicitYunQiang Su1-120/+160
When configure with triples mipsisa[32,64]rN[el,], the march value is pinned to a fix value if not given explicitly. for example 1) mipsisa32r6-linux-gnu -n32 xx.s will complains that: -march=mips32r6 is not compatible with the selected ABI 2) mipsisa64r2el-linux-gnu -o32 generates objects with 64bit CPU: ELF 32-bit LSB relocatable, MIPS, MIPS64 rel2 version 1 (SYSV) They are not good default behaviors: Let's alter the CPU info Since we are using these triples as a regular linux distributions, let's alter march according to ABI.
2023-05-13PR28955 mips gas segfaultAlan Modra1-2/+4
Testing for NULL in pic_need_relax fixes the other call to this function in md_estimate_size_before_relax. PR 28955 * config/tc-mips.c (mips_frob_file): Move NULL sym test to.. (pic_need_relax): ..here.
2023-04-23MIPS: fix loongson3 llsc workaroundYunQiang Su1-7/+3
-mfix-looongson3-llsc may add sync instructions not needed on some asm code with lots of debug info. PR: 30153 * gas/config/tc-mips.c(fix_loongson3_llsc): clear logistic.
2023-01-16Tidy gas/expr.c static stateAlan Modra1-7/+8
* expr.c (seen, nr_seen): Make file scope. (expr_begin): Clear seen, nr_seen, and expr_symbol_lines. (expr_end): New function. * expr.h (expr_end): Declare. * output-file.c (output_file_close): Call expr_end. * config/tc-hppa.c (expr_end): Rename to expr_parse_end. * config/tc-mips.c: Likewise. * config/tc-riscv.c: Likewise. * config/tc-sparc.c: Likewise.
2023-01-16PR29991, MicroMIPS flag erased after align directivesAlan Modra1-0/+5
PR 29991 * config/tc-mips.c (s_align): Call file_mips_check_options and mips_mark_labels. * testsuite/gas/mips/align-after-label.s, * testsuite/gas/mips/mips-align-after-label.d, * testsuite/gas/mips/micromips-align-after-label.d: New test. * testsuite/gas/mips/mips.exp: Run it.
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-08-01Get rid of fprintf_vma and sprintf_vmaAlan Modra1-12/+6
These two macros print either a 16 digit hex number or an 8 digit hex number. Unfortunately they depend on both target and host, which means that the output for 32-bit targets may be either 8 or 16 hex digits. Replace them in most cases with code that prints a bfd_vma using PRIx64. In some cases, deliberately lose the leading zeros. This change some output, notably in base/offset fields of m68k disassembly which I think looks better that way, and in error messages. I've kept leading zeros in symbol dumps (objdump -t) and in PE header dumps. bfd/ * bfd-in.h (fprintf_vma, sprintf_vma, printf_vma): Delete. * bfd-in2.h: Regenerate. * bfd.c (bfd_sprintf_vma): Don't use sprintf_vma. (bfd_fprintf_vma): Don't use fprintf_vma. * coff-rs6000.c (xcoff_reloc_type_tls): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. (xcoff_ppc_relocate_section): Likewise. * cofflink.c (_bfd_coff_write_global_sym): Likewise. * mmo.c (mmo_write_symbols_and_terminator): Likewise. * srec.c (srec_write_symbols): Likewise. * elf32-xtensa.c (print_r_reloc): Similarly for fprintf_vma. * pei-x86_64.c (pex64_dump_xdata): Likewise. (pex64_bfd_print_pdata_section): Likewise. * som.c (som_print_symbol): Likewise. * ecoff.c (_bfd_ecoff_print_symbol): Use bfd_fprintf_vma. opcodes/ * dis-buf.c (perror_memory, generic_print_address): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. * i386-dis.c (print_operand_value, print_displacement): Likewise. * m68k-dis.c (print_base, print_indexed): Likewise. * ns32k-dis.c (print_insn_arg): Likewise. * ia64-gen.c (_opcode_int64_low, _opcode_int64_high): Delete. (opcode_fprintf_vma): Delete. (print_main_table): Use PRIx64 to print opcode. binutils/ * od-macho.c: Replace all uses of printf_vma with bfd_printf_vma. * objcopy.c (copy_object): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. (copy_main): Likewise. * readelf.c (CHECK_ENTSIZE_VALUES): Likewise. (dynamic_section_mips_val): Likewise. (print_vma): Don't use printf_vma. Instead use PRIx64 to print bfd_vma values. (dump_ia64_vms_dynamic_fixups): Likewise. (process_version_sections): Likewise. * rddbg.c (stab_context): Likewise. gas/ * config/tc-i386.c (offset_in_range): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. (md_assemble): Likewise. * config/tc-mips.c (load_register, macro): Likewise. * messages.c (as_internal_value_out_of_range): Likewise. * read.c (emit_expr_with_reloc): Likewise. * config/tc-ia64.c (note_register_values): Don't use fprintf_vma. Instead use PRIx64 to print bfd_vma values. (print_dependency): Likewise. * listing.c (list_symbol_table): Use bfd_sprintf_vma. * symbols.c (print_symbol_value_1): Use %p to print pointers. (print_binary): Likewise. (print_expr_1): Use PRIx64 to print bfd_vma values. * write.c (print_fixup): Use %p to print pointers. Don't use fprintf_vma. * testsuite/gas/all/overflow.l: Update expected output. * testsuite/gas/m68k/mcf-mov3q.d: Likewise. * testsuite/gas/m68k/operands.d: Likewise. * testsuite/gas/s12z/truncated.d: Likewise. ld/ * deffilep.y (def_file_print): Don't use fprintf_vma. Instead use PRIx64 to print bfd_vma values. * emultempl/armelf.em (gld${EMULATION_NAME}_finish): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. * emultempl/pe.em (gld${EMULATION_NAME}_finish): Likewise. * ldlang.c (lang_map): Use %V to print region origin. (lang_one_common): Don't use sprintf_vma. * ldmisc.c (vfinfo): Don't use fprintf_vma or sprintf_vma. * pe-dll.c (pe_dll_generate_def_file): Likewise. gdb/ * remote.c (remote_target::trace_set_readonly_regions): Replace uses of sprintf_vma with bfd_sprintf_vma.
2022-07-09gas: rename md_end to md_finishAlan Modra1-1/+1
Currently md_end is typically used for some final actions rather than freeing memory like other *_end functions. Rename it to md_finish, and rename target implementation. The renaming of target functions makes it possible to find them all with "grep md_finish", eg. md_mips_end is renamed to mips_md_finish, not md_mips_finish. This patch leaves a number of md_end functions unchanged, those that either do nothing or deallocate memory, and calls them late. The idea here is that target maintainers implement md_end functions to tidy memory, if anyone cares. Freeing persistent memory in gas is not at all important, except that it can hide more important memory leaks, those that happen once per some frequent gas operation, amongst these unimportant memory leaks. * as.c (main): Rename md_end to md_finish. * config/tc-alpha.c, * config/tc-alpha.h, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-csky.c, * config/tc-csky.h, * config/tc-ia64.c, * config/tc-ia64.h, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mmix.h, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-ppc.c, * config/tc-ppc.h, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-s390.c, * config/tc-s390.h, * config/tc-sparc.c, * config/tc-sparc.h, * config/tc-tic4x.c, * config/tc-tic4x.h, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-v850.c, * config/tc-v850.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z80.h: Similarly. * output-file.c (output_file_close): Call md_end.
2022-06-14BFD_RELOC_MIPS_16Alan Modra1-8/+8
MIPS should not be using BFD_RELOC_16 for its R_MIPS_16 relocation, since R_MIPS_16 specifies a 16-bit field in a 32-bit word. BFD_RELOC_16, emitted by generic code to handle fixups on 16-bit data directives, expects fixups to operate on the whole of a 16-bit word. This patch corrects the problem by using BFD_RELOC_MIPS_16, a new bfd reloc that is used to generate R_MIPS_16. BFD_RELOC_16 is handled in md_apply_fix for cases where the fixup can be applied at assembly time. Like BFD_RELOC_8, BFD_RELOC_16 now has no corresponding object file relocation, and thus .half, .hword, .short and .dc.w must be resolved at assembly time. BFD_RELOC_MIPS_REL16 is removed by this patch since it isn't used. PR 3243 PR 26542 * reloc.c (BFD_RELOC_MIPS_16): Rename from BFD_RELOC_MIPS_REL16. * elf32-mips.c (mips_reloc_map): Map BFD_RELOC_MIPS_16 to R_MIPS_16. * elf64-mips.c (mips_reloc_map): Likewise, delete BFD_RELOC_MIPS_REL16. * elfn32-mips.c (mips_reloc_map): Likewise. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-mips.c (append_insn): Handle BFD_RELOC_MIPS_16. (macro_build): Likewise. (mips_percent_op <%half>): Generate BFD_RELOC_MIPS_16. (md_apply_fix): Handle BFD_RELOC_16 and BFD_RELOC_MIPS_16 when fx_done. ld/ * testsuite/ld-mips-elf/reloc-local-overflow.d, * testsuite/ld-mips-elf/reloc-local-overflow.s: Rewrite.
2022-04-12gas: new_logical_line{,_flags}() can return "void"Jan Beulich1-1/+1
With the sole user of the return value gone, convert the return type to void. This in turn allows simplifying another construct, by moving it slightly later in the function.
2022-04-12gas: drop .appfile and .applineJan Beulich1-2/+2
These were used originally to represent "# <line> <file>" constructs inserted by (typically) compilers when pre-processing. Quite some time ago they were replaced by .linefile though. Since the original directives were never documented, we ought to be able to remove support for them. As a result in a number of case function parameter aren't used anymore and can hence be dropped.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-09-13MIPS: don't use get_symbol_name() for section parsing. With ↵Jan Beulich1-14/+7
s_change_section() later calling obj_elf_section(), it seems better to pre-parse the section name by the same function that will be used there. This way no differences in what is accepted will result. gas * config/tc-mips.c (s_change_section): Use obj_elf_section_name to parse the section name.
2021-05-29MIPS/opcodes: Do not use CP0 register names for control registersMaciej W. Rozycki1-4/+5
The CP0 control register set has never been defined, however encodings for the CFC0 and CTC0 instructions remained available for implementers up until the MIPS32 ISA declared them invalid and causing the Reserved Instruction exception[1]. Therefore we handle them for both assembly and disassembly, however in the latter case the names of CP0 registers from the regular set are incorrectly printed if named registers are requested. This is because we do not define separate operand classes for coprocessor regular and control registers respectively, which means the disassembler has no way to tell the two cases apart. Consequently nonsensical disassembly is produced like: cfc0 v0,c0_random Later the MIPSr5 ISA reused the encodings for XPA ASE MFHC0 and MTHC0 instructions[2] although it failed to document them in the relevant opcode table until MIPSr6 only. Correct the issue then by defining a new register class, OP_REG_CONTROL, and corresponding operand codes, `g' and `y' for the two positions in the machine instruction a control register operand can take. Adjust the test cases affected accordingly. While at it swap the regular MIPS opcode table "cfc0" and "ctc0" entries with each other so that they come in the alphabetical order. References: [1] "MIPS32 Architecture For Programmers, Volume II: The MIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00086, Revision 1.00, August 29, 2002, Table A-9 "MIPS32 COP0 Encoding of rs Field", p. 242 [2] "MIPS Architecture For Programmers, Volume II-A: The MIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00086, Revision 5.04, December 11, 2013, Section 3.2 "Alphabetical List of Instructions", pp. 195, 216 include/ * opcode/mips.h: Document `g' and `y' operand codes. (mips_reg_operand_type): Add OP_REG_CONTROL enumeration constant. gas/ * tc-mips.c (convert_reg_type) <OP_REG_CONTROL>: New case. (macro) <M_TRUNCWS, M_TRUNCWD>: Use the `g' rather than `G' operand code. opcodes/ * mips-dis.c (print_reg) <OP_REG_COPRO>: Move control register handling code over to... <OP_REG_CONTROL>: ... this new case. * mips-opc.c (decode_mips_operand) <'g', 'y'>: New cases. (mips_builtin_opcodes): Update "cfc1", "ctc1", "cttc1", "cttc2", "cfc0", "ctc0", "cfc2", "ctc2", "cfc3", and "ctc3" entries replacing the `G' operand code with `g'. Update "cftc1" and "cftc2" entries replacing the `E' operand code with `y'. * micromips-opc.c (decode_micromips_operand) <'g'>: New case. (micromips_opcodes): Update "cfc1", "cfc2", "ctc1", and "ctc2" entries replacing the `G' operand code with `g'. binutils/ * testsuite/binutils-all/mips/mips-xpa-virt-1.d: Correct CFC0 operand disassembly. * testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise.
2021-05-29MIPS/GAS: Use FCSR rather than RA with CFC1/CTC1Maciej W. Rozycki1-4/+6
Fix an issue caused by commit f9419b056fe2 ("MIPS gas: code cleanup"), <https://sourceware.org/ml/binutils/2002-05/msg00192.html>, and replace the incorrect use of RA with the CFC1 and CTC1 instructions with FCSR. While the register referred by its number is $31 in both cases, these instructions operate on the floating-point control register file rather than general-purpose registers. gas/ * config/tc-mips.c (FCSR): New macro. (macro) <M_TRUNCWS, M_TRUNCWD>: Use it in place of RA.
2021-04-01Use startswith in gas subfolder.Martin Liska1-31/+30
gas/ChangeLog: * as.c (select_emulation_mode): Use startswith. * config/m68k-parse.y: Likewise. * config/obj-aout.c (obj_aout_type): Likewise. * config/obj-elf.c (elf_common_parse): Likewise. (obj_elf_section_type): Likewise. (obj_elf_section_word): Likewise. (obj_elf_section): Likewise. (obj_elf_symver): Likewise. (adjust_stab_sections): Likewise. * config/obj-evax.c (evax_shorten_name): Likewise. * config/obj-macho.c (obj_mach_o_is_frame_section): Likewise. * config/tc-aarch64.c (parse_aarch64_imm_float): Likewise. (aarch64_parse_features): Likewise. (create_register_alias): Likewise. (aarch64_data_in_code): Likewise. (md_parse_option): Likewise. * config/tc-alpha.c (s_alpha_section_word): Likewise. (s_alpha_pdesc): Likewise. * config/tc-arc.c (tokenize_extregister): Likewise. * config/tc-arm.c (create_register_alias): Likewise. (create_neon_reg_alias): Likewise. (parse_ifimm_zero): Likewise. (parse_qfloat_immediate): Likewise. (arm_elf_section_type): Likewise. (arm_parse_extension): Likewise. (aeabi_set_public_attributes): Likewise. (s_arm_arch_extension): Likewise. (arm_data_in_code): Likewise. (start_unwind_section): Likewise. * config/tc-avr.c (avr_ldi_expression): Likewise. * config/tc-csky.c (is_freglist_legal): Likewise. (csky_s_section): Likewise. * config/tc-d30v.c (do_assemble): Likewise. * config/tc-dlx.c (parse_operand): Likewise. * config/tc-epiphany.c (md_assemble): Likewise. * config/tc-h8300.c (h8300_elf_section): Likewise. (get_operand): Likewise. * config/tc-hppa.c (pa_ip): Likewise. (pa_level): Likewise. (pa_space): Likewise. * config/tc-i386.c (i386_mach): Likewise. (md_assemble): Likewise. (check_VecOperations): Likewise. (i386_target_format): Likewise. (i386_elf_section_type): Likewise. * config/tc-ia64.c (start_unwind_section): Likewise. (md_parse_option): Likewise. (is_taken_branch): Likewise. (idesc->name,): Likewise. (note_register_values): Likewise. (do_alias): Likewise. * config/tc-m32c.c (insn_to_subtype): Likewise. * config/tc-m68hc11.c (get_operand): Likewise. (md_assemble): Likewise. * config/tc-m68k.c (m68k_ip): Likewise. (m68k_elf_suffix): Likewise. * config/tc-mcore.c (mcore_s_section): Likewise. * config/tc-metag.c (parse_get_set): Likewise. (md_parse_option): Likewise. * config/tc-microblaze.c (parse_imm): Likewise. (check_got): Likewise. (md_apply_fix): Likewise. * config/tc-mips.c (CPU_HAS_MIPS16): Likewise. (md_begin): Likewise. (s_is_linkonce): Likewise. (check_regno): Likewise. (match_float_constant): Likewise. (classify_vr4120_insn): Likewise. (match_insn): Likewise. (mips_after_parse_args): Likewise. (s_change_sec): Likewise. (s_option): Likewise. (parse_code_option): Likewise. (md_section_align): Likewise. (nopic_need_relax): Likewise. * config/tc-mmix.c (mmix_handle_mmixal): Likewise. * config/tc-mn10300.c (mn10300_fix_adjustable): Likewise. (mn10300_end_of_match): Likewise. * config/tc-msp430.c (msp430_make_init_symbols): Likewise. * config/tc-nds32.c (nds32_parse_option): Likewise. * config/tc-nds32.h (md_do_align): Likewise. * config/tc-nios2.c (strprefix): Likewise. (nios2_special_relocation_p): Likewise. (nios2_parse_base_register): Likewise. (nios2_cons): Likewise. * config/tc-ns32k.c (addr_mode): Likewise. * config/tc-pdp11.c (set_option): Likewise. (parse_reg): Likewise. (parse_ac5): Likewise. (parse_op_no_deferred): Likewise. (set_cpu_model): Likewise. (set_machine_model): Likewise. * config/tc-pj.c (md_operand): Likewise. * config/tc-ppc.c (ppc_set_cpu): Likewise. (ppc_arch): Likewise. (ppc_section_type): Likewise. * config/tc-s12z.c (tb_reg_rel): Likewise. (tb_opr_rel): Likewise. * config/tc-s390.c (s390_parse_cpu): Likewise. (md_parse_option): Likewise. * config/tc-score.c (s3_nopic_need_relax): Likewise. (s3_pic_need_relax): Likewise. * config/tc-score7.c (s7_nopic_need_relax): Likewise. (s7_pic_need_relax): Likewise. * config/tc-sh.h (SUB_SEGMENT_ALIGN): Likewise. * config/tc-sparc.c (md_parse_option): Likewise. (sparc_ip): Likewise. (s_reserve): Likewise. (s_common): Likewise. (s_seg): Likewise. (sparc_cons): Likewise. * config/tc-tic54x.c (stag_add_field): Likewise. (tic54x_endstruct): Likewise. * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise. * config/tc-v850.c (v850_comm): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-vax.c (vax_cons): Likewise. * config/tc-wasm32.c (wasm32_leb128): Likewise. * config/tc-xstormy16.c (md_operand): Likewise. * config/tc-xtensa.c (get_directive): Likewise. (xg_instruction_matches_option_term): Likewise. (is_unaligned_label): Likewise. (cache_literal_section): Likewise. * config/xtensa-relax.c (parse_precond): Likewise. (parse_option_cond): Likewise. (transition_applies): Likewise. (wide_branch_opcode): Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c (dwarf2_directive_filename): Likewise. * ehopt.c (get_cie_info): Likewise. * input-file.c (input_file_open): Likewise. * listing.c (listing_newline): Likewise. (debugging_pseudo): Likewise. * read.c (read_a_source_file): Likewise. * write.c (adjust_reloc_syms): Likewise. (compress_debug): Likewise. (maybe_generate_build_notes): Likewise.
2021-03-31Use bool in gasAlan Modra1-518/+517
* as.h (POISON_BFD_BOOLEAN): Define. * as.c, * as.h, * atof-generic.c, * config/atof-ieee.c, * config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c, * config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c, * config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c, * config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h, * config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c, * config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h, * config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c, * config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h, * config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c, * config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h, * config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h, * config/tc-metag.c, * config/tc-metag.h, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c, * config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h, * config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c, * config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c, * config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h, * config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c, * config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xstormy16.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z8k.c, * config/xtensa-istack.h, * config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c, * dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c, * frags.h, * listing.c, * macro.c, * output-file.c, * read.c, * read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean with bool, FALSE with false, and TRUE with true.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-09-02ubsan: tc-mips.c:9606 shift exponent 32 is too largeAlan Modra1-2/+5
* config/tc-mips.c (load_register): Avoid too large shift.
2020-08-31PR26472, PR26473, PR26474 UBSAN: tc-mips.c shift left UBAlan Modra1-9/+9
PR 26472 PR 26473 PR 26474 * config/tc-mips.c (operand_reg_mask): Shift 1u left. (load_register): Shift 0xffffU left.
2020-08-25gas warning fixesAlan Modra1-1/+1
Some versions of gcc with -Werror=format-overflow complain about using a perfectly good 7 char buffer for "r%dr%d" when the int is between 0 and 64, apparently not seeing the value range. note: __builtin___sprintf_chk output between 5 and 24 bytes into a destination of size 7 * config/tc-arc.c (declare_register_set): Avoid false positive format-overflow warning. * config/tc-epiphany.c (md_assemble): Likewise. * config/tc-mips.c (md_begin): Likewise. * config/tc-mmix.c (mmix_md_begin): Likewise. * config/tc-nds32.c (nds32_elf_append_relax_relocs): Avoid false positive "may be used uninitialized" warning.
2020-08-23PR26513, 629310abec breaks assembling PowerPC Linux kernelsAlan Modra1-4/+6
Inserting with replacement is wrong for some gas hash table uses. This patch implements an htab_insert that conditionally replaces, and similarly for str_hash_insert. str_hash_insert with replace=0 is roughly equivalent to the older hash_insert, and str_hash_insert with replace=1 to the older hash_jam, but return values are different. I found it useful to know whether the slot was occupied prior to inserting/replacing. I've also reinstated the fatal errors on messing up opcode tables with duplicates. PR 26513 * hash.h (htab_insert): Update prototype and comment. (struct string_tuple): Make "value" a const void*. (string_tuple_alloc): Likewise. (str_hash_find, str_hash_find_n): Cast returned value. (str_hash_insert): Add "replace" parameter, and return slot pointer. Free alloc'd element when not inserted. * hash.c (htab_insert): Likewise. Return slot when element exists, otherwise return NULL. * read.c (pop_insert): Insert into hash table without first searching. * config/tc-avr.c (md_begin): Likewise. * config/tc-msp430.c (md_begin): Likewise. * config/tc-nds32.c (nds32_init_nds32_pseudo_opcodes): Likewise. * config/tc-v850.c (md_begin): Likewise. * macro.c (do_formals, define_macro, macro_expand_body): Likewise. (delete_macro): Delete from hash table. * config/tc-tic54x.c (subsym_create_or_replace): Correct logic. * symbols.c (local_symbol_make, symbol_table_insert): Allow replacement of hash table entries. * config/obj-coff-seh.c (seh_hash_insert): Likewise. * config/obj-coff.c (tag_insert): Likewise. * config/tc-iq2000.c (iq2000_add_macro): Likewise. * config/tc-m68k.c (md_begin): Likewise for aliases. * config/tc-tic4x.c (tic4x_asg): Likewise. * config/tc-tic6x.c (md_begin): Likewise. * dw2gencfi.c (dwcfi_hash_find_or_make): Disallow replacement of hash table entries. * ecoff.c (add_string, get_tag): Likewise. * macro.c (expand_irp): Likewise. * config/obj-elf.c (build_additional_section_info): Likewise. * config/tc-aarch64.c (insert_reg_alias): Likewise. (checked_hash_insert): Likewise. * config/tc-alpha.c (get_alpha_reloc_tag, md_begin): Likewise. * config/tc-arc.c (arc_insert_opcode, declare_register): Likewise. (declare_addrtype, md_begin, arc_extcorereg): Likewise. * config/tc-arm.c (insert_reg_alias): Likewise. (arm_tc_equal_in_insn, md_begin): Likewise. * config/tc-cr16.c (initialise_reg_hash_table, md_begin): Likewise. * config/tc-cris.c (md_begin): Likewise. * config/tc-crx.c (md_begin): Likewise. * config/tc-csky.c (md_begin): Likewise. * config/tc-d10v.c (md_begin): Likewise. * config/tc-dlx.c (md_begin): Likewise. * config/tc-ft32.c (md_begin): Likewise. * config/tc-h8300.c (md_begin): Likewise. * config/tc-hppa.c (md_begin): Likewise. * config/tc-i386.c (md_begin): Likewise. * config/tc-ia64.c (dot_rot, dot_entry, declare_register): Likewise. (md_begin, dot_alias): Likewise. * config/tc-m68hc11.c (md_begin): Likewise. * config/tc-m68k.c (md_begin): Likewise. * config/tc-mcore.c (md_begin): Likewise. * config/tc-microblaze.c (md_begin): Likewise. * config/tc-mips.c (md_begin): Likewise. * config/tc-mmix.c (md_begin): Likewise. * config/tc-mn10200.c (md_begin): Likewise. * config/tc-mn10300.c (md_begin): Likewise. * config/tc-moxie.c (md_begin): Likewise. * config/tc-nds32.c (nds32_relax_hint, md_begin): Likewise. * config/tc-nios2.c (md_begin): Likewise. * config/tc-ns32k.c (md_begin): Likewise. * config/tc-pdp11.c (md_begin): Likewise. * config/tc-pj.c (fake_opcode, md_begin): Likewise. * config/tc-ppc.c (ppc_setup_opcodes): Likewise. * config/tc-pru.c (md_begin): Likewise. * config/tc-riscv.c (init_ext_version_hash): Likewise. (init_opcode_names_hash, hash_reg_name, init_opcode_hash): Likewise. (riscv_init_csr_hash): Likewise. * config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise. * config/tc-score.c (s3_insert_reg): Likewise. (s3_build_score_ops_hsh, s3_build_dependency_insn_hsh): Likewise. * config/tc-score7.c (s7_build_score_ops_hsh): Likewise. (s7_build_dependency_insn_hsh, s7_insert_reg): Likewise. * config/tc-sh.c (md_begin): Likewise. * config/tc-sparc.c (md_begin): Likewise. * config/tc-spu.c (md_begin): Likewise. * config/tc-tic30.c (md_begin): Likewise. * config/tc-tic4x.c (tic4x_inst_insert): Likewise. * config/tc-tic54x.c (stag_add_field_symbols, md_begin): Likewise. (tic54x_endstruct, tic54x_var, tic54x_macro_info): Likewise. (subsym_substitute): Likewise. * config/tc-tilegx.c (md_begin): Likewise. * config/tc-tilepro.c (md_begin): Likewise. * config/tc-vax.c (vip_begin): Likewise. * config/tc-wasm32.c (md_begin): Likewise. * config/tc-xgate.c (md_begin): Likewise. * config/tc-z8k.c (md_begin): Likewise. * testsuite/gas/ppc/dcbt.d, * testsuite/gas/ppc/dcbt.s: New test. * testsuite/gas/ppc/ppc.exp: Run it. * ecoff.c (add_string): Report fatal error on duplicates. * config/tc-alpha.c (md_begin): Likewise. * config/tc-arc.c (arc_insert_opcode, declare_register): Likewise. (declare_addrtype, md_begin, arc_extcorereg): Likewise. * config/tc-cr16.c (initialise_reg_hash_table, md_begin): Likewise. * config/tc-cris.c (md_begin): Likewise. * config/tc-crx.c (md_begin): Likewise. * config/tc-dlx.c (md_begin): Likewise. * config/tc-hppa.c (md_begin): Likewise. * config/tc-i386.c (md_begin): Likewise. * config/tc-ia64.c (dot_rot, dot_entry, declare_register): Likewise. (md_begin): Likewise. * config/tc-m68k.c (md_begin): Likewise. * config/tc-mips.c (md_begin): Likewise. * config/tc-nios2.c (md_begin): Likewise. * config/tc-ns32k.c (md_begin): Likewise. * config/tc-ppc.c (ppc_setup_opcodes): Likewise. * config/tc-pru.c (md_begin): Likewise. * config/tc-riscv.c (init_ext_version_hash): Likewise. (init_opcode_names_hash, hash_reg_name, init_opcode_hash): Likewise. * config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise. * config/tc-sparc.c (md_begin): Likewise. * config/tc-tic30.c (md_begin): Likewise. * config/tc-tic4x.c (tic4x_inst_insert): Likewise. * config/tc-tilegx.c (md_begin): Likewise. * config/tc-tilepro.c (md_begin): Likewise. * config/tc-vax.c (vip_begin): Likewise. * config/tc-alpha.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-cr16.c, * config/tc-csky.c, * config/tc-i386.c, * config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-microblaze.c, * config/tc-ns32k.c, * config/tc-pj.c, * config/tc-ppc.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-xgate.c: Formatting.
2020-08-21Rearrange symbol_create parametersAlan Modra1-10/+10
These functions take an offset within frag, frag within section, and section parameter. So it makes sense to order the parameters as section, frag, offset. * symbols.h (symbol_new, symbol_create, local_symbol_make), (symbol_temp_new): Arrange params as section, frag, offset. * symbols.c: Adjust to suit. * as.c: Likewise. * cgen.c: Likewise. * dwarf2dbg.c: Likewise. * ecoff.c: Likewise. * expr.c: Likewise. * itbl-ops.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * subsegs.c: Likewise. * config/obj-coff.c: Likewise. * config/obj-elf.c: Likewise. * config/obj-macho.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-avr.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-cris.c: Likewise. * config/tc-csky.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-nios2.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-riscv.c: Likewise. * config/tc-s390.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xtensa.c: Likewise.
2020-08-20Port gas/config/* to str_htab.Martin Liska1-32/+18
* config/obj-coff-seh.c (seh_hash_insert): Port to use new str_htab type. (seh_hash_find): Likewise. (seh_hash_find_or_make): Likewise. * config/obj-coff.c (tag_init): Likewise. (tag_insert): Likewise. (tag_find): Likewise. * config/obj-elf.c (struct group_list): Likewise. (build_additional_section_info): Likewise. (free_section_idx): Likewise. (elf_adjust_symtab): Likewise. (elf_frob_file_after_relocs): Likewise. * config/tc-aarch64.c (INSN_SIZE): Likewise. (parse_reg): Likewise. (insert_reg_alias): Likewise. (create_register_alias): Likewise. (s_unreq): Likewise. (parse_shift): Likewise. (parse_pldop): Likewise. (parse_barrier): Likewise. (parse_barrier_psb): Likewise. (parse_bti_operand): Likewise. (parse_sys_reg): Likewise. (parse_sys_ins_reg): Likewise. (lookup_mnemonic): Likewise. (opcode_lookup): Likewise. (parse_operands): Likewise. (checked_hash_insert): Likewise. (sysreg_hash_insert): Likewise. (fill_instruction_hash_table): Likewise. (md_begin): Likewise. * config/tc-alpha.c (struct alpha_reloc_tag): Likewise. (get_alpha_reloc_tag): Likewise. (assemble_tokens_to_insn): Likewise. (assemble_tokens): Likewise. (md_begin): Likewise. * config/tc-arc.c (arc_find_opcode): Likewise. (arc_insert_opcode): Likewise. (find_opcode_match): Likewise. (declare_register): Likewise. (declare_addrtype): Likewise. (md_begin): Likewise. (arc_parse_name): Likewise. (tc_arc_regname_to_dw2regnum): Likewise. (arc_extcorereg): Likewise. * config/tc-arm.c (MVE_BAD_QREG): Likewise. (arm_reg_parse_multi): Likewise. (parse_reloc): Likewise. (insert_reg_alias): Likewise. (create_register_alias): Likewise. (s_unreq): Likewise. (parse_shift): Likewise. (parse_psr): Likewise. (parse_cond): Likewise. (parse_barrier): Likewise. (do_vfp_nsyn_opcode): Likewise. (opcode_lookup): Likewise. (arm_tc_equal_in_insn): Likewise. (md_begin): Likewise. * config/tc-avr.c (md_begin): Likewise. (avr_ldi_expression): Likewise. (md_assemble): Likewise. (avr_update_gccisr): Likewise. (avr_emit_insn): Likewise. * config/tc-cr16.c (get_register): Likewise. (get_register_pair): Likewise. (get_index_register): Likewise. (get_index_register_pair): Likewise. (get_pregister): Likewise. (get_pregisterp): Likewise. (initialise_reg_hash_table): Likewise. (md_begin): Likewise. (cr16_assemble): Likewise. (md_assemble): Likewise. * config/tc-cris.c (cris_insn_first_word_frag): Likewise. (md_begin): Likewise. (cris_process_instruction): Likewise. * config/tc-crx.c (get_register): Likewise. (get_copregister): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-csky.c (md_begin): Likewise. (parse_opcode): Likewise. (get_operand_value): Likewise. (v1_work_jbsr): Likewise. (v2_work_rotlc): Likewise. (v2_work_bgeni): Likewise. (v2_work_not): Likewise. * config/tc-d10v.c (sizeof): Likewise. (md_begin): Likewise. (do_assemble): Likewise. (md_apply_fix): Likewise. * config/tc-d30v.c (sizeof): Likewise. (md_begin): Likewise. (do_assemble): Likewise. * config/tc-dlx.c (RELOC_DLX_VTENTRY): Likewise. (md_begin): Likewise. (machine_ip): Likewise. * config/tc-ft32.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-h8300.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-hppa.c (pa_ip): Likewise. (md_begin): Likewise. * config/tc-i386.c (md_begin): Likewise. (i386_print_statistics): Likewise. (parse_insn): Likewise. (process_operands): Likewise. (i386_index_check): Likewise. (parse_real_register): Likewise. * config/tc-ia64.c (dot_rot): Likewise. (dot_entry): Likewise. (declare_register): Likewise. (md_begin): Likewise. (ia64_parse_name): Likewise. (md_assemble): Likewise. (dot_alias): Likewise. (do_alias): Likewise. (ia64_adjust_symtab): Likewise. (do_secalias): Likewise. (ia64_frob_file): Likewise. * config/tc-m68hc11.c (m68hc11_print_statistics): Likewise. (md_begin): Likewise. (print_insn_format): Likewise. (md_assemble): Likewise. * config/tc-m68k.c (tc_gen_reloc): Likewise. (m68k_ip): Likewise. (md_begin): Likewise. * config/tc-mcore.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-microblaze.c (md_begin): Likewise. (md_assemble): Likewise. (md_apply_fix): Likewise. * config/tc-mips.c (nopic_need_relax): Likewise. (md_begin): Likewise. (macro_build): Likewise. (mips16_macro_build): Likewise. (mips_lookup_insn): Likewise. (mips_ip): Likewise. (mips16_ip): Likewise. * config/tc-mmix.c (sizeof): Likewise. (mmix_md_begin): Likewise. (md_assemble): Likewise. * config/tc-mn10200.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-mn10300.c (HAVE_AM30): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-moxie.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-msp430.c (md_begin): Likewise. (msp430_operands): Likewise. (md_assemble): Likewise. * config/tc-nds32.c (PV_DONT_CARE): Likewise. (builtin_isreg): Likewise. (builtin_regnum): Likewise. (nds32_init_nds32_pseudo_opcodes): Likewise. (nds32_lookup_pseudo_opcode): Likewise. (nds32_relax_hint): Likewise. (md_begin): Likewise. (nds32_find_reloc_table): Likewise. (nds32_elf_append_relax_relocs_traverse): Likewise. (nds32_relax_branch_instructions): Likewise. (md_convert_frag): Likewise. (nds32_elf_analysis_relax_hint): Likewise. (tc_nds32_regname_to_dw2regnum): Likewise. * config/tc-nios2.c (nios2_opcode_lookup): Likewise. (nios2_reg_lookup): Likewise. (nios2_ps_lookup): Likewise. (md_begin): Likewise. * config/tc-ns32k.c (struct hash_control): Likewise. (parse): Likewise. (md_begin): Likewise. * config/tc-pdp11.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-pj.c (fake_opcode): Likewise. (alias): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-ppc.c (ppc_setup_opcodes): Likewise. (md_assemble): Likewise. * config/tc-pru.c (pru_opcode_lookup): Likewise. (pru_reg_lookup): Likewise. (md_begin): Likewise. (md_end): Likewise. * config/tc-riscv.c (init_ext_version_hash): Likewise. (riscv_get_default_ext_version): Likewise. (riscv_set_arch): Likewise. (init_opcode_names_hash): Likewise. (opcode_name_lookup): Likewise. (enum reg_class): Likewise. (hash_reg_name): Likewise. (riscv_init_csr_hash): Likewise. (reg_csr_lookup_internal): Likewise. (reg_lookup_internal): Likewise. (init_opcode_hash): Likewise. (md_begin): Likewise. (DECLARE_CSR): Likewise. (macro_build): Likewise. (riscv_ip): Likewise. * config/tc-s390.c (register_name): Likewise. (s390_setup_opcodes): Likewise. (md_begin): Likewise. (md_assemble): Likewise. (s390_insn): Likewise. * config/tc-score.c (struct s3_reg_map): Likewise. (s3_score_reg_parse): Likewise. (s3_dependency_type_from_insn): Likewise. (s3_parse_16_32_inst): Likewise. (s3_parse_48_inst): Likewise. (s3_insert_reg): Likewise. (s3_build_reg_hsh): Likewise. (s3_build_score_ops_hsh): Likewise. (s3_build_dependency_insn_hsh): Likewise. (s3_begin): Likewise. * config/tc-score7.c (struct s7_reg_map): Likewise. (s7_score_reg_parse): Likewise. (s7_dependency_type_from_insn): Likewise. (s7_parse_16_32_inst): Likewise. (s7_build_score_ops_hsh): Likewise. (s7_build_dependency_insn_hsh): Likewise. (s7_insert_reg): Likewise. (s7_build_reg_hsh): Likewise. (s7_begin): Likewise. * config/tc-sh.c (EMPTY): Likewise. (md_begin): Likewise. (find_cooked_opcode): Likewise. * config/tc-sparc.c (md_begin): Likewise. (sparc_ip): Likewise. * config/tc-spu.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-tic30.c (md_begin): Likewise. (tic30_operand): Likewise. (tic30_parallel_insn): Likewise. (md_assemble): Likewise. * config/tc-tic4x.c (TIC4X_ALT_SYNTAX): Likewise. (tic4x_asg): Likewise. (tic4x_inst_insert): Likewise. (tic4x_inst_add): Likewise. (md_begin): Likewise. (tic4x_operand_parse): Likewise. (md_assemble): Likewise. * config/tc-tic54x.c (MAX_SUBSYM_HASH): Likewise. (stag_add_field_symbols): Likewise. (tic54x_endstruct): Likewise. (tic54x_tag): Likewise. (tic54x_remove_local_label): Likewise. (tic54x_clear_local_labels): Likewise. (tic54x_var): Likewise. (tic54x_macro_start): Likewise. (tic54x_macro_info): Likewise. (tic54x_macro_end): Likewise. (subsym_isreg): Likewise. (subsym_structsz): Likewise. (md_begin): Likewise. (is_mmreg): Likewise. (is_type): Likewise. (encode_condition): Likewise. (encode_cc3): Likewise. (encode_cc2): Likewise. (encode_operand): Likewise. (tic54x_parse_insn): Likewise. (tic54x_parse_parallel_insn_firstline): Likewise. (subsym_create_or_replace): Likewise. (subsym_lookup): Likewise. (subsym_substitute): Likewise. (tic54x_undefined_symbol): Likewise. * config/tc-tic6x.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-tilegx.c (O_hw2_last_plt): Likewise. (INSERT_SPECIAL_OP): Likewise. (md_begin): Likewise. (tilegx_parse_name): Likewise. (parse_reg_expression): Likewise. (md_assemble): Likewise. * config/tc-tilepro.c (O_tls_ie_load): Likewise. (INSERT_SPECIAL_OP): Likewise. (tilepro_parse_name): Likewise. (parse_reg_expression): Likewise. (md_assemble): Likewise. * config/tc-v850.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-vax.c (md_ri_to_chars): Likewise. (vip_begin): Likewise. (vip): Likewise. (main): Likewise. (md_begin): Likewise. * config/tc-wasm32.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-xgate.c (xgate_parse_operand): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-z8k.c (md_begin): Likewise. (md_assemble): Likewise.
2020-07-21MIPS/GAS: Remove stale `prev_reloc_op_frag' variableMaciej W. Rozycki1-11/+2
Ever since commit 4d7206a284ee ("Rework MIPS macro relaxation, fix string merging bug"), <https://sourceware.org/ml/binutils/2004-01/msg00248.html>, `prev_reloc_op_frag' has only been set and never used. Remove it then. gas/ * config/tc-mips.c (prev_reloc_op_frag): Remove variable. (my_getSmallExpression): Adjust accordingly.
2020-03-10More 1 << 31 signed overflowsAlan Modra1-2/+2
* config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions to avoid signed overflow. * config/tc-mcore.c (md_assemble): Likewise. * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise. * config/tc-nds32.c (SET_ADDEND): Likewise. * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
2020-03-02miscellaneous SEC_SMALL_DATAAlan Modra1-3/+3
This patch arranges for symbols defined in .sdata and .sbss to be reported by nm with 'g' and 's' flags, for coff targets that support .sdata and .sbss. The assembler changes regarding SEC_SMALL_DATA are really just documentation. As far as I'm aware, this won't change any assembler output. bfd/ * coff-alpha.c (alpha_ecoff_le_vec): Add SEC_SMALL_DATA to applicable section flags. * coff-mips.c (mips_ecoff_le_vec, mips_ecoff_be_vec): Likewise. (mips_ecoff_bele_vec): Likewise. * coffcode.h (sec_to_styp_flags): Set SEC_SMALL_DATA for .sdata and .sbss sections. * ecoff.c (_bfd_ecoff_new_section_hook): Likewise. (_bfd_ecoff_styp_to_sec_flags): Likewise. gas/ * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section. * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata and .sbss sections. * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout. (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section. (s3_s_score_lcomm): Likewise. * config/tc-score7.c: Similarly. * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
2020-02-28MIPS/fix_loongson3_llsc: fix when target has multi labelsYunQiang Su1-5/+44
When there is multi-labels on the same insn, the current code will take care about the last one. it may cause that no sync is added at the target. Here we scan all labels with same value of S_GET_VALUE(label_list->label) by label_list->next. 2020-02-28 YunQiang Su <syq@debian.org> PR gas/25539 * config/tc-mips.c (fix_loongson3_llsc): Compare label value to handle multi-labels. (has_label_name): New.
2020-02-02ELF: Add support for unique section ID to assemblerH.J. Lu1-1/+1
Clang's integrated assembler supports multiple section with the same name: .section .text,"ax",@progbits,unique,1 nop .section .text,"ax",@progbits,unique,2 nop "unique,N" assigns the number, N, as the section ID, to a section. The valid values of the section ID are between 0 and 4294967295. It can be used to distinguish different sections with the same section name. This is useful with -fno-unique-section-names -ffunction-sections. -ffunction-sections by default generates .text.foo, .text.bar, etc. Using the same string can save lots of space in .strtab. This patch adds section_id to bfd_section and reuses the linker internal bit in BFD section flags, SEC_LINKER_CREATED, for assmebler internal use to mark valid section_id. It also updates objdump to compare section pointers if 2 sections comes from the same file since 2 different sections can have the same section name. bfd/ PR gas/25380 * bfd-in2.h: Regenerated. * ecoff.c (bfd_debug_section): Add section_id. * section.c (bfd_section): Add section_id. (SEC_ASSEMBLER_SECTION_ID): New. (BFD_FAKE_SECTION): Add section_id. binutils/ PR gas/25380 * objdump.c (sym_ok): Return FALSE if 2 sections are in the same file with different section pointers. gas/ PR gas/25380 * config/obj-elf.c (section_match): Removed. (get_section): Also match SEC_ASSEMBLER_SECTION_ID and section_id. (obj_elf_change_section): Replace info and group_name arguments with match_p. Also update the section ID and flags from match_p. (obj_elf_section): Handle "unique,N". Update call to obj_elf_change_section. * config/obj-elf.h (elf_section_match): New. (obj_elf_change_section): Updated. * config/tc-arm.c (start_unwind_section): Update call to obj_elf_change_section. * config/tc-ia64.c (obj_elf_vms_common): Likewise. * config/tc-microblaze.c (microblaze_s_data): Likewise. (microblaze_s_sdata): Likewise. (microblaze_s_rdata): Likewise. (microblaze_s_bss): Likewise. * config/tc-mips.c (s_change_section): Likewise. * config/tc-msp430.c (msp430_profiler): Likewise. * config/tc-rx.c (parse_rx_section): Likewise. * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise. * doc/as.texi: Document "unique,N" in .section directive. * testsuite/gas/elf/elf.exp: Run "unique,N" tests. * testsuite/gas/elf/section15.d: New file. * testsuite/gas/elf/section15.s: Likewise. * testsuite/gas/elf/section16.s: Likewise. * testsuite/gas/elf/section16a.d: Likewise. * testsuite/gas/elf/section16b.d: Likewise. * testsuite/gas/elf/section17.d: Likewise. * testsuite/gas/elf/section17.l: Likewise. * testsuite/gas/elf/section17.s: Likewise. * testsuite/gas/i386/unique.d: Likewise. * testsuite/gas/i386/unique.s: Likewise. * testsuite/gas/i386/x86-64-unique.d: Likewise. * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique. ld/ PR gas/25380 * testsuite/ld-i386/pr22001-1c.S: Use "unique,N" in .section directives. * testsuite/ld-i386/tls-gd1.S: Likewise. * testsuite/ld-x86-64/pr21481b.S: Likewise.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-09-19bfd_section_* macrosAlan Modra1-27/+24
This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
generated by cgit v1.1 at 2024-11-17 16:20:34 +0000