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path: root/gas/config/tc-i386.c
AgeCommit message (Expand)AuthorFilesLines
2023-08-022.41 Release sourcesbinutils-2_41-releaseNick Clifton1-89/+0
2023-07-27Support Intel PBNDKBHu, Lin11-0/+1
2023-07-27Support Intel SM4Haochen Jiang1-0/+1
2023-07-27Support Intel SM3Haochen Jiang1-0/+1
2023-07-27Support Intel SHA512Haochen Jiang1-0/+1
2023-07-27Support Intel AVX-VNNI-INT16konglin11-0/+1
2023-07-04x86: optimize 128-bit VPBROADCASTQ to VPUNPCKLQDQJan Beulich1-0/+27
2023-07-04x86: optimize pre-AVX512 {,V}PCMPGT* with identical sourcesJan Beulich1-0/+40
2023-07-04x86: optimize pre-AVX512 {,V}PCMPEQQ with identical sourcesJan Beulich1-0/+17
2023-06-22Revert "x86: Don't check if AVX512 template requires AVX512VL"H.J. Lu1-2/+3
2023-06-20x86: Don't check if AVX512 template requires AVX512VLH.J. Lu1-3/+2
2023-06-16x86: shrink Masking insn attribute to a single bit (boolean)Jan Beulich1-29/+18
2023-05-26x86-64: improve gas diagnostic when no 32-bit target is configuredJan Beulich1-1/+15
2023-05-26x86: figure braces aren't really part of mnemonicsJan Beulich1-8/+24
2023-05-26x86: de-duplicate operand_special_chars[] wrt extra_symbol_chars[]Jan Beulich1-10/+7
2023-05-23x86: don't recognize quoted symbol names as registers or operatorsJan Beulich1-0/+7
2023-05-23Support Intel FRED LKGSZhang, Jun1-0/+2
2023-05-23Revert "Support Intel FRED LKGS"liuhongt1-2/+0
2023-05-23Support Intel FRED LKGSZhang, Jun1-0/+2
2023-05-19x86: permit all relational operators in insn operandsJan Beulich1-1/+1
2023-05-19x86: further adjust extend-to-32bit-address conditionsJan Beulich1-3/+54
2023-05-19x86: tighten extend-to-32bit-address conditionsJan Beulich1-2/+2
2023-05-12x86: slightly simplify i386_parse_name()Jan Beulich1-7/+2
2023-05-12gas: equates of registersJan Beulich1-2/+2
2023-04-28x86/Intel: reduce ELF/PE conditional scope in x86_cons()Jan Beulich1-6/+4
2023-04-19x86: parse_register() must not alter the parsed stringJan Beulich1-13/+9
2023-04-19x86: parse_real_register() does not alter the parsed stringJan Beulich1-4/+4
2023-04-07Support Intel AMX-COMPLEXHaochen Jiang1-0/+1
2023-03-31x86: handle immediate operands for .insnJan Beulich1-2/+100
2023-03-31x86: allow for multiple immediates in output_disp()Jan Beulich1-5/+5
2023-03-31x86: handle EVEX Disp8 for .insnJan Beulich1-1/+97
2023-03-31x86: process instruction operands for .insnJan Beulich1-19/+297
2023-03-31x86: parse special opcode modifiers for .insnJan Beulich1-1/+38
2023-03-31x86: parse VEX and alike specifiers for .insnJan Beulich1-6/+238
2023-03-31x86: introduce .insn directiveJan Beulich1-10/+155
2023-03-21x86: Check unbalanced braces in memory referenceH.J. Lu1-1/+5
2023-03-20x86: drop identifier_chars[]Jan Beulich1-22/+4
2023-03-20x86/AT&T: restrict recognition of the "absolute branch" prefix characterJan Beulich1-2/+4
2023-03-20x86: VexVVVV is now merely a booleanJan Beulich1-1/+1
2023-03-20x86: re-work build_modrm_byte()'s register assignmentJan Beulich1-287/+112
2023-03-10x86: decouple broadcast type and bytes fieldsJan Beulich1-5/+6
2023-03-10x86: move more disp processing out of md_assemble()Jan Beulich1-43/+46
2023-03-10x86: use set_rex_vrex() also for short-form handlingJan Beulich1-21/+20
2023-03-03x86: use swap_2_operands() in build_vex_prefix()Jan Beulich1-17/+3
2023-03-03x86: drop redundant calculation of EVEX broadcast sizeJan Beulich1-3/+0
2023-02-24x86: allow to request ModR/M encodingJan Beulich1-7/+60
2023-02-24x86: MONITOR/MWAIT are not SSE3 insnsJan Beulich1-0/+1
2023-02-24x86-64: don't permit LAHF/SAHF with "generic64"Jan Beulich1-0/+1
2023-02-24x86: restrict insn templates accepting negative 8-bit immediatesJan Beulich1-1/+15
2023-02-22x86: optimize BT{,C,R,S} $imm,%regJan Beulich1-0/+36
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