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2024-07-18gas: aarch64: add experimental support for SCFIIndu Bhagat1-0/+21
For synthesizing CFI (SCFI) for hand-written asm, the SCFI machinery in GAS works on the generic GAS insns (ginsns). This patch adds support in the aarch64 backend to create ginsns for a subset of the supported machine instructions. The subset includes the minimal necessary instructions to ensure SCFI correctness: - Any potential register saves and unsaves. Hence, process instructions belonging to a variety of iclasses involving str, ldr, stp, ldp. - Any change of flow instructions. This includes all conditional and unconditional branches, call (bl, blr, etc.) and return. - Most importantly, any instruction that could affect the two registers of interest: REG_SP, REG_FP. This set includes all pre-indexed and post-indexed memory operations, with writeback, on the stack. This set must also include other instructions (e.g., arithmetic insns) where the destination register is one of the afore-mentioned registers. With respect to callee-saved registers in Aarch64, FP/Advanced SIMD registers D8-D15 are included along with the relevant GPRs. Calculating offsets for loads and stores especially for Q registers needs special attention here. As an example, str q8, [sp, #16] On big-endian: STR Qn stores as a 128-bit integer (MSB first), hence, should record D8 as being saved at sp+24 rather than sp+16. On little-endian: should record D8 as being saved at sp+16 D8-D15 are the low 64 bits of Q8-Q15, and of Z8-Z15 if SVE is used; hence, they remain "interesting" for SCFI purposes in such cases. A CFI save slot always represents the low 64 bits, regardless of whether a save occurs on D, Q or Z registers. Currently, the ginsn creation machinery can handle D and Q registers on little-endian and big-endian. Apart from creating ginsn, another key responsibility of the backend is to make sure there are safeguards in place to detect and alert if an instruction of interest may have been skipped. This is done via aarch64_ginsn_unhandled () (similar to the x86 backend). This function , hence, is also intended to alert when future ISA changes may otherwise render SCFI results incorrect, because of missing ginsns for the newly added machine instructions. At this time, becuase of the complexities wrt endianness in handling Z register usage, skip sve_misc opclass altogether for now. The SCFI machinery will error out (using the aarch64_ginsn_unhandled () code path) though if Z register usage affects correctness. The current SCFI machinery does not currently synthesize the PAC-related, aarch64-specific CFI directives: .cfi_b_key_frame. The support for this is planned for near future. SCFI is enabled for ELF targets only. gas/ * config/tc-aarch64-ginsn.c: New file. * config/tc-aarch64.c (md_assemble): Include tc-aarch64-ginsn.c file. Invoke aarch64_ginsn_new. * config/tc-aarch64.h (TARGET_USE_GINSN): Define for SCFI enablement. (TARGET_USE_SCFI): Likewise. (SCFI_MAX_REG_ID): New definition. (REG_FP): Likewise. (REG_LR): Likewise. (REG_SP): Likewise. (SCFI_INIT_CFA_OFFSET): Likewise. (SCFI_CALLEE_SAVED_REG_P): Likewise. (aarch64_scfi_callee_saved_p): New declaration.
2024-07-04gas: Enhance arch-specific SFrame configuration descriptionsJens Remus1-6/+6
Explicitly mention "SFrame" in the descriptions for the architecture- specific SFrame configuration macros, variables, and functions. Use the term "frame pointer" (FP) instead of "base pointer". This aligns with the terminology used in the SFrame specification. Additionally it helps not to confuse "base-pointer register" with the term "BASE_REG" used in the specification to denote either the SP or FP register. Specify what the SFRAME_CFA_*_REG register numbers are used for: - SP (stack pointer): CFA tracking - FP (frame pointer): CFA and FP tracking - RA (return address): RA tracking Align the descriptions for definitions in the source files to the declarations in the header files. gas/ * config/tc-aarch64.h: Enhance architecture-specific SFrame configuration descriptions. * config/tc-aarch64.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i386.c: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-02-02gas: use "stack trace" instead of "unwind" for SFrameIndu Bhagat1-4/+4
SFrame format is meant for generating stack traces only. gas/ * as.c: Replace the use of "unwind" with "stack trace". * config/tc-aarch64.c: Likewise. * config/tc-aarch64.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * gen-sframe.c: Likewise. * gen-sframe.h: Likewise. * testsuite/gas/cfi-sframe/cfi-sframe-aarch64-2.s: Likewise. * testsuite/gas/cfi-sframe/cfi-sframe-common-8.s: Likewise. * testsuite/gas/cfi-sframe/common-empty-2.s: Likewise. * testsuite/gas/cfi-sframe/common-empty-3.s: Likewise.
2023-01-10gas: Restore tc_pe_dwarf2_emit_offset for pe-aarch64Mark Harmstone1-0/+5
Restores tc_pe_dwarf2_emit_offset in tc-aarch64.c, which is needed to make sure that DWARF offsets are encoded correctly (they're secrels in COFF). There were remnants of this there before, but they were removed by Jedidiah's original patch - presumably because we didn't yet have .secrel32.
2023-01-10Add .secrel32 for pe-aarch64Mark Harmstone1-0/+4
Adds the .secrel32 pseudo-directive and its corresponding relocation.
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-11-18GAS fix alignment for aarch64-peZac Walker1-0/+3
Fixes issue where various values of '.align' causes writing of COFF files to fail. Specific to the aarch64-pe target.
2022-11-17[gas, aarch64]: fix build breakage for aarch64-peIndu Bhagat1-19/+22
SFrame is supported for ELF only. Keep the definitions and declarations guarded with OBJ_ELF consistently. ChangeLog: * gas/config/tc-aarch64.h: Guard SFrame related definitions with OBJ_ELF.
2022-11-15gas: generate .sframe from CFI directivesIndu Bhagat1-0/+29
Currently supported for x86_64 and aarch64 only. [PS: Currently, the compiler has not been adapted to generate ".cfi_sections" with ".sframe" in it. The newly added command line option of --gsframe provides an easy way to try out .sframe support in the toolchain.] gas interprets the CFI directives to generate DWARF-based .eh_frame info. These internal DWARF structures are now consumed by gen-sframe.[ch] sub-system to, in turn, create the SFrame unwind information. These internal DWARF structures are read-only for the purpose of SFrame unwind info generation. SFrame unwind info generation does not impact .eh_frame unwind info generation. Both .eh_frame and .sframe can co-exist in an ELF file, if so desired by the user. Recall that SFrame unwind information only contains the minimal necessary information to generate backtraces and does not provide information to recover all callee-saved registers. The reason being that callee-saved registers other than FP are not needed for stack unwinding, and hence are not included in the .sframe section. Consequently, gen-sframe.[ch] only needs to interpret a subset of DWARF opcodes in gas. More details follow. [Set 1, Interpreted] The following opcodes are interpreted: - DW_CFA_advance_loc - DW_CFA_def_cfa - DW_CFA_def_cfa_register - DW_CFA_def_cfa_offset - DW_CFA_offset - DW_CFA_remember_state - DW_CFA_restore_state - DW_CFA_restore [Set 2, Bypassed] The following opcodes are acknowledged but are not necessary for generating SFrame unwind info: - DW_CFA_undefined - DW_CFA_same_value Anything else apart from the two above-mentioned sets is skipped altogether. This means that any function containing a CFI directive not in Set 1 or Set 2 above, will not have any SFrame unwind information generated for them. Holes in instructions covered by FREs of a single FDE are not representable in the SFrame unwind format. As few examples, following opcodes are not processed for .sframe generation, and are skipped: - .cfi_personality* - .cfi_*lsda - .cfi_escape - .cfi_negate_ra_state - ... Not processing .cfi_escape, .cfi_negate_ra_state will cause SFrame unwind information to be absent for SFrame FDEs that contain these CFI directives, hence affecting the asynchronicity. x86-64 and aarch64 backends need to have a few new definitions and functions for .sframe generation. These provide gas with architecture specific information like the SP/FP/RA register numbers and an SFrame-specific ABI marker. Lastly, the patch also implements an optimization for size, where specific fragments containing SFrame FRE start address and SFrame FDE function are fixed up. This is similar to other similar optimizations in gas, where fragments are sized and fixed up when the associated symbols can be resolved. This optimization is controlled by a #define SFRAME_FRE_TYPE_SELECTION_OPT and should be easy to turn off if needed. The optimization is on by default for both x86_64 and aarch64. ChangeLog: * gas/Makefile.am: Include gen-sframe.c and sframe-opt.c. * gas/Makefile.in: Regenerated. * gas/as.h (enum _relax_state): Add new state rs_sframe. (sframe_estimate_size_before_relax): New function. (sframe_relax_frag): Likewise. (sframe_convert_frag): Likewise. * gas/config/tc-aarch64.c (aarch64_support_sframe_p): New definition. (aarch64_sframe_ra_tracking_p): Likewise. (aarch64_sframe_cfa_ra_offset): Likewise. (aarch64_sframe_get_abi_arch): Likewise. (md_begin): Set values of sp/fp/ra registers. * gas/config/tc-aarch64.h (aarch64_support_sframe_p): New declaration. (support_sframe_p): Likewise. (SFRAME_CFA_SP_REG): Likewise. (SFRAME_CFA_FP_REG): Likewise. (SFRAME_CFA_RA_REG): Likewise. (aarch64_sframe_ra_tracking_p): Likewise. (sframe_ra_tracking_p): Likewise. (aarch64_sframe_cfa_ra_offset): Likewise. (sframe_cfa_ra_offset): Likewise. (aarch64_sframe_get_abi_arch): Likewise. (sframe_get_abi_arch): Likewise. * gas/config/tc-i386.c (x86_support_sframe_p): New definition. (x86_sframe_ra_tracking_p): Likewise. (x86_sframe_cfa_ra_offset): Likewise. (x86_sframe_get_abi_arch): Likewise. * gas/config/tc-i386.h (x86_support_sframe_p): New declaration. (support_sframe_p): Likewise. (SFRAME_CFA_SP_REG): Likewise. (SFRAME_CFA_FP_REG): Likewise. (x86_sframe_ra_tracking_p): Likewise. (sframe_ra_tracking_p): Likewise. (x86_sframe_cfa_ra_offset): Likewise. (sframe_cfa_ra_offset): Likewise. (x86_sframe_get_abi_arch): Likewise. (sframe_get_abi_arch): Likewise. * gas/config/tc-xtensa.c (unrelaxed_frag_max_size): Add case for rs_sframe. * gas/doc/as.texi: Add .sframe to the documentation for .cfi_sections. * gas/dw2gencfi.c (cfi_finish): Create a .sframe section. * gas/dw2gencfi.h (CFI_EMIT_sframe): New definition. * gas/write.c (cvt_frag_to_fill): Handle rs_sframe. (relax_segment): Likewise. * gas/gen-sframe.c: New file. * gas/gen-sframe.h: New file. * gas/sframe-opt.c: New file.
2022-10-19aarch64-pe support for LD, GAS and BFDJedidiah Thompson1-11/+7
Allows aarch64-pe to be targeted natively, not having to use objcopy to convert it from ELF to PE. Based on initial work by Jedidiah Thompson Co-authored-by: Jedidiah Thompson <wej22007@outlook.com> Co-authored-by: Zac Walker <zac.walker@linaro.org>
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-12-02aarch64: Provide line info for unclosed sequencesRichard Sandiford1-0/+2
We warn about MOVPRFX instructions that have no following instruction. This patch adds a line number to the message, which is useful if the assembly code has multiple text sections. The new code is unconditional since OBJ_ELF is always defined for aarch64. gas/ * config/tc-aarch64.h (aarch64_segment_info_type): Add last_file and last_line. * config/tc-aarch64.c (now_instr_sequence): Delete. (force_automatic_sequence_close): Provide a line number when reporting unclosed sequences. (md_assemble): Record the location of the instruction in tc_segment_info. * testsuite/gas/aarch64/sve-movprfx_4.l: Add line number to error message. * testsuite/gas/aarch64/sve-movprfx_7.l: Likewise. * testsuite/gas/aarch64/sve-movprfx_8.l: Likewise.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-04-08[PATCH 4/4]: Add generic prototype for md_pcrel_from_sectionGunther Nikl1-1/+0
This patch removes the need for target headers to provide a custom prototype for md_pcrel_from_section. * tc.h (md_pcrel_from_section): Add prototype. * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype. * config/tc-arc.h (md_pcrel_from_section): Likewise. * config/tc-arm.h (md_pcrel_from_section): Likewise. * config/tc-avr.h (md_pcrel_from_section): Likewise. * config/tc-bfin.h (md_pcrel_from_section): Likewise. * config/tc-bpf.h (md_pcrel_from_section): Likewise. * config/tc-csky.h (md_pcrel_from_section): Likewise. * config/tc-d10v.h (md_pcrel_from_section): Likewise. * config/tc-d30v.h (md_pcrel_from_section): Likewise. * config/tc-epiphany.h (md_pcrel_from_section): Likewise. * config/tc-fr30.h (md_pcrel_from_section): Likewise. * config/tc-frv.h (md_pcrel_from_section): Likewise. * config/tc-iq2000.h (md_pcrel_from_section): Likewise. * config/tc-lm32.h (md_pcrel_from_section): Likewise. * config/tc-m32c.h (md_pcrel_from_section): Likewise. * config/tc-m32r.h (md_pcrel_from_section): Likewise. * config/tc-mcore.h (md_pcrel_from_section): Likewise. * config/tc-mep.h (md_pcrel_from_section): Likewise. * config/tc-metag.h (md_pcrel_from_section): Likewise. * config/tc-microblaze.h (md_pcrel_from_section): Likewise. * config/tc-mmix.h (md_pcrel_from_section): Likewise. * config/tc-moxie.h (md_pcrel_from_section): Likewise. * config/tc-msp430.h (md_pcrel_from_section): Likewise. * config/tc-mt.h (md_pcrel_from_section): Likewise. * config/tc-or1k.h (md_pcrel_from_section): Likewise. * config/tc-ppc.h (md_pcrel_from_section): Likewise. * config/tc-rl78.h (md_pcrel_from_section): Likewise. * config/tc-rx.h (md_pcrel_from_section): Likewise. * config/tc-s390.h (md_pcrel_from_section): Likewise. * config/tc-sh.h (md_pcrel_from_section): Likewise. * config/tc-xc16x.h (md_pcrel_from_section): Likewise. * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-05-24aarch64: override default elf .set handling in gasSzabolcs Nagy1-0/+6
Allow st_other values such as STO_AARCH64_VARIANT_PCS to be set for alias symbols independently. This is needed for ifunc symbols which are aliased to the resolver using .set and don't expect resolver attributes to override the ifunc symbol attributes. This means .variant_pcs must be added explicitly to aliases. gas/ChangeLog: * config/tc-aarch64.c (aarch64_elf_copy_symbol_attributes): Define. * config/tc-aarch64.h (aarch64_elf_copy_symbol_attributes): Declare. (OBJ_COPY_SYMBOL_ATTRIBUTES): Define. * testsuite/gas/aarch64/symbol-variant_pcs-3.d: New test. * testsuite/gas/aarch64/symbol-variant_pcs-3.s: New test.
2019-02-10gas: Pass max_bytes to TC_FRAG_INITH.J. Lu1-2/+1
ommit 3ae729d5a4f63740ed9a778960b17c2912b0bbdd Author: H.J. Lu <hjl.tools@gmail.com> Date: Wed Mar 7 04:18:45 2018 -0800 x86: Rewrite NOP generation for fill and alignment increased MAX_MEM_FOR_RS_ALIGN_CODE to 4095 which resulted in increase of assembler time and memory usage by 5 times for inputs with many .p2align directives, which is typical for LTO output. This patch passes max_bytes to TC_FRAG_INIT so that MAX_MEM_FOR_RS_ALIGN_CODE can be set as needed and tracked by backend it so that HANDLE_ALIGN can check the maximum alignment for each rs_align_code frag. Wall time to assemble the same cc1plus.s: before: 423.78user 0.89system 7:05.71elapsed 99%CPU after: 102.35user 0.27system 1:42.89elapsed 99%CPU PR gas/24165 * frags.c (frag_var_init): Pass max_chars to TC_FRAG_INIT as max_bytes. * config/tc-aarch64.h (TC_FRAG_INIT): Add and pass max_bytes to aarch64_init_frag. * /config/tc-arm.h (TC_FRAG_INIT): And and pass max_bytes to arm_init_frag. * config/tc-avr.h (TC_FRAG_INIT): And and ignore max_bytes. * config/tc-ia64.h (TC_FRAG_INIT): Likewise. * config/tc-mmix.h (TC_FRAG_INIT): Likewise. * config/tc-nds32.h (TC_FRAG_INIT): Likewise. * config/tc-ns32k.h (TC_FRAG_INIT): Likewise. * config/tc-rl78.h (TC_FRAG_INIT): Likewise. * config/tc-rx.h (TC_FRAG_INIT): Likewise. * config/tc-score.h (TC_FRAG_INIT): Likewise. * config/tc-tic54x.h (TC_FRAG_INIT): Likewise. * config/tc-tic6x.h (TC_FRAG_INIT): Likewise. * config/tc-xtensa.h (TC_FRAG_INIT): Likewise. * config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to (alignment ? ((1 << alignment) - 1) : 1) (i386_tc_frag_data): Add max_bytes. (TC_FRAG_INIT): Add and track max_bytes. (HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with fragP->tc_frag_data.max_bytes. * doc/internals.texi: Update TC_FRAG_TYPE with max_bytes.
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-12-13Move aarch64 CIE code to aarch64 backendSam Tebbs1-0/+37
This commit moves all aarch64-specific code to deal with CIE structure introduced in 3a67e1a6b4430374f3073e51bb19347d4c421cfe from target-independent files to the aarch64 backend. 2018-12-13 Sam Tebbs <sam.tebbs@arm.com> binutils/ * dwarf.c (read_cie): Add check for 'B'. gas/ * config/tc-aarch64.h (enum pointer_auth_key, tc_fde_entry_extras, tc_cie_entry_extras, tc_fde_entry_init_extra, tc_output_cie_extra, tc_cie_fde_equivalent_extra, tc_cie_entry_init_extra): Define. * dw2gencfi.c (struct cie_entry): Add tc_cie_entry_extras invocation. (alloc_fde_entry, select_cie_for_fde): Add tc_fde_entry_init_extra invocation. (output_cie): Add tc_output_cie_extra invocation. (select_cie_for_fde): Add tc_cie_fde_equivalent_extra invocation. * dw2gencfi.h (enum pointer_auth_key): Move to config/tc-aarch64.h. (struct fde_entry): Add tc_fde_entry_extras invocation
2018-10-03AArch64: Close sequences at the end of sectionsTamar Christina1-0/+3
Any open sequence at the end of a section or assembly is considered an error. This patch adds a check at the end to ensure that all sequences have been closed and if not reports a warning. During disassembly it's not possible to detect this condition in the back-end so the warning is only emitted from the assembler for now. gas/ * config/tc-aarch64.c (force_automatic_sequence_close, aarch64_frob_section): New. * config/tc-aarch64.h (tc_frob_section, aarch64_frob_section): New.
2018-10-03AArch64: Wire through instr_sequenceTamar Christina1-0/+1
This patch introduces aarch64_instr_sequence which is a structure similar to IT blocks on Arm in order to track instructions that introduce a constraint or dependency on instruction 1..N positions away from the instruction that opened the block. The struct is also wired through to the locations that require it. gas/ * config/tc-aarch64.c (now_instr_sequence): (*insn_sequence, now_instr_sequence): New. (output_operand_error_record, do_encode): Add insn_sequence. (md_assemble): Update insn_sequence. (try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn): Pass insn_sequence. * config/tc-aarch64.h (struct aarch64_segment_info_type): Add insn_sequence. include/ * opcode/aarch64.h (struct aarch64_instr_sequence): New. (aarch64_opcode_encode): Use it. opcodes/ * aarch64-asm.c (aarch64_opcode_encode): Add insn_sequence. * aarch64-dis.c (insn_sequence): New.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-05-22[AArch64, gas] Support ILP32 triplet aarch64*-linux-gnu_ilp32Jiong Wang1-0/+3
This patch allows AArch64 GAS defaulting to ILP32 if it is configured with aarch64*-linux-gnu_ilp32. "md_after_parse_args" is implemented to update ABI into ILP32 if DEFAULT_ARCH is "aarch64:32". gas/ * configure.tgt: Set "arch" to "aarch64" if ${cpu} equals "aarch64". Recognize the new triplet name aarch64*-linux-gnu_ilp32. * configure.ac: Output DEFAULT_ARCH macro for AArch64. * configure: Regenerate. * config/tc-aarch64.h (aarch64_after_parse_args): New declaration. (md_after_parse_args): New define. * config/tc-aarch64.c (aarch64_abi_type): New enumeration AARCH64_ABI_NONE. (DEFAULT_ARCH): New define. (aarch64_abi): Set default value to AARCH64_ABI_NONE. (aarch64_after_parse_args): New function.
2017-05-16Allow target files access to default TC_FORCE_RELOCATION definesAlan Modra1-3/+2
* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define. (TC_FORCE_RELOCATION_LOCAL): Use it. (GENERIC_FORCE_RELOCATION_SUB_SAME): Define. (TC_FORCE_RELOCATION_SUB_SAME): Use it. * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL, TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines. * config/tc-aarch64.h: Similarly. * config/tc-avr.h: Similarly. * config/tc-cris.h: Similarly. * config/tc-i386.h: Similarly. * config/tc-i960.h: Similarly. * config/tc-ia64.h: Similarly. * config/tc-microblaze.h: Similarly. * config/tc-mips.h: Similarly. * config/tc-msp430.h: Similarly. * config/tc-nds32.h: Similarly. * config/tc-pru.h: Similarly. * config/tc-riscv.h: Similarly. * config/tc-rl78.h: Similarly. * config/tc-s390.h: Similarly. * config/tc-sh.h: Similarly. * config/tc-sh64.h: Similarly. * config/tc-sparc.h: Similarly. * config/tc-xtensa.h: Similarly. * config/tc-mn10300.h: Similarly. (GENERIC_FORCE_RELOCATION_LOCAL): Define. * config/tc-msp430.c (msp430_force_relocation_local): Modify to be addition to rather than replacement of standard TC_FORCE_RELOCATION_LOCAL.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-08-27More fallout from "Allow symbol and label names to be enclosed in double quotes"Alan Modra1-2/+2
Some of the TC_START_LABEL implementations need to adjust the end of the symbol, when a colon doesn't mean a label definition. That means they need access to nul_char both the restore the NUL location (it may be a quote rather than a colon) and to store the new nul_char. Others need adjusting to step over a potential trailing quote. PR gas/18581 * config/tc-aarch64.h (TC_START_LABEL): Redefine. * config/tc-arm.c (tc_start_label_without_colon): Delete params. Use input_line_pointer directly. * config/tc-arm.h (TC_START_LABEL): Redefine. (TC_START_LABEL_WITHOUT_COLON): Redefine. (tc_start_label_without_colon): Update prototype. * config/tc-bfin.c (bfin_start_label): Delete ptr param. Check for NUL instead. * config/tc-bfin.h (bfin_start_label): Update prototype. (TC_START_LABEL): Redefine. * config/tc-d30v.h (TC_START_LABEL): Redefine. * config/tc-fr30.c (restore_colon): Rewrite. (fr30_is_colon_insn): Add nul_char param. Return int. Bump i_l_p over quote. Update restore_colon calls. * config/tc-fr30.h (TC_START_LABEL): Redefine. (fr30_is_colon_insn): Update prototype. * config/tc-m32c.c (restore_colon, m32c_is_colon_insn): As above. * config/tc-m32c.h (TC_START_LABEL): Redefine. (m32c_is_colon_insn): Update prototype. * config/tc-m32r.h (TC_START_LABEL): Redefine. * config/tc-mep.h (TC_START_LABEL): Redefine. * config/tc-nds32.h (TC_START_LABEL): Redefine. * config/tc-tic54x.c (tic54x_start_label): Replace params with nul_char and next_char. Step over trailing quote. * config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Redefine. (tic54x_start_label): Update prototype. * read.c (TC_START_LABEL): Redefine. Update invocation. (TC_START_LABEL_WITHOUT_COLON): Update invocation. * config/tc-nios2.c (s_nios2_set): Save initial input_line_pointer and restore if calling s_set. Don't restore delim again.
2015-03-13[AArch64] Don't tail-pads sections to the alignmentJiong Wang1-0/+2
2015-03-13 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero. gas/testsuite/ * gas/aarch64/tail_padding.s: New testcase. * gas/aarch64/tail_padding.d: New expectation file.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-10-30Remove the artificial limit on code alignment through the use of theDr Philipp Tomsich1-3/+4
fixed part of a fragment for output generation only, which required MAX_MEM_FOR_RS_ALIGN_CODE to be large enough to hold the maximum pad. * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7. * config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle large alignments with a constant fragment size of MAX_MEM_FOR_RS_ALIGN_CODE.
2014-08-22aarch64: Adjust dwarf2 encoding factorsRichard Henderson1-2/+2
* config/tc-aarch64.h (DWARF2_LINE_MIN_INSN_LENGTH): Set to 4. (DWARF2_CIE_DATA_ALIGNMENT): Set to -8.
2014-04-09Fix a few more targets affected by the change to the TC_CONS_FIX_NEW macro.Nick Clifton1-1/+1
* config/tc-rl78.h (TC_CONS_FIX_NEW): Add RELOC parameter. * config/tc-z80.h (TC_CONS_FIX_NEW): Discard RELOC parameter. * config/tc-aarch64.h (TC_CONS_FIX_NEW): Discard RELOC parameter. * read.c (emit_expr_fix): Mark the r parameter as potentially unused.
2014-03-05Update copyright yearsAlan Modra1-1/+1
2013-06-26[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ldYufeng Zhang1-0/+3
and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton1-0/+231
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