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-rw-r--r--sim/common/sim-core.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c
index ade345e..9b1e168 100644
--- a/sim/common/sim-core.c
+++ b/sim/common/sim-core.c
@@ -480,7 +480,8 @@ sim_memory_map (SIM_DESC sd)
if (mapping->level != 0)
continue;
- entry = xasprintf ("<memory type='ram' start='%#x' length='%#x'/>\n",
+ entry = xasprintf ("<memory type='ram' start='%#" PRIxTW "' "
+ "length='%#" PRIxTW "'/>\n",
mapping->base, mapping->nr_bytes);
/* The sim memory map is organized by access, not by addresses.
So a RWX memory map will have three independent mappings.