diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 3 | ||||
| -rw-r--r-- | opcodes/sparc-opc.c | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 85512d7..4226182 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -12,6 +12,9 @@ * sparc-opc.c (sparc_opcodes): Add wr alias entries to match above mov aliases. + * sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd' + This has been reported as being accepted by the Sun assmebler. + 2011-09-08 David S. Miller <davem@davemloft.net> * sparc-opc.c (pdistn): Destination is integer not float register. diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c index 267fc8c..6a31c93 100644 --- a/opcodes/sparc-opc.c +++ b/opcodes/sparc-opc.c @@ -684,6 +684,7 @@ const struct sparc_opcode sparc_opcodes[] = { { "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0), "1,2,d", 0, v6 }, { "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "1,i,d", 0, v6 }, +{ "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "i,1,d", 0, v6 }, /* Sun assembler compatibility */ { "save", 0x81e00000, ~0x81e00000, "", F_ALIAS, v6 }, { "ret", F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8), "", F_UNBR|F_DELAYED, v6 }, /* jmpl %i7+8,%g0 */ |