diff options
Diffstat (limited to 'opcodes/ms1-opc.c')
| -rw-r--r-- | opcodes/ms1-opc.c | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/opcodes/ms1-opc.c b/opcodes/ms1-opc.c index d7c57be..4b9a05c 100644 --- a/opcodes/ms1-opc.c +++ b/opcodes/ms1-opc.c @@ -69,10 +69,10 @@ ms1_asm_hash (const char* insn) /* The hash functions are recorded here to help keep assembler code out of the disassembler and vice versa. */ -static int asm_hash_insn_p PARAMS ((const CGEN_INSN *)); -static unsigned int asm_hash_insn PARAMS ((const char *)); -static int dis_hash_insn_p PARAMS ((const CGEN_INSN *)); -static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT)); +static int asm_hash_insn_p (const CGEN_INSN *); +static unsigned int asm_hash_insn (const char *); +static int dis_hash_insn_p (const CGEN_INSN *); +static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); /* Instruction formats. */ @@ -839,14 +839,10 @@ dis_hash_insn (buf, value) return CGEN_DIS_HASH (buf, value); } -static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int)); - /* Set the recorded length of the insn in the CGEN_FIELDS struct. */ static void -set_fields_bitsize (fields, size) - CGEN_FIELDS *fields; - int size; +set_fields_bitsize (CGEN_FIELDS *fields, int size) { CGEN_FIELDS_BITSIZE (fields) = size; } @@ -855,15 +851,15 @@ set_fields_bitsize (fields, size) This plugs the opcode entries and macro instructions into the cpu table. */ void -ms1_cgen_init_opcode_table (cd) - CGEN_CPU_DESC cd; +ms1_cgen_init_opcode_table (CGEN_CPU_DESC cd) { int i; int num_macros = (sizeof (ms1_cgen_macro_insn_table) / sizeof (ms1_cgen_macro_insn_table[0])); const CGEN_IBASE *ib = & ms1_cgen_macro_insn_table[0]; const CGEN_OPCODE *oc = & ms1_cgen_macro_insn_opcode_table[0]; - CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN)); + CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN)); + memset (insns, 0, num_macros * sizeof (CGEN_INSN)); for (i = 0; i < num_macros; ++i) { |