diff options
| -rw-r--r-- | include/opcode/ChangeLog | 6 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 5 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 38 |
4 files changed, 57 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index b5702c5..5b8a1ff 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,9 @@ +2015-06-01 Matthew Wahab <matthew.wahab@arm.com> + + * aarch64.h (AARCH64_FEATURE_PAN): New. + (aarch64_sys_reg_supported_p): Declare. + (aarch64_pstatefield_supported_p): Declare. + 2015-04-30 DJ Delorie <dj@redhat.com> * rl78.h (RL78_Dis_Isa): New. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 7130d2d..8df82a1 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -39,6 +39,7 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_SIMD 0x00040000 /* SIMD instructions. */ #define AARCH64_FEATURE_CRC 0x00080000 /* CRC instructions. */ #define AARCH64_FEATURE_LSE 0x00100000 /* LSE instructions. */ +#define AARCH64_FEATURE_PAN 0x00200000 /* PAN instructions. */ /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ @@ -629,6 +630,10 @@ typedef struct extern const aarch64_sys_reg aarch64_sys_regs []; extern const aarch64_sys_reg aarch64_pstatefields []; extern bfd_boolean aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *); +extern bfd_boolean aarch64_sys_reg_supported_p (const aarch64_feature_set, + const aarch64_sys_reg *); +extern bfd_boolean aarch64_pstatefield_supported_p (const aarch64_feature_set, + const aarch64_sys_reg *); typedef struct { diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9158b14..f4688c8 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2015-06-01 Matthew Wahab <matthew.wahab@arm.com> + + * aarch64-opc.c (F_ARCHEXT): New. + (aarch64_sys_regs): Add "pan". + (aarch64_sys_reg_supported_p): New. + (aarch64_pstatefields): Add "pan". + (aarch64_pstatefield_supported_p): New. + 2015-06-01 Jan Beulich <jbeulich@suse.com> * i386-tbl.h: Regenerate. diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 5ea1384..5c7ef86 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -2723,6 +2723,12 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, #endif #define F_DEPRECATED 0x1 /* Deprecated system register. */ +#ifdef F_ARCHEXT +#undef F_ARCHEXT +#endif +#define F_ARCHEXT 0x2 /* Architecture dependent system register. */ + + /* TODO there are two more issues need to be resolved 1. handle read-only and write-only system registers 2. handle cpu-implementation-defined system registers. */ @@ -2734,6 +2740,7 @@ const aarch64_sys_reg aarch64_sys_regs [] = { "spsel", CPEN_(0,C2,0), 0 }, { "daif", CPEN_(3,C2,1), 0 }, { "currentel", CPEN_(0,C2,2), 0 }, /* RO */ + { "pan", CPEN_(0,C2,3), F_ARCHEXT }, { "nzcv", CPEN_(3,C2,0), 0 }, { "fpcr", CPEN_(3,C4,0), 0 }, { "fpsr", CPEN_(3,C4,1), 0 }, @@ -3043,14 +3050,45 @@ aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *reg) return (reg->flags & F_DEPRECATED) != 0; } +bfd_boolean +aarch64_sys_reg_supported_p (const aarch64_feature_set features, + const aarch64_sys_reg *reg) +{ + if (!(reg->flags & F_ARCHEXT)) + return TRUE; + + /* PAN. Values are from aarch64_sys_regs. */ + if (reg->value == CPEN_(0,C2,3) + && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PAN)) + return FALSE; + + return TRUE; +} + const aarch64_sys_reg aarch64_pstatefields [] = { { "spsel", 0x05, 0 }, { "daifset", 0x1e, 0 }, { "daifclr", 0x1f, 0 }, + { "pan", 0x04, F_ARCHEXT }, { 0, CPENC(0,0,0,0,0), 0 }, }; +bfd_boolean +aarch64_pstatefield_supported_p (const aarch64_feature_set features, + const aarch64_sys_reg *reg) +{ + if (!(reg->flags & F_ARCHEXT)) + return TRUE; + + /* PAN. Values are from aarch64_pstatefields. */ + if (reg->value == 0x04 + && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PAN)) + return FALSE; + + return TRUE; +} + const aarch64_sys_ins_reg aarch64_sys_regs_ic[] = { { "ialluis", CPENS(0,C7,C1,0), 0 }, |