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-rw-r--r--cpu/ChangeLog5
-rw-r--r--cpu/m32c.opc6
2 files changed, 8 insertions, 3 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index ec5f52b..4d2860f 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2005-07-16 Jim Blandy <jimb@redhat.com>
+
+ * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
+ to represent isa sets.
+
2005-07-15 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Fix copyright.
diff --git a/cpu/m32c.opc b/cpu/m32c.opc
index 04baa9c..3824118 100644
--- a/cpu/m32c.opc
+++ b/cpu/m32c.opc
@@ -866,14 +866,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
const CGEN_INSN *insn)
{
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
- CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
+ int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
/* If attributes are absent, assume no restriction. */
if (machs == 0)
machs = ~0;
- return (machs & cd->machs)
- && cgen_bitset_intersect_p (& isas, cd->isas);
+ return ((machs & cd->machs)
+ && (isas & cd->isas));
}
/* Parse a set of registers, R0,R1,A0,A1,SB,FB. */