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-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-aarch64.c5
-rw-r--r--include/ChangeLog4
-rw-r--r--include/opcode/aarch64.h4
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/aarch64-opc.c11
6 files changed, 27 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index d7df100..ac9d359 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
+ * config/tc-aarch64.c (find_best_match): Simplify, allowing an
+ instruction with all-NIL qualifiers to fail to match.
+
+2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
+
* config/tc-aarch64.c (parse_address_main): Remove reloc and
accept_reg_post_index parameters. Parse relocations and register
post indexes unconditionally.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index f82fdb9..f50de70 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4134,7 +4134,7 @@ find_best_match (const aarch64_inst *instr,
}
max_num_matched = 0;
- idx = -1;
+ idx = 0;
/* For each pattern. */
for (i = 0; i < AARCH64_MAX_QLF_SEQ_NUM; ++i, ++qualifiers_list)
@@ -4146,9 +4146,6 @@ find_best_match (const aarch64_inst *instr,
if (empty_qualifier_sequence_p (qualifiers) == TRUE)
{
DEBUG_TRACE_IF (i == 0, "empty list of qualifier sequence");
- if (i != 0 && idx == -1)
- /* If nothing has been matched, return the 1st sequence. */
- idx = 0;
break;
}
diff --git a/include/ChangeLog b/include/ChangeLog
index 2c922c4..21ddbfd 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
+
+ * opcode/aarch64.h (F_STRICT): New flag.
+
2016-09-07 Richard Earnshaw <rearnsha@arm.com>
* opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 1e38749..24a2ddb 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -598,7 +598,9 @@ extern aarch64_opcode aarch64_opcode_table[];
#define F_OD(X) (((X) & 0x7) << 24)
/* Instruction has the field of 'sz'. */
#define F_LSE_SZ (1 << 27)
-/* Next bit is 28. */
+/* Require an exact qualifier match, even for NIL qualifiers. */
+#define F_STRICT (1ULL << 28)
+/* Next bit is 29. */
static inline bfd_boolean
alias_opcode_p (const aarch64_opcode *opcode)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b47f034..c12ea3a 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
+ * aarch64-opc.c (match_operands_qualifier): Handle F_STRICT.
+
+2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
+
* aarch64-gen.c (indented_print): Avoid hard-coded indentation limit.
2016-09-15 Claudiu Zissulescu <claziss@synopsys.com>
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 322b991..d870fd6 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -854,7 +854,7 @@ aarch64_find_best_match (const aarch64_inst *inst,
static int
match_operands_qualifier (aarch64_inst *inst, bfd_boolean update_p)
{
- int i;
+ int i, nops;
aarch64_opnd_qualifier_seq_t qualifiers;
if (!aarch64_find_best_match (inst, inst->opcode->qualifiers_list, -1,
@@ -864,6 +864,15 @@ match_operands_qualifier (aarch64_inst *inst, bfd_boolean update_p)
return 0;
}
+ if (inst->opcode->flags & F_STRICT)
+ {
+ /* Require an exact qualifier match, even for NIL qualifiers. */
+ nops = aarch64_num_of_operands (inst->opcode);
+ for (i = 0; i < nops; ++i)
+ if (inst->operands[i].qualifier != qualifiers[i])
+ return FALSE;
+ }
+
/* Update the qualifiers. */
if (update_p == TRUE)
for (i = 0; i < AARCH64_MAX_OPND_NUM; ++i)