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authorMike Frysinger <vapier@gentoo.org>2021-01-05 22:09:57 -0500
committerMike Frysinger <vapier@gentoo.org>2021-01-15 19:18:34 -0500
commit1368b914e93a3af332f787d3d41c106d11bb90da (patch)
tree9893ccae5d2d8cbf2ce855e09d6b8f30b56a21bc /sim/testsuite/msp430
parente403a898b5893337baea73bcb001ece74042f351 (diff)
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sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
Diffstat (limited to 'sim/testsuite/msp430')
-rw-r--r--sim/testsuite/msp430/ChangeLog17
-rw-r--r--sim/testsuite/msp430/add.s20
-rw-r--r--sim/testsuite/msp430/allinsn.exp15
-rw-r--r--sim/testsuite/msp430/mpyull_hwmult.s55
-rw-r--r--sim/testsuite/msp430/rrux.s14
-rw-r--r--sim/testsuite/msp430/testutils.inc100
6 files changed, 221 insertions, 0 deletions
diff --git a/sim/testsuite/msp430/ChangeLog b/sim/testsuite/msp430/ChangeLog
new file mode 100644
index 0000000..cd6b195
--- /dev/null
+++ b/sim/testsuite/msp430/ChangeLog
@@ -0,0 +1,17 @@
+2020-08-05 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * mpyull_hwmult.s: New test.
+
+2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
+
+ * rrux.s: New test.
+
+2016-01-05 Nick Clifton <nickc@redhat.com>
+
+ * testutils.inc (__pass): Use the LMA addresses of the _passmsg
+ symbol.
+ (__fail): Likewise.
+
+2014-03-10 Mike Frysinger <vapier@gentoo.org>
+
+ * add.s, allinsn.exp, testutils.inc: New files.
diff --git a/sim/testsuite/msp430/add.s b/sim/testsuite/msp430/add.s
new file mode 100644
index 0000000..76247ed
--- /dev/null
+++ b/sim/testsuite/msp430/add.s
@@ -0,0 +1,20 @@
+# check that basic add insn works.
+# mach: msp430
+
+.include "testutils.inc"
+
+ start
+
+ mov #10, r4
+ add #23, r4
+ cmp #33, r4
+ jne 1f
+
+ cmp #32, r4
+ jlo 1f
+
+ cmp #34, r4
+ jhs 1f
+
+ pass
+1: fail
diff --git a/sim/testsuite/msp430/allinsn.exp b/sim/testsuite/msp430/allinsn.exp
new file mode 100644
index 0000000..affa8ae
--- /dev/null
+++ b/sim/testsuite/msp430/allinsn.exp
@@ -0,0 +1,15 @@
+# msp430 simulator testsuite
+
+if [istarget msp430-*] {
+ # all machines
+ set all_machs "msp430"
+
+ foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.s]] {
+ # If we're only testing specific files and this isn't one of them,
+ # skip it.
+ if ![runtest_file_p $runtests $src] {
+ continue
+ }
+ run_sim_test $src $all_machs
+ }
+}
diff --git a/sim/testsuite/msp430/mpyull_hwmult.s b/sim/testsuite/msp430/mpyull_hwmult.s
new file mode 100644
index 0000000..911fa11
--- /dev/null
+++ b/sim/testsuite/msp430/mpyull_hwmult.s
@@ -0,0 +1,55 @@
+# Test that unsigned widening multiplication of 32-bit operands to produce a
+# 64-bit result is simulated correctly, when using 32-bit or F5series hardware
+# multiply functionality.
+# 0xffff fffc * 0x2 = 0x1 ffff fff8
+# mach: msp430
+
+# 32-bit hwmult register addresses
+.set MPY32L, 0x0140
+.set MPY32H, 0x0142
+.set OP2L, 0x0150
+.set OP2H, 0x0152
+.set RES0, 0x0154
+.set RES1, 0x0156
+.set RES2, 0x0158
+.set RES3, 0x015A
+
+# F5series hwmult register addresses
+.set MPY32L_F5, 0x04D0
+.set MPY32H_F5, 0x04D2
+.set OP2L_F5, 0x04E0
+.set OP2H_F5, 0x04E2
+.set RES0_F5, 0x04E4
+.set RES1_F5, 0x04E6
+.set RES2_F5, 0x04E8
+.set RES3_F5, 0x04EA
+
+.include "testutils.inc"
+
+ start
+
+ ; Test 32bit hwmult
+ MOV.W #2, &MPY32L ; Load operand 1 Low into multiplier
+ MOV.W #0, &MPY32H ; Load operand 1 High into multiplier
+ MOV.W #-4, &OP2L ; Load operand 2 Low into multiplier
+ MOV.W #-1, &OP2H ; Load operand 2 High, trigger MPY
+
+ CMP.W #-8, &RES0 { JNE .L5
+ CMP.W #-1, &RES1 { JNE .L5
+ CMP.W #1, &RES2 { JNE .L5
+ CMP.W #0, &RES3 { JNE .L5
+
+ ; Test f5series hwmult
+ MOV.W #2, &MPY32L_F5
+ MOV.W #0, &MPY32H_F5
+ MOV.W #-4, &OP2L_F5
+ MOV.W #-1, &OP2H_F5
+
+ CMP.W #-8, &RES0_F5 { JNE .L5
+ CMP.W #-1, &RES1_F5 { JNE .L5
+ CMP.W #1, &RES2_F5 { JNE .L5
+ CMP.W #0, &RES3_F5 { JEQ .L6
+.L5:
+ fail
+.L6:
+ pass
diff --git a/sim/testsuite/msp430/rrux.s b/sim/testsuite/msp430/rrux.s
new file mode 100644
index 0000000..07fc8d5
--- /dev/null
+++ b/sim/testsuite/msp430/rrux.s
@@ -0,0 +1,14 @@
+# check that rrux (synthesized as rrc with ZC bit set) works.
+# mach: msp430
+
+.include "testutils.inc"
+
+ start
+
+ setc ; set the carry bit to ensure ZC bit is obeyed
+ mov.w #16, r10
+ rrux.w r10
+ cmp.w #8, r10
+ jeq 1f
+ fail
+ 1: pass
diff --git a/sim/testsuite/msp430/testutils.inc b/sim/testsuite/msp430/testutils.inc
new file mode 100644
index 0000000..1ddef23
--- /dev/null
+++ b/sim/testsuite/msp430/testutils.inc
@@ -0,0 +1,100 @@
+# MACRO: start
+# All assembler tests should start with a call to "start"
+ .macro start
+ .text
+
+ # Skip over these inlined funcs.
+ jmp __start;
+
+ .global __pass
+ .type __pass, function
+__pass:
+ # Note - we cannot just invoke:
+ #
+ # write 1, _passmsg, 5
+ #
+ # here because _passmsg contains the run-time (VMA) address of
+ # the pass string (probably 0x500) not the load-time (LMA)
+ # address (probably 0x804c). Normally using the VMA address
+ # would be the correct thing to do - *if* there was some start
+ # up code which copied data from LMA to VMA. But we have no
+ # start up code, so the data still resides at the LMA
+ # address. Hence we use __romdatastart instead.
+ #
+ # Note - we are cheating because the address that we pass to
+ # "write" should actually be:
+ #
+ # __romdatastart + (_passmsg - __datastart)
+ #
+ # but the assembler cannot cope with this expression. So we
+ # cheat and use the fact that we know that _passmsg is the
+ # first string in the .data section and so (_passmsg -
+ # __datastart) evaluates to zero.
+
+ write 1, __romdatastart, 5
+ exit 0
+
+ .global __fail
+ .type __fail, function
+__fail:
+ # Note - see above.
+ #
+ # write 1, _failmsg, 5
+ #
+ # This time we use the fact that _passmsg is aligned to a
+ # 16 byte boundary to work out that (_failmsg - __datastart)
+ # evaluates to 0x10.
+
+ write 1, __romdatastart + 0x10, 5
+ exit 1
+
+ .data
+_passmsg:
+ .ascii "pass\n"
+ .align 4
+
+_failmsg:
+ .ascii "fail\n"
+ .align 4
+
+ .text
+ .global __start
+ .type __start, function
+__start:
+ .endm
+
+# MACRO: system_call
+# Make a libgloss/Linux system call
+ .macro system_call nr:req
+ call #(0x180|\nr);
+ .endm
+
+# MACRO: exit
+# Quit the current test
+ .macro exit rc:req
+ mov #\rc, r12
+ system_call 1
+ .endm
+
+# MACRO: pass
+# Write 'pass' to stdout via syscalls and quit;
+# meant for non-OS operating environments
+ .macro pass
+ jmp __pass;
+ .endm
+
+# MACRO: fail
+# Write 'fail' to stdout via syscalls and quit;
+# meant for non-OS operating environments
+ .macro fail
+ jmp __fail;
+ .endm
+
+# MACRO: write
+# Just like the write() C function; uses system calls
+ .macro write fd:req, buf:req, count:req
+ mov #\fd, r12;
+ mov #\buf, r13;
+ mov #\count, r14;
+ system_call 5
+ .endm