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| author | Mike Frysinger <vapier@gentoo.org> | 2021-01-05 22:09:57 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2021-01-15 19:18:34 -0500 |
| commit | 1368b914e93a3af332f787d3d41c106d11bb90da (patch) | |
| tree | 9893ccae5d2d8cbf2ce855e09d6b8f30b56a21bc /sim/testsuite/aarch64/fcmXX.s | |
| parent | e403a898b5893337baea73bcb001ece74042f351 (diff) | |
| download | fsf-binutils-gdb-1368b914e93a3af332f787d3d41c106d11bb90da.zip fsf-binutils-gdb-1368b914e93a3af332f787d3d41c106d11bb90da.tar.gz fsf-binutils-gdb-1368b914e93a3af332f787d3d41c106d11bb90da.tar.bz2 | |
sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.
We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim". Since we have no
other dirs in this tree, and no plans to add any, should be fine.
Diffstat (limited to 'sim/testsuite/aarch64/fcmXX.s')
| -rw-r--r-- | sim/testsuite/aarch64/fcmXX.s | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/sim/testsuite/aarch64/fcmXX.s b/sim/testsuite/aarch64/fcmXX.s new file mode 100644 index 0000000..cc1a2a9 --- /dev/null +++ b/sim/testsuite/aarch64/fcmXX.s @@ -0,0 +1,77 @@ +# mach: aarch64 + +# Check the FP scalar compare zero instructions: fcmeq, fcmle, fcmlt, fcmge, +# fcmgt. +# Check values -1, 0, and 1. + +.include "testutils.inc" + + start + fmov s0, wzr + fcmeq s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov s0, #-1.0 + fcmeq s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #0 + bne .Lfailure + fmov d0, xzr + fcmeq d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + fmov d0, #1.0 + fcmeq d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #0 + bne .Lfailure + + fmov s0, #-1.0 + fcmle s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #-1.0 + fcmle d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + fmov s0, #-1.0 + fcmlt s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #-1.0 + fcmlt d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + fmov s0, #1.0 + fcmge s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #1.0 + fcmge d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + fmov s0, #1.0 + fcmgt s1, s0, #0.0 + mov w0, v1.s[0] + cmp w0, #-1 + bne .Lfailure + fmov d0, #1.0 + fcmgt d1, d0, #0.0 + mov x0, v1.d[0] + cmp x0, #-1 + bne .Lfailure + + pass +.Lfailure: + fail |