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| author | Andrew Cagney <cagney@redhat.com> | 1998-05-21 08:18:21 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-05-21 08:18:21 +0000 |
| commit | 84048259930b9dc812404285e3508eb09beeec51 (patch) | |
| tree | 4e87256ed9a1b6cc3d6343150a89a6632e351d99 /sim/mips/interp.c | |
| parent | 643878d01705dbc37908583984ab14da155a8b28 (diff) | |
| download | fsf-binutils-gdb-84048259930b9dc812404285e3508eb09beeec51.zip fsf-binutils-gdb-84048259930b9dc812404285e3508eb09beeec51.tar.gz fsf-binutils-gdb-84048259930b9dc812404285e3508eb09beeec51.tar.bz2 | |
* interp.c (sim_fetch_register): Convert internal r5900 regs to
target byte order
Diffstat (limited to 'sim/mips/interp.c')
| -rw-r--r-- | sim/mips/interp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/mips/interp.c b/sim/mips/interp.c index f83fdc3..e0c878d 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -1017,7 +1017,7 @@ sim_fetch_register (sd,rn,memory,length) /* start-sanitize-r5900 */ if (rn >= 90 && rn < 90 + 32) { - *(unsigned64*)memory = GPR1[rn - 90]; + *((unsigned64*)memory) = H2T_8 (GPR1[rn - 90]); return 8; } switch (rn) |