From 84048259930b9dc812404285e3508eb09beeec51 Mon Sep 17 00:00:00 2001 From: Andrew Cagney Date: Thu, 21 May 1998 08:18:21 +0000 Subject: * interp.c (sim_fetch_register): Convert internal r5900 regs to target byte order --- sim/mips/interp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'sim/mips/interp.c') diff --git a/sim/mips/interp.c b/sim/mips/interp.c index f83fdc3..e0c878d 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -1017,7 +1017,7 @@ sim_fetch_register (sd,rn,memory,length) /* start-sanitize-r5900 */ if (rn >= 90 && rn < 90 + 32) { - *(unsigned64*)memory = GPR1[rn - 90]; + *((unsigned64*)memory) = H2T_8 (GPR1[rn - 90]); return 8; } switch (rn) -- cgit v1.1