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author | H.J. Lu <hjl.tools@gmail.com> | 2015-07-24 04:08:12 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2015-07-24 04:16:47 -0700 |
commit | 72f4393d8cfc4a47f0e59657f7822668cfad132f (patch) | |
tree | 72a183bf802b025c08fd2a5fa5717155c5c536c6 /sim/cr16 | |
parent | 91cb26dac47265f178fb6635f1deebdfd244572a (diff) | |
download | fsf-binutils-gdb-72f4393d8cfc4a47f0e59657f7822668cfad132f.zip fsf-binutils-gdb-72f4393d8cfc4a47f0e59657f7822668cfad132f.tar.gz fsf-binutils-gdb-72f4393d8cfc4a47f0e59657f7822668cfad132f.tar.bz2 |
Remove leading/trailing white spaces in ChangeLog
Diffstat (limited to 'sim/cr16')
-rw-r--r-- | sim/cr16/ChangeLog | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sim/cr16/ChangeLog b/sim/cr16/ChangeLog index 68de3bf..e81bb58 100644 --- a/sim/cr16/ChangeLog +++ b/sim/cr16/ChangeLog @@ -202,7 +202,7 @@ PR gdb/7205 - Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. + Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. 2012-03-24 Mike Frysinger <vapier@gentoo.org> @@ -253,8 +253,8 @@ * interp.c (hash): Remove incorrect prototype. 2008-06-06 Vladimir Prus <vladimir@codesourcery.com> - Daniel Jacobowitz <dan@codesourcery.com> - Joseph Myers <joseph@codesourcery.com> + Daniel Jacobowitz <dan@codesourcery.com> + Joseph Myers <joseph@codesourcery.com> * configure: Regenerate. @@ -266,6 +266,6 @@ 2008-02-12 M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com> - * ChangeLog, Makefile.in, configure, configure.in, cr16_sim.h, + * ChangeLog, Makefile.in, configure, configure.in, cr16_sim.h, gencode.c, interp.c, simops.c, endian.c: Created. |