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author | Mike Frysinger <vapier@gentoo.org> | 2021-06-28 22:39:16 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2021-06-30 13:33:18 -0400 |
commit | b79efe264f9d2d4fc5b0491acd3258063b309723 (patch) | |
tree | 75808110808964a8813af7df9a5e8cf03b547dc7 /sim/configure | |
parent | e7954ef5e5ed90fb7d28c013518f4c2e6bcd20a1 (diff) | |
download | fsf-binutils-gdb-b79efe264f9d2d4fc5b0491acd3258063b309723.zip fsf-binutils-gdb-b79efe264f9d2d4fc5b0491acd3258063b309723.tar.gz fsf-binutils-gdb-b79efe264f9d2d4fc5b0491acd3258063b309723.tar.bz2 |
sim: unify scache settings
The cgen scache module is enabled by every cgen port, and with the
same default value of 16k (which matches the common default value).
Let's pull this option out of the individual ports (via CPPFLAGS)
and into the common code (via config.h).
The object itself is compiled only for cgen ports atm, so that part
doesn't change. The scache code is initialized dynamically via the
modules.c logic. That's why the profile code needs an additional
CGEN_ARCH check.
This will allow us to collapse arch configure files more. Merging
the source files will require more future work, but integrating the
cgen & non-cgen worlds itself will take a lot.
Diffstat (limited to 'sim/configure')
-rwxr-xr-x | sim/configure | 30 |
1 files changed, 26 insertions, 4 deletions
diff --git a/sim/configure b/sim/configure index eb38cda..4a0b87f 100755 --- a/sim/configure +++ b/sim/configure @@ -640,7 +640,6 @@ am__EXEEXT_TRUE LTLIBOBJS SIM_RX_CYCLE_ACCURATE_FLAGS sim_reserved_bits -sim_scache sim_float sim_bitsize SIM_INLINE @@ -840,6 +839,7 @@ enable_sim_environment enable_sim_hardware enable_sim_inline enable_sim_profile +enable_sim_scache enable_sim_stdio enable_sim_trace enable_werror @@ -1526,6 +1526,8 @@ Optional Features: Specify which functions should be inlined --enable-sim-profile=opts Enable profiling flags + --enable-sim-scache=size + Specify simulator execution cache size --enable-sim-stdio Specify whether to use stdio for console input/output --enable-sim-trace=opts Enable tracing of simulated programs @@ -12178,7 +12180,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 12181 "configure" +#line 12183 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -12284,7 +12286,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 12287 "configure" +#line 12289 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -14516,6 +14518,27 @@ _ACEOF { $as_echo "$as_me:${as_lineno-$LINENO}: result: $sim_profile" >&5 $as_echo "$sim_profile" >&6; } +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sim cache size" >&5 +$as_echo_n "checking for sim cache size... " >&6; } +sim_scache="16384" +# Check whether --enable-sim-scache was given. +if test "${enable_sim_scache+set}" = set; then : + enableval=$enable_sim_scache; case "${enableval}" in + yes) ;; + no) sim_scache="0";; + [0-9]*) sim_scache="${enableval}";; + *) as_fn_error $? "\"Bad value $enableval passed to --enable-sim-scache\"" "$LINENO" 5;; +esac +fi + + +cat >>confdefs.h <<_ACEOF +#define WITH_SCACHE $sim_scache +_ACEOF + +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $sim_scache" >&5 +$as_echo "$sim_scache" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for sim stdio debug behavior" >&5 $as_echo_n "checking for sim stdio debug behavior... " >&6; } sim_stdio="0" @@ -14674,7 +14697,6 @@ fi - { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether sim rx should be cycle accurate" >&5 $as_echo_n "checking whether sim rx should be cycle accurate... " >&6; } # Check whether --enable-sim-rx-cycle-accurate was given. |