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author | Andrew Cagney <cagney@redhat.com> | 1997-09-04 03:47:39 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-09-04 03:47:39 +0000 |
commit | a34abff813f4fdd5f289ea45de9e874e31e7edf3 (patch) | |
tree | f6d3be383893c3adaae166e570d5eccd71f08427 /sim/common/sim-n-core.h | |
parent | 600d83316cfa68f72666d792244890789812b51a (diff) | |
download | fsf-binutils-gdb-a34abff813f4fdd5f289ea45de9e874e31e7edf3.zip fsf-binutils-gdb-a34abff813f4fdd5f289ea45de9e874e31e7edf3.tar.gz fsf-binutils-gdb-a34abff813f4fdd5f289ea45de9e874e31e7edf3.tar.bz2 |
o Add modulo argument to sim_core_attach
o Add sim-memopt module - memory option processing.
Diffstat (limited to 'sim/common/sim-n-core.h')
-rw-r--r-- | sim/common/sim-n-core.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sim/common/sim-n-core.h b/sim/common/sim-n-core.h index 4aefd2d..50c0e24 100644 --- a/sim/common/sim-n-core.h +++ b/sim/common/sim-n-core.h @@ -77,7 +77,7 @@ sim_core_read_aligned_N(sim_cpu *cpu, if (TRACE_P (cpu, TRACE_CORE_IDX)) if (sizeof (unsigned_N) > 4) trace_printf (CPU_STATE (cpu), cpu, - "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%08lx%08lx\n", + "sim-n-core.h:%d: read-%d %s:0x%08lx -> 0x%08lx%08lx\n", __LINE__, sizeof (unsigned_N), sim_core_map_to_str (map), @@ -86,7 +86,7 @@ sim_core_read_aligned_N(sim_cpu *cpu, (unsigned long) val); else trace_printf (CPU_STATE (cpu), cpu, - "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%0*lx\n", + "sim-n-core.h:%d: read-%d %s:0x%08lx -> 0x%0*lx\n", __LINE__, sizeof (unsigned_N), sim_core_map_to_str (map), @@ -190,7 +190,7 @@ sim_core_write_aligned_N(sim_cpu *cpu, if (TRACE_P (cpu, TRACE_CORE_IDX)) if (sizeof (unsigned_N) > 4) trace_printf (CPU_STATE (cpu), cpu, - "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%08lx%08lx\n", + "sim-n-core.h:%d: write-%d %s:0x%08lx <- 0x%08lx%08lx\n", __LINE__, sizeof (unsigned_N), sim_core_map_to_str (map), @@ -199,7 +199,7 @@ sim_core_write_aligned_N(sim_cpu *cpu, (unsigned long) val); else trace_printf (CPU_STATE (cpu), cpu, - "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%0*lx\n", + "sim-n-core.h:%d: write-%d %s:0x%08lx <- 0x%0*lx\n", __LINE__, sizeof (unsigned_N), sim_core_map_to_str (map), |