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| author | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2014-06-02 13:11:17 +0200 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2014-06-02 13:11:17 +0200 |
| commit | ec9a8169c363a80c51d9d603f00637bc4fe97b4d (patch) | |
| tree | 6ce8484e361a54c84bb525f4a339703a9d2e43eb /opcodes | |
| parent | ab251b8980d61bd9c08e2cb8662cd2111ce8b03f (diff) | |
| download | fsf-binutils-gdb-ec9a8169c363a80c51d9d603f00637bc4fe97b4d.zip fsf-binutils-gdb-ec9a8169c363a80c51d9d603f00637bc4fe97b4d.tar.gz fsf-binutils-gdb-ec9a8169c363a80c51d9d603f00637bc4fe97b4d.tar.bz2 | |
This fixes a thinko in the LEON support recently added to the assembler.
opcodes/
* sparc-opc.c (cas): Disable for LEON.
(casl): Likewise.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/sparc-opc.c | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d687a8d..ea036b1 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2014-06-02 Eric Botcazou <ebotcazou@adacore.com> + + * sparc-opc.c (cas): Disable for LEON. + (casl): Likewise. + 2014-05-20 Alan Modra <amodra@gmail.com> * m68k-dis.c: Don't include setjmp.h. diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c index 659c548..67176e6 100644 --- a/opcodes/sparc-opc.c +++ b/opcodes/sparc-opc.c @@ -1797,8 +1797,8 @@ SLCBCC("cbnefr", 15), { "signx", F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0)|RS2_G0, "r", F_ALIAS, 0, v9 }, /* sra rd,%g0,rd */ { "clruw", F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0)|RS2_G0, "1,d", F_ALIAS, 0, v9 }, /* srl rs1,%g0,rd */ { "clruw", F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0)|RS2_G0, "r", F_ALIAS, 0, v9 }, /* srl rd,%g0,rd */ -{ "cas", F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, 0, v9andleon }, /* casa [rs1]ASI_P,rs2,rd */ -{ "casl", F3(3, 0x3c, 0)|ASI(0x88), F3(~3, ~0x3c, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, 0, v9andleon }, /* casa [rs1]ASI_P_L,rs2,rd */ +{ "cas", F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, 0, v9 }, /* casa [rs1]ASI_P,rs2,rd */ +{ "casl", F3(3, 0x3c, 0)|ASI(0x88), F3(~3, ~0x3c, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, 0, v9 }, /* casa [rs1]ASI_P_L,rs2,rd */ { "casx", F3(3, 0x3e, 0)|ASI(0x80), F3(~3, ~0x3e, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, 0, v9 }, /* casxa [rs1]ASI_P,rs2,rd */ { "casxl", F3(3, 0x3e, 0)|ASI(0x88), F3(~3, ~0x3e, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, 0, v9 }, /* casxa [rs1]ASI_P_L,rs2,rd */ |