gas/

	* config/tc-m68k.c (m68k_ip):  Correct output of cpu aliases.
gas/testsuite/
	* gas/m68k/all.exp: Add mcf-trap.
	* gas/m68k/mcf-trap.[sd]: New.
opcodes/
	* m68k-opc.c (m68k_opcodes): Place trap instructions before set
	conditionals.  Add tpf coldfire instruction as alias for trapf.

2 files changed, 68 insertions, 58 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 727170e..9397d42 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
+
+	* m68k-opc.c (m68k_opcodes): Place trap instructions before set
+	conditionals.  Add tpf coldfire instruction as alias for trapf.
+
 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* i386-dis.c (print_insn): Check PREFIX_REPNZ before
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index 601c55a..87648aa 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -1998,6 +1998,64 @@ const struct m68k_opcode m68k_opcodes[] =
 {"sbcd", 2,	one(0100400),		one(0170770), "DsDd", m68000up },
 {"sbcd", 2,	one(0100410),		one(0170770), "-s-d", m68000up },
 
+  /* Traps have to come before conditional sets, as they have a more
+     specific opcode.  */
+{"trapcc", 2,	one(0052374),	one(0177777), "", m68020up | cpu32 },
+{"trapcs", 2,	one(0052774),	one(0177777), "", m68020up | cpu32 },
+{"trapeq", 2,	one(0053774),	one(0177777), "", m68020up | cpu32 },
+{"tpf", 2,	one(0050774),	one(0177777), "", mcfisa_a },
+{"trapf", 2,	one(0050774),	one(0177777), "", m68020up | cpu32 | mcfisa_a },
+{"trapge", 2,	one(0056374),	one(0177777), "", m68020up | cpu32 },
+{"trapgt", 2,	one(0057374),	one(0177777), "", m68020up | cpu32 },
+{"traphi", 2,	one(0051374),	one(0177777), "", m68020up | cpu32 },
+{"traple", 2,	one(0057774),	one(0177777), "", m68020up | cpu32 },
+{"trapls", 2,	one(0051774),	one(0177777), "", m68020up | cpu32 },
+{"traplt", 2,	one(0056774),	one(0177777), "", m68020up | cpu32 },
+{"trapmi", 2,	one(0055774),	one(0177777), "", m68020up | cpu32 },
+{"trapne", 2,	one(0053374),	one(0177777), "", m68020up | cpu32 },
+{"trappl", 2,	one(0055374),	one(0177777), "", m68020up | cpu32 },
+{"trapt", 2,	one(0050374),	one(0177777), "", m68020up | cpu32 },
+{"trapvc", 2,	one(0054374),	one(0177777), "", m68020up | cpu32 },
+{"trapvs", 2,	one(0054774),	one(0177777), "", m68020up | cpu32 },
+
+{"trapccw", 4,	one(0052372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapcsw", 4,	one(0052772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapeqw", 4,	one(0053772),	one(0177777), "#w", m68020up|cpu32 },
+{"tpfw", 4,	one(0050772),	one(0177777), "#w", mcfisa_a},
+{"trapfw", 4,	one(0050772),	one(0177777), "#w", m68020up|cpu32|mcfisa_a},
+{"trapgew", 4,	one(0056372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapgtw", 4,	one(0057372),	one(0177777), "#w", m68020up|cpu32 },
+{"traphiw", 4,	one(0051372),	one(0177777), "#w", m68020up|cpu32 },
+{"traplew", 4,	one(0057772),	one(0177777), "#w", m68020up|cpu32 },
+{"traplsw", 4,	one(0051772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapltw", 4,	one(0056772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapmiw", 4,	one(0055772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapnew", 4,	one(0053372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapplw", 4,	one(0055372),	one(0177777), "#w", m68020up|cpu32 },
+{"traptw", 4,	one(0050372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapvcw", 4,	one(0054372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapvsw", 4,	one(0054772),	one(0177777), "#w", m68020up|cpu32 },
+
+{"trapccl", 6,	one(0052373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapcsl", 6,	one(0052773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapeql", 6,	one(0053773),	one(0177777), "#l", m68020up|cpu32 },
+{"tpfl", 6,	one(0050773),	one(0177777), "#l", mcfisa_a},
+{"trapfl", 6,	one(0050773),	one(0177777), "#l", m68020up|cpu32|mcfisa_a},
+{"trapgel", 6,	one(0056373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapgtl", 6,	one(0057373),	one(0177777), "#l", m68020up|cpu32 },
+{"traphil", 6,	one(0051373),	one(0177777), "#l", m68020up|cpu32 },
+{"traplel", 6,	one(0057773),	one(0177777), "#l", m68020up|cpu32 },
+{"traplsl", 6,	one(0051773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapltl", 6,	one(0056773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapmil", 6,	one(0055773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapnel", 6,	one(0053373),	one(0177777), "#l", m68020up|cpu32 },
+{"trappll", 6,	one(0055373),	one(0177777), "#l", m68020up|cpu32 },
+{"traptl", 6,	one(0050373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapvcl", 6,	one(0054373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapvsl", 6,	one(0054773),	one(0177777), "#l", m68020up|cpu32 },
+
+{"trapv", 2,	one(0047166),	one(0177777), "", m68000up },
+
 {"scc", 2,	one(0052300),	one(0177700), "$s", m68000up },
 {"scc", 2,	one(0052300),	one(0177700), "Ds", mcfisa_a },
 {"scs", 2,	one(0052700),	one(0177700), "$s", m68000up },
@@ -2021,15 +2079,15 @@ const struct m68k_opcode m68k_opcodes[] =
 {"smi", 2,	one(0055700),	one(0177700), "$s", m68000up },
 {"smi", 2,	one(0055700),	one(0177700), "Ds", mcfisa_a },
 {"sne", 2,	one(0053300),	one(0177700), "$s", m68000up },
-{"sne", 2,	one(0053300),	one(0177700), "Ds", mcfisa_a },
+{"sne", 2,	one(0053300),	one(0177770), "Ds", mcfisa_a },
 {"spl", 2,	one(0055300),	one(0177700), "$s", m68000up },
-{"spl", 2,	one(0055300),	one(0177700), "Ds", mcfisa_a },
+{"spl", 2,	one(0055300),	one(0177770), "Ds", mcfisa_a },
 {"st", 2,	one(0050300),	one(0177700), "$s", m68000up },
-{"st", 2,	one(0050300),	one(0177700), "Ds", mcfisa_a },
+{"st", 2,	one(0050300),	one(0177770), "Ds", mcfisa_a },
 {"svc", 2,	one(0054300),	one(0177700), "$s", m68000up },
-{"svc", 2,	one(0054300),	one(0177700), "Ds", mcfisa_a },
+{"svc", 2,	one(0054300),	one(0177770), "Ds", mcfisa_a },
 {"svs", 2,	one(0054700),	one(0177700), "$s", m68000up },
-{"svs", 2,	one(0054700),	one(0177700), "Ds", mcfisa_a },
+{"svs", 2,	one(0054700),	one(0177770), "Ds", mcfisa_a },
 
 {"stop", 4,	one(0047162),	one(0177777), "#w", m68000up | mcfisa_a },
 
@@ -2098,59 +2156,6 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
 
 {"trap", 2,	one(0047100),	one(0177760), "Ts", m68000up | mcfisa_a },
 
-{"trapcc", 2,	one(0052374),	one(0177777), "", m68020up | cpu32 },
-{"trapcs", 2,	one(0052774),	one(0177777), "", m68020up | cpu32 },
-{"trapeq", 2,	one(0053774),	one(0177777), "", m68020up | cpu32 },
-{"trapf", 2,	one(0050774),	one(0177777), "", m68020up | cpu32 | mcfisa_a },
-{"trapge", 2,	one(0056374),	one(0177777), "", m68020up | cpu32 },
-{"trapgt", 2,	one(0057374),	one(0177777), "", m68020up | cpu32 },
-{"traphi", 2,	one(0051374),	one(0177777), "", m68020up | cpu32 },
-{"traple", 2,	one(0057774),	one(0177777), "", m68020up | cpu32 },
-{"trapls", 2,	one(0051774),	one(0177777), "", m68020up | cpu32 },
-{"traplt", 2,	one(0056774),	one(0177777), "", m68020up | cpu32 },
-{"trapmi", 2,	one(0055774),	one(0177777), "", m68020up | cpu32 },
-{"trapne", 2,	one(0053374),	one(0177777), "", m68020up | cpu32 },
-{"trappl", 2,	one(0055374),	one(0177777), "", m68020up | cpu32 },
-{"trapt", 2,	one(0050374),	one(0177777), "", m68020up | cpu32 },
-{"trapvc", 2,	one(0054374),	one(0177777), "", m68020up | cpu32 },
-{"trapvs", 2,	one(0054774),	one(0177777), "", m68020up | cpu32 },
-
-{"trapccw", 4,	one(0052372),	one(0177777), "#w", m68020up|cpu32 },
-{"trapcsw", 4,	one(0052772),	one(0177777), "#w", m68020up|cpu32 },
-{"trapeqw", 4,	one(0053772),	one(0177777), "#w", m68020up|cpu32 },
-{"trapfw", 4,	one(0050772),	one(0177777), "#w", m68020up|cpu32|mcfisa_a},
-{"trapgew", 4,	one(0056372),	one(0177777), "#w", m68020up|cpu32 },
-{"trapgtw", 4,	one(0057372),	one(0177777), "#w", m68020up|cpu32 },
-{"traphiw", 4,	one(0051372),	one(0177777), "#w", m68020up|cpu32 },
-{"traplew", 4,	one(0057772),	one(0177777), "#w", m68020up|cpu32 },
-{"traplsw", 4,	one(0051772),	one(0177777), "#w", m68020up|cpu32 },
-{"trapltw", 4,	one(0056772),	one(0177777), "#w", m68020up|cpu32 },
-{"trapmiw", 4,	one(0055772),	one(0177777), "#w", m68020up|cpu32 },
-{"trapnew", 4,	one(0053372),	one(0177777), "#w", m68020up|cpu32 },
-{"trapplw", 4,	one(0055372),	one(0177777), "#w", m68020up|cpu32 },
-{"traptw", 4,	one(0050372),	one(0177777), "#w", m68020up|cpu32 },
-{"trapvcw", 4,	one(0054372),	one(0177777), "#w", m68020up|cpu32 },
-{"trapvsw", 4,	one(0054772),	one(0177777), "#w", m68020up|cpu32 },
-
-{"trapccl", 6,	one(0052373),	one(0177777), "#l", m68020up|cpu32 },
-{"trapcsl", 6,	one(0052773),	one(0177777), "#l", m68020up|cpu32 },
-{"trapeql", 6,	one(0053773),	one(0177777), "#l", m68020up|cpu32 },
-{"trapfl", 6,	one(0050773),	one(0177777), "#l", m68020up|cpu32|mcfisa_a},
-{"trapgel", 6,	one(0056373),	one(0177777), "#l", m68020up|cpu32 },
-{"trapgtl", 6,	one(0057373),	one(0177777), "#l", m68020up|cpu32 },
-{"traphil", 6,	one(0051373),	one(0177777), "#l", m68020up|cpu32 },
-{"traplel", 6,	one(0057773),	one(0177777), "#l", m68020up|cpu32 },
-{"traplsl", 6,	one(0051773),	one(0177777), "#l", m68020up|cpu32 },
-{"trapltl", 6,	one(0056773),	one(0177777), "#l", m68020up|cpu32 },
-{"trapmil", 6,	one(0055773),	one(0177777), "#l", m68020up|cpu32 },
-{"trapnel", 6,	one(0053373),	one(0177777), "#l", m68020up|cpu32 },
-{"trappll", 6,	one(0055373),	one(0177777), "#l", m68020up|cpu32 },
-{"traptl", 6,	one(0050373),	one(0177777), "#l", m68020up|cpu32 },
-{"trapvcl", 6,	one(0054373),	one(0177777), "#l", m68020up|cpu32 },
-{"trapvsl", 6,	one(0054773),	one(0177777), "#l", m68020up|cpu32 },
-
-{"trapv", 2,	one(0047166),	one(0177777), "", m68000up },
-
 {"tstb", 2,	one(0045000),	one(0177700), ";b", m68020up|cpu32|mcfisa_a },
 {"tstb", 2,	one(0045000),	one(0177700), "$b", m68000up },
 {"tstw", 2,	one(0045100),	one(0177700), "*w", m68020up|cpu32|mcfisa_a },