diff options
author | Nick Clifton <nickc@redhat.com> | 2001-02-28 23:47:10 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2001-02-28 23:47:10 +0000 |
commit | 80a523c2e15c901b37981fce870dbd201896c562 (patch) | |
tree | 3f9bb1301bac93f13b907e0665be96b01b0dece1 /opcodes | |
parent | 07d48ebccc4a6e2c22fa087a68bf9d3511985502 (diff) | |
download | fsf-binutils-gdb-80a523c2e15c901b37981fce870dbd201896c562.zip fsf-binutils-gdb-80a523c2e15c901b37981fce870dbd201896c562.tar.gz fsf-binutils-gdb-80a523c2e15c901b37981fce870dbd201896c562.tar.bz2 |
new defines for Coldfire V4.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/m68k-opc.c | 247 |
2 files changed, 137 insertions, 115 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7d55e73..37aabe8 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2001-02-28 Igor Shevlyakov <igor@windriver.com> + + * m68k-opc.c: fix cpushl according to Motorola. Enable + bunch of instructions for Coldfire 5407 and add all new. + 2001-02-27 Alan Modra <alan@linuxcare.com.au> * configure.in (BFD_VERSION): Do without grep. diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index 49ce5de..22dca79 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -1,5 +1,5 @@ /* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200. - Copyright 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999 + Copyright 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999, 2001 Free Software Foundation. This file is part of GDB, GAS, and the GNU binutils. @@ -130,20 +130,20 @@ const struct m68k_opcode m68k_opcodes[] = {"bgtw", one(0067000), one(0177777), "BW", m68000up | mcf }, {"blew", one(0067400), one(0177777), "BW", m68000up | mcf }, -{"bhil", one(0061377), one(0177777), "BL", m68020up | cpu32 }, -{"blsl", one(0061777), one(0177777), "BL", m68020up | cpu32 }, -{"bccl", one(0062377), one(0177777), "BL", m68020up | cpu32 }, -{"bcsl", one(0062777), one(0177777), "BL", m68020up | cpu32 }, -{"bnel", one(0063377), one(0177777), "BL", m68020up | cpu32 }, -{"beql", one(0063777), one(0177777), "BL", m68020up | cpu32 }, -{"bvcl", one(0064377), one(0177777), "BL", m68020up | cpu32 }, -{"bvsl", one(0064777), one(0177777), "BL", m68020up | cpu32 }, -{"bpll", one(0065377), one(0177777), "BL", m68020up | cpu32 }, -{"bmil", one(0065777), one(0177777), "BL", m68020up | cpu32 }, -{"bgel", one(0066377), one(0177777), "BL", m68020up | cpu32 }, -{"bltl", one(0066777), one(0177777), "BL", m68020up | cpu32 }, -{"bgtl", one(0067377), one(0177777), "BL", m68020up | cpu32 }, -{"blel", one(0067777), one(0177777), "BL", m68020up | cpu32 }, +{"bhil", one(0061377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"blsl", one(0061777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bccl", one(0062377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bcsl", one(0062777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bnel", one(0063377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"beql", one(0063777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bvcl", one(0064377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bvsl", one(0064777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bpll", one(0065377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bmil", one(0065777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bgel", one(0066377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bltl", one(0066777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"bgtl", one(0067377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, +{"blel", one(0067777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, {"bhis", one(0061000), one(0177400), "BB", m68000up | mcf }, {"blss", one(0061400), one(0177400), "BB", m68000up | mcf }, @@ -198,7 +198,7 @@ const struct m68k_opcode m68k_opcodes[] = {"bkpt", one(0044110), one(0177770), "ts", m68010up }, {"braw", one(0060000), one(0177777), "BW", m68000up | mcf }, -{"bral", one(0060377), one(0177777), "BL", m68020up | cpu32 }, +{"bral", one(0060377), one(0177777), "BL", m68020up | cpu32 | mcf5407}, {"bras", one(0060000), one(0177400), "BB", m68000up | mcf }, {"bset", one(0000700), one(0170700), "Dd$s", m68000up }, @@ -207,7 +207,7 @@ const struct m68k_opcode m68k_opcodes[] = {"bset", one(0004300), one(0177700), "#bqs", mcf }, {"bsrw", one(0060400), one(0177777), "BW", m68000up | mcf }, -{"bsrl", one(0060777), one(0177777), "BL", m68020up | cpu32 }, +{"bsrl", one(0060777), one(0177777), "BL", m68020up | cpu32 | mcf5407}, {"bsrs", one(0060400), one(0177400), "BB", m68000up | mcf }, {"btst", one(0000400), one(0170700), "Dd;b", m68000up | mcf }, @@ -241,8 +241,7 @@ const struct m68k_opcode m68k_opcodes[] = {"cinvp", one(0xf400|SCOPE_PAGE), one(0xff38), "ceas", m68040up }, {"cpusha", one(0xf420|SCOPE_ALL), one(0xff38), "ce", m68040up }, -{"cpushl", one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up }, -{"cpushl", one(0x04e8), one(0xfff8), "as", mcf }, +{"cpushl", one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up | mcf }, {"cpushp", one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up }, #undef SCOPE_LINE @@ -261,7 +260,9 @@ const struct m68k_opcode m68k_opcodes[] = {"cmpal", one(0130700), one(0170700), "*lAd", m68000up | mcf }, {"cmpib", one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpib", one(0006000), one(0177700), "#bDs", mcf5407 }, {"cmpiw", one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpiw", one(0006100), one(0177700), "#wDs", mcf5407 }, {"cmpil", one(0006200), one(0177700), "#l@s", m68000up }, {"cmpil", one(0006200), one(0177700), "#lDs", mcf }, @@ -271,12 +272,15 @@ const struct m68k_opcode m68k_opcodes[] = /* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */ {"cmpb", one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpb", one(0006000), one(0177700), "#bDs", mcf5407 }, {"cmpb", one(0130410), one(0170770), "+s+d", m68000up }, {"cmpb", one(0130000), one(0170700), ";bDd", m68000up }, +{"cmpb", one(0130000), one(0170700), "*bDd", mcf5407 }, {"cmpw", one(0130300), one(0170700), "*wAd", m68000up }, {"cmpw", one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpw", one(0006100), one(0177700), "#wDs", mcf5407 }, {"cmpw", one(0130510), one(0170770), "+s+d", m68000up }, -{"cmpw", one(0130100), one(0170700), "*wDd", m68000up }, +{"cmpw", one(0130100), one(0170700), "*wDd", m68000up | mcf5407 }, {"cmpl", one(0130700), one(0170700), "*lAd", m68000up | mcf }, {"cmpl", one(0006200), one(0177700), "#l@s", m68000up }, {"cmpl", one(0006200), one(0177700), "#lDs", mcf }, @@ -300,22 +304,22 @@ const struct m68k_opcode m68k_opcodes[] = {"dbvc", one(0054310), one(0177770), "DsBw", m68000up }, {"dbvs", one(0054710), one(0177770), "DsBw", m68000up }, -{"divsw", one(0100700), one(0170700), ";wDd", m68000up }, -{"divsw", one(0100700), one(0170700), "vsDd", mcf5307 | mcf5206e }, +{"divsw", one(0100700), one(0170700), ";wDd", m68000up }, +{"divsw", one(0100700), one(0170700), "vsDd", mcf5307up | mcf5206e }, {"divsl", two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 }, {"divsl", two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 }, -{"divsl", two(0046100,0004000),two(0177700,0107770),"vsDD", mcf5307 | mcf5206e }, +{"divsl", two(0046100,0004000),two(0177700,0107770),"vsDD", mcf5307up | mcf5206e }, {"divsll", two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 }, {"divsll", two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 }, {"divuw", one(0100300), one(0170700), ";wDd", m68000up }, -{"divuw", one(0100300), one(0170700), "vsDd", mcf5307 | mcf5206e }, +{"divuw", one(0100300), one(0170700), "vsDd", mcf5307up | mcf5206e }, {"divul", two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 }, {"divul", two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 }, -{"divul", two(0046100,0000000),two(0177700,0107770),"vsDD", mcf5307 | mcf5206e }, +{"divul", two(0046100,0000000),two(0177700,0107770),"vsDD", mcf5307up | mcf5206e }, {"divull", two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 }, {"divull", two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 }, @@ -1242,43 +1246,43 @@ const struct m68k_opcode m68k_opcodes[] = {"lsrl", one(0160250), one(0170770), "DdDs", m68000up | mcf }, /* FIXME: add MAM mode (`&' after <ea> operand) / remove MACM */ -{"macw", two(0120000, 0000000), two(0170660, 0005400), "uMum", mcf5307 | mcf5206e }, -{"macw", two(0120000, 0001000), two(0170660, 0005400), "uMumMh", mcf5307 | mcf5206e }, -{"macw", two(0120220, 0000000), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e }, -{"macw", two(0120230, 0000000), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e }, -{"macw", two(0120240, 0000000), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e }, -{"macw", two(0120250, 0000000), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e }, -{"macw", two(0120220, 0001000), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e }, -{"macw", two(0120230, 0001000), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e }, -{"macw", two(0120240, 0001000), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e }, -{"macw", two(0120250, 0001000), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e }, -{"macmw", two(0120220, 0000040), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e }, -{"macmw", two(0120230, 0000040), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e }, -{"macmw", two(0120240, 0000040), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e }, -{"macmw", two(0120250, 0000040), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e }, -{"macmw", two(0120220, 0001040), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e }, -{"macmw", two(0120230, 0001040), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e }, -{"macmw", two(0120240, 0001040), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e }, -{"macmw", two(0120250, 0001040), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e }, - -{"macl", two(0120000, 0004000), two(0170660, 0005400), "RsRm", mcf5307 | mcf5206e }, -{"macl", two(0120000, 0005000), two(0170660, 0005400), "RsRmMh", mcf5307 | mcf5206e }, -{"macl", two(0120220, 0004000), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e }, -{"macl", two(0120230, 0004000), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e }, -{"macl", two(0120240, 0004000), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e }, -{"macl", two(0120250, 0004000), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e }, -{"macl", two(0120220, 0005000), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e }, -{"macl", two(0120230, 0005000), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e }, -{"macl", two(0120240, 0005000), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e }, -{"macl", two(0120250, 0005000), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e }, -{"macml", two(0120220, 0004040), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e }, -{"macml", two(0120230, 0004040), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e }, -{"macml", two(0120240, 0004040), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e }, -{"macml", two(0120250, 0004040), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e }, -{"macml", two(0120220, 0005040), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e }, -{"macml", two(0120230, 0005040), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e }, -{"macml", two(0120240, 0005040), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e }, -{"macml", two(0120250, 0005040), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e }, +{"macw", two(0120000, 0000000), two(0170660, 0005400), "uMum", mcf5307up | mcf5206e }, +{"macw", two(0120000, 0001000), two(0170660, 0005400), "uMumMh",mcf5307up | mcf5206e }, +{"macw", two(0120220, 0000000), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e }, +{"macw", two(0120230, 0000000), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e }, +{"macw", two(0120240, 0000000), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e }, +{"macw", two(0120250, 0000000), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e }, +{"macw", two(0120220, 0001000), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e }, +{"macw", two(0120230, 0001000), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e }, +{"macw", two(0120240, 0001000), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e }, +{"macw", two(0120250, 0001000), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e }, +{"macmw", two(0120220, 0000040), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e }, +{"macmw", two(0120230, 0000040), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e }, +{"macmw", two(0120240, 0000040), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e }, +{"macmw", two(0120250, 0000040), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e }, +{"macmw", two(0120220, 0001040), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e }, +{"macmw", two(0120230, 0001040), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e }, +{"macmw", two(0120240, 0001040), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e }, +{"macmw", two(0120250, 0001040), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e }, + +{"macl", two(0120000, 0004000), two(0170660, 0005400), "RsRm", mcf5307up | mcf5206e }, +{"macl", two(0120000, 0005000), two(0170660, 0005400), "RsRmMh", mcf5307up | mcf5206e }, +{"macl", two(0120220, 0004000), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e }, +{"macl", two(0120230, 0004000), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e }, +{"macl", two(0120240, 0004000), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e }, +{"macl", two(0120250, 0004000), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e }, +{"macl", two(0120220, 0005000), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e }, +{"macl", two(0120230, 0005000), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e }, +{"macl", two(0120240, 0005000), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e }, +{"macl", two(0120250, 0005000), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e }, +{"macml", two(0120220, 0004040), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e }, +{"macml", two(0120230, 0004040), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e }, +{"macml", two(0120240, 0004040), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e }, +{"macml", two(0120250, 0004040), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e }, +{"macml", two(0120220, 0005040), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e }, +{"macml", two(0120230, 0005040), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e }, +{"macml", two(0120240, 0005040), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e }, +{"macml", two(0120250, 0005040), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e }, /* NOTE: The mcf5200 family programmer's reference manual does not indicate the byte form of the movea instruction is invalid (as it @@ -1338,11 +1342,13 @@ const struct m68k_opcode m68k_opcodes[] = {"moveb", one(0010000), one(0170000), "ms%d", mcf }, {"moveb", one(0010000), one(0170000), "nspd", mcf }, {"moveb", one(0010000), one(0170000), "obmd", mcf }, +{"moveb", one(0010000), one(0170000), "obnd", mcf5407 }, {"movew", one(0030000), one(0170000), "*w%d", m68000up }, {"movew", one(0030000), one(0170000), "ms%d", mcf }, {"movew", one(0030000), one(0170000), "nspd", mcf }, {"movew", one(0030000), one(0170000), "owmd", mcf }, +{"movew", one(0030000), one(0170000), "ownd", mcf5407 }, {"movew", one(0040300), one(0177700), "Ss$s", m68000up }, {"movew", one(0040300), one(0177770), "SsDs", mcf }, {"movew", one(0041300), one(0177700), "Cs$s", m68010up }, @@ -1359,23 +1365,25 @@ const struct m68k_opcode m68k_opcodes[] = {"movel", one(0020000), one(0170000), "ms%d", mcf }, {"movel", one(0020000), one(0170000), "nspd", mcf }, {"movel", one(0020000), one(0170000), "olmd", mcf }, +{"movel", one(0020000), one(0170000), "olnd", mcf5407 }, {"movel", one(0047140), one(0177770), "AsUd", m68000up }, {"movel", one(0047150), one(0177770), "UdAs", m68000up }, -{"movel", one(0120600), one(0177760), "EsRs", mcf5307 | mcf5206e }, -{"movel", one(0120400), one(0177760), "RsEs", mcf5307 | mcf5206e }, -{"movel", one(0120474), one(0177777), "#lEs", mcf5307 | mcf5206e }, -{"movel", one(0124600), one(0177760), "GsRs", mcf5307 | mcf5206e }, -{"movel", one(0124400), one(0177760), "RsGs", mcf5307 | mcf5206e }, -{"movel", one(0124474), one(0177777), "#lGs", mcf5307 | mcf5206e }, -{"movel", one(0126600), one(0177760), "HsRs", mcf5307 | mcf5206e }, -{"movel", one(0126400), one(0177760), "RsHs", mcf5307 | mcf5206e }, -{"movel", one(0126474), one(0177777), "#lHs", mcf5307 | mcf5206e }, -{"movel", one(0124700), one(0177777), "GsCs", mcf5307 | mcf5206e }, +{"movel", one(0120600), one(0177760), "EsRs", mcf5307up | mcf5206e }, +{"movel", one(0120400), one(0177760), "RsEs", mcf5307up | mcf5206e }, +{"movel", one(0120474), one(0177777), "#lEs", mcf5307up | mcf5206e }, +{"movel", one(0124600), one(0177760), "GsRs", mcf5307up | mcf5206e }, +{"movel", one(0124400), one(0177760), "RsGs", mcf5307up | mcf5206e }, +{"movel", one(0124474), one(0177777), "#lGs", mcf5307up | mcf5206e }, +{"movel", one(0126600), one(0177760), "HsRs", mcf5307up | mcf5206e }, +{"movel", one(0126400), one(0177760), "RsHs", mcf5307up | mcf5206e }, +{"movel", one(0126474), one(0177777), "#lHs", mcf5307up | mcf5206e }, +{"movel", one(0124700), one(0177777), "GsCs", mcf5307up | mcf5206e }, {"move", one(0030000), one(0170000), "*w%d", m68000up }, {"move", one(0030000), one(0170000), "ms%d", mcf }, {"move", one(0030000), one(0170000), "nspd", mcf }, {"move", one(0030000), one(0170000), "owmd", mcf }, +{"move", one(0030000), one(0170000), "ownd", mcf5407 }, {"move", one(0040300), one(0177700), "Ss$s", m68000up }, {"move", one(0040300), one(0177770), "SsDs", mcf }, {"move", one(0041300), one(0177700), "Cs$s", m68010up }, @@ -1390,6 +1398,12 @@ const struct m68k_opcode m68k_opcodes[] = {"move", one(0047140), one(0177770), "AsUd", m68000up }, {"move", one(0047150), one(0177770), "UdAs", m68000up }, +{"mov3ql", one(0120500), one(0170700), "Qd%s", mcf5407 }, +{"mvsb", one(0070400), one(0170700), "*bDd", mcf5407 }, +{"mvsw", one(0070500), one(0170700), "*wDd", mcf5407 }, +{"mvzb", one(0070600), one(0170700), "*bDd", mcf5407 }, +{"mvzw", one(0070700), one(0170700), "*wDd", mcf5407 }, + {"movesb", two(0007000, 0), two(0177700, 07777), "~sR1", m68010up }, {"movesb", two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up }, {"movesw", two(0007100, 0), two(0177700, 07777), "~sR1", m68010up }, @@ -1404,43 +1418,43 @@ const struct m68k_opcode m68k_opcodes[] = {"move16", one(0xf618), one(0xfff8), "_Las", m68040up }, /* FIXME: add MAM mode (`&' after <ea> operand) / remove MSACM */ -{"msacw", two(0120000, 0000400), two(0170660, 0005400), "uMum", mcf5307 | mcf5206e }, -{"msacw", two(0120000, 0001400), two(0170660, 0005400), "uMumMh", mcf5307 | mcf5206e }, -{"msacw", two(0120220, 0000400), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e }, -{"msacw", two(0120230, 0000400), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e }, -{"msacw", two(0120240, 0000400), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e }, -{"msacw", two(0120250, 0000400), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e }, -{"msacw", two(0120220, 0001400), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e }, -{"msacw", two(0120230, 0001400), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e }, -{"msacw", two(0120240, 0001400), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e }, -{"msacw", two(0120250, 0001400), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120220, 0000440), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120230, 0000440), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120240, 0000440), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120250, 0000440), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120220, 0001440), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120230, 0001440), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120240, 0001440), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e }, -{"msacmw", two(0120250, 0001440), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e }, - -{"msacl", two(0120000, 0004400), two(0170660, 0005400), "RsRm", mcf5307 | mcf5206e }, -{"msacl", two(0120000, 0005400), two(0170660, 0005400), "RsRmMh", mcf5307 | mcf5206e }, -{"msacl", two(0120220, 0004400), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e }, -{"msacl", two(0120230, 0004400), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e }, -{"msacl", two(0120240, 0004400), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e }, -{"msacl", two(0120250, 0004400), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e }, -{"msacl", two(0120220, 0005400), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e }, -{"msacl", two(0120230, 0005400), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e }, -{"msacl", two(0120240, 0005400), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e }, -{"msacl", two(0120250, 0005400), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e }, -{"msacml", two(0120220, 0004440), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e }, -{"msacml", two(0120230, 0004440), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e }, -{"msacml", two(0120240, 0004440), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e }, -{"msacml", two(0120250, 0004440), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e }, -{"msacml", two(0120220, 0005440), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e }, -{"msacml", two(0120230, 0005440), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e }, -{"msacml", two(0120240, 0005440), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e }, -{"msacml", two(0120250, 0005440), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e }, +{"msacw", two(0120000, 0000400), two(0170660, 0005400), "uMum", mcf5307up | mcf5206e }, +{"msacw", two(0120000, 0001400), two(0170660, 0005400), "uMumMh", mcf5307up | mcf5206e }, +{"msacw", two(0120220, 0000400), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e }, +{"msacw", two(0120230, 0000400), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e }, +{"msacw", two(0120240, 0000400), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e }, +{"msacw", two(0120250, 0000400), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e }, +{"msacw", two(0120220, 0001400), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e }, +{"msacw", two(0120230, 0001400), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e }, +{"msacw", two(0120240, 0001400), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e }, +{"msacw", two(0120250, 0001400), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120220, 0000440), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120230, 0000440), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120240, 0000440), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120250, 0000440), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120220, 0001440), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120230, 0001440), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120240, 0001440), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e }, +{"msacmw", two(0120250, 0001440), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e }, + +{"msacl", two(0120000, 0004400), two(0170660, 0005400), "RsRm", mcf5307up | mcf5206e }, +{"msacl", two(0120000, 0005400), two(0170660, 0005400), "RsRmMh", mcf5307up | mcf5206e }, +{"msacl", two(0120220, 0004400), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e }, +{"msacl", two(0120230, 0004400), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e }, +{"msacl", two(0120240, 0004400), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e }, +{"msacl", two(0120250, 0004400), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e }, +{"msacl", two(0120220, 0005400), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e }, +{"msacl", two(0120230, 0005400), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e }, +{"msacl", two(0120240, 0005400), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e }, +{"msacl", two(0120250, 0005400), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e }, +{"msacml", two(0120220, 0004440), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e }, +{"msacml", two(0120230, 0004440), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e }, +{"msacml", two(0120240, 0004440), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e }, +{"msacml", two(0120250, 0004440), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e }, +{"msacml", two(0120220, 0005440), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e }, +{"msacml", two(0120230, 0005440), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e }, +{"msacml", two(0120240, 0005440), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e }, +{"msacml", two(0120250, 0005440), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e }, {"mulsw", one(0140700), one(0170700), ";wDd", m68000up|mcf }, {"mulsl", two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 }, @@ -1717,8 +1731,8 @@ const struct m68k_opcode m68k_opcodes[] = {"pvalid", two(0xf000, 0x2c00), two(0xffc0, 0xfff8), "A3&s", m68851 }, /* FIXME: don't allow Dw==Dx. */ -{"remsl", two(0x4c40, 0x0800), two(0xffc0, 0x8ff8), "vsD3D1", mcf5307 | mcf5206e }, -{"remul", two(0x4c40, 0x0000), two(0xffc0, 0x8ff8), "vsD3D1", mcf5307 | mcf5206e }, +{"remsl", two(0x4c40, 0x0800), two(0xffc0, 0x8ff8), "vsD3D1", mcf5307up | mcf5206e }, +{"remul", two(0x4c40, 0x0000), two(0xffc0, 0x8ff8), "vsD3D1", mcf5307up | mcf5206e }, {"reset", one(0047160), one(0177777), "", m68000up }, @@ -1756,18 +1770,19 @@ const struct m68k_opcode m68k_opcodes[] = {"rtd", one(0047164), one(0177777), "#w", m68010up }, -{"rte", one(0047163), one(0177777), "", m68000up|mcf }, +{"rte", one(0047163), one(0177777), "", m68000up | mcf }, {"rtm", one(0003300), one(0177760), "Rs", m68020 }, {"rtr", one(0047167), one(0177777), "", m68000up }, -{"rts", one(0047165), one(0177777), "", m68000up|mcf }, +{"rts", one(0047165), one(0177777), "", m68000up | mcf }, + +{"satsl", one(0046200), one(0177770), "Ds", mcf5407 }, {"sbcd", one(0100400), one(0170770), "DsDd", m68000up }, {"sbcd", one(0100410), one(0170770), "-s-d", m68000up }, - {"scc", one(0052300), one(0177700), "$s", m68000up }, {"scc", one(0052300), one(0177700), "Ds", mcf }, {"scs", one(0052700), one(0177700), "$s", m68000up }, @@ -1850,7 +1865,7 @@ const struct m68k_opcode m68k_opcodes[] = {"swbeg", one(0045374), one(0177777), "#w", m68000up | mcf }, {"swbegl", one(0045375), one(0177777), "#l", m68000up | mcf }, -{"tas", one(0045300), one(0177700), "$s", m68000up }, +{"tas", one(0045300), one(0177700), "$s", m68000up | mcf5407}, #define TBL1(name,signed,round,size) \ {name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)|0000400), \ @@ -2089,6 +2104,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] = { "ror", "rorw", }, { "roxl", "roxlw", }, { "roxr", "roxrw", }, + { "sats", "satsl", }, { "sbcdb", "sbcd", }, { "sccb", "scc", }, { "scsb", "scs", }, @@ -2150,6 +2166,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] = { "movsb", "movesb", }, { "movsl", "movesl", }, { "movsw", "movesw", }, + { "mov3q", "mov3ql", }, { "tdivul", "divul", }, /* for m68k-svr4 */ { "fmovb", "fmoveb", }, |