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| author | H.J. Lu <hjl.tools@gmail.com> | 2020-06-26 09:24:19 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-06-26 09:24:19 -0700 |
| commit | e978ad62496d42e20f1b06d5f6a78c67e55b21f9 (patch) | |
| tree | dc4b704d1f20aa116f2b960721fbbb95fd5a0a91 /opcodes | |
| parent | 79b32e73d86f5ba25f8ad6ee2bf13b7048f3db1a (diff) | |
| download | fsf-binutils-gdb-e978ad62496d42e20f1b06d5f6a78c67e55b21f9.zip fsf-binutils-gdb-e978ad62496d42e20f1b06d5f6a78c67e55b21f9.tar.gz fsf-binutils-gdb-e978ad62496d42e20f1b06d5f6a78c67e55b21f9.tar.bz2 | |
i386-opc.tbl: Add a blank line
* i386-opc.tbl: Add a blank line.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/i386-opc.tbl | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 80d553e..17806b4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,9 @@ 2020-06-26 H.J. Lu <hongjiu.lu@intel.com> + * i386-opc.tbl: Add a blank line. + +2020-06-26 H.J. Lu <hongjiu.lu@intel.com> + * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB. (VecSIB128): Renamed to ... (VECSIB128): This. diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 3551f12..ded9688 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -84,6 +84,7 @@ #define Vex128 Vex=VEX128 #define Vex256 Vex=VEX256 #define VexLIG Vex=VEXScalar + #define VecSIB128 SIB=VECSIB128 #define VecSIB256 SIB=VECSIB256 #define VecSIB512 SIB=VECSIB512 |