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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-06-02 12:35:21 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2015-06-02 12:37:33 +0100 |
| commit | d6b4b13ed2859a1eafd6c94c0dc64b20fdbde1ba (patch) | |
| tree | 5d05a686dd55beaa2abf51922d168d31e23e11eb /opcodes | |
| parent | ddfded2f7bba485d6c967b502337a72310f24913 (diff) | |
| download | fsf-binutils-gdb-d6b4b13ed2859a1eafd6c94c0dc64b20fdbde1ba.zip fsf-binutils-gdb-d6b4b13ed2859a1eafd6c94c0dc64b20fdbde1ba.tar.gz fsf-binutils-gdb-d6b4b13ed2859a1eafd6c94c0dc64b20fdbde1ba.tar.bz2 | |
[ARM] Support for ARMv8.1 Adv.SIMD extension
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/arm-dis.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 3e1315f..e9f4425 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1194,6 +1194,12 @@ static const struct opcode32 neon_opcodes[] = {ARM_FEATURE_COPROC (FPU_NEON_EXT_V1), 0xf2000a10, 0xfe800f10, "vpmin%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"}, + {ARM_FEATURE_COPROC (FPU_NEON_EXT_RDMA), + 0xf3000b10, 0xff800f10, + "vqrdmlah%c.s%20-21S6\t%12-15,22R, %16-19,7R, %0-3,5R"}, + {ARM_FEATURE_COPROC (FPU_NEON_EXT_RDMA), + 0xf3000c10, 0xff800f10, + "vqrdmlsh%c.s%20-21S6\t%12-15,22R, %16-19,7R, %0-3,5R"}, /* One register and an immediate value. */ {ARM_FEATURE_COPROC (FPU_NEON_EXT_V1), @@ -1447,6 +1453,19 @@ static const struct opcode32 neon_opcodes[] = {ARM_FEATURE_COPROC (FPU_NEON_EXT_V1), 0xf2800a40, 0xfe800f50, "vmull%c.%24?us%20-21S6\t%12-15,22Q, %16-19,7D, %D"}, + {ARM_FEATURE_COPROC (FPU_NEON_EXT_RDMA), + 0xf2800e40, 0xff800f50, + "vqrdmlah%c.s%20-21S6\t%12-15,22D, %16-19,7D, %D"}, + {ARM_FEATURE_COPROC (FPU_NEON_EXT_RDMA), + 0xf2800f40, 0xff800f50, + "vqrdmlsh%c.s%20-21S6\t%12-15,22D, %16-19,7D, %D"}, + {ARM_FEATURE_COPROC (FPU_NEON_EXT_RDMA), + 0xf3800e40, 0xff800f50, + "vqrdmlah%c.s%20-21S6\t%12-15,22Q, %16-19,7Q, %D"}, + {ARM_FEATURE_COPROC (FPU_NEON_EXT_RDMA), + 0xf3800f40, 0xff800f50, + "vqrdmlsh%c.s%20-21S6\t%12-15,22Q, %16-19,7Q, %D" + }, /* Element and structure load/store. */ {ARM_FEATURE_COPROC (FPU_NEON_EXT_V1), |