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| author | Jan Beulich <jbeulich@novell.com> | 2018-03-28 14:22:00 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2018-03-28 14:22:00 +0200 |
| commit | 9646c87b5a6c0462e8a9b6305d9e449bd099f19d (patch) | |
| tree | 9a4114863abfce657a7031e7d4212cc0a99c306a /opcodes | |
| parent | f8745e1cd139b5c6a5bd8a30ea84ccbd45dec81c (diff) | |
| download | fsf-binutils-gdb-9646c87b5a6c0462e8a9b6305d9e449bd099f19d.zip fsf-binutils-gdb-9646c87b5a6c0462e8a9b6305d9e449bd099f19d.tar.gz fsf-binutils-gdb-9646c87b5a6c0462e8a9b6305d9e449bd099f19d.tar.bz2 | |
x86: don't show suffixes for to-scalar-int conversion insns
In the course of folding their patterns (possible now that the pointless
and partly even bogus VecESize are no longer in the way) I've noticed
that vcvt*2usi, other than their vcvt*2si counterparts, don't allow for
any suffixes. As that is supposedly intentional, make the disassembler
consistently omit suffixes for all to-scalar-int conversion insns.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 38 |
2 files changed, 20 insertions, 24 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 584aeb8..b156456 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2018-03-28 Jan Beulich <jbeulich@suse.com> + + * i386-dis.c (prefix_table): Drop Y for cvt*2si. + (vex_len_table): Drop Y for vcvt*2si. + (putop): Replace plain 'Y' handling by abort(). + 2018-03-28 Nick Clifton <nickc@redhat.com> PR 22988 diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index d8a6db3..e5791c9 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -2536,8 +2536,7 @@ struct dis386 { prefix and behave as 'S' otherwise 'W' => print 'b', 'w' or 'l' ('d' in Intel mode) 'X' => print 's', 'd' depending on data16 prefix (for XMM) - 'Y' => 'q' if instruction has an REX 64bit overwrite prefix and - suffix_always is true. + 'Y' unused. 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise '!' => change condition from true to false or from false to true. '%' => add 1 upper case letter to the macro. @@ -3925,17 +3924,17 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_0F2C */ { { "cvttps2pi", { MXC, EXq }, PREFIX_OPCODE }, - { "cvttss2siY", { Gv, EXd }, PREFIX_OPCODE }, + { "cvttss2si", { Gv, EXd }, PREFIX_OPCODE }, { "cvttpd2pi", { MXC, EXx }, PREFIX_OPCODE }, - { "cvttsd2siY", { Gv, EXq }, PREFIX_OPCODE }, + { "cvttsd2si", { Gv, EXq }, PREFIX_OPCODE }, }, /* PREFIX_0F2D */ { { "cvtps2pi", { MXC, EXq }, PREFIX_OPCODE }, - { "cvtss2siY", { Gv, EXd }, PREFIX_OPCODE }, + { "cvtss2si", { Gv, EXd }, PREFIX_OPCODE }, { "cvtpd2pi", { MXC, EXx }, PREFIX_OPCODE }, - { "cvtsd2siY", { Gv, EXq }, PREFIX_OPCODE }, + { "cvtsd2si", { Gv, EXq }, PREFIX_OPCODE }, }, /* PREFIX_0F2E */ @@ -9547,26 +9546,26 @@ static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0F2C_P_1 */ { - { "vcvttss2siY", { Gv, EXdScalar }, 0 }, - { "vcvttss2siY", { Gv, EXdScalar }, 0 }, + { "vcvttss2si", { Gv, EXdScalar }, 0 }, + { "vcvttss2si", { Gv, EXdScalar }, 0 }, }, /* VEX_LEN_0F2C_P_3 */ { - { "vcvttsd2siY", { Gv, EXqScalar }, 0 }, - { "vcvttsd2siY", { Gv, EXqScalar }, 0 }, + { "vcvttsd2si", { Gv, EXqScalar }, 0 }, + { "vcvttsd2si", { Gv, EXqScalar }, 0 }, }, /* VEX_LEN_0F2D_P_1 */ { - { "vcvtss2siY", { Gv, EXdScalar }, 0 }, - { "vcvtss2siY", { Gv, EXdScalar }, 0 }, + { "vcvtss2si", { Gv, EXdScalar }, 0 }, + { "vcvtss2si", { Gv, EXdScalar }, 0 }, }, /* VEX_LEN_0F2D_P_3 */ { - { "vcvtsd2siY", { Gv, EXqScalar }, 0 }, - { "vcvtsd2siY", { Gv, EXqScalar }, 0 }, + { "vcvtsd2si", { Gv, EXqScalar }, 0 }, + { "vcvtsd2si", { Gv, EXqScalar }, 0 }, }, /* VEX_LEN_0F2E_P_0 */ @@ -14414,16 +14413,7 @@ case_S: break; case 'Y': if (l == 0 && len == 1) - { - if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS)) - break; - if (rex & REX_W) - { - USED_REX (REX_W); - *obufp++ = 'q'; - } - break; - } + abort (); else { if (l != 1 || len != 2 || last[0] != 'X') |