diff options
author | Kazu Hirata <kazu@codesourcery.com> | 2001-08-13 08:09:58 +0000 |
---|---|---|
committer | Kazu Hirata <kazu@codesourcery.com> | 2001-08-13 08:09:58 +0000 |
commit | 7f6621cdd77983f544f331528e249bb5f4238953 (patch) | |
tree | 6463ce73d03ec44f51498c788ccdec51e341e875 /opcodes | |
parent | 198ce79b6b8e11c56a270eb3686574b87b0e7c75 (diff) | |
download | fsf-binutils-gdb-7f6621cdd77983f544f331528e249bb5f4238953.zip fsf-binutils-gdb-7f6621cdd77983f544f331528e249bb5f4238953.tar.gz fsf-binutils-gdb-7f6621cdd77983f544f331528e249bb5f4238953.tar.bz2 |
* mcore-dis.c: Fix formatting.
* mips-dis.c: Likewise.
* pj-dis.c: Likewise.
* z8k-dis.c: Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 7 | ||||
-rw-r--r-- | opcodes/mcore-dis.c | 86 | ||||
-rw-r--r-- | opcodes/mips-dis.c | 79 | ||||
-rw-r--r-- | opcodes/pj-dis.c | 16 | ||||
-rw-r--r-- | opcodes/z8k-dis.c | 48 |
5 files changed, 119 insertions, 117 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index bd51464..2077b0a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2001-08-13 Kazu Hirata <kazu@hxi.com> + + * mcore-dis.c: Fix formatting. + * mips-dis.c: Likewise. + * pj-dis.c: Likewise. + * z8k-dis.c: Likewise. + 2001-08-12 Richard Henderson <rth@redhat.com> * cgen-ibld.in (extract_normal): Match type of VALUE and MASK diff --git a/opcodes/mcore-dis.c b/opcodes/mcore-dis.c index bbf0f97..ad45318 100644 --- a/opcodes/mcore-dis.c +++ b/opcodes/mcore-dis.c @@ -24,8 +24,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "dis-asm.h" /* Mask for each mcore_opclass: */ -static const unsigned short imsk[] = -{ +static const unsigned short imsk[] = { /* O0 */ 0xFFFF, /* OT */ 0xFFFC, /* O1 */ 0xFFF0, @@ -34,7 +33,7 @@ static const unsigned short imsk[] = /* X1 */ 0xFFF0, /* OI */ 0xFE00, /* OB */ 0xFE00, - + /* OMa */ 0xFFF0, /* SI */ 0xFE00, /* I7 */ 0xF800, @@ -43,7 +42,7 @@ static const unsigned short imsk[] = /* BL */ 0xFF00, /* LR */ 0xF000, /* LJ */ 0xFF00, - + /* RM */ 0xFFF0, /* RQ */ 0xFFF0, /* JSR */ 0xFFF0, @@ -52,33 +51,31 @@ static const unsigned short imsk[] = /* OBRb*/ 0xFF80, /* OBRc*/ 0xFF00, /* OBR2*/ 0xFE00, - + /* O1R1*/ 0xFFF0, /* OMb */ 0xFF80, /* OMc */ 0xFF00, /* SIa */ 0xFE00, - /* MULSH */ 0xFF00, + /* MULSH */ 0xFF00, /* OPSR */ 0xFFF8, /* psrset/psrclr */ - + /* JC */ 0, /* JC,JU,JL don't appear in object */ /* JU */ 0, /* JL */ 0, /* RSI */ 0, /* DO21*/ 0, - /* OB2 */ 0 /* OB2 won't appear in object. */ + /* OB2 */ 0 /* OB2 won't appear in object. */ }; -static const char * grname[] = -{ +static const char *grname[] = { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" }; static const char X[] = "??"; -static const char * crname[] = -{ +static const char *crname[] = { "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1", "ss2", "ss3", "ss4", "gcr", "gsr", X, X, X, X, X, X, X, X, X, X, X, @@ -87,10 +84,10 @@ static const char * crname[] = static const unsigned isiz[] = { 2, 0, 1, 0 }; -int +int print_insn_mcore (memaddr, info) bfd_vma memaddr; - struct disassemble_info * info; + struct disassemble_info *info; { unsigned char ibytes[4]; fprintf_ftype fprintf = info->fprintf_func; @@ -103,7 +100,7 @@ print_insn_mcore (memaddr, info) status = info->read_memory_func (memaddr, ibytes, 2, info); - if (status != 0) + if (status != 0) { info->memory_error_func (status, memaddr, info); return -1; @@ -117,7 +114,7 @@ print_insn_mcore (memaddr, info) abort (); /* Just a linear search of the table. */ - for (op = mcore_table; op->name != 0; op ++) + for (op = mcore_table; op->name != 0; op++) if (op->inst == (inst & imsk[op->opclass])) break; @@ -125,10 +122,10 @@ print_insn_mcore (memaddr, info) fprintf (stream, ".short 0x%04x", inst); else { - const char * name = grname[inst & 0x0F]; - + const char *name = grname[inst & 0x0F]; + fprintf (stream, "%s", op->name); - + switch (op->opclass) { case O0: break; @@ -157,21 +154,21 @@ print_insn_mcore (memaddr, info) case LS: fprintf (stream, "\t%s, (%s, %d)", grname[(inst >> 8) & 0xF], name, ((inst >> 4) & 0xF) << isiz[(inst >> 13) & 3]); break; - + case BR: { long val = inst & 0x3FF; - + if (inst & 0x400) val |= 0xFFFFFC00; - - fprintf (stream, "\t0x%x", memaddr + 2 + (val<<1)); - + + fprintf (stream, "\t0x%x", memaddr + 2 + (val << 1)); + if (strcmp (op->name, "bsr") == 0) { /* For bsr, we'll try to get a symbol for the target. */ val = memaddr + 2 + (val << 1); - + if (info->print_address_func && val != 0) { fprintf (stream, "\t// "); @@ -180,36 +177,36 @@ print_insn_mcore (memaddr, info) } } break; - + case BL: { long val; val = (inst & 0x000F); fprintf (stream, "\t%s, 0x%x", - grname[(inst >> 4) & 0xF], memaddr - (val << 1)); + grname[(inst >> 4) & 0xF], memaddr - (val << 1)); } break; - + case LR: { unsigned long val; - + val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC; - + status = info->read_memory_func (val, ibytes, 4, info); - if (status != 0) + if (status != 0) { info->memory_error_func (status, memaddr, info); break; } - + if (info->endian == BFD_ENDIAN_LITTLE) val = (ibytes[3] << 24) | (ibytes[2] << 16) | (ibytes[1] << 8) | (ibytes[0]); else val = (ibytes[0] << 24) | (ibytes[1] << 16) | (ibytes[2] << 8) | (ibytes[3]); - + /* Removed [] around literal value to match ABI syntax 12/95. */ fprintf (stream, "\t%s, 0x%X", grname[(inst >> 8) & 0xF], val); @@ -218,15 +215,15 @@ print_insn_mcore (memaddr, info) (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); } break; - + case LJ: { unsigned long val; - + val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC; - + status = info->read_memory_func (val, ibytes, 4, info); - if (status != 0) + if (status != 0) { info->memory_error_func (status, memaddr, info); break; @@ -238,7 +235,7 @@ print_insn_mcore (memaddr, info) else val = (ibytes[0] << 24) | (ibytes[1] << 16) | (ibytes[2] << 8) | (ibytes[3]); - + /* Removed [] around literal value to match ABI syntax 12/95. */ fprintf (stream, "\t0x%X", val); /* For jmpi/jsri, we'll try to get a symbol for the target. */ @@ -254,26 +251,25 @@ print_insn_mcore (memaddr, info) } } break; - + case OPSR: { - static char * fields[] = - { - "af", "ie", "fe", "fe,ie", + static char *fields[] = { + "af", "ie", "fe", "fe,ie", "ee", "ee,ie", "ee,fe", "ee,fe,ie" }; - + fprintf (stream, "\t%s", fields[inst & 0x7]); } break; - + default: /* If the disassembler lags the instruction set. */ fprintf (stream, "\tundecoded operands, inst is 0x%04x", inst); break; } } - + /* Say how many bytes we consumed. */ return 2; } diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index eb18ff8..36d80ae 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -28,7 +28,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* FIXME: These are needed to figure out if the code is mips16 or not. The low bit of the address is often a good indicator. No symbol table is available when this code runs out in an embedded - system as when it is used for disassembler support in a monitor. */ + system as when it is used for disassembler support in a monitor. */ #if !defined(EMBEDDED_ENV) #define SYMTAB_AVAILABLE 1 @@ -54,13 +54,11 @@ static void print_mips16_insn_arg /* FIXME: These should be shared with gdb somehow. */ /* The mips16 register names. */ -static const char * const mips16_reg_names[] = -{ +static const char * const mips16_reg_names[] = { "s0", "s1", "v0", "v1", "a0", "a1", "a2", "a3" }; -static const char * const mips32_reg_names[] = -{ +static const char * const mips32_reg_names[] = { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", @@ -74,8 +72,7 @@ static const char * const mips32_reg_names[] = "epc", "prid" }; -static const char * const mips64_reg_names[] = -{ +static const char * const mips64_reg_names[] = { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", @@ -93,7 +90,7 @@ static const char * const mips64_reg_names[] = table to use. */ static const char * const *reg_names = NULL; -/* Print insn arguments for 32/64-bit code */ +/* Print insn arguments for 32/64-bit code. */ static void print_insn_arg (d, l, pc, info) @@ -129,10 +126,10 @@ print_insn_arg (d, l, pc, info) case 'i': case 'u': (*info->fprintf_func) (info->stream, "0x%x", - (l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE); + (l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE); break; - case 'j': /* same as i, but sign-extended */ + case 'j': /* Same as i, but sign-extended. */ case 'o': delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA; if (delta & 0x8000) @@ -155,13 +152,13 @@ print_insn_arg (d, l, pc, info) case 'a': (*info->print_address_func) - ((((pc + 4) & ~ (bfd_vma) 0x0fffffff) + ((((pc + 4) & ~(bfd_vma) 0x0fffffff) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)), info); break; case 'p': - /* sign extend the displacement */ + /* Sign extend the displacement. */ delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA; if (delta & 0x8000) delta |= ~0xffff; @@ -177,25 +174,25 @@ print_insn_arg (d, l, pc, info) case 'U': { - /* First check for both rd and rt being equal. */ - unsigned int reg = (l >> OP_SH_RD) & OP_MASK_RD; - if (reg == ((l >> OP_SH_RT) & OP_MASK_RT)) - (*info->fprintf_func) (info->stream, "%s", - reg_names[reg]); - else - { - /* If one is zero use the other. */ - if (reg == 0) - (*info->fprintf_func) (info->stream, "%s", - reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); - else if (((l >> OP_SH_RT) & OP_MASK_RT) == 0) - (*info->fprintf_func) (info->stream, "%s", - reg_names[reg]); - else /* Bogus, result depends on processor. */ - (*info->fprintf_func) (info->stream, "%s or %s", - reg_names[reg], - reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); - } + /* First check for both rd and rt being equal. */ + unsigned int reg = (l >> OP_SH_RD) & OP_MASK_RD; + if (reg == ((l >> OP_SH_RT) & OP_MASK_RT)) + (*info->fprintf_func) (info->stream, "%s", + reg_names[reg]); + else + { + /* If one is zero use the other. */ + if (reg == 0) + (*info->fprintf_func) (info->stream, "%s", + reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); + else if (((l >> OP_SH_RT) & OP_MASK_RT) == 0) + (*info->fprintf_func) (info->stream, "%s", + reg_names[reg]); + else /* Bogus, result depends on processor. */ + (*info->fprintf_func) (info->stream, "%s or %s", + reg_names[reg], + reg_names[(l >> OP_SH_RT) & OP_MASK_RT]); + } } break; @@ -294,7 +291,7 @@ print_insn_arg (d, l, pc, info) } } -/* Figure out the MIPS ISA and CPU based on the machine number. */ +/* Figure out the MIPS ISA and CPU based on the machine number. */ static void mips_isa_type (mach, isa, cputype) @@ -398,7 +395,7 @@ mips_isa_type (mach, isa, cputype) /* Check if the object uses NewABI conventions. */ static int -is_newabi(header) +is_newabi (header) Elf_Internal_Ehdr *header; { if ((header->e_flags @@ -443,7 +440,7 @@ print_insn_mips (memaddr, word, info) break; } } - } + } init = 1; } @@ -477,9 +474,9 @@ print_insn_mips (memaddr, word, info) d = op->args; if (d != NULL && *d != '\0') { - (*info->fprintf_func) (info->stream, "\t"); + (*info->fprintf_func) (info->stream, "\t"); for (; *d != '\0'; d++) - print_insn_arg (d, word, memaddr, info); + print_insn_arg (d, word, memaddr, info); } return INSNLEN; @@ -530,8 +527,8 @@ _print_insn_mips (memaddr, info, endianness) { Elf_Internal_Ehdr *header; - header = elf_elfheader(bfd_asymbol_bfd(*(info->symbols))); - if (is_newabi(header)) + header = elf_elfheader (bfd_asymbol_bfd (*(info->symbols))); + if (is_newabi (header)) reg_names = mips64_reg_names; } @@ -541,7 +538,7 @@ _print_insn_mips (memaddr, info, endianness) unsigned long insn; if (endianness == BFD_ENDIAN_BIG) - insn = (unsigned long) bfd_getb32 (buffer); + insn = (unsigned long) bfd_getb32 (buffer); else insn = (unsigned long) bfd_getl32 (buffer); @@ -791,7 +788,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info) case 'X': (*info->fprintf_func) (info->stream, "%s", mips32_reg_names[((l >> MIPS16OP_SH_REGR32) - & MIPS16OP_MASK_REGR32)]); + & MIPS16OP_MASK_REGR32)]); break; case 'Y': @@ -1051,7 +1048,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info) baseaddr = memaddr - 2; } } - val = (baseaddr & ~ ((1 << shift) - 1)) + immed; + val = (baseaddr & ~((1 << shift) - 1)) + immed; (*info->print_address_func) (val, info); info->target = val; } diff --git a/opcodes/pj-dis.c b/opcodes/pj-dis.c index 1f486cc..d46c5f9 100644 --- a/opcodes/pj-dis.c +++ b/opcodes/pj-dis.c @@ -1,5 +1,5 @@ /* pj-dis.c -- Disassemble picoJava instructions. - Copyright 1999, 2000 Free Software Foundation, Inc. + Copyright 1999, 2000, 2001 Free Software Foundation, Inc. Contributed by Steve Chamberlain, of Transmeta (sac@pobox.com). This program is free software; you can redistribute it and/or modify @@ -33,10 +33,10 @@ get_int (memaddr, iptr, info) int status = info->read_memory_func (memaddr, ival, 4, info); - *iptr = (ival[0] << 24) - | (ival[1] << 16) - | (ival[2] << 8) - | (ival[3] << 0) ; + *iptr = (ival[0] << 24) + | (ival[1] << 16) + | (ival[2] << 8) + | (ival[3] << 0); return status; } @@ -72,7 +72,7 @@ print_insn_pj (addr, info) fprintf_fn (stream, "%s", op->name); /* The tableswitch instruction is followed by the default - address, low value, high value and the destinations. */ + address, low value, high value and the destinations. */ if (strcmp (op->name, "tableswitch") == 0) { @@ -111,8 +111,8 @@ print_insn_pj (addr, info) /* The lookupswitch instruction is followed by the default address, element count and pairs of values and - addresses. */ - + addresses. */ + if (strcmp (op->name, "lookupswitch") == 0) { int count; diff --git a/opcodes/z8k-dis.c b/opcodes/z8k-dis.c index acbe5d4..754540f 100644 --- a/opcodes/z8k-dis.c +++ b/opcodes/z8k-dis.c @@ -1,5 +1,5 @@ /* Disassemble z8000 code. - Copyright 1992, 1993, 1998, 2000 + Copyright 1992, 1993, 1998, 2000, 2001 Free Software Foundation, Inc. This file is part of GNU Binutils. @@ -269,7 +269,6 @@ z8k_lookup_instr (nibbles, info) tabl_index++; } return -1; - } static void @@ -334,22 +333,22 @@ unpack_instr (instr_data, is_segmented, info) switch (datum_value) { case ARG_DISP16: - instr_data->displacement = instr_data->insn_start + 4 + - (signed short) (instr_word & 0xffff); + instr_data->displacement = instr_data->insn_start + 4 + + (signed short) (instr_word & 0xffff); nibl_count += 3; break; case ARG_DISP12: - if (instr_word & 0x800) + if (instr_word & 0x800) { /* neg. 12 bit displacement */ instr_data->displacement = instr_data->insn_start + 2 - (signed short) ((instr_word & 0xfff) | 0xf000) * 2; } - else + else { instr_data->displacement = instr_data->insn_start + 2 - (instr_word & 0x0fff) * 2; - } + } nibl_count += 2; break; default: @@ -411,15 +410,15 @@ unpack_instr (instr_data, is_segmented, info) FETCH_DATA (info, nibl_count + 8); instr_long = (instr_data->words[nibl_count] << 16) | (instr_data->words[nibl_count + 4]); - instr_data->address = ((instr_word & 0x7f00) << 8) + - (instr_long & 0xffff); + instr_data->address = ((instr_word & 0x7f00) << 8) + + (instr_long & 0xffff); nibl_count += 7; - seg_length = 2; + seg_length = 2; } else { - instr_data->address = ((instr_word & 0x7f00) << 8) + - (instr_word & 0x00ff); + instr_data->address = ((instr_word & 0x7f00) << 8) + + (instr_word & 0x00ff); nibl_count += 3; } } @@ -434,11 +433,13 @@ unpack_instr (instr_data, is_segmented, info) instr_data->ctrl_code = instr_nibl & 0x7; break; case CLASS_0DISP7: - instr_data->displacement = instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2; + instr_data->displacement = + instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2; nibl_count += 1; break; case CLASS_1DISP7: - instr_data->displacement = instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2; + instr_data->displacement = + instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2; nibl_count += 1; break; case CLASS_01II: @@ -459,12 +460,13 @@ unpack_instr (instr_data, is_segmented, info) case CLASS_REGN0: instr_data->arg_reg[datum_value] = instr_nibl; break; - case CLASS_DISP8: - instr_data->displacement = instr_data->insn_start + 2 + (signed char)instr_byte * 2; + case CLASS_DISP8: + instr_data->displacement = + instr_data->insn_start + 2 + (signed char) instr_byte * 2; nibl_count += 1; - break; + break; default: - abort (); + abort (); break; } @@ -566,14 +568,14 @@ unparse_instr (instr_data, is_segmented) strcat (out_str, tmp_str); break; case CLASS_PR: - if (is_segmented) - sprintf (tmp_str, "rr%ld", instr_data->arg_reg[datum_value]); - else - sprintf (tmp_str, "r%ld", instr_data->arg_reg[datum_value]); + if (is_segmented) + sprintf (tmp_str, "rr%ld", instr_data->arg_reg[datum_value]); + else + sprintf (tmp_str, "r%ld", instr_data->arg_reg[datum_value]); strcat (out_str, tmp_str); break; default: - abort (); + abort (); break; } } |