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authorNick Clifton <nickc@redhat.com>2011-12-15 10:21:51 +0000
committerNick Clifton <nickc@redhat.com>2011-12-15 10:21:51 +0000
commit5011093dd0015bc0eaff522b4e0a18250725d4b4 (patch)
treeda04ec25c27553e8690c4029cb23fea59cdb2f9c /opcodes
parent370a075d4837b62334a012279faaa95cf8028f51 (diff)
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* frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
hosts. * cgen-asm.c (cgen_parse_signed_integer): Add code to handle the sign extension of negative values on a 64-bit host. * frv-asm.c: Regenerate. * gas/frv/immediates.s: New test file - checks assembly of constant values. * gas/frv/immediates.d: Expected disassmbly. * gas/frv/allinsn.exp: Run the new test.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/cgen-asm.c22
-rw-r--r--opcodes/frv-asm.c10
3 files changed, 30 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ffe1002..413f3dc 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2011-12-15 Nick Clifton <nickc@redhat.com>
+
+ * cgen-asm.c (cgen_parse_signed_integer): Add code to handle the
+ sign extension of negative values on a 64-bit host.
+ * frv-asm.c: Regenerate.
+
2011-12-13 Alan Modra <amodra@gmail.com>
* ppc-opc.c (ISA_V2): Define and use for relevant BO field tests.
diff --git a/opcodes/cgen-asm.c b/opcodes/cgen-asm.c
index f5fde40..901a578 100644
--- a/opcodes/cgen-asm.c
+++ b/opcodes/cgen-asm.c
@@ -1,6 +1,6 @@
/* CGEN generic assembler support code.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007
- Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
+ 2011 Free Software Foundation, Inc.
This file is part of libopcodes.
@@ -268,7 +268,23 @@ cgen_parse_signed_integer (CGEN_CPU_DESC cd,
&result, &value);
/* FIXME: Examine `result'. */
if (!errmsg)
- *valuep = value;
+ {
+ /* Handle the case where a hex value is parsed on a 64-bit host.
+ A value like 0xffffe000 is clearly intended to be a negative
+ 16-bit value, but on a 64-bit host it will be parsed by gas
+ as 0x00000000ffffe000.
+
+ The shifts below are designed not to produce compile time
+ warnings on a 32-bit host. */
+ if (sizeof (value) > 4
+ && result == CGEN_PARSE_OPERAND_RESULT_NUMBER
+ && value > 0
+ && (value & 0x80000000)
+ && ((value >> 31) == 1))
+ value |= -1 << 31;
+
+ *valuep = value;
+ }
return errmsg;
}
diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c
index dffa059..3da8261 100644
--- a/opcodes/frv-asm.c
+++ b/opcodes/frv-asm.c
@@ -465,11 +465,11 @@ parse_uhi16 (CGEN_CPU_DESC cd,
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
{
- /* If bfd_vma is wider than 32 bits, but we have a sign-
- or zero-extension, truncate it. */
- if (value >= - ((bfd_vma)1 << 31)
- || value <= ((bfd_vma)1 << 31) - (bfd_vma)1)
- value &= (((bfd_vma)1 << 16) << 16) - 1;
+ /* If value is wider than 32 bits then be
+ careful about how we extract bits 16-31. */
+ if (sizeof (value) > 4)
+ value &= (((bfd_vma)1 << 16) << 16) - 1;
+
value >>= 16;
}
*valuep = value;